CY74FCT377TSOIC [TI]
8-Bit Register; 8位寄存器
| 型号： | CY74FCT377TSOIC |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8-Bit Register |
| 文件： | 总7页 (文件大小：74K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1CY54/74FCT377T
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY54/74FCT377T
8-Bit Register
SCCS023 - May1994 - Revised March 2000
• Clock Enable for address and data synchronization
Features
application
• Function, pinout and drive compatible with FCT and
• Eight edge-triggered D flip-flops
• Extended commercial range of −40˚C to +85˚C
F logic
• FCT-C speed at 5.2 ns max. (Com’l)
FCT-A speed at 7.2 ns max. (Com’l)
• Reduced VOH (typically = 3.3V) versions of equivalent
FCT functions
• Edge-rate control circuitry for significantly improved
noise characteristics
• Power-off disable feature
• Matched rise and fall times
• ESD > 2000V
Functional Description
The FCT377T has eight triggered D-type flip-flops with
individual D inputs. The common buffered clock inputs (CP)
loads all flip-flops simultaneously when the Clock Enable (CE)
is LOW. The register is fully edge-triggered. The state of each
D input, one set-up time before the LOW-to-HIGH clock
transition, is transferred to the corresponding flip-flop’s O out-
put. The CE input must be stable only one set-up time prior to
the LOW-to-HIGH clock transition for predictable operation.
• Fully compatible with TTL input and output logic levels
• Sink Current
64 mA (Com’l),
32 mA (Mil)
32 mA (Com’l),
12 mA (Mil)
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Source Current
Logic Block Diagram
D
0
D
D
2
D
D
D
5
D
D
7
1
3
4
6
CE
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP
CP
CP
CP
CP
CP
CP
CP
CP
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
Pin Configurations
Logic Symbol
SOIC/QSOP
Top View
LCC
Top View
CE
1
V
20
19
18
17
16
CC
O
0
O
2
3
4
5
6
7
7
6
D
0
D
D
7
6 5 4
8
D
D
O
D
O
D
O
D
D
O
D
O
D
O
0
1
2
3
4
5
6
7
D
1
O
D
0
3
9
3
2
1
CP
O
1
O
O
D
6
5
GND
CP
O
0
10
11
CE
O
2
CE
O
15
14
O
4
V
CC
D
2
12
13
O
4
20
19
7
5
4
0
1
2
3
5
6
7
D
O
7
4
D
3
D
8
13
12
11
1516 17 18
14
O
3
O
9
4
GND
10
CP
Copyright © 2000, Texas Instruments Incorporated
CY54/74FCT377T
Supply Voltage to Ground Potential............... –0.5V to +7.0V
DC Input Voltage ........................................... –0.5V to +7.0V
DC Output Voltage......................................... –0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ......120 mA
Power Dissipation..........................................................0.5W
Function Table[1]
Inputs
Outputs
Operating
Mode
Load “1”
Load “0“
Hold
CP
CE
D
h
l
O
H
L
l
l
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
h
H
X
X
No Change
No Change
X
Operating Range
Maximum Ratings[2, 3]
Ambient
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Range
Range
Temperature
–40°C to +85°C
–55°C to +125°C
VCC
Commercial All
Military[4]
5V ± 5%
5V ± 10%
Storage Temperature .................................–65°C to +150°C
All
Ambient Temperature
with Power Applied......................................–65°C to +135°C
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
VCC=Min., IOH=–32 mA
Min.
2.0
Typ.[5]
Max.
Unit
V
VOH
Output HIGH Voltage
Com’l
Com’l
Mil
VCC=Min., IOH=–15 mA
VCC=Min., IOH=–12 mA
VCC=Min., IOL=64 mA
VCC=Min., IOL=32 mA
2.4
3.3
3.3
0.3
0.3
V
2.4
V
VOL
Output LOW Voltage
Com’l
Mil
0.55
0.55
V
V
VIH
VIL
VH
VIK
II
Input HIGH Voltage
Input LOW Voltage
Hysteresis[6]
2.0
V
0.8
V
All inputs
0.2
V
Input Clamp Diode Voltage
Input HIGH Current
Input HIGH Current
Input LOW Current
VCC=Min., IIN=–18 mA
VCC=Max., VIN=VCC
VCC=Max., VIN=2.7V
VCC=Max., VIN=0.5V
–0.7
–1.2
5
V
µA
µA
µA
mA
µA
IIH
IIL
±1
±1
IOS
Output Short Circuit Current[7] VCC=Max., VOUT=0.0V
–60
–120
–225
±1
IOFF
Power-Off Disable VCC=0V., VOUT=4.5V
Notes:
1.
H
h
L
l
X
Z
= HIGH Voltage Level
= HIGH Voltage Level one set-up time prior to the LOW-to-HIGH Clock Transition
= LOW Voltage Level
= LOW Voltage Level one set-up time prior to the LOW-to-HIGH Clock Transition
= Don’t Care
= HIGH Impedance
= LOW-to-HIGH clock transition
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
4. TA is the “instant on” case temperature.
5. Typical values are at VCC=5.0V, TA=+25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
2
CY54/74FCT377T
Capacitance[2]
Parameter
CIN
Description
Typ.[5]
Max.
10
Unit
pF
Input Capacitance
Output Capacitance
5
9
COUT
12
pF
Power Supply Characteristics
Parameter
ICC
Description
Test Conditions
Typ.[5]
0.1
Max.
Unit
mA
mA
Quiescent Power Supply Current
VCC=Max., VIN≤0.2V, VIN ≥ VCC–0.2V
VCC=Max., VIN=3.4V, f1=0, Outputs Open[8]
0.2
2.0
∆ICC
Quiescent Power Supply Current
(TTL inputs HIGH)
0.5
ICCD
Dynamic Power Supply Current[9] VCC=Max., One Bit Toggling,
50% Duty Cycle, Outputs Open,
0.06
0.7
0.12
1.4
mA/MHz
mA
CE=GND, VIN ≤ 0.2V or VIN ≥ VCC–0.2V
IC
Total Power Supply Current[10]
VCC=Max., f0=10 MHz,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=5 MHz,
CE=GND, VIN≤0.2V or VIN ≥ VCC–0.2V
VCC=Max., f0=10 MHz,
1.2
1.6
3.9
3.4
mA
mA
mA
50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=5 MHz, CE=GND,
VIN=3.4V or VIN=GND
VCC=Max., f0=10 MHz,
3.2[11]
50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
CE=GND, VIN≤0.2V or VIN≥VCC–0.2V
[11]
VCC=Max., f0=10 MHz,
12.2
50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
CE=GND, VIN=3.4V or VIN=GND
Notes:
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. IC
IC
=
=
=
=
=
=
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC
ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
Quiescent Current with CMOS input levels
Power Supply Current for a TTL HIGH input (VIN=3.4V)
Duty Cycle for TTL inputs HIGH
ICC
∆ICC
DH
NT
ICCD
f0
Number of TTL inputs at DH
Dynamic Current caused by an input transition pair (HLH or LHL)
Clock frequency for registered devices, otherwise zero
Input signal frequency
f1
N1
Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
3
CY54/74FCT377T
Switching Characteristics Over the Operating Range[12, 13]
FCT377T
FCT377AT
Commercial
Commercial
Military
Min. Max.
Fig.
Parameter
Description
Min.
Max.
Min.
Max.
Unit No.[14]
tPLH
tPHL
Propagation Delay Clock to
Output
2.0
13.0
2.0
2.0
1.5
3.5
1.5
7.0
8.3
2.0
7.2
ns
ns
ns
ns
ns
ns
1, 5
4
tS
Set-Up Time HIGH or LOW
Data to CP
2.0
1.5
3.5
1.5
6.0
2.0
1.5
3.5
1.5
6.0
tH
Hold Time HIGH or LOW
Data to CP
4
tW
tW
tW
Set-Up Time HIGH or LOW
CE to CP
4
Set-Up Time HIGH or LOW
CE to CP
Clock Pulse Width[15] HIGH or
LOW
4
6
FCT377CT
Military
Commercial
Fig.
Parameter
Description
Propagation Delay Clock to Output
Min.
Max.
Min.
Max.
Unit
No.[14]
tPLH
tPHL
2.0
5.5
2.0
5.2
ns
1, 5
tS
Set-Up Time, HIGH or LOW, Data to CP
Hold Time, HIGH or LOW, Data to CP
Set-Up Time, HIGH or LOW, CE to CP
Set-Up Time HIGH or LOW, CE to CP
Clock Pulse Width[15] HIGH or LOW
2.0
1.5
3.5
1.5
7.0
2.0
1.5
3.5
1.5
6.0
ns
ns
ns
ns
ns
4
4
4
4
6
tH
tW
tW
tW
Notes:
12. AC Characteristics specified with CL=50 pF as shown in Figure 1 of the “Parameter Measurement Information” in the General Information section.
13. Minimum limits are specified but not tested on Propagation Delays.
14. See “Parameter Measurement Information” in the General Information section.
15. With one data channel toggling, tW(L)=tW(H)=4.0 ns and tr=tf=1.0 ns.
Ordering Information—FCT377T
Speed
(ns)
Package
Name
Operating
Range
Ordering Code
CY74FCT377CTQCT
CY74FCT377CTSOC/SOCT
CY54FCT377CTLMB
CY74FCT377ATQCT
CY74FCT377ATSOC/SOCT
CY54FCT377TLMB
Package Type
20-Lead (150-Mil) QSOP
5.2
Q5
S5
Commercial
20-Lead (300-Mil) Molded SOIC
20-Pin Square Leadless Chip Carrier
20-Lead (150-Mil) QSOP
5.5
7.2
L61
Q5
S5
Military
Commercial
20-Lead (300-Mil) Molded SOIC
20-Pin Square Leadless Chip Carrier
20-Lead (150-Mil) QSOP
8.3
L61
Q5
Military
13.0
CY74FCT377TQCT
Commercial
Document #: 38-00279-B
4
CY54/74FCT377T
Package Diagrams
20-Pin Square Leadless Chip Carrier L61
MIL–STD–1835 C–2A
20-Lead Quarter Size Outline Q5
5
CY54/74FCT377T
Package Diagrams (continued)
20-Lead (300-Mil) Molded SOIC S5
6
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Copyright 2000, Texas Instruments Incorporated
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