CY74FCT399CTSOCE4 [TI]
Quad 2-Input Register; 四2输入寄存器
| 型号： | CY74FCT399CTSOCE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Quad 2-Input Register |
| 文件： | 总10页 (文件大小：261K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CY74FCT399T
QUAD 2-INPUT REGISTER
SCCS024A – MARCH 1994 – REVISED OCTOBER 2001
SO PACKAGE
(TOP VIEW)
Function, Pinout, and Drive Compatible
With FCT and F Logic
Reduced V
Equivalent FCT Functions
(Typically = 3.3 V) Versions of
OH
S
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Q
Q
I
A
0A
1A
1B
0B
D
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
I
I
I
I
0D
1D
1C
0C
I
I
I
I
Supports Partial-Power-Down Mode
off
Operation
Q
Q
C
CP
B
GND
Matched Rise and Fall Times
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
Fully Compatible With TTL Input and
Output Logic Levels
64-mA Output Sink Current
32-mA Output Source Current
description
The CY74FCT399T is a high-speed quad 2-input register that selects four bits of data from either of two sources
(ports) under control of a common select (S) input. Selected data are transferred to a 4-bit output register
synchronous with the low-to-high transition of the clock (CP) input. The 4-bit D-type output register is fully edge
triggered. The data inputs (I , I ) and S input must be stable only one setup time prior to, and hold time after,
0X 1X
the low-to-high transition of CP for predictable operation. The CY74FCT399T has noninverted outputs.
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,
off
off
preventing damaging current backflow through the device when it is powered down.
PIN DESCRIPTION
NAME
S
DESCRIPTION
Common select input
CP
Clock-pulse input (active rising edge)
Data inputs from source 0
I
I
0
Data inputs from source 1
1
Q
Register noninverted outputs
ORDERING INFORMATION
SPEED
(ns)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
Tube
6.1
6.1
7
CY74FCT399CTSOC
CY74FCT399CTSOCT
CY74FCT399ATSOC
CY74FCT399ATSOCT
SOIC – SO
SOIC – SO
FCT399C
FCT399A
Tape and reel
Tube
–40°C to 85°C
Tape and reel
7
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT399T
QUAD 2-INPUT REGISTER
SCCS024A – MARCH 1994 – REVISED OCTOBER 2001
FUNCTION TABLE
INPUTS
OUTPUT
Q
S
l
I
0
I
1
l
X
X
l
L
H
L
l
h
h
h
X
X
h
H
H = High logic level, h = High logic level
one setup time prior to the low-to-high
clock transition, L = Low logic level,
l = Low logic level one setup time prior
to the low-to-high clock transition,
X = Don’t care
logic diagram
3
I
0A
1
4
S
D
2
Q
Q
A
I
I
CP
1A
6
0B
D
D
D
7
10
15
Q
Q
Q
Q
Q
Q
B
C
D
5
I
I
CP
CP
CP
1B
11
0C
12
14
I
I
1C
0D
13
9
I
1D
CP
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT399T
QUAD 2-INPUT REGISTER
SCCS024A – MARCH 1994 – REVISED OCTOBER 2001
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA
Package thermal impedance, θ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W
JA
Ambient temperature range with power applied, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
MIN NOM
MAX
UNIT
V
V
V
V
Supply voltage
4.75
2
5
5.25
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
V
IH
0.8
–32
64
V
IL
I
I
mA
mA
°C
OH
OL
T
A
–40
85
NOTE 2: All unused inputs of the device must be held at V
or GND to ensure proper device operation.
CC
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT399T
QUAD 2-INPUT REGISTER
SCCS024A – MARCH 1994 – REVISED OCTOBER 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
TYP
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
V
V
V
V
= 4.75,
= 4.75
= 4.75,
I
I
I
I
= –18 mA
–0.7
–1.2
V
IK
CC
CC
CC
IN
= –32 mA
= –15 mA
= 64 mA
2
OH
OH
OL
V
OH
V
2.4
3.3
0.3
0.2
V
V
0.55
V
OL
All inputs
V
H
I
I
I
I
I
I
V
V
V
V
V
V
V
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 0 V,
V
V
V
V
V
V
= V
CC
5
±1
µA
µA
µA
mA
µA
mA
mA
I
CC
CC
CC
CC
CC
CC
CC
CC
IN
= 2.7 V
= 0.5 V
IH
IN
±1
IL
IN
‡
= 0 V
–60
–120
–225
±1
OS
off
CC
OUT
OUT
= 4.5 V
= 5.25 V,
≤ 0.2 V,
V ≥ V
IN CC
– 0.2 V
0.1
0.5
0.2
2
IN
§
∆I
= 5.25 V, V = 3.4 V , f = 0, Outputs open
IN
CC
1
V
V
= 5.25 V, One input switching at 50% duty cycle, Outputs open,
≤ 0.2 V or V ≥ V – 0.2 V
mA/
MHz
¶
I
0.06
0.12
CCD
IN
IN CC
V
V
≤ 0.2 V or
One input switching
at f = 5 MHz
1
at 50% duty cycle
IN
IN
0.7
1.2
1.6
1.4
3.4
≥ V
CC
– 0.2 V
V
= 5.25 V,
= 10 MHz,
CC
V
IN
= 3.4 V or GND
f
#
I
C
mA
Outputs open,
S = Steady state
V
IN
V
IN
≤ 0.2 V or
Four inputs switching
at f = 5 MHz
1
at 50% duty cycle
||
3.2
8.2
≥ V
– 0.2 V
CC
||
V
IN
= 3.4 V or GND
2.9
5
C
C
10
12
pF
pF
i
9
o
†
‡
Typical values are at V
CC
= 5 V, T = 25°C.
A
Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus
and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise,
prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In
any sequence of parameter tests, I
tests should be performed last.
OS
§
¶
#
Per TTL-driven input (V = 3.4 V); all other inputs at V
or GND
IN CC
This parameter is derived for use in total power-supply calculations.
= I + ∆I × D × N + I (f /2 + f × N )
I
C
CC
CC
H
T
CCD
0
1
1
Where:
I
I
∆I
D
N
= Total supply current
= Power-supply current with CMOS input levels
C
CC
CC
H
T
= Power-supply current for a TTL high input (V = 3.4 V)
IN
= Duty cycle for TTL inputs high
= Number of TTL inputs at D
H
I
f
f
= Dynamic current caused by an input transition pair (HLH or LHL)
= Clock frequency for registered devices, otherwise zero
= Input signal frequency
CCD
0
1
N
= Number of inputs changing at f
1
1
All currents are in milliamperes and all frequencies are in megahertz.
||
Values for these conditions are examples of the I
CC
formula.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT399T
QUAD 2-INPUT REGISTER
SCCS024A – MARCH 1994 – REVISED OCTOBER 2001
timing requirement over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
CY74FCT399AT
MIN MAX
CY74FCT399CT
MIN MAX
UNIT
ns
t
t
Pulse duration, CP high or low
Setup time, high or low
5
5
w
I
before CP↑
3.5
8.5
1
3.5
8.5
1
n
ns
su
S before CP↑
after CP↑
I
n
t
h
Hold time, high or low
ns
S after CP↑
0
0
switching characteristics over operating free-air temperature range (see Figure 1)
CY74FCT399AT
CY74FCT399CT
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
2.5
MAX
MIN
2.5
MAX
6.1
t
t
7
7
PLH
CP
Q
ns
2.5
2.5
6.1
PHL
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT399T
QUAD 2-INPUT REGISTER
SCCS024A – MARCH 1994 – REVISED OCTOBER 2001
PARAMETER MEASUREMENT INFORMATION
7 V
Open
GND
S1
500 Ω
From Output
Under Test
From Output
Under Test
Test
Point
TEST
S1
t
/t
Open
7 V
PLH PHL
t /t
C
= 50 pF
C
= 50 pF
L
L
500 Ω
500 Ω
PLZ PZL
/t
(see Note A)
(see Note A)
t
Open
PHZ PZH
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR
3-STATE OUTPUTS
3 V
0 V
1.5 V
Timing Input
Data Input
t
w
t
h
t
3 V
su
3 V
0 V
1.5 V
Input
1.5 V
1.5 V
1.5 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
3 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
t
t
t
t
t
t
PLH
PHL
PLH
PZL
PZH
PLZ
≈3.5 V
V
Output
Waveform 1
(see Note B)
OH
In-Phase
Output
1.5 V
1.5 V
1.5 V
1.5 V
V
V
+ 0.3 V
OL
V
OL
V
OL
t
t
PHL
PHZ
V
V
V
OH
OH
Output
Waveform 2
(see Note B)
Out-of-Phase
Output
– 0.3 V
OH
1.5 V
1.5 V
≈0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
30-Aug-2005
PACKAGING INFORMATION
Orderable Device
CY74FCT399ATQCT
CY74FCT399ATQCTE4
CY74FCT399ATSOC
CY74FCT399ATSOCE4
CY74FCT399ATSOCT
CY74FCT399ATSOCTE4
CY74FCT399CTQCT
CY74FCT399CTQCTE4
CY74FCT399CTSOC
CY74FCT399CTSOCE4
CY74FCT399CTSOCT
CY74FCT399CTSOCTE4
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SSOP/
QSOP
DBQ
16
16
16
16
16
16
16
16
16
16
16
16
2500 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
SSOP/
QSOP
DBQ
DW
DW
DW
DW
DBQ
DBQ
DW
DW
DW
DW
2500 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SSOP/
QSOP
2500 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
SSOP/
QSOP
2500 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
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enhancements, improvements, and other changes to its products and services at any time and to discontinue
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