CY74FCT540TSOIC [TI]
8-Bit Buffers/Line Drivers; 8位缓冲器/线路驱动器
| 型号： | CY74FCT540TSOIC |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8-Bit Buffers/Line Drivers |
| 文件： | 总8页 (文件大小：84K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY54/74FCT540T
CY54/74FCT541T
SCCS029 - May 1994 - Revised March 2000
8-Bit Buffers/Line Drivers
Features
Functional Description
• Function, pinout, and drive compatible with FCT and
The FCT540T inverting buffer/line driver and the FCT541T
non-inverting buffer/line driver are designed to be employed as
memory address drivers, clock drivers, and bus-oriented
transmitters/receivers. The devices provide speed and drive
capabilities equivalent to their fastest bipolar logic
counterparts while reducing power dissipation. The input and
output voltage levels allow direct interface with TTL, NMOS,
and CMOS devices without external components.
F logic
• FCT-C speed at 4.1 ns max. (Com’l)
FCT-A speed at 4.8 ns max. (Com’l)
• Reduced VOH (typically = 3.3V) versions of equivalent
FCT functions
• Edge-rate control circuitry for significantly improved
noise characteristics
• Power-off disable feature
• ESD > 2000V
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
• Matched rise and fall times
• Fully compatible with TTL input and output logic levels
• Sink current
Source current
64 mA (Com’l), 48 mA (Mil)
32 mA (Com’l), 12 mA (Mil)
• Extended commercial range of −40˚C to +85˚C
Pin Configurations
Logic Block Diagram—FCT540T
CERDIP/SOIC/QSOP
Top View
OE
A
OE
B
1
20
19
18
17
16
OE
V
A
CC
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
2
OE
B
3
O
O
O
0
1
4
5
2
FCT540T
6
O
15
14
3
4
5
6
7
O
O
O
O
7
8
13
12
11
9
GND
10
Logic Block Diagram—FCT541T
CERDIP/DIP/SOIC/QSOP
Top View
OE
OE
B
A
1
20
19
18
17
16
OE
V
CC
A
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
2
3
4
5
6
OE
B
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
FCT541T
15
14
7
8
9
13
12
11
GND
10
Copyright © 2000, Texas Instruments Incorporated
CY54/74FCT540T
CY54/74FCT541T
Function Table FCT540T[1]
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................. –65°C to +135°C
Inputs
OEA
OEB
D
Output
Supply Voltage to Ground Potential............... –0.5V to +7.0V
DC Input Voltage ........................................... –0.5V to +7.0V
DC Output Voltage......................................... –0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ......120 mA
Power Dissipation..........................................................0.5W
L
L
H
L
L
H
L
H
X
H
L
Z
Function Table FCT541T[1]
Inputs
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
OEA
OEB
D
Output
L
L
H
L
L
H
L
H
X
L
H
Z
Operating Range
Ambient
Range
Range
Temperature
–40°C to +85°C
–55°C to +125°C
VCC
Maximum Ratings[2, 3]
Commercial T, AT, CT
Military[4]
5V ± 5%
5V ± 10%
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
All
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
VCC = Min., IOH = –32 mA
Min.
2.0
Typ.[5]
Max.
Unit
V
VOH
Output HIGH Voltage
Com’l
Com’l
Mil
VCC = Min., IOH = –15 mA
VCC = Min., IOH = –12 mA
VCC = Min., IOL = 64 mA
VCC = Min., IOL = 48 mA
2.4
3.3
3.3
0.3
0.3
V
2.4
V
VOL
Output LOW Voltage
Com’l
Mil
0.55
0.55
V
V
VIH
VIL
VH
VIK
II
Input HIGH Voltage
Input LOW Voltage
Hysteresis[6]
2.0
V
0.8
V
All inputs
0.2
V
Input Clamp Diode Voltage
Input HIGH Current
Input HIGH Current
Input LOW Current
VCC = Min., IIN = –18 mA
VCC = Max., VIN = VCC
VCC = Max., VIN = 2.7V
VCC = Max., VIN = 0.5V
VCC = Max., VOUT = 2.7V
–0.7
–1.2
5
V
µA
µA
µA
µA
IIH
±1
±1
10
IIL
IOZH
Off State HIGH-Level Output
Current
IOZL
IOS
Off State LOW-Level
Output Current
Output Short Circuit Current[7] VCC = Max,. VOUT = 0.0V
VCC = Max., VOUT = 0.5V
–10
µA
–60
–120
–225
mA
IOFF
Power-Off Disable VCC = 0V, VOUT = 4.5V
±1
µA
Notes:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
4. TA is the “instant on” case temperature.
5. Typical values are at VCC=5.0V, TA=+25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parametric
tests, IOS tests should be performed last.
2
CY54/74FCT540T
CY54/74FCT541T
Capacitance[6]
Parameter
Description
Test Conditions
Test Conditions
Typ. [5] Max.
Unit
pF
CIN
Input Capacitance
5
9
10
12
COUT
Output Capacitance
pF
Power Supply Characteristics
Parameter
ICC
Description
Typ.[5]
0.1
Max.
Unit
mA
mA
Quiescent Power Supply Current VCC=Max., VIN ≤ 0.2V, VIN ≥ VCC–0.2V
Quiescent Power Supply Current VCC = Max., VIN = 3.4V, f1 = 0, Outputs Open[8]
(TTL inputs)
0.2
2.0
∆ICC
0.5
ICCD
Dynamic Power Supply Current[9] VCC = Max., 50% Duty Cycle, Outputs Open,
One Bit Toggling at f1 = 10 MHz,
0.06
0.7
1.0
1.3
3.3
0.12
mA/MHz
OEA=OEB=GND, or OEA=GND, OEB=VCC,
VIN ≤ 0.2V or VIN ≥ VCC–0.2V
IC
Total Power Supply Current[10]
VCC=Max., 50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=10 MHz,
1.4
mA
OEA=OEB=GND, or OEA=GND, OEB=VCC,
VIN≤0.2V or VIN≥VCC–0.2V
VCC = Max., 50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=10 MHz,
OEA=OEB=GND, or OEA=GND, OEB=VCC,
VIN = 3.4V or VIN = GND
2.4
mA
VCC = Max., 50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1= 2.5 MHz,
OEA=OEB=GND, or OEA=GND, OEB=VCC,
2.6[11]
mA
VIN ≤ 0.2V or VIN ≥ VCC –0.2V
VCC = Max., 50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
OEA=OEB=GND, or OEA=GND, OEB=VCC,
VIN = 3.4V or VIN = GND
10.6[11]
mA
Notes:
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. IC
IC
=
=
=
=
=
=
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC
ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
Quiescent Current with CMOS input levels
Power Supply Current for a TTL HIGH input (VIN=3.4V)
Duty Cycle for TTL inputs HIGH
ICC
∆ICC
DH
NT
ICCD
f0
Number of TTL inputs at DH
Dynamic Current caused by an input transition pair (HLH or LHL)
Clock frequency for registered devices, otherwise zero
Input signal frequency
f1
N1
Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
3
CY54/74FCT540T
CY54/74FCT541T
Switching Characteristics Over the Operating Range[12]
FCT540T/FCT541T FCT540AT/FCT541AT
Commercial Commercial
Min. Max. Min. Max.
Parameter
Description
Propagation Delay
Data to Output (FCT540)
Unit
Fig. No.[13]
tPLH
tPHL
1.5
1.5
1.5
1.5
8.5
1.5
1.5
1.5
1.5
4.8
4.8
6.2
5.6
ns
1, 2
tPLH
tPHL
Propagation Delay
Data to Output (FCT541)
8.0
ns
ns
ns
1, 3
tPZH
tPZL
Output Enable Time
Output Disable Time
10.0
9.5
1, 7, 8
1, 7, 8
tPHZ
tPLZ
FCT540DT/
FCT541DT
FCT540CT/FCT541CT
Military Commercial
Commercial
Fig.
Parameter
Description
Min.
Max.
Min.
Max.
Min.
Max.
Unit
No.[13]
tPLH
tPHL
Propagation Delay
Data to Output (FCT540)
1.5
1.5
1.5
1.5
4.7
1.5
4.1
1.5
3.8
ns
ns
ns
ns
1, 2
tPLH
tPHL
Propagation Delay
Data to Output (FCT541)
4.6
6.5
5.7
1.5
1.5
1.5
4.1
5.8
5.2
1.5
1.5
1.5
3.8
5.2
5.0
1, 3
tPZH
tPZL
Output Enable Time
1, 7, 8
1, 7, 8
tPHZ
tPLZ
Output Disable Time
Shaded areas contain preliminary information.
Notes:
12. Minimum limits are specified but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
4
CY54/74FCT540T
CY54/74FCT541T
Ordering Information—FCT540T
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
CY74FCT540CTQCT
CY54FCT540CTDMB
Package Type
20-Lead (150-Mil) QSOP
20-Lead (300-Mil) CerDIP
4.1
Q5
D6
Commercial
Military
4.7
Ordering Information—FCT541T
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
CY74FCT541CTQCT
Package Type
4.1
Q5
S5
D6
P5
Q5
S5
S5
20-Lead (150-Mil) QSOP
Commercial
CY74FCT541CTSOC/SOCT
CY54FCT541CTDMB
20-Lead (300-Mil) Molded SOIC
20-Lead (300-Mil) CerDIP
4.6
4.8
Military
CY74FCT541ATPC
20-Lead (300-Mil) Molded DIP
20-Lead (150-Mil) QSOP
Commercial
CY74FCT541ATQCT
CY74FCT541ATSOC/SOCT
CY74FCT541TSOC/SOCT
20-Lead (300-Mil) Molded SOIC
20-Lead (300-Mil) Molded SOIC
8.0
Commercial
Document #: 38-00260-B
Package Diagrams
20-Lead (300-Mil) CerDIP D6
MIL-STD-1835 D-8 Config.A
5
CY54/74FCT540T
CY54/74FCT541T
Package Diagrams (continued)
20-Lead (300-Mil) Molded DIP P5
20-Lead Quarter Size Outline Q5
6
CY54/74FCT540T
CY54/74FCT541T
Package Diagrams (continued)
20-Lead (300-Mil) Molded SOIC S5
7
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Copyright 2000, Texas Instruments Incorporated
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