CY74FCT574ATSOCR [TI]
FCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, SOIC-20;
| 型号： | CY74FCT574ATSOCR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | FCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, SOIC-20 驱动 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总13页 (文件大小：688K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CY54FCT574T, CY74FCT574T
8-BIT REGISTERS
WITH 3-STATE OUTPUTS
SCCS073 – OCTOBER 2001
CY54FCT574T . . . D PACKAGE
CY74FCT574T . . . Q OR SO PACKAGE
(TOP VIEW)
Function, Pinout, and Drive Compatible
With FCT and F Logic
Reduced V
of Equivalent FCT Functions
(Typically = 3.3 V) Versions
OH
OE
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
D
D
1
D
O
O
O
O
O
O
O
O
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
0
0
1
2
3
4
5
6
7
2
D
3
D
I
Supports Partial-Power-Down Mode
off
Operation
4
D
D
D
5
6
7
Matched Rise and Fall Times
Fully Compatible With TTL Input and
Output Logic Levels
GND
CP
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
CY54FCT574T . . . L PACKAGE
(TOP VIEW)
– 1000-V Charged-Device Model (C101)
Edge-Triggered D-Type Inputs
250-MHz Typical Switching Rate
3
2
1
20 19
18
D
D
D
D
D
O
O
O
O
O
4
5
6
7
8
2
3
4
5
6
1
2
3
4
5
CY54FCT574T
– 32-mA Output Sink Current
– 12-mA Output Source Current
17
16
15
14
CY74FCT574T
– 64-mA Output Sink Current
– 32-mA Output Source Current
9 10 11 12 13
3-State Outputs
description
The ’FCT574T devices are high-speed, low-power, octal D-type flip-flops, featuring separate D-type inputs for
each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and
output-enable (OE) inputs are common to all flip-flops. The ’FCT574T are identical to ’FCT374T, except for a
flow-through pinout to simplify board design. The eight flip-flops in the ’FCT574T store the state of their
individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When
OE is low, the contents of the eight flip-flops are available at the outputs. When OE is high, the outputs are in
the high-impedance state. The state of OE does not affect the state of the flip-flops.
These devices are fully specified for partial-power-down applications using I . The I circuitry disables the
off
off
outputs, preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
unless otherwise noted. On all other products, production
testing of all parameters.
processing does not necessarily include testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY54FCT574T, CY74FCT574T
8-BIT REGISTERS
WITH 3-STATE OUTPUTS
SCCS073 – OCTOBER 2001
ORDERING INFORMATION
SPEED
(ns)
ORDERABLE
TOP-SIDE
MARKING
†
PACKAGE
T
A
PART NUMBER
CY74FCT574CTQCT
CY74FCT574CTSOC
CY74FCT574CTSOCT
CY74FCT574ATQCT
CY74FCT574ATSOC
CY74FCT574ATSOCT
CY74FCT574TQCT
QSOP – Q
SOIC – SO
QSOP – Q
SOIC – SO
QSOP – Q
SOIC – SO
CDIP – D
Tape and reel
Tube
5.2
5.2
5.2
6.5
6.5
6.5
10
FCT574C
FCT574C
FCT574A
FCT574A
FCT574
Tape and reel
Tape and reel
Tube
–40°C to 85°C
Tape and reel
Tape and reel
Tube
10
10
CY74FCT574TSOC
CY74FCT574TSOCT
CY54FCT574CTDMB
CY54FCT574ATDMB
CY54FCT574ATLMB
FCT574
Tape and reel
Tube
6.2
7.2
7.2
–55°C to 125°C CDIP – D
LCC – L
Tube
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
OUTPUT
O
D
H
L
CP
↑
OE
L
H
L
↑
L
X
X
H
Z
H = High logic level, L = Low logic level,
X = Don’tcare,Z=High-impedancestate,
↑ = Low-to-high clock transition
logic diagram (positive logic)
1
OE
11
CP
C1
Q
1D
19
O
0
2
D
0
To Seven Other Channels
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY54FCT574T, CY74FCT574T
8-BIT REGISTERS
WITH 3-STATE OUTPUTS
SCCS073 – OCTOBER 2001
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA
Package thermal impedance, θ (see Note 1): Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68°C/W
JA
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
Ambient temperature range with power applied, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder“recommendedoperatingconditions”isnotimplied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
CY54FCT574T
CY74FCT574T
MIN NOM MAX
UNIT
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.75
2
5
5.25
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
IH
0.8
–12
32
0.8
–32
64
V
IL
I
I
mA
mA
°C
OH
OL
T
A
–55
125
–40
85
NOTE 2: All unused inputs of the device must be held at V
or GND to ensure proper device operation.
CC
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY54FCT574T, CY74FCT574T
8-BIT REGISTERS
WITH 3-STATE OUTPUTS
SCCS073 – OCTOBER 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
CY54FCT574T
CY74FCT574T
PARAMETER
TEST CONDITIONS
UNIT
†
TYP
†
TYP
MIN
MAX
MIN
MAX
V
V
V
= 4.5 V,
= 4.75 V,
= 4.5 V,
I
I
I
I
I
I
I
= –18 mA
= –18 mA
–0.7
–1.2
CC
CC
CC
IN
V
V
IK
–0.7
–1.2
IN
= –12 mA
= –32 mA
= –15 mA
= 32 mA
= 64 mA
2.4
3.3
OH
OH
OH
OL
OL
V
OH
2
V
V
CC
= 4.75 V
2.4
3.3
V
V
= 4.5 V,
0.3
0.2
0.55
CC
V
V
V
V
OL
= 4.75 V,
0.3
0.2
0.55
CC
All inputs
hys
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.25 V,
= 5.5 V,
= 5.25 V,
= 5.5 V,
= 5.25 V,
= 0 V,
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= V
= V
5
±1
±1
IN
IN
IN
IN
IN
IN
CC
CC
I
µA
I
5
= 2.7 V
= 2.7 V
= 0.5 V
= 0.5 V
I
IH
µA
±1
I
I
I
µA
µA
IL
±1
±1
= 4.5 V
= 0 V
±1
off
OS
OUT
OUT
OUT
= 5.5 V,
= 5.25 V,
= 5.5 V,
= 5.25 V,
= 5.5 V,
= 5.25 V,
= 5.5 V,
= 5.25 V,
–60
–120
–225
‡
mA
= 0 V
–60
–120
–225
10
= 2.7 V
10
–10
0.2
IN
IN
IN
IN
IN
IN
I
I
I
µA
µA
OZH
OZL
CC
= 2.7 V
= 0.5 V
= 0.5 V
≤ 0.2 V,
≤ 0.2 V,
–10
0.2
2
V
V
≥ V
≥ V
– 0.2 V
– 0.2 V
0.1
0.5
IN
CC
mA
mA
0.1
0.5
IN
CC
§
= 5.5 V, V = 3.4 V , f = 0, Outputs open
IN
2
1
∆I
CC
§
= 5.25 V, V = 3.4 V , f = 0, Outputs open
IN
1
†
‡
Typical values are at V
= 5 V, T = 25°C.
CC
A
Notmorethanoneoutputshouldbeshortedatatime.Durationofshortshouldnotexceedonesecond.Theuseofhigh-speedtestapparatusand/or
sample-and-holdtechniquesarepreferabletominimizeinternalchipheatingandmoreaccuratelyreflectoperationalvalues.Otherwise,prolonged
shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence
of parameter tests, I
Per TTL-driven input (V = 3.4 V); all other inputs at V
tests should be performed last.
OS
§
or GND
IN CC
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY54FCT574T, CY74FCT574T
8-BIT REGISTERS
WITH 3-STATE OUTPUTS
SCCS073 – OCTOBER 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (continued)
CY54FCT574T
CY74FCT574T
PARAMETER
TEST CONDITIONS
UNIT
†
TYP
†
TYP
MIN
MAX
MIN
MAX
V
= 5.5 V, Outputs open,
CC
One bit switching at 50% duty cycle, OE = GND,
0.06
0.12
V
≤ 0.2 V or V ≥ V
– 0.2 V
IN
IN CC
mA/
MHz
¶
I
CCD
V
CC
= 5.25 V, Outputs open,
One bit switching at 50% duty cycle, OE = GND,
0.06
0.12
V
IN
≤ 0.2 V or V ≥ V – 0.2 V
IN CC
One bit
switching
V
V
≤ 0.2 V or
IN
IN
0.7
1.2
1.6
3.9
1.4
3.4
≥ V
– 0.2 V
CC
at f = 5 MHz
1
at 50% duty
cycle
V
= 5.5 V,
= 10 MHz,
CC
V
IN
= 3.4 V or GND
f
0
Outputs open,
OE = GND
Eight bits
switching
V
IN
V
IN
≤ 0.2 V or
||
3.2
≥ V
– 0.2 V
CC
at f = 2.5 MHz
1
at 50% duty
cycle
||
12.2
V
IN
= 3.4 V or GND
I
C
mA
One bit
switching
V
V
≤ 0.2 V or
IN
IN
0.7
1.2
1.6
3.9
1.4
3.4
≥ V
– 0.2 V
CC
at f = 5 MHz
1
at 50% duty
cycle
V
= 5.25 V,
CC
= 10 MHz,
V
IN
= 3.4 V or GND
f
Outputs open,
OE = GND
Eight bits
switching
V
IN
V
IN
≤ 0.2 V or
||
3.2
≥ V
– 0.2 V
CC
at f = 2.5 MHz
1
at 50% duty
cycle
||
12.2
V
IN
= 3.4 V or GND
C
C
5
9
10
12
5
9
10
12
pF
pF
i
o
†
¶
#
Typical values are at V
CC
= 5 V, T = 25°C.
A
This parameter is derived for use in total power-supply calculations.
= I + ∆I × D × N + I (f /2 + f × N )
I
C
CC
CC
H
T
CCD
0
1
1
Where:
I
I
∆I
D
N
= Total supply current
= Power-supply current with CMOS input levels
C
CC
CC
H
T
= Power-supply current for a TTL high input (V = 3.4 V)
IN
= Duty cycle for TTL inputs high
= Number of TTL inputs at D
H
I
f
f
= Dynamic current caused by an input transition pair (HLH or LHL)
= Clock frequency for registered devices, otherwise zero
= Input signal frequency
CCD
0
1
N
= Number of inputs changing at f
1
1
All currents are in milliamperes and all frequencies are in megahertz.
||
Values for these conditions are examples of the I
CC
formula.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY54FCT574T, CY74FCT574T
8-BIT REGISTERS
WITH 3-STATE OUTPUTS
SCCS073 – OCTOBER 2001
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
CY54FCT574T CY54FCT574AT CY54FCT574CT
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
t
w
t
su
t
h
Pulse duration, CP high or low
Setup time, data before CP↑
Hold time, data after CP↑
7
6
6
ns
ns
ns
2
2
2
1.5
1.5
1.5
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
CY74FCT574T CY74FCT574AT CY74FCT574CT
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
t
w
t
su
t
h
Pulse duration, CP high or low
Setup time, data before CP↑
Hold time, data after CP↑
7
5
5
ns
ns
ns
2
2
2
1.5
1.5
1.5
switching characteristics over operating free-air temperature range (see Figure 1)
CY54FCT574T CY54FCT574AT CY54FCT574CT
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
ns
MIN
2
MAX
11
11
14
14
8
MIN
2
MAX
7.2
7.2
7.5
7.5
6.5
6.5
MIN
2
MAX
6.2
6.2
6.2
6.2
5.7
5.7
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
CP
OE
OE
O
O
O
2
2
2
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
ns
ns
8
switching characteristics over operating free-air temperature range (see Figure 1)
CY74FCT574T CY74FCT574AT CY74FCT574CT
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
ns
MIN
2
MAX
10
MIN
2
MAX
6.5
6.5
6.5
6.5
5.5
5.5
MIN
2
MAX
5.2
5.2
5.5
5.5
5
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
CP
OE
OE
O
O
O
2
10
2
2
1.5
1.5
1.5
1.5
12.5
12.5
8
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
ns
ns
8
5
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY54FCT574T, CY74FCT574T
8-BIT REGISTERS
WITH 3-STATE OUTPUTS
SCCS073 – OCTOBER 2001
PARAMETER MEASUREMENT INFORMATION
7 V
Open
GND
S1
500 Ω
From Output
Under Test
From Output
Under Test
Test
Point
TEST
/t
S1
t
Open
7 V
PLH PHL
C
= 50 pF
C
= 50 pF
L
L
500 Ω
500 Ω
t
/t
PLZ PZL
/t
(see Note A)
(see Note A)
t
Open
PHZ PZH
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR
3-STATE OUTPUTS
3 V
0 V
1.5 V
Timing Input
Data Input
t
w
t
h
t
3 V
su
3 V
0 V
1.5 V
Input
1.5 V
1.5 V
1.5 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
3 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
t
t
t
t
t
t
PLH
PHL
PLH
PZL
PZH
PLZ
≈3.5 V
V
Output
Waveform 1
(see Note B)
OH
In-Phase
Output
1.5 V
1.5 V
1.5 V
1.5 V
V
V
+ 0.3 V
OL
V
OL
V
OL
t
t
PHL
PHZ
V
V
V
OH
OH
Output
Waveform 2
(see Note B)
Out-of-Phase
Output
– 0.3 V
OH
1.5 V
1.5 V
≈0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-9222203M2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
9222203M2A
CY54FCT
574ATLMB
5962-9222203MRA
5962-9222205MRA
CY54FCT574ATLMB
ACTIVE
ACTIVE
ACTIVE
CDIP
CDIP
LCCC
J
J
20
20
20
1
1
1
TBD
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-55 to 125
5962-9222203MR
A
5962-9222205MR
A
FK
POST-PLATE
5962-
9222203M2A
CY54FCT
574ATLMB
CY74FCT574ATQCT
CY74FCT574ATQCTE4
CY74FCT574ATQCTG4
CY74FCT574ATSOC
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SSOP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SSOP
SSOP
DBQ
DBQ
DBQ
DW
20
20
20
20
20
20
20
20
20
20
20
2500
2500
2500
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
FCT574A
FCT574A
FCT574A
FCT574A
FCT574A
FCT574A
FCT574A
FCT574A
FCT574A
FCT574C
FCT574C
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
CY74FCT574ATSOCE4
CY74FCT574ATSOCG4
CY74FCT574ATSOCT
CY74FCT574ATSOCTE4
CY74FCT574ATSOCTG4
CY74FCT574CTQCT
DW
25
Green (RoHS
& no Sb/Br)
DW
25
Green (RoHS
& no Sb/Br)
DW
2000
2000
2000
2500
2500
Green (RoHS
& no Sb/Br)
DW
Green (RoHS
& no Sb/Br)
DW
Green (RoHS
& no Sb/Br)
DBQ
DBQ
Green (RoHS
& no Sb/Br)
CY74FCT574CTQCTE4
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
CY74FCT574CTQCTG4
CY74FCT574CTSOC
CY74FCT574CTSOCE4
CY74FCT574CTSOCG4
CY74FCT574CTSOCT
CY74FCT574CTSOCTE4
CY74FCT574CTSOCTG4
CY74FCT574TQCT
ACTIVE
SSOP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SSOP
SSOP
SSOP
SOIC
SOIC
SOIC
DBQ
20
20
20
20
20
20
20
20
20
20
20
20
20
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
FCT574C
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DW
DW
DW
DW
DW
DW
DBQ
DBQ
DBQ
DW
DW
DW
25
25
Green (RoHS
& no Sb/Br)
FCT574C
FCT574C
FCT574C
FCT574C
FCT574C
FCT574C
FCT574
FCT574
FCT574
FCT574
FCT574
FCT574
Green (RoHS
& no Sb/Br)
25
Green (RoHS
& no Sb/Br)
2000
2000
2000
2500
2500
2500
25
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
CY74FCT574TQCTE4
CY74FCT574TQCTG4
CY74FCT574TSOC
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
CY74FCT574TSOCE4
CY74FCT574TSOCG4
25
Green (RoHS
& no Sb/Br)
25
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CY74FCT574ATQCT
CY74FCT574ATSOCT
CY74FCT574CTQCT
CY74FCT574CTSOCT
CY74FCT574TQCT
SSOP
SOIC
SSOP
SOIC
SSOP
DBQ
DW
20
20
20
20
20
2500
2000
2500
2000
2500
330.0
330.0
330.0
330.0
330.0
16.4
24.4
16.4
24.4
16.4
6.5
10.8
6.5
9.0
13.0
9.0
2.1
2.7
2.1
2.7
2.1
8.0
12.0
8.0
16.0
24.0
16.0
24.0
16.0
Q1
Q1
Q1
Q1
Q1
DBQ
DW
10.8
6.5
13.0
9.0
12.0
8.0
DBQ
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
CY74FCT574ATQCT
CY74FCT574ATSOCT
CY74FCT574CTQCT
CY74FCT574CTSOCT
CY74FCT574TQCT
SSOP
SOIC
SSOP
SOIC
SSOP
DBQ
DW
20
20
20
20
20
2500
2000
2500
2000
2500
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
38.0
45.0
38.0
45.0
38.0
DBQ
DW
DBQ
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
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supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
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endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
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Copyright © 2013, Texas Instruments Incorporated
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