CY74FCT827CTSOC [TI]

10-Bit Buffer; 10位缓冲
CY74FCT827CTSOC
型号: CY74FCT827CTSOC
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

10-Bit Buffer
10位缓冲

总线驱动器 总线收发器
文件: 总7页 (文件大小:69K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY54/74FCT827T  
SCCS034 - September 1994 - Revised March 2000  
10-Bit Buffer  
Sink current  
64 mA (Com’l),  
Features  
32 mA (Mil)  
Source current  
32 mA (Com’l),  
12 mA (Mil)  
Function, pinout, and drive compatible with FCT, F, and  
AM29827 logic  
• FCT-C speed at 4.4 ns max. (Com’l)  
FCT-A speed at 5.0 ns max. (Com’l)  
Functional Description  
• Reduced VOH (typically = 3.3V) versions of equivalent  
FCT functions  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
• Power-off disable feature  
ESD > 2000V  
The FCT827T 10-bit bus driver provides high-performance  
bus interface buffering for wide data/address paths or buses  
carrying parity. The 10-bit buffers have NAND-ed output  
enables for maximum control flexibility. The FCT827T is  
designed for high-capacitance load drive capability, while providing  
low-capacitance bus loading at both inputs and outputs. All outputs  
are designed for low-capacitance bus loading in the  
high-impedance state and are designed with a power-off disable  
feature to allow for live insertion of boards.  
• Matched rise and fall times  
• Fully compatible with TTL input and output logic levels  
Logic Block Diagram  
Pin Configurations  
LCC/PLCC  
Top View  
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
Y
8
Y
9
1110 9  
12  
8 7 6 5  
D
D
GND  
NC  
4
D
D
8
1
13  
14  
3
2
1
9
0
OE  
1
15  
16  
17  
NC  
V
OE  
2
28  
27  
26  
CC  
Y
9
Y
0
Y
8
18  
Y
1
1920 2122 23 24 25  
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
OE OE  
1
2
SOIC/QSOP  
Top View  
1
OE  
1
24  
V
CC  
2
3
4
5
6
D
D
23  
22  
21  
Y
0
0
1
Y
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
Y
2
Y
3
20  
19  
18  
17  
16  
Y
4
Y
5
7
Y
6
8
Y
7
9
Y
8
10  
11  
12  
15  
14  
13  
Y
9
GND  
OE  
2
Function Table[1]  
Inputs  
OE2  
Outputs  
Y
OE1  
D
Function  
L
L
L
L
L
H
L
H
Transparent  
H
X
X
H
X
X
Z
Z
Three-State  
Note:  
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care  
Copyright © 2000, Texas Instruments Incorporated  
CY54/74FCT827T  
Maximum Ratings[2, 3]  
Power Dissipation..........................................................0.5W  
Static Discharge Voltage............................................>2001V  
(per MIL-STD-883, Method 3015)  
(Above which the useful life may be impaired. For user guide-  
lines, not tested.)  
Storage Temperature .................................65°C to +150°C  
Operating Range  
Ambient Temperature with  
Ambient  
Power Applied.............................................65°C to +135°C  
Range  
Range  
Temperature  
–40°C to + 85°C  
–55°C to +125°C  
VCC  
Supply Voltage to Ground Potential ............... –0.5V to +7.0V  
DC Input Voltage............................................ –0.5V to +7.0V  
DC Output Voltage......................................... –0.5V to +7.0V  
DC Output Current (Maximum Sink Current/Pin).......120 mA  
Commercial All  
Military[4]  
5V ± 5%  
5V ± 10%  
All  
Electrical Characteristics Over the Operating Range  
Parameter  
Description  
Test Conditions  
VCC= Min., IOH= –32 mA  
Min.  
2.0  
Typ.[5]  
Max.  
Unit  
V
VOH  
Output HIGH Voltage  
Com’l  
Com’l  
Mil  
VCC= Min., IOH= –15 mA  
VCC= Min., IOH= –12 mA  
VCC= Min., IOL= 64 mA  
VCC= Min., IOL= 32 mA  
2.4  
3.3  
3.3  
0.3  
0.3  
V
2.4  
V
VOL  
Output LOW Voltage  
Com’l  
Mil  
0.55  
0.55  
V
V
VIH  
VIL  
VH  
VIK  
II  
Input HIGH Voltage  
Input LOW Voltage  
Hysteresis[6]  
2.0  
V
0.8  
V
All inputs  
0.2  
V
Input Clamp Diode Voltage  
Input HIGH Current  
Input HIGH Current  
Input LOW Current  
VCC= Min., IIN= –18 mA  
VCC= Max., VIN= VCC  
VCC= Max., VIN= 2.7V  
VCC= Max., VIN= 0.5V  
VCC = Max., VOUT = 2.7V  
–0.7  
–1.2  
5
V
µA  
µA  
µA  
µA  
IIH  
±1  
±1  
10  
IIL  
IOZH  
Off State HIGH-Level Output  
Current  
IOZL  
Off State LOW-Level  
Output Current  
VCC = Max., VOUT = 0.5V  
–10  
µA  
IOS  
Output Short Circuit Current[7] VCC= Max., VOUT= 0.0V  
–60  
–120  
–225  
mA  
IOFF  
Power-Off Disable  
VCC= 0V, VOUT= 4.5V  
±1  
µA  
Capacitance[6]  
Parameter  
Description  
Typ.[5]  
Max.  
10  
Unit  
CIN  
Input Capacitance  
Output Capacitance  
5
9
pF  
pF  
COUT  
12  
Notes:  
2. Unless otherwise noted, these limits are over the operating free-air temperature range.  
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.  
4. TA is the “instant on” case temperature.  
5. Typical values are at VCC=5.0V, TA=+25˚C ambient.  
6. This parameter is specified but not tested.  
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample  
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of  
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter  
tests, IOS tests should be performed last.  
2
CY54/74FCT827T  
Power Supply Characteristics  
Parameter  
ICC  
Description  
Test Conditions  
Typ.[5]  
0.1  
Max.  
0.2  
Unit  
mA  
mA  
Quiescent Power Supply Current  
VCC=Max., VIN0.2V, VINVCC–0.2V  
VCC=Max., VIN=3.4V,[8]  
f1=0, Outputs Open  
ICC  
Quiescent Power Supply Current  
(TTL inputs HIGH)  
0.5  
2.0  
ICCD  
Dynamic Power Supply  
Current[9]  
VCC=Max., One Input Toggling,  
50% Duty Cycle, Outputs Open,  
OE1 or OE2=GND,  
0.06  
0.7  
0.12  
1.4  
mA/MHz  
VIN0.2V or VINVCC–0.2V  
IC  
Total Power Supply Current[10]  
VCC=Max., 50% Duty Cycle, Outputs Open,  
One Bit Toggling at f1=10 MHz,  
OE1 or OE2=GND,  
mA  
VIN0.2V or VINVCC–0.2V  
VCC=Max.,50% Duty Cycle, Outputs Open,  
One Bit Toggling at f1=10 MHz,  
OE1 or OE2=GND, VIN=3.4V or VIN=GND  
1.0  
1.6  
2.4  
mA  
mA  
VCC=Max., 50% Duty Cycle, Outputs Open,  
Ten Bits Toggling at f1=2.5 MHz,  
OE1 or OE2=GND,  
3.2[11]  
VIN0.2V or VINVCC–0.2V  
VCC=Max., 50% Duty Cycle, Outputs Open,  
Ten Bits Toggling at f1=2.5 MHz,  
4.1  
13.2[11]  
mA  
OE1 or OE2=GND,VIN=3.4V or VIN=GND  
Notes:  
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.  
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.  
10. IC  
IC  
=
=
=
=
=
=
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC  
ICC+ICCDHNT+ICCD(f0/2 + f1N1)  
Quiescent Current with CMOS input levels  
Power Supply Current for a TTL HIGH input VIN=3.4V)  
Duty Cycle for TTL inputs HIGH  
ICC  
ICC  
DH  
NT  
ICCD  
f0  
Number of TTL inputs at DH  
Dynamic Current caused by an input transition pair HLH or LHL)  
Clock frequency for registered devices, otherwise zero  
Input signal frequency  
f1  
N1  
Number of inputs changing at f1  
All currents are in milliamps and all frequencies are in megahertz.  
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.  
3
CY54/74FCT827T  
Switching Characteristics Over the Operating Range[12]  
FCT827AT  
Military Commercial  
Test Load Min. Max. Min. Max. Unit No.[13]  
Fig.  
Parameter  
Description  
tPLH  
tPHL  
Propagation Delay  
D to Y  
CL=50 pF  
RL=500Ω  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
9.0  
17.0  
13.0  
25.0  
9.0  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
8.0  
15.0  
12.0  
23.0  
9.0  
ns  
1, 3  
1, 3  
tPLH  
tPHL  
Propagation Delay  
D to Y[12]  
CL=300 pF  
RL=500Ω  
ns  
tPZH  
tPZL  
Output Enable Time  
OE to Y  
CL=50 pF  
RL=500Ω  
ns 1, 7, 8  
ns 1, 7, 8  
ns 1, 7, 8  
ns 1, 7, 8  
tPZH  
tPZL  
Output Enable Time  
OE to Y[12]  
CL=300 pF  
RL=500Ω  
tPHZ  
tPHL  
Output Disable Time  
OE to Y[12]  
CL=5 pF  
RL=500Ω  
tPHZ  
tPHL  
Output Disable Time  
OE to Y  
CL=50 pF  
RL=500Ω  
10.0  
10.0  
FCT827CT  
Commercial  
Parameter  
Description  
Propagation Delay D to Y  
Test Load  
Min.  
Max.  
Unit Fig. No.[13]  
tPLH  
tPHL  
CL=50 pF  
RL=500Ω  
1.5  
4.4  
10.0  
7.0  
ns  
ns  
ns  
ns  
ns  
ns  
1, 3  
tPLH  
tPHL  
Propagation Delay D to Y[12]  
Output Enable Time OE to Y  
Output Enable Time OE to Y[12]  
Output Disable Time OE to Y[12]  
Output Disable Time OE to Y  
CL=300 pF  
RL=500Ω  
1.5  
1.5  
1.5  
1.5  
1.5  
1, 3  
tPZH  
tPZL  
CL=50 pF  
RL=500Ω  
1, 7, 8  
1, 7, 8  
1, 7, 8  
1, 7, 8  
tPZH  
tPZL  
CL=300 pF  
RL=500Ω  
14.0  
5.7  
tPHZ  
tPHL  
CL=5 pF  
RL=500Ω  
tPHZ  
tPHL  
CL=50 pF  
RL=500Ω  
6.0  
Ordering Information  
Speed  
(ns)  
Package  
Name  
Operating  
Range  
Ordering Code  
Package Type  
4.4  
CY74FCT827CTQCT  
Q13  
S13  
Q13  
S13  
L64  
24-Lead (150-Mil) QSOP  
Commercial  
Commercial  
Military  
CY74FCT827CTSOC/SOCT  
CY74FCT827ATQCT  
24-Lead (300-Mil) Molded SOIC  
24-Lead (150-Mil) QSOP  
8.0  
CY74FCT827ATSOC/SOCT  
CY54FCT827ATLMB  
24-Lead (300-Mil) Molded SOIC  
28-Square Leadless Chip Carrier  
9.0  
Notes:  
12. Minimum limits are specified but not tested on Propagation Delays.  
13. See “Parameter Measurement Information” in the General Information section.  
Document #: 38-00326-A  
4
CY54/74FCT827T  
Package Diagrams  
28-Square Leadless Chip Carrier L64  
MIL-STD-1835 C-4  
24-Lead Quarter Size Outline Q13  
5
CY54/74FCT827T  
Package Diagrams (continued)  
24-Lead (300-Mil) Molded SOIC S13  
6
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
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safeguards must be provided by the customer to minimize inherent or procedural hazards.  
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Copyright 2000, Texas Instruments Incorporated  

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