D24067IM96G4Q1 [TI]
具有 TTL 输入的汽车类 5V、16:1、单通道模拟多路复用器 | DW | 24 | -40 to 85;
| 型号： | D24067IM96G4Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有 TTL 输入的汽车类 5V、16:1、单通道模拟多路复用器 | DW | 24 | -40 to 85 光电二极管 输出元件 复用器 |
| 文件： | 总14页 (文件大小：770K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CD74HCT4067-Q1
SCLS601B –DECEMBER 2004–REVISED AUGUST 2012
HIGH-SPEED CMOS LOGIC 16-CHANNEL ANALOG MULTIPLEXER and DEMULTIPLEXER
Check for Samples: CD74HCT4067-Q1
1 FEATURES
V Max, VIH = 2 V Min
•
CMOS Input Compatibility: II ≤ 1 µA at VOL, VOH
1
•
•
Qualified for Automotive Applications
AEC-Q100 Test Guidance With the Following
Results:
2 APPLICATIONS
•
•
•
Automotive
–
Device Temperature Grade 1: –40°C to 125°C
Ambient Operating Temperature Range
Analog Switch
Analog Multiplexer and Demultiplexer
–
–
Device HBM ESD Classification Level H1A
Device CDM ESD Classification Level C2
M PACKAGE
(TOP VIEW)
•
•
Wide Analog Input Voltage Range
Low ON Resistance
–
70 Ω Typical (VCC = 4.5 V)
COMMON I/O
V
I
1
24
23
22
21
20
19
18
17
16
15
14
13
CC
I
2
•
•
Fast Switching and Propagation Speeds
Break-Before-Make Switching
7
8
I
3
I
I
I
I
I
I
I
6
9
I
4
5
10
11
12
13
14
15
–
6 ns Typical (VCC = 4.5 V)
5
I
4
•
Fanout (Over Temperature Range)
6
I
3
–
–
Standard Outputs: 10 LSTTL Loads
Bus Driver Outputs: 15 LSTTL Loads
7
I
2
8
I
1
9
•
•
Balanced Propagation Delay and Transition Times
I
0
10
11
12
S
0
E
S
S
Significant Power Reduction Compared to LSTTL
Logic ICs
S
1
2
3
GND
•
•
4.5-V to 5.5-V Operation
Direct LSTTL Input Logic Compatibility: VIL = 0.8
3 DESCRIPTION
The CD74HCT4067-Q1 device is a digitally controlled analog switch that utilizes silicon-gate CMOS technology
to achieve operating speeds similar to LSTTL, with the low power consumption of standard CMOS integrated
circuits.
This analog multiplexer and demultiplexer controls analog voltages that may vary across the voltage supply
range. It is a bidirectional switch, thus allowing any analog input to be used as an output and vice-versa. The
switch has low (on) resistance and low (off) leakages. In addition, the device has an enable control that, when
high, disables all switches to their off state.
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER(3)
TOP-SIDE MARKING
–40°C to 125°C
DW-SOIC-M Reel of 2000
CD74HCT4067QM96Q1
HCT4067I
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) The suffix 96 denotes tape and reel.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CD74HCT4067-Q1
SCLS601B –DECEMBER 2004–REVISED AUGUST 2012
www.ti.com
Table 1. FUNCTION TABLE(1)
SELECTED
CHANNEL
S0
S1
S2
S3
E
X
L
X
L
X
L
X
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
None
0
H
L
L
L
L
1
H
H
L
L
L
2
H
L
L
L
3
H
H
H
H
L
L
4
H
L
L
L
5
H
H
L
L
6
H
L
L
7
H
H
H
H
H
H
H
H
8
H
L
L
L
9
H
H
L
L
10
11
12
13
14
15
H
L
L
H
H
H
H
H
L
L
H
H
H
(1) H = High level
L = Low level
X = Don't care
Logic Diagram (Positive Logic)
I
0
9
10
S
S
S
0
1
2
3
11
14
13
P
N
S
Binary
14 – Output Circuits
Same As Above
1 of 16
1
Common
Input/Output
Decoder
= 5 Stages
(With Analog Inputs)
S
N
I
1
to I
14
E = 4 Stages
P
N
16
15
I
15
E
2
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Product Folder Links: CD74HCT4067-Q1
CD74HCT4067-Q1
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SCLS601B –DECEMBER 2004–REVISED AUGUST 2012
3.1 ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
VALUE
UNIT
MIN
MAX
7
VCC
IIK
Supply voltage range(2)
−0.5
V
Input clamp current (VI < −0.5 V or VI > VCC + 0.5 V)
Output clamp current (VO < −0.5 V or VO > VCC + 0.5 V)
Switch current (VO > −0.5 V or VO < VCC + 0.5 V)
Output source or sink current per output pin (VO > −0.5 V or VO < VCC + 0.5 V)
Continuous current through VCC or GND
±20
±20
±25
±25
±50
150
150
400
250
mA
mA
mA
mA
mA
°C
°C
V
IOK
IO
IO
TJ
Maximum junction temperature
Tstg
Storage temperature range
−65
Human Body Model (HBM) AEC-Q100 classification level H1A
Charged Device Model (CDM) AEC-Q100 classification level C2
Latch-up per JESD78D
ESD
Rating
V
Class 1
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are referenced to GND, unless otherwise specified.
3.2 THERMAL INFORMATION
CD74HCT4067-Q1
THERMAL METRIC(1)
UNIT
DW (24 PINS)
θJA
Junction-to-ambient thermal resistance
62.3
30.5
31.8
7.7
θJCtop
θJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJB
31.5
N/A
θJCbot
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
3.3 RECOMMENDED OPERATING CONDITIONS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
4.5
2
MAX
UNIT
V
VCC
VIH
VIL
VI
Supply voltage
5.5
High-level input voltage
Low-level input voltage
Input voltage
V
0.8
VCC
VCC
500
125
V
0
0
V
VO
tt
Output voltage
V
Input transition (rise and fall) time
Operating free-air temperature
VCC = 4.5 V
0
ns
°C
TA
–40
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Copyright © 2004–2012, Texas Instruments Incorporated
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CD74HCT4067-Q1
SCLS601B –DECEMBER 2004–REVISED AUGUST 2012
www.ti.com
3.4 ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
TA = −40°C
to 125°C
TA = 25°C
MIN TYP
PARAMETER
TEST CONDITIONS
VI
VCC
UNIT
MAX MIN MAX
II
Logic input
VCC or GND
5.5 V
5.5 V
±0.1
±0.8
160
180
±1
±8
µA
µA
IIZ
VIS = VCC or GND, E = VCC
VIS = VCC or GND
IO = 1 mA
VCC or GND
VCC to GND
4.5 V
70
90
10
200
225
ron
Ω
VIS = VCC to GND
4.5 V
Δron
ICC
Between any two switches
4.5 V
Ω
VCC or GND
5.5 V
8
360
10
80
450
10
µA
µA
pF
ΔICC
CI
Per input pin: 1 unit load(1)
Control inputs
VCC − 2.1 V
4.5 V to 5.5 V
100
(1) For dual-supply systems, theoretical worst-case (VI = 2.4 V, VCC = 5.5 V) specification is 1.8 mA.
3.5 HCT INPUT LOADING
INPUT
S0 – S3
E
UNIT LOADS(1)
0.5
0.3
(1) Unit load is ΔICC limit specified in the electrical characteristics table, for example, 360 μA max at 25°C.
3.6 SWITCHING CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted) see Figure 5
TA = −40°C TO
125°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
VCC
UNIT
MIN
TYP
MAX
15
MIN
MAX
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
5 V
4.5 V
5 V
6
Common
I/O
tpd
In
E
ns
ns
ns
ns
ns
19
25
25
23
21
Common
I/O
ten
ten
tdis
tdis
4.5 V
5 V
60
75
Common
I/O
Sn
E
4.5 V
5 V
60
75
Common
I/O
4.5 V
5 V
55
69
Common
I/O
Sn
4.5 V
58
73
3.7 OPERATING CHARACTERISTICS
VCC = 5 V, TA = 25°C, input tr, tf = 6 ns
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Cpd
Power dissipation capacitance(1)
96
pF
(1) Cpd is used to determine the dynamic power consumption (PD), per package.
PD = (Cpd × VCC2 × fI) + Σ (CL + CS) × VCC2 × fO
fO = output frequency
fI = input frequency
CL = output load capacitance
CS = switch capacitance
VCC = supply voltage
4
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Product Folder Links: CD74HCT4067-Q1
CD74HCT4067-Q1
www.ti.com
SCLS601B –DECEMBER 2004–REVISED AUGUST 2012
3.8 ANALOG CHANNEL CHARACTERISTICS
TA = 25°C
PARAMETER
TEST CONDITIONS
See Figure 1 and Figure 7(1) (2)
VCC
4.5 V
4.5 V
4.5 V
TYP
89
UNIT
MHz
%
fmax
Switch frequency response bandwidth at −3 dB
Sine-wave distortion
See Figure 2
0.051
−75
5
Switch OFF signal feedthrough
Switch input capacitance
See Figure 4 and Figure 8
dB
CS
pF
CCOM
Common capacitance
50
pF
(1) Adjust input voltage to obtain 0 dBm at output, f = 1 MHz.
(2) VIS is centered at VCC / 2
4 PARAMETER MEASUREMENT INFORMATION
V
V
CC
CC
V
OS
SWITCH
ON
Sine
SWITCH
ON
V
IS
Wave
V
OS
10
F
V
IS
0.1
F
dB
50 Ω
10 pF
10 kΩ
50 pF
DISTORTION
METER
METER
V
/ 2
V
/ 2
CC
CC
f
IS
= 1 kHz to 10 kHz
Figure 1. Frequency-Response Test Circuit
Figure 2. Sine-Wave Distortion Test Circuit
V
f
≥ 1-MHz Sine Wave
CC
IS
R = 50 Ω
V
C = 10 pF
CC
SWITCH
600 Ω
V
OS
ALTERNATING
ON AND OFF
t , t ≤ 6 ns
0.1 µF
V
= V
IL
C
V
OS
SWITCH
OFF
V
IS
r
f
f
= 1 MHz
600 Ω
10 pf
CONT
50% DUTY
CYCLE
dB
SCOPE
R
R
C
METER
V
/ 2
CC
V
/ 2
V
/ 2
CC
CC
Figure 3. Control-to-Switch Feedthrough Noise
Test Circuit
Figure 4. Switch OFF Signal Feedthrough Test
Circuit
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SCLS601B –DECEMBER 2004–REVISED AUGUST 2012
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
V
CC
PARAMETER
S1
S2
t
Open
Closed
Open
Closed
Open
PZH
S1
S2
t
en
Test
t
PZL
Point
R
= 1 kΩ
L
From Output
Under Test
t
Closed
PHZ
t
dis
t
C
Closed
Open
Open
Open
PLZ
L
(see Note A)
t
pd
LOAD CIRCUIT
3 V
0 V
3 V
Input
1.3 V
1.3 V
t
Output
1.3 V
1.3 V
Control
0 V
t
PLH
PHL
t
t
PLZ
PZL
V
OH
In-Phase
Output
90%
90%
≈V
Output
Waveform 1
(see Note B)
CC
1.3 V
10%
1.3 V
10%
1.3 V
V
OL
10%
t
V
t
t
OL
OH
r
f
t
t
PLH
PHL
90%
t
PZH
PHZ
V
OH
OL
90%
Out-of-Phase
Output
1.3 V
10%
1.3 V
10%
Output
Waveform 2
(see Note B)
V
90%
V
1.3 V
t
f
t
≈0 V
r
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
VOLTAGE WAVEFORMS
OUTPUT ENABLE AND DISABLE TIMES
NOTES: A.
C includes probe and test-fixture capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
O
r
f
D. For clock inputs, f
is measured with the input duty cycle at 50%.
E. The outputs are measured one at a time, with one input transition per measurement.
max
F.
G.
H.
t
and t
PHZ
and t
PZH
are the same as t .
dis
are the same as t .
en
PLZ
PZL
PLH
t
t
and t
PHL
are the same as t .
pd
Figure 5. Load Circuit and Voltage Waveforms
6
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Product Folder Links: CD74HCT4067-Q1
CD74HCT4067-Q1
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SCLS601B –DECEMBER 2004–REVISED AUGUST 2012
5 TYPICAL CHARACTERISTICS
ON Resistance
vs
Input Signal Voltage
Switch Frequency Response
0
120
T
= 25ºC
A
GND = 0 V
100
80
−2
−4
60
−6
V
CC
= 4.5 V
40
V
= 4.5 V
CC
−8
20
R
= 50 Ω
L
T
A
= 25°C
0
−10
4
5
6
7
8
10
1
2
3
4 4.5 5
6
7
8
9
10
10
10
Frequency − Hz
10
Input Signal Voltage − V
Figure 6.
Figure 7.
Switch-OFF Signal Feedthrough
vs
Frequency
0
V
= 4.5 V
CC
= 50 Ω
R
T
L
= 25°C
A
−20
−40
−60
−80
−100
4
5
10
6
10
7
10
8
10
10
f − Frequency − Hz
Figure 8.
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CD74HCT4067-Q1
SCLS601B –DECEMBER 2004–REVISED AUGUST 2012
www.ti.com
6 REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (April, 2008) to Revision B
Page
•
•
•
•
•
•
•
•
•
•
Changed H2 to H1A and C3B to C2 throughout document ................................................................................................... 1
Added AEC-Q100 info to Features......................................................................................................................................... 1
Removed from Features: Wide Operating Temperature Range: –40°C to 85°C ................................................................... 1
Added applications ................................................................................................................................................................. 1
Replaced SOIC-M package info in ordering info table with new row for DW-SOIC-M package............................................ 1
Added ESD ratings to Abs Max table..................................................................................................................................... 3
Added latch-up row in Abs Max table..................................................................................................................................... 3
Changed max TA value from 85°C to 125°C .......................................................................................................................... 3
Changed TA = -40°C to 85°C column to TA = -40°C to 125°C ............................................................................................... 4
Changed TA = -40°C to 85°C column to TA = -40°C to 125°C ............................................................................................... 4
8
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Product Folder Links: CD74HCT4067-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
CD74HCT4067QM96Q1
D24067IM96G4Q1
ACTIVE
ACTIVE
SOIC
SOIC
DW
DW
24
24
2000 RoHS & Green
2000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 85
HCT4067I
HCT4067I
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
OTHER QUALIFIED VERSIONS OF CD74HCT4067-Q1 :
Catalog: CD74HCT4067
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Feb-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CD74HCT4067QM96Q1
SOIC
DW
24
2000
330.0
24.4
10.75 15.7
2.7
12.0
24.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Feb-2019
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC DW 24
SPQ
Length (mm) Width (mm) Height (mm)
350.0 350.0 43.0
CD74HCT4067QM96Q1
2000
Pack Materials-Page 2
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