DS125BR111RTWT [TI]
Low Power 12.5 Gbps 1-Lane Linear Repeater with Equalization;
| 型号： | DS125BR111RTWT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Low Power 12.5 Gbps 1-Lane Linear Repeater with Equalization 驱动 接口集成电路 驱动器 |
| 文件： | 总5页 (文件大小：63K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS125BR111
www.ti.com
SNLS430A –OCTOBER 2012–REVISED APRIL 2013
DS125BR111 Low Power 12.5 Gbps 1-Lane Repeater with Input Equalization and Output
De-Emphasis
Check for Samples: DS125BR111
1
FEATURES
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sRIO, Infiniband, Interlaken, CPRI, OBSAI
Other Proprietary Interface up to 12.5 Gbps
2
•
Comprehensive Family, Proven System Inter-
operability
DESCRIPTION
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–
–
–
DS125BR111 : 1-lane, Bi-directional
Repeater
The DS125BR111 is an extremely low power, high
performance multi-protocol repeater/redriver designed
to support 1-lane (2 channels, bi-directional) of SAS-
3/2/1, PCIe Gen-3/2/1, 10G-KR and other high speed
interface serial protocols up to 12.5 Gbps. The
receiver's continuous time linear equalizer (CTLE)
provides a boost of up to +30 dB at 6.25 GHz (12.5
Gbps) in each of its two channels and is capable of
opening an input eye that is completely closed due to
inter symbol interference (ISI) induced by
interconnect medium such as 30”+ backplane traces
or 8m+ copper cables, hence enabling host
controllers to ensure an error free end-to-end link.
The transmitter provides a de-emphasis boost of up
to -12 dB and output voltage amplitude control from
700 mV to 1300 mV to allow maximum flexibility in
the physical placement within the interconnect
channel.
DS125BR210 : 2-channel, Uni-directional
Repeater
DS125BR401 : 4-lane, Bi-directional
Repeater
DS125BR800 : 8-channel, Uni-directional
Repeater
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–
DS125MB203 : 2-port, 2:1/1:2 Mux/Switch
DS125DF410 : 4-channel, Uni-directional
Retimer w/CDR
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•
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Low 65 mW/channel (typ) Power Consumption,
with Option to Power Down Unused Channels
Transparent Management of Link Training
Protocol for PCIe, SAS, 10G-KR
Advanced Signal Conditioning Features
When operating in SAS-3, 10G-KR and PCIe Gen-3
mode, the DS125BR111 transparently allows the host
controller and the end point to optimize the full link
and negotiate transmit equalizer coefficients. This
seamless management of the link training protocol
ensures specified system level interoperability with
minimum latency. With a low power consumption of
65 mW/channel (typ) and option to turn-off unused
channels, the DS125BR111 enables energy efficient
system design. A single supply of 3.3v or 2.5v is
required to power the device.
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- Receive Equalization up to 30 dB at 6.25
GHz
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- Transmit De-emphasis up to -12 dB
- Transmit Output Voltage Control: 700 mV
to 1300 mV
•
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Programmable via Pin Selection, EEPROM or
SMBus Interface
Single Supply Voltage: 2.5V or 3.3V
(Selectable)
•
•
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−40 to 85°C Operating Temperature Range
The programmable settings can be applied easily via
pins, software (SMBus/I2C) or loaded via an external
EEPROM. When operating in the EEPROM mode,
the configuration information is automatically loaded
on power up, which eliminates the need for an
external microprocessor or software driver.
5 kV HBM ESD Rating
Flow-thru Pinout in 4mmx4mm 24-pin
Leadless WQFN Package
•
Supported Protocols
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SAS-3/2/1, SATA, Fibre Channel (up to
10GFC)
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PCIe Gen-3/2/1, 10G-KR, 10GbE, XAUI,
RXAUI
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2012–2013, Texas Instruments Incorporated
DS125BR111
SNLS430A –OCTOBER 2012–REVISED APRIL 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Typical Application
Interconnect
Cable
Host Controller
ASIC/FPGA
DS125BR111
HDD
Expansion
Block Diagram - Detail View Of Channel (1 Of 2)
VOD/ DE-EMPHASIS CONTROL
DEM
SMBus
VOD
VDD
SMBus
50W
50W
EQ
OUTBUF
IN+
IN-
OUT+
OUT-
Tx IDLE Enable
EQ[1:0]
SMBus
Channel
LOS
SD_TH
TX_DIS
MODE
Status
and
Control
IDLE DETECT
2
Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: DS125BR111
DS125BR111
www.ti.com
SNLS430A –OCTOBER 2012–REVISED APRIL 2013
Pin Diagram
OUTA+
OUTA-
INA+
24
23
22
21
20
19
7
INA-
8
AD1/EQA1
AD0/EQA0
INB+
9
VDD
VDD
SMBUS AND
CONTROL
10
11
12
OUTB+
OUTB-
INB-
The center DAP on the package bottom is the device GND connection. This pad must be connected to GND through
multiple (minimum of 4) vias to ensure optimal electrical and thermal performance.
Figure 1. DS125BR111 Pin Diagram 24 lead, View from TOP
Above 24-lead WQFN graphic is a TOP VIEW, looking down through the package.
Copyright © 2012–2013, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links: DS125BR111
DS125BR111
SNLS430A –OCTOBER 2012–REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Changes from Original (April 2013) to Revision A
Page
•
Changed layout of National Data Sheet to TI format ............................................................................................................ 3
4
Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: DS125BR111
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