DS160PT801ACBT [TI]
PCIe® 4.0、16Gbps、8 路（16 通道）重定时器 | ACB | 332 | -40 to 85;
| 型号： | DS160PT801ACBT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | PCIe® 4.0、16Gbps、8 路（16 通道）重定时器 | ACB | 332 | -40 to 85 PC |
| 文件： | 总10页 (文件大小：929K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS160PT801
ZHCSME6A –DECEMBER 2020 –REVISED JUNE 2022
DS160PT801 PCIe® 4.0、16Gbps、8 路（16 通道）重定时器
DS160PT801 中的8 个通道可分叉为两个x4 链路，从
而支持不同的系统拓扑。
1 特性
• 8 路（16 通道）协议感知PCI-Express 重定时器支
持16.0、8.0、5.0 和2.5GT/s 接口
• 芯片间通信(ICC) 支持双芯片链路宽度扩展，从而
形成16 通道第4 代重定时器
• 支持公共时钟、不具有展频时钟(SSC) 的单独参考
时钟和具有SSC 的单独参考时钟
• 支持2x4 分叉
• 自适应接收CTLE 和DFE 支持超高的PCIe 第4 代
通道损耗
• 支持均衡协商
• 低延迟架构
• 片上眼图张开度监视器(EOM) 和PCIe 接收裕度调
节功能
紧凑但易于制造的 BGA 封装提供了出色的热性能，同
时可在空间受限的应用（如 1RU 转接卡）中实现出色
布局。此功能可降低整体解决方案尺寸、PCB 布线复
杂性和BOM 成本。
诊断功能包括带内接收器裕度调节、带外无损水平或垂
直眼图裕度监视器、接收器环回、编码错误检测和片上
温度传感器。这些功能有助于测量链路裕度，并可用于
监测系统随时间推移的运行状况。
DS160PT801 可通过 SMBus 接口进行配置。初始配
置可从外部EEPROM 自动加载。
器件信息(1)
封装尺寸（标称值）
器件型号
DS160PT801
封装
• 小型8.50mm × 13.40mm BGA 封装
• 直通引脚排列可在两个信号层中实现信号分接
• 与标准1.00mm BGA PCB 制造兼容
• 双电源：1.17 V 和1.8 V
FCCSP (332)
8.50 mm x 13.40 mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
• 通过外部EEPROM 或I2C 控制器进行I2C 配置
A_PETn0
A_PETp0
A_PERn0
A_PERp0
（高达1MHz）
• 工业温度范围：−40°C 至85°C
CDR
.
.
.
.
.
.
A_PETn7
A_PETp7
A_PERn7
A_PERp7
CDR
CDR
2 应用
B_PERn0
B_PERp0
B_PETn0
B_PETp0
• 机架式服务器
• 微服务器和塔式服务器
• 高性能计算
.
.
.
.
.
.
B_PERn7
B_PERp7
B_PETn7
B_PETp7
CDR
• 硬件加速器
100 MHz
100 MHz
REFCLK+
REFCLK-
REFCLK_OUT+
REFCLK_OUT-
3 说明
Address straps
(pull-up, pull-
down, or float)
SMB_ADDR_0
SMB_ADDR_1
1.8 to 3.3 V
DS160PT801 是一款高性能 8 路（16 通道）PCI-
Express 协议感知重定时器，支持所有高达16 GT/s 的
标准 PCIe 数据速率。它用于扩展高速 PCIe 串行链路
（从芯片至芯片主板链路到更复杂的多连接器系统拓
扑）的覆盖范围并提升稳定性。
SMBCLK
SMBDAT
To system SMBus
MODE
RX_DET_BYP
Multi-level strap
(pull-up, pull-
down, or float)
Strap or system-
controlled up to
3.3 V tolerance
WIDTH
PERST#
CLKREQ#
1.8 to 3.3 V
Strap or system-
controlled up to
1.8 V tolerance
PRT0_RST#
PRT1_RST#
DS160PT801 支持公共时钟和独立参考时钟架构，具
有/不具有展频时钟。这为定义系统时钟架构提供了较
大的灵活性。
EE_CLK
EE_DAT
To optional
EEPROM
To system JTAG up
to 1.8 V tolerance
JTAG_TDO
JTAG_TDI
JTAG_TMS
JTAG_TCK
VDD1.8 V
PWR_1
From system
JTAG up to 3.3 V
tolerance
PWR_2A
PWR_2B
PWR_2C
VDD1.17 V
JTAG_TRST#
GND
简化版原理图
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SNLS592
DS160PT801
ZHCSME6A –DECEMBER 2020 –REVISED JUNE 2022
www.ti.com.cn
Table of Contents
6.2 Documentation Support.............................................. 4
6.3 接收文档更新通知....................................................... 4
6.4 支持资源......................................................................4
6.5 Trademarks.................................................................4
6.6 Electrostatic Discharge Caution..................................4
6.7 术语表......................................................................... 4
7 Mechanical, Packaging, and Orderable Information....4
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Device Comparison.........................................................3
6 Device and Documentation Support..............................4
6.1 Device Support........................................................... 4
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision * (December 2020) to Revision A (June 2022)
Page
• 将数据表的状态从预告信息更改为量产数据..................................................................................................... 1
Copyright © 2022 Texas Instruments Incorporated
2
Submit Document Feedback
Product Folder Links: DS160PT801
DS160PT801
ZHCSME6A –DECEMBER 2020 –REVISED JUNE 2022
www.ti.com.cn
5 Device Comparison
PART NUMBER
LINK WIDTH
PCIe GEN
4, 3, 2, 1
DEVICE TYPE
DS160PT801
x8
Retimer
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
3
Product Folder Links: DS160PT801
DS160PT801
ZHCSME6A –DECEMBER 2020 –REVISED JUNE 2022
www.ti.com.cn
6 Device and Documentation Support
6.1 Device Support
6.1.1 Development Support
• IBIS-AMI model. Simulate the DS160PT801’s high-speed receiver and transmitter in tools which support
IBIS-AMI simulations. Contact your local Texas Instruments sales representative for the latest status of
available models.
6.1.2 12.1.2 Device Nomenclature
• x2 –Two-lane PCI-Express Link, also referred to as by-2.
• x4 –Four-lane PCI-Express Link, also referred to as by-4.
• x8 –Eight-lane PCI-Express Link, also referred to as by-8.
• x16 –Sixteen-lane PCI-Express Link, also referred to as by-16.
• Bifurcation –Dividing a by-M PCI-Express Link (for example, x8) into two or more separate by-N Links (for
example, two x4), where N < M.
• Stacking –Combining multiple by-N devices (for example, two x8) to form a by-M interface (for example,
x16), where M > N.
6.2 Documentation Support
6.2.1 Related Documentation
For related documentation, see the following:
• Texas Instrument, DS160PT801 Evaluation Board reference design
6.3 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
6.4 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
6.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
PCIe® is a registered trademark of PCI-SIG.
所有商标均为其各自所有者的财产。
6.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
6.7 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
7 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2022 Texas Instruments Incorporated
4
Submit Document Feedback
Product Folder Links: DS160PT801
PACKAGE OPTION ADDENDUM
www.ti.com
21-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
DS160PT801ACBR
DS160PT801ACBT
ACTIVE
ACTIVE
FCCSP
FCCSP
ACB
ACB
332
332
2000 RoHS & Green
250 RoHS & Green
Call TI | SNAGCU
Level-3-260C-168 HR
Level-3-260C-168 HR
-40 to 85
-40 to 85
D160PT801
D160PT801
Samples
Samples
Call TI | SNAGCU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
21-Oct-2022
Addendum-Page 2
PACKAGE OUTLINE
ACB0332A
FCBGA - 1.10 mm max height
SCALE 1.300
BALL GRID ARRAY
A
8.6
8.4
B
BALL A1 CORNER
13.5
13.3
1.10 MAX
0.27
C
SEATING PLANE
0.1 C
BALL TYP
TYP
0.17
(7.778) TYP
45 TYP
(0.361)
PKG
(0.3361) TYP
0.5 TYP
AU
AR
AN
AL
AJ
AG
AE
AC
AA
W
U
AT
AP
AM
AK
AH
AF
AD
AB
Y
0.5 TYP
PKG
(12.7278)
TYP
V
T
R
P
N
M
L
K
0.35
0.25
J
332X
H
G
F
0.15
0.05
C A B
C
E
D
C
B
A
1
3
5
7
9
11 13 15 17 19 21 23
2
4
8
10 12
16 18 20
14
22
6
(0.7071) TYP
(0.7071) TYP
4223655/B 07/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
ACB0332A
FCBGA - 1.10 mm max height
BALL GRID ARRAY
1
3
6
12
17
20 21
2
4
7
8
9 10 11 13 1415 16
22
23
5
18
19
(0.5) TYP
A
C
E
B
D
332X ( 0.3)
(0.5) TYP
F
G
H
J
K
L
M
N
P
R
T
U
V
W
PKG
Y
AA
AB
AC
AD
AE
AF
AG
AH
AJ
(45 ) TYP
AK
AL
AM
AN
AP
AR
AT
AU
(0.7071) TYP
(0.7071) TYP
PKG
LAND PATTERN EXAMPLE
SCALE:8X
(
0.3)
0.05 MAX
0.05 MIN
METAL UNDER
SOLDER MASK
METAL
(
0.3)
SOLDER MASK
OPENING
SOLDER MASK
OPENING
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4223655/B 07/2017
NOTES: (continued)
5. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SPRU811 (www.ti.com/lit/spru811).
www.ti.com
EXAMPLE STENCIL DESIGN
ACB0332A
FCBGA - 1.10 mm max height
BALL GRID ARRAY
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19
20 21
22 23
A
C
(0.5) TYP
B
D
332X ( 0.3)
(0.5) TYP
E
F
G
H
J
K
L
M
N
P
R
T
U
V
PKG
W
Y
(45 ) TYP
AA
AB
AC
AD
AE
AF
AG
AH
AJ
AK
AL
AM
AN
AP
AR
AT
AU
(0.7071) TYP
PKG
(0.7071) TYP
SOLDER PASTE EXAMPLE
BASED ON 0.15 mm THICK STENCIL
SCALE:10X
4223655/B 07/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
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