DS26C31MW/883 [TI]
CMOS 四路三态差动线路驱动器 | NAD | 16 | -55 to 125;
| 型号： | DS26C31MW/883 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | CMOS 四路三态差动线路驱动器 | NAD | 16 | -55 to 125 驱动 接口集成电路 线路驱动器或接收器 驱动程序和接口 |
| 文件： | 总16页 (文件大小：438K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS26C31MQML
DS26C31MQML CMOS Quad TRI-STATE Differential Line Driver
Literature Number: SNOSAS2
October 26, 2010
DS26C31MQML
CMOS Quad TRI-STATE® Differential Line Driver
All inputs are protected against damage due to electrostatic
discharge by diodes to VCC and ground.
General Description
The DS26C31 is a quad differential line driver designed for
digital data transmission over balanced lines. The DS26C31
meets all the requirements of EIA standard RS-422 while re-
taining the low power characteristics of CMOS. The DS26C31
is compatible with EIA standard RS-422; however, one ex-
ception in test methodology is taken . This enables the con-
struction of serial and terminal interfaces while maintaining
minimal power consumption.
Features
TTL input compatible
■
■
■
■
■
■
Outputs will not load line when VCC = 0V
Meets the requirements of EIA standard RS-422
Operation from single 5V supply
TRI-STATE outputs for connection to system buses
The DS26C31 accepts TTL or CMOS input levels and trans-
lates these to RS-422 output levels. This part uses special
output circuitry that enables the drivers to power down without
loading down the bus. This device has enable and disable
circuitry common to all four drivers. The DS26C31 is pin com-
patible to the AM26LS31 and the DS26LS31.
Low quiescent current
Ordering Information
NS Part Number
DS26C31ME/883
DS26C31MJ/883
DS26C31MW/883
SMD Part Number
5962–9163901M2A
5962–9163901MEA
5962–9163901MFA
NS Package Number
Package Description
20LD LCC
E20A
J16A
16LD Ceramic DIP
16LD Ceramic Flatpack
W16A
Connection Diagrams
20163001
Top View
20163012
See NS Package Number J16A, W16A
Top View
20-Lead Ceramic Leadless Chip Carrier (E)
See NS Package Number E20A
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 2010 National Semiconductor Corporation
201630
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Logic Diagram
20163002
Truth Table
ENABLE ENABLE Input Non-Inverting Inverting
Output
Output
L
H
X
L
Z
L
Z
H
L
All other
combinations of
enable inputs
H
H
L = Low logic state
X = Irrelevant
H = High logic state
Z = TRI-STATE (high impedance)
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2
Absolute Maximum Ratings (Note 1, Note 2)
Supply Voltage (VCC
)
−0.5V to 7.0V
−1.5V to VCC +0.5V
−0.5V to 7V
±20 mA
DC Input Voltage (VI)
DC Output Voltage (VO)
Clamp Diode Current (IIK, IOK
)
DC Output Current, per pin (IO)
±150 mA
DC VCC or Gnd Current, per pin (ICC
)
±150 mA
Storage Temperature Range (TStg
)
−65°C ≤ TA ≤ +150°C
Lead Temperature (TL) Soldering, 4 sec.
260°C
Operating Conditions
Min
4.50
0
Max
5.50
VCC
Units
V
Supply Voltage (VCC
)
DC Input or Output Voltage (VI, VO)
Operating Temperature Range (TA)
V
−55
+125
°C
Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup
Description
Static tests at
Temp °C
1
2
+25
+125
-55
Static tests at
3
Static tests at
4
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
Settling time at
Settling time at
Settling time at
+25
+125
-55
5
6
7
+25
+125
-55
8A
8B
9
+25
+125
-55
10
11
12
13
14
+25
+125
-55
3
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DS26C31M Electrical Characteristics
DC Parameters
Sub-
groups
Symbol
Parameter
Conditions
Notes
Min Max
Units
VIH
Logical "1" Input Voltage
Logical "0" Input Voltage
Logical "1" Output Voltage
2.0
0.8
2.5
V
V
V
1, 2, 3
1, 2, 3
1, 2, 3
VIL
VOH
VI = VIH or VIL,
VCC = 4.5V, IO = -20mA
VOL
Logical "0" Output Voltage
VI = VIH or VIL,
0.5
V
1, 2, 3
IO = 20mA, VCC = 4.5V
VT
Differential Output Voltage
(Note 4)
(Note 4)
(Note 4)
(Note 4)
2.0
0.4
3.0
0.4
±1.0
V
V
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
RL = 100Ω, VCC = 4.5V
RL = 100Ω, VCC = 4.5V
RL = 100Ω, VCC = 5.5V
RL = 100Ω, VCC = 5.5V
|VT| − |VT | Difference in Differential Output
VOS
Common Mode Output Voltage
Diff in Common Mode Output
Input Current
V
|VOS−VOS
II
|
V
VI = VCC, Gnd, VIH, or VIL,
VCC = 5.5V
µA
ICC
Quiescent Power Supply Current IO = 0µA, VI = VCC or Gnd,
VCC = 5.5V
(Note 5)
(Note 5)
500
2.1
µA
mA
µA
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
IO = 0µA, VI = 2.4V or 0.5V,
VCC = 5.5V
IOZ
ISC
IOff
TRI-STATEOutput Leakage
Current
VO = VCC or Gnd, Enable = VIL,
VCC = 5.5V, Enable = VIH
±5.0
Output Short Circuit Current
VI = VCC or Gnd, VCC = 5.5V
(Note 4),
(Note 6)
-30 -150
mA
Output Leakage Current "Power VCC = 0V, VO = 6V
100
µA
µA
1, 2, 3
1, 2, 3
Off"
VCC = 0V, VO = 0V
-100
AC Parameters - Propagation Delay Time Figure 1
The following conditions apply, unless otherwise specified. VCC = 5V, tR ≤ 6ns, tF ≤ 6ns
Sub-
groups
Symbol
Parameter
Conditions
Notes
Min Max
Units
tPLH
Input to Output Prop Delay
Input to Output Prop Dalay
Skew
14
14
3.0
14
14
22
28
12
14
ns
ns
ns
ns
ns
ns
ns
ns
ns
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
Figure 2
Figure 2
tPHL
(Note 7)
tTLH
tTHL
tPZH
tPZL
tPHZ
tPLZ
Output Rise Time
Figure 4
Figure 4
Figure 3
Figure 3
Figure 3
Figure 3
Output Fall Time
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
(Note 8)
(Note 8)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: Unless otherwise specified, all voltages are referenced to ground. All currents into device pins are positive, all currents out of device pins are negative.
Note 3: Unless otherwise specified, min/max limits apply across the recommended operating temperature range.
Note 4: See EIA Specification RS-422 for exact test conditions.
Note 5: Measured per input. All other inputs at VCC or GND.
Note 6: This is the current sourced when a high output is shorted to ground. Only one output at a time should be shorted.
Note 7: Skew is defined as the difference in propagation delays between complimentary outputs at the 50% point.
Note 8: Output disable time is the delay from ENABLE or ENABLE being switched to the output transistors turning off.
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4
Typical Performance Characteristics
Differential Propagation Delay
vs Temperature
Differential Propagation Delay
vs Power Supply Voltage
20163014
20163015
Differential Skew vs
Temperature
Differential Skew vs Power
Supply Voltage
20163016
20163017
Differential Transition Time
vs Temperature
Differential Transition Time
vs Power Supply Voltage
20163018
20163019
5
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Complementary Skew vs
Temperature
Complementary Skew vs
Power Supply Voltage
20163020
20163021
Differential Output Voltage
vs Output Current
Differential Output Voltage
vs Output Current
20163022
20163023
Output High Voltage vs
Output High Current
Output High Voltage vs
Output High Current
20163024
20163025
Output Low Voltage vs
Output Low Current
Output Low Voltage vs
Output Low Current
20163026
20163027
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6
Supply Current
vs Temperature
Output Low Voltage vs
Output Low Current
20163028
20163026
Output Low Voltage vs
Output Low Current
Supply Current
vs Temperature
20163027
20163028
Supply Current vs
Power Supply Voltage
No Load Supply Current
vs Data Rate
20163030
20163029
Loaded Supply Current
vs Data Rate
Output Short Circuit Current
vs Temperature
20163031
20163032
7
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Output Short Circuit Current
vs Power Supply Voltage
20163033
AC Test Circuit and Switching Time
Waveforms
20163003
Note: C1 = C2 = C3 = 40 pF (Including Probe and Jig Capacitance), R1 = R2 = 50Ω, R3 = 500Ω.
FIGURE 1. AC Test Circuit
20163004
FIGURE 2. Propagation Delays
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8
20163005
FIGURE 3. Enable and Disable Times
20163007
Input pulse; f = 1 MHz, 50%; tr ≤ 6 ns, tf ≤ 6 ns
FIGURE 4. Differential Rise and Fall Times
Two-Wire Balanced System, RS-422
Typical Applications
20163009
*RT is optional although highly recommended to reduce reflection.
9
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Revision History
Released
Revision
Section
Changes
10/26/2010
A
New Release, Corporate format
1 MDS data sheets converted into one Corp. data
sheet format. MNDS26C31M-X Rev 0B0 will be
archived.
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10
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Ceramic Leadless Chip Carrier (E)
NS Package Number E20A
16-Lead Ceramic Dual-In-Line Package (J)
NS Package Number J16A
11
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16-Lead Ceramic Flatpak Package (W)
NS Package Number W16A
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12
Notes
13
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Notes
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