DS26F32MWRQMLV [TI]
四路差分线路接收器 | NAD | 16 | -55 to 125;
| 型号： | DS26F32MWRQMLV |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 四路差分线路接收器 | NAD | 16 | -55 to 125 CD 接口集成电路 |
| 文件： | 总16页 (文件大小：535K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS26F32MQML
www.ti.com
SNOSAS5A –MARCH 2006–REVISED APRIL 2013
DS26F32MQML Quad Differential Line Receivers
Check for Samples: DS26F32MQML
1
FEATURES
DESCRIPTION
The DS26F32 is a quad differential line receiver
designed to meet the requirements of EIA Standards
RS-422 and RS-423, and Federal Standards 1020
and 1030 for balanced and unbalanced digital data
transmission.
2
•
Input Voltage Range of ±7.0V (Differential or
Common Mode) ±0.2V Sensitivity over the
Input Voltage Range
•
•
•
High Input Impedance
Operation from Single +5.0V Supply
The DS26F32 offers improved performance due to
the use of state-of-the-art L-FAST bipolar technology.
The L-FAST technology allows for higher speeds and
lower currents by utilizing extremely short gate delay
times. Thus, the DS26F32 features lower power,
extended temperature range, and improved
specifications.
Input Pull-Down Resistor Prevents Output
Oscillation on Unused Channels
•
TRI-STATE Outputs, with Choice of
Complementary Enables, for Receiving
Directly onto a Data Bus
The device features an input sensitivity of 200 mV
over the input common mode range of ±7.0V. The
DS26F32 provides an enable function common to all
four receivers and TRI-STATE outputs with 8.0 mA
sink capability. Also,
a
fail-safe input/output
relationship keeps the outputs high when the inputs
are open.
The DS26F32 offers optimum performance when
used with the DS26F31 Quad Differential Line Driver.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2013, Texas Instruments Incorporated
DS26F32MQML
SNOSAS5A –MARCH 2006–REVISED APRIL 2013
www.ti.com
Connection Diagrams
Figure 2. 20-Lead LCCC Package-Top View
See Package Number NAJ0020A
Figure 1. 16-Lead CDIP Package-Top View
See Package Number NAC0016A, NFE0016A, or
NAD0016A
Table 1. Function Table (Each Receiver)(1)
Differential Inputs
Enables
Outputs
VID = (V I+) − (VI−)
E
H
X
H
X
L
E
OUT
H
VID ≥ 0.2V
X
L
H
VID ≤ −0.2V
X
L
L
L
X
H
Z
(1) H = High Level
L = Low Level
X = Immaterial
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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DS26F32MQML
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SNOSAS5A –MARCH 2006–REVISED APRIL 2013
(1)
Absolute Maximum Ratings
Storage Temperature Range
Operating Temperature Range
Lead Temperature (soldering, 60 sec)
Supply Voltage
−65°C ≤ TA ≤ +150°C
−55°C ≤ TA ≤ +125°C
300°C
7.0V
Common Mode Voltage Range
Differential Input Voltage
±25V
±25V
Enable Voltage
7.0V
Output Sink Current
50 mA
500 mW
(2) (3)
Maximum Power Dissipation (PD maxat 25°C)
Thermal Resistance
θJA
,
NFE0016A package
NAD0016A package
NAJ0020A package
θJC
100°C/W
142°C/W
87°C/W
Junction-to- case
See MIL-STD-1835
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not verify specific performance limits. For verified specifications and test conditions, see the
Electrical Characteristics. The verified specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions.
(2) Derate J package 10.0mW/°C above +25°C, derate W package 7.1mW/°C above +25°C, derate E package 11.5mW/°C above +25°C.
(3) Power dissipation must be externally controlled at elevated temperatures.
Recommended Operating Range
Operating Temperature
−55°C ≤ TA ≤ +125°C
Supply Voltage
4.5V to 5.5V
Table 2. Radiation Features
DS26F32MJRQMLV
DS26F32MWRQMLV
DS26F32MWGRQMLV
100 krads (Si)
100 krads (Si)
100 krads (Si)
Table 3. Quality Conformance Inspection Mil-Std-883, Method 5005 - Group A
Subgroup
Description
Static tests at
Temp °C
25
1
2
Static tests at
125
-55
25
3
Static tests at
4
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
Settling time at
Settling time at
Settling time at
5
125
-55
25
6
7
8A
8B
9
125
-55
25
10
11
12
13
14
125
-55
25
125
-55
Copyright © 2006–2013, Texas Instruments Incorporated
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DS26F32MQML
SNOSAS5A –MARCH 2006–REVISED APRIL 2013
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DS26F32 Electrical Characteristics DC Parameters
The following conditions apply, unless otherwise specified.
(1)
DC:
VCC = 5V
Sub-
groups
Parameter
Test Conditions
Pin under test
Notes
Min Max
Units
IIn
Input Current
2.3
mA
1, 2, 3
VCC = 4.5V, VI = 15V
Other inputs -15V ≤ VI ≤ +15V
Pin under test
-2.8
mA
1, 2, 3
VCC = 5.5V, VI = -15V
Other inputs -15V ≤ VI ≤ +15V
IIL
Logical "0" Enable Current
Logical "1" Enable Current
Logical "1" Enable Current
Input Clamp Voltage (Enable)
Logical "1" Output Voltage
VCC = 5.5V, VEn = 0.4V
VCC = 5.5V, VI = 2.7V
VCC = 5.5V, VI = 5.5V
VCC = 4.5V, II = -18mA
-360
µA
µA
µA
V
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
IIH
II
10
50
VIK
VOH
-1.5
VCC = 4.5V, IOH = -440µA,
2.5
V
ΔVI = 1V, VEn = .8 = VEn
VOL
Logical "0" Output Voltage
VCC = 4.5V, VEn =0.8V = VEn
IOL = 4mA, ΔVI = -1V
,
0.4
V
V
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
VCC = 4.5V, VEn = 8V = VEn
,
.45
IOL = 8mA, ΔVI = -1V
ICC
IOZ
Supply Current
VCC = 5.5V, All VI = Gnd,
VEn = 0V, VEn = 2V
50
mA
µA
µA
Off-State Output Current
VCC = 5.5V, VO = 0.4V,
VEn = 0.8V, VEn = 2V
-20
VCC = 5.5V, VO = 2.4V,
VEn = 0.8V, VEn = 2V
20
RI
Input Resistance
-15 ≤ VCM ≤ 15V
14
KΩ
1, 2, 3
1, 2, 3
(2)
(2)
VTh
Differential Input Voltage
VCC = 4.5V, VOUT = VOL or VOH
-7V ≤ VCM ≤ 7V,
VEn = VEn = 2.5V
-0.2
0.2
0.2
0.8
V
VCC = 5.5V, VOUT = VOL or VOH
-7V ≤ VCM ≤ 7V,
VEn = VEn = 2.5V
-0.2
V
1, 2, 3
(2)
(2)
VIL
Logical "0" Input Voltage (Enable) VCC = 5.5V
Logical "1" Input Voltage (Enable) VCC = 4.5V
V
V
1, 2, 3
1, 2, 3
1, 2, 3
VIH
2.0
-15
ISC Min
Output Short Circuit Current
VCC = 4.5V, VO = 0V,
mA
ΔVI = 1V
ISC Max
Output Short Circuit Current
VCC = 5.5V, VO = 0V,
-85
mA
1, 2, 3
ΔVI = 1V
(1) Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics. These parts may be dose rate
sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters
are specified only for the conditions as specified in Mil-Std-883, Method 1019.5, Condition A
(2) Parameter tested go-no-go only.
4
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SNOSAS5A –MARCH 2006–REVISED APRIL 2013
DS26F32 Electrical Characteristics AC Parameters
The following conditions apply, unless otherwise specified.
(1)
AC:
VCC = 5V
Sub-
groups
Parameter
Test Conditions
CL = 50pF
Notes
Min Max
Units
(2)
(2)
(3)
(3)
(2)
(2)
(3)
(3)
(2)
(2)
(3)
(3)
(2)
(2)
(3)
(3)
(2)
(2)
(3)
(3)
(2)
(2)
(3)
(3)
tPLH
23
31
22
30
23
31
22
30
18
29
16
27
20
29
18
27
55
62
20
27
30
42
18
30
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
9
10, 11
9
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 5pF
10, 11
9
tPHL
tPZH
tPZL
tPHZ
tPLZ
10, 11
9
10, 11
9
Enable Time
10, 11
9
10, 11
9
Enable Time
Disable Time
Disable Time
10, 11
9
10, 11
9
10, 11
9
10, 11
9
CL = 50pF
CL = 5pF
10, 11
9
10, 11
(1) Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics. These parts may be dose rate
sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters
are specified only for the conditions as specified in Mil-Std-883, Method 1019.5, Condition A
(2) Tested at 50pF, system capacitance exceeds 5pF to 15pF.
(3) Tested at 50pF specifies limit at 15pF & 5pF.
DS26F32 Electrical Characteristics DC Drift Parameters
This section applies to -QMLV devices only. Devices shall be read & recorded at TA = 25°C before and after each burn-in and
shall not change by more than the limits indicated. The delta rejects shall be included in the PDA calculation.
Sub-
groups
Parameter
Test Conditions
Notes
Min Max
Units
VOH
VOL
Logical "1" Output Voltage
VCC = 4.5V, IOH = -440µA,
ΔVI = 1V, VEn = 0.8V = VEn
-250 250
mV
1
Logical "0" Output Voltage
Input Current
VCC = 4.5V, IOL = 4mA,
ΔVI = -1V, VEn = 0.8V = VEn
-45
-45
45
45
mV
mV
mA
1
1
1
VCC = 4.5V, IOL = 8mA,
Δ VI = -1V, VEn = 0.8V = VEn
II
Pin under test
VCC = 4.5V, VI = 15V
Other inputs -15V ≤ VI ≤ +15V
-0.28 0.28
-0.28 0.28
Pin under test
mA
1
VCC = 5.5V, VI = -15V
Other inputs -15V ≤ VI ≤ +15V
Copyright © 2006–2013, Texas Instruments Incorporated
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SNOSAS5A –MARCH 2006–REVISED APRIL 2013
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Figure 3. Logic Symbol
(B)
(A)
C L includes probe and jig capacitance.
A. Parameter tested go-no-go only.
B. Tested at 50pF specifies limit at 15pF and 5pF.
Figure 4. Load Test Circuit for Three-State Outputs
Diagram shown for ENABLE Low.
S1 and S2 of Load Circuit are closed except where shown.
Pulse Generator of all Pulses: Rate ≤ 1.0 MHz, ZO = 50Ω, tr ≤ 6.0 ns, tf ≤ 6.0 ns.
Figure 5. Propagation Delay
6
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Product Folder Links: DS26F32MQML
DS26F32MQML
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SNOSAS5A –MARCH 2006–REVISED APRIL 2013
Diagram shown for ENABLE Low.
S1 and S2 of Load Circuit are closed except where shown.
Pulse Generator of all Pulses: Rate ≤ 1.0 MHz, ZO = 50Ω, tr ≤ 6.0 ns, tf ≤ 6.0 ns.
All diodes are IN916 or IN3064.
Figure 6. Enable and Disable Times
TYPICAL APPLICATION
Copyright © 2006–2013, Texas Instruments Incorporated
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DS26F32MQML
SNOSAS5A –MARCH 2006–REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Released
Revision
Section
New Release, Corporate format
Originator
Changes
3/01/06
*
L. Lytle
1 MDS data sheet converted into one Corp.
data sheet format. MNDS26F32M-X-RH Rev
0C0 will be archived.
4/15/2013
A
TIS
Changed layout of National Data Sheet to TI
format
8
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
5962-7802005M2A
ACTIVE
LCCC
CFP
NAJ
20
16
50
RoHS-Exempt
& Green
Call TI
Level-1-NA-UNLIM
-55 to 125
DS26F32ME/
883 Q
5962-78020
05M2A ACO
05M2A >T
Samples
5962-7802005MFA
ACTIVE
NAD
19
Non-RoHS
& Green
Call TI
Level-1-NA-UNLIM
-55 to 125
DS26F32MW
/883 Q
Samples
5962-78020
05MFA ACO
05MFA >T
5962R7802005VEA
5962R7802005VFA
ACTIVE
ACTIVE
CDIP
CFP
NFE
NAD
16
16
25
19
Non-RoHS
& Green
Call TI
Call TI
Level-1-NA-UNLIM
Level-1-NA-UNLIM
-55 to 125
-55 to 125
DS26F32MJRQMLV
5962R7802005VEA Q
Samples
Samples
Non-RoHS
& Green
DS26F32MWR
QMLV Q
5962R78020
05VFA ACO
05VFA >T
DS26F32 MW8
ACTIVE WAFERSALE
YS
0
1
RoHS & Green
Call TI
Call TI
Level-1-NA-UNLIM
Level-1-NA-UNLIM
-55 to 125
-55 to 125
Samples
Samples
DS26F32ME/883
ACTIVE
LCCC
NAJ
20
50
RoHS-Exempt
& Green
DS26F32ME/
883 Q
5962-78020
05M2A ACO
05M2A >T
DS26F32MJRQMLV
DS26F32MW/883
ACTIVE
ACTIVE
CDIP
CFP
NFE
NAD
16
16
25
19
Non-RoHS
& Green
Call TI
Call TI
Level-1-NA-UNLIM
Level-1-NA-UNLIM
-55 to 125
-55 to 125
DS26F32MJRQMLV
5962R7802005VEA Q
Samples
Samples
Non-RoHS
& Green
DS26F32MW
/883 Q
5962-78020
05MFA ACO
05MFA >T
DS26F32MWRQMLV
ACTIVE
CFP
NAD
16
19
Non-RoHS
& Green
Call TI
Level-1-NA-UNLIM
-55 to 125
DS26F32MWR
QMLV Q
Samples
5962R78020
05VFA ACO
05VFA >T
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2022
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF DS26F32MQML, DS26F32MQML-SP :
Military : DS26F32MQML
•
Space : DS26F32MQML-SP
•
NOTE: Qualified Version Definitions:
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2022
Military - QML certified for Military and Defense Applications
•
•
Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TUBE
T - Tube
height
L - Tube length
W - Tube
width
B - Alignment groove width
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
5962-7802005M2A
5962-7802005MFA
5962R7802005VEA
5962R7802005VFA
DS26F32ME/883
NAJ
NAD
NFE
NAD
NAJ
NFE
NAD
NAD
LCCC
CFP
20
16
16
16
20
16
16
16
50
19
25
19
50
25
19
19
470
502
11
23
3810
9398
13440
9398
3810
13440
9398
9398
0
9.78
NA
CDIP
CFP
506.98
502
15.24
23
9.78
0
LCCC
CDIP
CFP
470
11
DS26F32MJRQMLV
DS26F32MW/883
DS26F32MWRQMLV
506.98
502
15.24
23
NA
9.78
9.78
CFP
502
23
Pack Materials-Page 1
MECHANICAL DATA
NFE0016A
J16A (REV L)
www.ti.com
MECHANICAL DATA
NAD0016A
W16A (Rev T)
www.ti.com
MECHANICAL DATA
NAJ0020A
E20A (Rev F)
www.ti.com
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