DS3486 [TI]
四路 RS-422/RS-423 线路接收器;
| 型号： | DS3486 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 四路 RS-422/RS-423 线路接收器 驱动 线路驱动器或接收器 驱动程序和接口 |
| 文件： | 总12页 (文件大小：767K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS3486
www.ti.com
SNLS354D –MAY 1998–REVISED APRIL 2013
DS3486 Quad RS-422, RS-423 Line Receiver
Check for Samples: DS3486
1
FEATURES
DESCRIPTION
Texas Instruments' quad RS-422, RS-423 receiver
features four independent receivers which comply
with EIA Standards for the electrical characteristics of
balanced/unbalanced voltage digital interface circuits.
Receiver outputs are 74LS compatible, TRI-STATE
structures which are forced to a high impedance state
when the appropriate output control pin reaches a
logic zero condition. A PNP device buffers each
output control pin to assure minimum loading for
either logic one or logic zero inputs. In addition, each
receiver has internal hysteresis circuitry to improve
noise margin and discourage output instability for
slowly changing input waveforms.
2
•
•
•
•
•
•
•
Four Independent Receivers
TRI-STATE Outputs
Internal Hysteresis −140 mV (typ)
Fast Propagation Times −19 ns (typ)
TTL Compatible Outputs
5V Supply
Pin Compatible and Interchangeable with
MC3486
Block and Connection Diagrams
Figure 1. Dual-In-Line Package
Top View
D-16 (SOIC) Package or NFG0016E (PDIP)
Package
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2013, Texas Instruments Incorporated
DS3486
SNLS354D –MAY 1998–REVISED APRIL 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
Power Supply Voltage, VCC
Input Common-Mode Voltage, VICM
Input Differential Voltage, VID
TRI-STATE Control Input Voltage, VI
Output Sink Current, IO
Storage Temperature, TSTG
Maximum Power Dissipation (3) at 25°C
Molded PDIP Package
SOIC Package
8V
±25V
±25V
8V
50 mA
−65°C to +150°C
1362 mW
1002 mW
SOIC Package Thermal Resistance
θJA
+124.5°C/W
+41.2°C/W
θJC
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be ensured. They are not meant to imply
that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device
operation.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3) Derate PDIP molded package 10.2 mW/°C above 25°C. Derate SOIC package 8.01 mW/°C above 25°C.
Operating Conditions
Max
4.75
0
Min
5.25
70
Units
V
Power Supply Voltage, VCC
Operating Temperature, TA
Input Common-Mode Voltage
Range, VICR
°C
−7.0
7.0
V
(1)
Electrical Characteristics
(Unless otherwise noted, minimum and maximum limits apply over recommended temperature and power supply voltage
ranges. Typical values are for TA = 25°C, VCC = 5V and VIC = 0V.)
Symbol
Parameter
Conditions
Min Typ
Max
Units
VIH
Input Voltage—High Logic State
(TRI-STATE Control)
2.0
V
VIL
Input Voltage—Low Logic State
(TRI-STATE Control)
0.8
V
VTH(D)
Differential Input Threshold Voltage
−7V ≤ VIC ≤ 7V, VIH TRI-STATE = 2V
IO = −0.4 mA, VOH ≥ 2.7V
0.070
0.070
0.2
V
V
IO = 8 mA, VOL ≥ 0.5V
−0.2
IIB (D)
Input Bias Current
VCC = 0V or 5.25V, Other Inputs at 0V
VI = −10V
VI = −3V
VI = 3V
−3.25
−1.50
1.50
mA
mA
mA
mA
VI = 10V
3.25
Input Balance
−7V ≤ VIC ≤ 7V, VIH(3C) = 2V,
(2)
VOH
VOL
IO = −0.4 mA, VID = 0.4V
IO = 8 mA, VID = −0.4V
2.7
V
V
0.5
(1) All currents into device pins are shown as positive, out of device pins are negative. All voltages referenced to ground unless otherwise
noted.
(2) Refer to EIA RS-422/3 for exact conditions.
2
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS3486
DS3486
www.ti.com
SNLS354D –MAY 1998–REVISED APRIL 2013
Electrical Characteristics (1) (continued)
(Unless otherwise noted, minimum and maximum limits apply over recommended temperature and power supply voltage
ranges. Typical values are for TA = 25°C, VCC = 5V and VIC = 0V.)
Symbol
IOZ
Parameter
Conditions
Min Typ
Max
−40
40
Units
μA
Output TRI-STATE Leakage Current
VI(D) = 3V, VIL = 0.8V, VOL = 0.5V
VI(D) = −3V, VIL = 0.8V, VOH = 2.7V
VI(D) = 3V, VIHTRI-STATE = 2V,
μA
IOS
Output Short-Circuit Current
−15
−100
mA
(3)
VO = 0V,
IIL
Input Current—Low Logic State
(TRI-STATE Control)
VIL = 0.5V
−100
μA
IIH
Input Current—High Logic State
(TRI-STATE Control)
VIH = 2.7V
20
μA
μA
VIH = 5.25V
IIN = −10 mA
100
VIC
ICC
Input Clamp Diode Voltage
(TRI-STATE Control)
−1.5
V
Power Supply Current
All Inputs VIL = 0V
85
mA
(3) Only one output at a time should be shorted.
Switching Characteristics
(Unless otherwise noted, VCC = 5V and TA = 25°C.)
Symbol
tPHL(D)
Parameter
Min
Typ
Max
Units
Propagation Delay Time—Differential Inputs to Output
Output High to Low
19
35
ns
tPLH(D)
tPLZ
Output Low to High
19
23
30
35
ns
ns
TRI-STATE Control to Output
Output Low to TRI-STATE
tPHZ
tPZH
tPZL
Output High to TRI-STATE
Output TRI-STATE to High
Output TRI-STATE to Low
25
18
20
35
30
30
ns
ns
ns
AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS
Copyright © 1998–2013, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links: DS3486
DS3486
SNLS354D –MAY 1998–REVISED APRIL 2013
www.ti.com
Input pulse characteristics:
tTLH = tTHL = 6 ns (10% to 90%)
PRR = 1 MHz, 50% duty cycle
Figure 2. Propagation Delay Differential Input to Output
1.5V for tPHZ and tPLZ
1.5V for tPLZ and tPZL
Input pulse characteristics:
tTLH = tTHL = 6 ns (10% to 90%)
PRR = 1 MHz, 50% duty cycle
tPLZ
4
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS3486
DS3486
www.ti.com
SNLS354D –MAY 1998–REVISED APRIL 2013
tPHZ
tPZH
tPZL
Figure 3. Propagation Delay TRI-STATE Control Input to Output
Copyright © 1998–2013, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Links: DS3486
DS3486
SNLS354D –MAY 1998–REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Changes from Revision C (April 2013) to Revision D
Page
•
Changed layout of National Data Sheet to TI format ............................................................................................................ 5
6
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS3486
PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
DS3486M
ACTIVE
SOIC
SOIC
D
16
16
48
TBD
Call TI
CU SN
Call TI
0 to 70
0 to 70
DS3486M
DS3486M/NOPB
ACTIVE
ACTIVE
D
D
48
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
DS3486M
DS3486M
DS3486MX/NOPB
SOIC
16
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2013
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
DS3486MX/NOPB
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.3
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC 16
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
DS3486MX/NOPB
D
2500
Pack Materials-Page 2
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