DS36954 [TI]

Quad Differential Bus Transceiver;
DS36954
型号: DS36954
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

Quad Differential Bus Transceiver

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DS36954  
www.ti.com  
SNLS077C JULY 1998REVISED APRIL 2013  
DS36954 Quad Differential Bus Transceiver  
Check for Samples: DS36954  
1
FEATURES  
DESCRIPTION  
The DS36954 is  
a low power, quad EIA-485  
2
Pinout for SCSI Interface  
differential bus transceiver especially suited for high  
speed, parallel, multipoint, I/O bus applications. A  
compact 20-pin surface mount PLCC or SOIC  
package provides high transceiver integration and a  
very small PC board footprint.  
Compact 20-Pin PLCC or SOIC Package  
Meets EIA-485 Standard for Multipoint Bus  
Transmission  
Greater than 60 mA Source/Sink Currents  
Thermal Shutdown Protection  
Propagation delay skew between devices is specified  
to aid in parallel interface designs—limits on  
maximum and minimum delay times are verified.  
Glitch-Free Driver Outputs on Power Up and  
Down  
Five devices can implement a complete SCSI initiator  
or target interface. Three transceivers in a package  
are pinned out for data bus connections. The fourth  
transceiver, with the flexibility provided by its  
individual enables, can serve as a control bus  
transceiver.  
Connection Diagram  
Logic Diagram  
See Package Number FN (S-PQCC-J20)  
See Package Number DW (R-PDSO-G20)  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 1998–2013, Texas Instruments Incorporated  
DS36954  
SNLS077C JULY 1998REVISED APRIL 2013  
www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
(1)(2)  
Absolute Maximum Ratings  
Supply Voltage  
7V  
VCC + 0.5V  
VCC + 0.5V  
10V to +15V  
5.5V  
Control Input Voltage  
Driver Input Voltage  
Driver Output Voltage/Receiver Input Voltage  
Receiver Output Voltage  
Continuous Power Dissipation @ +25°C  
FN Package  
1.73W  
1.73W  
DW Package  
Derate FN Package  
13.9 mW/°C above +25°C  
13.7 mW/°C above +25°C  
65°C to +150°C  
260°C  
Derate DW Package  
Storage Temperature Range  
Lead Temperature (Soldering 4 Sec.)  
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be verified. They are not meant to imply  
that the devices should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation.  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instrument Sales Office/ Distributors for availability and  
specifications.  
Recommended Operating Conditions  
Min  
4.75  
7  
Max  
5.25  
+12  
+70  
Units  
V
Supply Voltage, VCC  
Bus Voltage  
V
Operating Free Air Temperature (TA)  
0
°C  
(1)(2)  
Electrical Characteristics  
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
DRIVER CHARACTERISTICS  
VODL  
Differential Driver Output Voltage (Full IL = 60 mA  
1.5  
1.9  
V
Load)  
VCM = 0V  
VOD  
Differential Driver Output Voltage  
(Termination Load)  
RL = 100Ω (EIA-422)  
RL = 54Ω (EIA-485)  
RL = 54 or 100Ω (3)(Figure 1 ) (EIA-422/485)  
2.0  
1.5  
2.25  
2.0  
V
V
V
ΔIVODI  
Change in Magnitude of Driver  
Differential Output Voltage for  
Complementary Output States  
0.2  
VOC  
Driver Common Mode Output Voltage RL = 54Ω (Figure 1 ) (EIA-485)  
3.0  
0.2  
V
V
(4)  
ΔIVOCI  
Change in Magnitude of Common  
Mode Output Voltage  
(3)(Figure 1 ) (EIA-422/485)  
VOH  
VOL  
VIH  
Output Voltage High  
Output Voltage Low  
Input Voltage High  
Input Voltage Low  
Input Clamp Voltage  
IOH = 55 mA  
2.7  
2.0  
3.2  
1.4  
V
V
V
V
V
IOL = 55 mA  
1.7  
VIL  
0.8  
VCL  
ICL = 18 mA  
1.5  
(1) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground  
unless otherwise specified.  
(2) All typicals are given for VCC = 5V and TA = 25°C.  
(3) Δ IVODI and Δ IVOCI are changes in magnitude of VOD and VOC, respectively, that occur when the input changes state.  
(4) In EIA Standards EIA-422 and EIA-485, VOC, which is the average of the two output voltages with respect to ground, is called output  
offset voltage, VOS  
.
2
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DS36954  
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SNLS077C JULY 1998REVISED APRIL 2013  
Electrical Characteristics (1)(2) (continued)  
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified  
Symbol  
IIH  
Parameter  
Input High Current  
Conditions  
Min  
Typ  
Max  
20  
Units  
μA  
(5)  
(5)  
VIN = 2.4V  
VIN = 0.4V  
IIL  
Input Low Current  
20  
250  
150  
250  
μA  
(6)  
IOSC  
Driver Short-Circuit Output Current  
VO = 7V (EIA-485)  
VO = 0V (EIA-422)  
VO = +12V (EIA-485)  
130  
90  
mA  
mA  
mA  
130  
RECEIVER CHARACTERISTICS  
(6)  
IOSR  
IOZ  
Short Circuit Output Current  
TRI-STATE Output Current  
Output Voltage High  
VO = 0V  
15  
28  
75  
mA  
μA  
V
VO = 0.4V to 2.4V  
20  
VOH  
VOL  
VTH  
VID = 0.2V, IOH = 0.4 mA  
2.4  
3.0  
Output Voltage Low  
VID = 0.2V, IOL = 4 mA  
0.35  
0.5  
0.2  
V
Differential Input High Threshold  
Voltage  
VO = VOH, IO = 0.4 mA (EIA-422/485)  
0.03  
V
VTL  
Differential Input Low Threshold  
Voltage  
VO = VOL, IO = 4.0 mA (EIA-422/485)  
VCM = 0V  
0.2  
0
0.03  
V
(7)  
(8)  
VHST  
Hysteresis  
35  
60  
mV  
DRIVER AND RECEIVER CHARACTERISTICS  
VIH  
VIL  
VCL  
IIN  
Enable Input Voltage High  
Enable Input Voltage Low  
Enable Input Clamp Voltage  
2.0  
V
V
0.8  
1.5  
1.0  
ICL = 18 mA  
V
(9)  
Line Input Current  
Other Input = 0V  
DE/RE = 0.8V  
DE4 = 0.8V  
VI = +12V  
0.5  
mA  
mA  
VI = 7V  
0.45  
0.8  
(9)  
IING  
Line Input Current  
Other Input = 0V  
DE/RE and DE4 = 2V  
VCC = 3.0V  
VI = +12V  
1.0  
0.8  
40  
mA  
mA  
VI = 7V  
TA = +25°C  
IIH  
Enable Input Current High  
Enable Input Current Low  
VIN = 2.4V  
DE/RE  
VCC = 3.0V  
VCC = 4.75V  
VCC = 5.25V  
VCC = 3.0V  
VCC = 5.25V  
VCC = 3.0V  
VCC = 4.75V  
VCC = 5.25V  
VCC = 3.0V  
VCC = 5.25V  
1
1
μA  
μA  
μA  
μA  
μA  
μA  
μA  
μA  
μA  
μA  
mA  
mA  
1
40  
20  
VIN = 2.4V  
DE4 or RE4  
1
1
20  
IIL  
VIN = 0.8V  
DE/RE  
6  
12  
14  
3  
7  
75  
50  
40  
40  
20  
20  
90  
VIN = 0.8V  
DE4 or RE4  
(10)  
ICCD  
ICCR  
Supply Current  
No Load, DE/RE and DE4 = 2.0V  
No Load, DE/RE and RE4 = 0.8V  
(10)  
Supply Current  
70  
(5) IIH and IIL include driver input current and receiver TRI-STATE leakage current on DR(1–3).  
(6) Short one output at a time.  
(7) Threshold parameter limits specified as an algebraic value rather than by magnitude.  
(8) Hysteresis defined as VHST = V TH VTL  
.
(9) IIN includes the receiver input current and driver TRI-STATE leakage current.  
(10) Total package supply current.  
Copyright © 1998–2013, Texas Instruments Incorporated  
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SNLS077C JULY 1998REVISED APRIL 2013  
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Units  
Switching Characteristics  
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
DRIVER SINGLE-ENDED CHARACTERISTICS  
tPZH  
tPZL  
tPHZ  
tPLZ  
Output Enable Time to High Level  
Output Enable Time to Low Level  
Output Disable Time to High Level  
Output Disable Time to Low Level  
RL = 110Ω  
(Figure 6 )  
35  
25  
15  
35  
40  
40  
25  
40  
ns  
ns  
ns  
ns  
(Figure 8 )  
(Figure 6 )  
(Figure 8 )  
DRIVER DIFFERENTIAL CHARACTERISTICS  
tr, tf  
Rise and Fall Time  
RL = 54Ω  
CL = 50 pF  
CD = 15 pF  
13  
15  
12  
3
16  
19  
19  
6
ns  
ns  
ns  
ns  
tPLHD  
tPHLD  
tSKD  
Differential Propagation  
9
9
(2)  
(1)  
Delays  
(Figure 3 Figure 4  
)
|tPLHD tPHLD| Diff. Skew  
RECEIVER CHARACTERISTICS  
tPLHD  
tPHLD  
tSKD  
tPZH  
tPZL  
Differential Propagation Delays  
CL = 15 pF  
VCM = 2.0V  
(Figure 10 )  
9
9
14  
13  
1
19  
19  
3
ns  
ns  
ns  
ns  
ns  
ns  
ns  
|tPLHD tPHLD| Diff. Receiver Skew  
Output Enable Time to High Level  
Output Enable Time to Low Level  
Output Disable Time from High Level  
Output Disable Time from Low Level  
CL = 15 pF  
(Figure 15 )  
15  
20  
20  
17  
22  
30  
30  
25  
tPHZ  
tPLZ  
(1) Propagation Delay Timing for Calculations of Driver Differential Propagation Delays  
(2) Differential propagation delays are calculated from single-ended propagation delays measured from driver input to the 20% and 80%  
levels on the driver outputs (Figure 16) .  
4
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DS36954  
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SNLS077C JULY 1998REVISED APRIL 2013  
PARAMETER MEASUREMENT INFORMATION  
(3)  
Figure 1. Driver VOD and VOC  
Figure 2. Receiver VOH and VOL  
(2)  
(1)  
(1) The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, 50% duty cycle, trand tf <  
6.0 ns, ZO = 50Ω  
(2) CL includes probe and stray capacitance.  
Figure 3. Driver Differential Propagation Delay Load Circuit  
(1)  
(1) Differential propagation delays are calculated from single-ended propagation delays measured from driver input to the  
20% and 80% levels on the driver outputs (Figure 16).  
Figure 4. Driver Differential Propagation Delays and Transition Times  
(3) CL includes probe and stray capacitance.  
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(2)  
(1)  
S1 to OA for DI = 3V  
S1 to OB for DI = 0V  
(1) The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, 50% duty cycle, trand tf <  
6.0 ns, ZO = 50Ω.  
(2) CL includes probe and stray capacitance.  
Figure 5.  
Figure 6. Driver Enable and Disable Timing (tPZH, t PHZ  
)
(1)  
(2)  
S1 to OA for DI = 0V  
S1 to OB for DI = 3V  
(1) The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, 50% duty cycle, trand tf <  
6.0 ns, ZO = 50Ω.  
(2) CL includes probe and stray capacitance.  
Figure 7.  
6
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DS36954  
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SNLS077C JULY 1998REVISED APRIL 2013  
Figure 8. Driver Enable and Disable Timing (tPZL, t PLZ  
)
(1)  
(2)  
(1) The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, 50% duty cycle, trand tf <  
6.0 ns, ZO = 50Ω.  
(2) CL includes probe and stray capacitance.  
Figure 9.  
Figure 10. Receiver Differential Propagation Delay Timing  
(1)  
(4)  
(3)  
(2)  
(1) The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, 50% duty cycle, trand tf <  
6.0 ns, ZO = 50Ω.  
(2) CL includes probe and stray capacitance.  
(3) Diodes are 1N916 or equivalent.  
(4) On transceivers 1–3 the driver is loaded with receiver input conditions when DE/RE is high. Do not exceed the  
package power dissipation limit when testing.  
Figure 11.  
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S1 1.5V  
S2 Open  
S3 Closed  
Figure 12.  
Figure 13.  
Figure 14.  
S1 1.5V  
S2 Closed  
C3 Open  
S1 1.5V  
S2 Closed  
C3 Closed  
S1 1.5V  
S2 Closed  
C3 Closed  
Figure 15. Receiver Enable and Disable Timing  
8
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DS36954  
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SNLS077C JULY 1998REVISED APRIL 2013  
Tra, Trb, Tfa and Tfb are propagation delay measurements to the 20% and 80% levels.  
TCP = Crossing Point  
Figure 16. Propagation Delay Timing for Calculations of Driver Differential Propagation Delays  
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DS36954  
SNLS077C JULY 1998REVISED APRIL 2013  
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REVISION HISTORY  
Changes from Revision B (April 2013) to Revision C  
Page  
Changed layout of National Data Sheet to TI format ............................................................................................................ 9  
10  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
1-Nov-2013  
PACKAGING INFORMATION  
Orderable Device  
DS36954M  
Status Package Type Package Pins Package  
Eco Plan  
Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
0 to 70  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(6)  
(3)  
(4/5)  
NRND  
SOIC  
SOIC  
SOIC  
DW  
20  
20  
20  
36  
TBD  
Call TI  
Call TI  
DS36954  
M
DS36954M/NOPB  
DS36954MX/NOPB  
ACTIVE  
ACTIVE  
DW  
DW  
36  
Green (RoHS  
& no Sb/Br)  
SN | CU SN  
SN | CU SN  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
Call TI  
0 to 70  
DS36954  
M
1000  
Green (RoHS  
& no Sb/Br)  
0 to 70  
DS36954  
M
DS36954VX  
NRND  
PLCC  
PLCC  
FN  
FN  
20  
20  
1000  
1000  
TBD  
Call TI  
CU SN  
0 to 70  
0 to 70  
DS36954V  
DS36954V  
DS36954VX/NOPB  
ACTIVE  
Green (RoHS  
& no Sb/Br)  
Level-2A-250C-4  
WEEK  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish  
value exceeds the maximum column width.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
1-Nov-2013  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
23-Sep-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
DS36954MX/NOPB  
SOIC  
DW  
20  
1000  
330.0  
24.4  
10.9  
13.3  
3.25  
12.0  
24.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
23-Sep-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SOIC DW 20  
SPQ  
Length (mm) Width (mm) Height (mm)  
367.0 367.0 45.0  
DS36954MX/NOPB  
1000  
Pack Materials-Page 2  
MECHANICAL DATA  
MPLC004A – OCTOBER 1994  
FN (S-PQCC-J**)  
PLASTIC J-LEADED CHIP CARRIER  
20 PIN SHOWN  
Seating Plane  
0.004 (0,10)  
0.180 (4,57) MAX  
0.120 (3,05)  
D
0.090 (2,29)  
D1  
0.020 (0,51) MIN  
3
1
19  
0.032 (0,81)  
0.026 (0,66)  
4
18  
D2/E2  
D2/E2  
E
E1  
8
14  
0.021 (0,53)  
0.013 (0,33)  
0.050 (1,27)  
9
13  
0.007 (0,18)  
M
0.008 (0,20) NOM  
D/E  
D1/E1  
D2/E2  
NO. OF  
PINS  
**  
MIN  
0.385 (9,78)  
MAX  
MIN  
MAX  
MIN  
MAX  
0.395 (10,03)  
0.350 (8,89)  
0.356 (9,04)  
0.141 (3,58)  
0.191 (4,85)  
0.291 (7,39)  
0.341 (8,66)  
0.169 (4,29)  
0.219 (5,56)  
0.319 (8,10)  
0.369 (9,37)  
20  
28  
44  
52  
68  
84  
0.485 (12,32) 0.495 (12,57) 0.450 (11,43) 0.456 (11,58)  
0.685 (17,40) 0.695 (17,65) 0.650 (16,51) 0.656 (16,66)  
0.785 (19,94) 0.795 (20,19) 0.750 (19,05) 0.756 (19,20)  
0.985 (25,02) 0.995 (25,27) 0.950 (24,13) 0.958 (24,33) 0.441 (11,20) 0.469 (11,91)  
1.185 (30,10) 1.195 (30,35) 1.150 (29,21) 1.158 (29,41) 0.541 (13,74) 0.569 (14,45)  
4040005/B 03/95  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Falls within JEDEC MS-018  
1
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