DS90LV019MWC [TI]
DS90LV019 3.3V or 5V LVDS Driver/Receiver;
| 型号： | DS90LV019MWC |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DS90LV019 3.3V or 5V LVDS Driver/Receiver 驱动 接口集成电路 驱动器 |
| 文件： | 总12页 (文件大小：177K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS90LV019
DS90LV019 3.3V or 5V LVDS Driver/Receiver
Literature Number: SNLS008B
August 2000
DS90LV019
3.3V or 5V LVDS Driver/Receiver
General Description
Features
n LVDS Signaling
The DS90LV019 is a Driver/Receiver designed specifically
for the high speed low power point-to-point interconnect ap-
plications. The device operates from a single 3.3V or 5.0V
power supply and includes one differential line driver and
one receiver. The DS90LV019 features an independent
driver and receiver with TTL/CMOS compatibility (DIN and
n 3.3V or 5.0V operation
n Low power CMOS design
n Balanced Output Impedance
n Glitch free power up/down (Driver disabled)
n High Signaling Rate Capacity (above 100 Mbps)
n Ultra Low Power Dissipation
ROUT). The logic interface provides maximum flexibility as 4
separate lines are provided (DIN, DE, RE, and ROUT). The
device also features a flow-through pin out which allows
easy PCB routing for short stubs between its pins and the
connector. The driver has 3.5 mA output loop current.
±
±
n
n
1V Common-Mode Range
100 mV Receiver Sensitivity
n Product offered in SOIC and TSSOP packages
n Flow-Through Pin Out
n Industrial Temperature Range Operation
The driver translates between TTL levels (single-ended) to
Low Voltage Differential Signaling levels. This allows for high
speed operation, while consuming minimal power with re-
duced EMI. In addition, the differential signaling provides
common-mode noise rejection.
±
±
The receiver threshold is 100 mV over a 1V common-
mode range and translates the low swing differential levels
to standard (TTL/CMOS) levels.
Connection Diagram
DS100053-1
Order Number DS90LV019TM or DS90LV019TMTC
See NS Package Number M14A or MTC14
Block Diagram
DS100053-2
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 2000 National Semiconductor Corporation
DS100053
www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Derate SOIC Package
TSSOP
7.7mW/˚C
790 mW
Derate TSSOP Package
Storage Temperature Range
6.3mW/˚C
−65˚C to +150˚C
Supply Voltage VCC
6.0V
−0.3V to (VCC +0.3V)
−0.3V to (VCC + 0.3V)
Lead Temperature
(Soldering, 4 sec.)
260˚C
Enable Input Voltage (DE, RE)
Driver Input Voltage (DIN
)
Recommended Operating
Conditions
Receiver Output Voltage
(ROUT
)
−0.3V to (VCC + 0.3V)
−0.3V to +3.9V
±
Driver Output Voltage (DO )
Min
Max Units
±
Receiver Input Voltage (RI )
−0.3V to (VCC + 0.3V)
Continuous
Supply Voltage (VCC) or
Supply Voltage (VCC
3.0
4.5
0.0
3.6
5.5
2.4
V
V
V
Driver Short Circuit Current
ESD (Note 4)
)
Receiver Input Voltage
>
>
(HBM, 1.5 kΩ, 100 pF)
(EIAJ, 0 Ω, 200 pF)
2.0 kV
200 V
Operating Free Air
Temperature TA
−40
+85
˚C
Maximum Package Power Dissipation at 25˚C
SOIC
960 mW
DC Electrical Characteristics
±
TA = −40˚C to +85˚C unless otherwise noted, VCC = 3.3 0.3V. (Notes 2, 3)
Symbol
Parameter
Conditions
Pin
Min
250
1
Typ
Max
Units
DIFFERENTIAL DRIVER CHARACTERISTICS
VOD
Output Differential Voltage
VOD Magnitude Change
Offset Voltage
RL = 100Ω (Figure 1)
DO+,
DO−
350
6
450
60
mV
mV
V
∆VOD
VOS
1.25
5
1.7
60
∆VOS
IOZD
IOXD
IOSD
Offset Magnitude Change
TRI-STATE®Leakage
Power-Off Leakage
mV
µA
µA
mA
±
±
VOUT = VCC or GND, DE = 0V
VOUT = 3.6V or GND, VCC = 0V
VOUT = 0V, DE = VCC
−10
−10
−10
1
1
+10
+10
−4
Output Short Circuit Current
−6
DIFFERENTIAL RECEIVER CHARACTERISTICS
VOH
Voltage Output High
VID = +100 mV
Inputs Open
IOH = −400 µA
ROUT
2.9
2.9
3.3
3.3
0.1
−34
V
V
VOL
IOS
VTH
VTH
IIN
Voltage Output Low
Output Short Circuit Current
Input Threshold High
Input Threshold Low
Input Current
IOL = 2.0 mA, VID = −100 mV
VOUT = 0V
0.4
−20
V
−75
mA
mV
mV
µA
RI+,
RI−
+100
−100
−10
±
VIN = +2.4V or 0V, VCC = 3.6V or
0V
1
+10
DEVICE CHARACTERISTICS
VIH
Minimum Input High Voltage
DIN
DE, RE
,
2.0
VCC
0.8
V
VIL
Maximum Input Low Voltage
Input High Current
GND
V
±
±
±
±
IIH
VIN = VCC or 2.4V
VIN = GND or 0.4V
ICLAMP = −18 mA
DE = RE = VCC
1
1
10
10
µA
µA
V
IIL
Input Low Current
VCL
ICCD
ICCR
ICCZ
ICC
Input Diode Clamp Voltage
Power Supply Current
−1.5
−0.7
9
VCC
12.5
7.0
7.0
20
mA
mA
mA
mA
pF
DE = RE = 0V
4.5
3.7
15
5
DE = 0V, RE = VCC
DE = VCC, RE = 0V
CD output
Capacitance
Capacitance
DO+,
DO−
CR input
RI+,
RI−
5
pF
www.national.com
2
DC Electrical Characteristics
±
TA = −40˚C to +85˚C unless otherwise noted, VCC = 5.0 0.5V. (Notes 2, 3)
Symbol
Parameter
Conditions
Pin
Min
250
1
Typ
Max
Units
DIFFERENTIAL DRIVER CHARACTERISTICS
VOD
Output Differential Voltage
VOD Magnitude Change
Offset Voltage
R
= 100Ω (Figure 1)
DO+,
DO−
360
6
450
60
mV
mV
V
L
∆VOD
VOS
1.25
5
1.8
60
∆VOS
IOZD
IOXD
IOSD
Offset Magnitude Change
TRI-STATE Leakage
Power-Off Leakage
mV
µA
µA
mA
±
±
VOUT = VCC or GND, DE = 0V
VOUT = 5.5V or GND, VCC = 0V
VOUT = 0V, DE = VCC
−10
−10
−10
1
1
+10
+10
−4
Output Short Circuit Current
−6
DIFFERENTIAL RECEIVER CHARACTERISTICS
VOH
Voltage High
VID = +100 mV
Inputs Open
IOH = −400 µA
ROUT
4.3
4.3
5.0
5.0
0.1
−75
V
V
VOL
IOS
VTH
VTH
IIN
Voltage Output Low
Output Short Circuit Current
Input Threshold High
Input Threshold Low
Input Current
IOL = 2.0 mA, VID = −100 mV
VOUT = 0V
0.4
−40
V
−150
mA
mV
mV
µA
RI+,
RI−
+100
−100
−15
±
VIN = +2.4V or 0V, VCC = 5.5V or
0V
1
+15
DEVICE CHARACTERISTICS
VIH
Minimum Input High Voltage
DIN
DE ,RE
,
2.0
VCC
0.8
V
VIL
Maximum Input Low Voltage
Input High Current
GND
V
±
±
±
±
IIH
VIN = VCC or 2.4 V
VIN = GND or 0.4V
ICLAMP = −18 mA
DE = RE = VCC
1
1
10
10
µA
µA
V
IIL
Input Low Current
VCL
ICCD
ICCR
ICCZ
ICC
Input Diode Clamp Voltage
Power Supply Current
−1.5
−0.8
12
VCC
19
mA
mA
mA
mA
pF
DE = RE = 0V
5.8
4.5
18
8
DE = 0V, RE = VCC
DE = VCC, RE = 0V
8.5
48
CD output
Capacitance
Capacitance
DO+,
DO−
5
CR input
RI+,
RI−
5
pF
Note 1: “Absolute Maximum Ratings” are these beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device should
be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation.
Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified.
Note 3: All typicals are given for V
Note 4: ESD Rating:
= +3.3V or +5.0V and T = +25˚C, unless otherwise stated.
A
CC
>
HBM (1.5 kΩ, 100 pF) 2.0 kV
>
EIAJ (0Ω, 200 pF) 200V.
Note 5: C includes probe and fixture capacitance.
L
Note 6: Generator waveforms for all tests unless otherwise specified; f = 1 MHz, Z = 50Ω, t = t ≤ 6.0 ns (0%–100%).
O
r
f
AC Electrical Characteristics
±
TA = −40˚C to +85˚C, VCC = 3.3V 0.3V. (Note 6)
Symbol Parameter
DRIVER TIMING REQUIREMENTS
Conditions
Min
Typ
Max
Units
tPHLD
tPLHD
tSKD
tTLH
Differential Propagation Delay High to Low
Differential Propagation Delay Low to High
RL = 100Ω,
CL = 10 pF
(Figure 2 and Figure 3)
2.0
1.0
4.0
5.6
0.4
0.7
0.8
6.5
7.0
1.0
3.0
3.0
ns
ns
ns
ns
ns
Differential Skew |tPHLD − tPLHD
Transition Time Low to High
Transition Time High to Low
|
0.2
0.2
tTHL
3
www.national.com
AC Electrical Characteristics (Continued)
±
TA = −40˚C to +85˚C, VCC = 3.3V 0.3V. (Note 6)
Symbol Parameter
DRIVER TIMING REQUIREMENTS
Conditions
Min
Typ
Max
Units
tPHZ
tPLZ
tPZH
tPZL
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
RL = 100Ω,
CL = 10 pF
(Figure 4 and Figure 5)
1.5
2.5
4.0
3.5
4.0
5.3
6.0
6.0
8.0
9.0
8.0
8.0
ns
ns
ns
ns
RECEIVER TIMING REQUIREMENTS
tPHLD
tPLHD
tSKD
tr
Differential Propagation Delay High to Low
Differential Propagation Delay Low to High
CL = 10 pF,
VID = 200 mV
(Figure 6 and Figure 7)
3.0
3.0
5.8
5.6
0.55
2.0
0.9
4.0
4.5
6.0
6.0
7.0
9.0
1.5
3.0
3.0
6.0
6.0
8.0
8.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
Differential Skew |tPHLD − tPLHD
Rise Time
|
0.15
0.15
3.0
tf
Fall Time
tPHZ
tPLZ
tPZH
tPZL
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
RL = 500Ω,
CL = 10 pF
(Figure 8 and Figure 9)
3.0
3.0
3.0
AC Electrical Characteristics
±
TA = −40˚C to +85˚C, VCC = 5.0V 0.5V. (Note 6)
Symbol Parameter
DRIVER TIMING REQUIREMENTS
Conditions
Min
Typ
Max
Units
tPHLD
tPLHD
tSKD
tTLH
tTHL
tPHZ
tPLZ
Differential Propagation Delay High to Low
Differential Propagation Delay Low to High
RL = 100Ω,
CL = 10 pF
(Figure 2 and Figure 3)
2.0
1.0
3.3
3.3
0.6
0.9
1.2
3.5
5.2
4.5
4.5
6.0
5.0
1.0
3.0
3.0
7.0
9.0
7.0
7.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
Differential Skew |tPHLD − tPLHD
Transition Time Low to High
Transition Time High to Low
Disable Time High to Z
|
0.15
0.15
1.5
RL = 100Ω,
CL = 10 pF
(Figure 4 and Figure 5)
Disable Time Low to Z
3.0
tPZH
tPZL
Enable Time Z to High
2.0
Enable Time Z to Low
2.0
RECEIVER TIMING REQUIREMENTS
tPHLD
tPLHD
tSKD
tr
Differential Propagation Delay High to Low
Differential Propagation Delay Low to High
CL = 10 pF,
VID = 200 mV
(Figure 6 and Figure 7)
3.0
3.0
6.0
5.6
0.7
0.8
0.8
3.5
3.6
5.0
5.0
8.0
8.0
1.6
3.0
3.0
4.5
7.0
7.0
7.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
Differential Skew |tPHLD − tPLHD
Rise Time
|
0.15
0.15
3.0
tf
Fall Time
tPHZ
tPLZ
tPZH
tPZL
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
RL = 500Ω,
CL = 10 pF
(Figure 8 and Figure 9)
3.5
3.0
3.0
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4
Test Circuits and Timing Waveforms
DS100053-3
FIGURE 1. Differential Driver DC Test Circuit
DS100053-4
FIGURE 2. Differential Driver Propagation Delay and Transition Test Circuit
DS100053-5
FIGURE 3. Differential Driver Propagation and Transition Time Waveforms
DS100053-6
FIGURE 4. Driver TRI-STATE Delay Test Circuit
5
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Test Circuits and Timing Waveforms (Continued)
DS100053-7
FIGURE 5. Driver TRI-STATE Delay Waveforms
DS100053-8
FIGURE 6. Receiver Propagation Delay and Transition Time Test Circuit
DS100053-9
FIGURE 7. Receiver Propagation Delay and Transition Time Waveforms
DS100053-10
FIGURE 8. Receiver TRI-STATE Delay Test Circuit
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6
Test Circuits and Timing Waveforms (Continued)
DS100053-11
FIGURE 9. Receiver TRI-STATE Delay Waveforms TRI-STATE Delay Waveforms
DS100053-13
FIGURE 10. Terminated Input Fail-Safe Circuit
Typical Application Diagram
DS100053-12
and 0.01 µF in parallel should be used between each VCC
and ground. The capacitors should be as close as pos-
sible to the VCC pin.
Applications Information
The DS90LV019 has two control pins, which allows the de-
vice to operate as a driver, a receiver or both driver and a re-
ceiver at the same time. There are a few common practices
which should be implied when designing PCB for LVDS sig-
naling. Recommended practices are:
•
Use controlled impedance traces which match the differ-
ential impedance of your transmission medium (i.e.,
Cable) and termination resistor.
•
•
Use the termination resistor which best matches the dif-
ferential impedance of your transmission line.
•
•
•
Use at least 4 PCB board layer (LVDS signals, ground,
power and TTL signals).
Isolate TTL signals from LVDS signals.
Keep drivers and receivers as close to the (LVDS port
side) connector as possible.
MEDIA (CABLE AND CONNECTOR) SELECTION:
Bypass each LVDS device and also use distributed bulk
capacitance. Surface mount capacitors placed close to
power and ground pins work best. Two or three multi-
layer ceramic (MLC) surface mount capacitors 0.1 µF,
•
Use controlled impedance media. The cables and con-
nectors should have a matched differential impedance of
about 100Ω.
7
www.national.com
•
There are three Fail-Safe scenarios, open input pins,
shorted inputs pins and terminated input pins. The first
case is guaranteed for DS90LV019. A HIGH state on
Applications Information (Continued)
•
Balanced cables (e.g., twisted pair) are usually better
than unbalanced cables (ribbon cable, simple coax) for
noise reduction and signal quality.
ROUT pin can be achieved by using two external resistors
(one to VCC and one to GND) per Figure 10 (Terminated
Input Fail-Safe Circuit). R1 and R2 should be RT to limit
the loading to the LVDS driver . RT is selected to match
the impedance of the cable.
<
•
For cable distances 0.5m, most cables can be made to
work effectively. For distances 0.5m ≤ d ≤ 10m, CAT 3
(category 3) twisted pair cable works well and is readily
available and relatively inexpensive. For distances
>
10m, and high data rates CAT 5 twisted pair is recom-
mended.
TABLE 1. Functional Table
MODE SELECTED
DE
H
L
RE
H
L
DRIVER MODE
RECEIVER MODE
TRI-STATE MODE
FULL DUPLEX MODE
L
H
L
H
TABLE 2. Transmitter Mode
INPUTS OUTPUTS
DI
TABLE 3. Receiver Mode
INPUTS
OUTPUT
DE
DO+
L
DO−
H
RE
(RI+) − (RI−)
<
H
H
H
L
L
L
L
L ( −100 mV)
L
H
X
Z
>
H ( +100 mV)
H
H
L
>
>
>
>
& −100 mV
2
&
0.8
X
X
L
100 mV
X
Z
Z
H
X
X = High or Low logic state
Z = High impedance state
L = Low state
X = High or Low logic state
Z = High impedance state
L = Low state
H = High state
H = High state
TABLE 4. Device Pin Description
Input/Output
Pin Name
Pin #
Description
DIN
2
I
O
I
TTL Driver Input
±
DO
11, 12
LVDS Driver Outputs
±
RI
9, 10
LVDS Receiver Inputs
TTL Receiver Output
ROUT
RE
4
8
O
I
Receiver Enable TTL Input (Active Low)
Driver Enable TTL Input (Active High)
Ground
DE
1
I
GND
VCC
7
NA
NA
± ±
Power Supply (3.3V 0.3V or 5.0V 0.5V)
14
www.national.com
8
Physical Dimensions inches (millimeters) unless otherwise noted
Order Number DS90LV019TM
NS Package Number M14A
9
www.national.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Order Number DS90LV019TMTC
NS Package Number MTC14
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