DS91M047TMA/NOPB [TI]
125MHz 四路 M-LVDS 线路驱动器 | D | 16 | -40 to 85;
| 型号： | DS91M047TMA/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 125MHz 四路 M-LVDS 线路驱动器 | D | 16 | -40 to 85 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总18页 (文件大小：971K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS91M047
www.ti.com
SNLS145E –JUNE 2008–REVISED APRIL 2013
DS91M047 125 MHz Quad M-LVDS Line Driver
Check for Samples: DS91M047
1
FEATURES
DESCRIPTION
The DS91M047 is a high-speed quad M-LVDS line
driver designed for driving clock or data signals to up
to four multipoint networks.
2
•
DC - 125 MHz / 250 Mbps Low Jitter, Low
Skew, Low Power Operation
•
•
Conforms to TIA/EIA-899 M-LVDS Standard
M-LVDS (Multipoint LVDS) is a new family of bus
interface devices based on LVDS technology
specifically designed for multipoint and multidrop
cable and backplane applications. It differs from
standard LVDS in providing increased drive current to
handle double terminations that are required in multi-
point applications. Controlled transition times
minimize reflections that are common in multipoint
configurations due to unterminated stubs.
Controlled Transition Times (2 ns typ)
Minimize Reflections
•
8 kV ESD on M-LVDS Pins Protects Adjoining
Components
•
•
Flow-Through Pinout Simplifies PCB Layout
Industrial Operating Temperature Range
(−40°C to +85°C)
•
Available in a Space Saving SOIC-16 Package
The DS91M047 accepts LVTTL/LVCMOS input levels
and translates them to M-LVDS signal levels with
transition times of greater than 1 ns. The device
provides the DE and DE inputs that are ANDed
together and control the TRI-STATE outputs. The DE
and DE inputs are common to all four drivers.
APPLICATIONS
•
•
•
Multidrop / Multipoint Clock and Data
Distribution
High-Speed, Low Power, Short-Reach
Alternative to TIA/EIA-485/422
The DS91M047 has a flow-through pinout for easy
PCB layout. The DS91M047 provides
a
new
Clock Distribution in AdvancedTCA (ATCA)
and MicroTCA (μTCA, uTCA) Backplanes
alternative for high speed multipoint interface
applications. It is packaged in a space saving SOIC-
16 package.
TYPICAL APPLICATION
Line Card in SLOT 1
Line Card in SLOT N-1
Line Card in SLOT N
M-LVDS Receivers
DS91M047
M-LVDS Receivers
R
T
R
T
R
T
Z
Z
Z
R
T
R
T
R
T
0
0
0
R
T
Z
R
T
0
R
T
= Z
LOADED
BACKPLANE
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
DS91M047
SNLS145E –JUNE 2008–REVISED APRIL 2013
www.ti.com
Connection Diagrams
DE
DI0
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
B0
A0
A1
B1
B2
A2
A3
B3
DE
DE
DI1
B0
A0
DI0
DI1
DI2
DI3
VDD
GND
DI2
B1
A1
DI3
B2
A2
DE
B3
A3
PIN DESCRIPTIONS
Pin No.
Name
DI
Description
2, 3, 6, 7
10, 11, 14, 15
9, 12, 13, 16
1
Driver input pin, LVCMOS compatible.
A
Non-inverting driver output pin, M-LVDS levels.
Inverting driver output pin, M-LVDS levels.
B
DE
Driver enable pin: When DE is low, the driver is disabled. When DE is high and DE is low or open, the
driver is enabled. If both DE and DE are open circuit, then the driver is disabled.
8
DE
Driver enable pin: When DE is high, the driver is disabled. When DE is low or open and DE is high, the
driver is enabled. If both DE and DE are open circuit, then the driver is disabled.
4
5
VDD
Power supply pin, +3.3V ± 0.3V
GND Ground pin
TRUTH TABLE
Enables
Input
DI
L
Outputs
DE
DE
A
B
H
L
L
H
Z
H
L
H
All other combinations of ENABLE inputs
X
Z
2
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SNLS145E –JUNE 2008–REVISED APRIL 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS(1)(2)
Power Supply Voltage
−0.3V to +4V
−0.3V to (VDD + 0.3V)
−1.9V to +5.5V
Continuous
LVCMOS Input Voltage
M-LVDS Output Voltage
M-LVDS Output Short Circuit Current Duration
Junction Temperature
+140°C
Storage Temperature Range
Lead Temperature Range
−65°C to +150°C
+260°C
Soldering (4 sec.)
Maximum Package Power Dissipation @ +25°C
D Package
2.21W
Derate D Package
19.2 mW/°C above +25°C
+52°C/W
Package Thermal Resistance (4-Layer, 2 oz. Cu,
JEDEC)
θJA
θJC
+19°C/W
ESD Susceptibility
HBM
MM
CDM
≥8 kV
≥250V
≥1250V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the is not implied. The Recommended Operating Conditions indicate conditions at which the
device is functional and the device should not be operated beyond such conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
RECOMMENDED OPERATING CONDITIONS
Min
+3.0
−1.4
2.0
Typ
Max
+3.6
+3.8
VDD
0.8
Units
V
Supply Voltage (VDD)
+3.3
Voltage at Any Bus Terminal (Separate or Common-Mode)
V
High Level Input Voltage (VIH
)
V
Low Level Input Voltage (VIL)
0
V
Operating Free Air Temperature (TA)
−40
+25
+85
°C
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SNLS145E –JUNE 2008–REVISED APRIL 2013
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DC ELECTRICAL CHARACTERISTICS(1)(2)(3)(4)
Over supply voltage and operating temperature ranges, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
LVCMOS DC Specifications
VIH
VIL
IIH
High-Level Input Voltage
Low-Level Input Voltage
2.0
GND
-15
VDD
0.8
15
V
V
High-Level Input Current
Low-Level Input Current
Input Clamp Voltage
VIH = 3.6V
±1
±1
μA
μA
V
IIL
VIL = 0V
-15
15
VCL
IIN = -18 mA
-1.5
M-LVDS DC Specifications
|VAB
|
Differential Output Voltage Magnitude
480
−50
0.30
0
650
50
mV
mV
V
RL = 50Ω, CL = 5 pF
See Figure 1 and Figure 3
ΔVAB
Change in Differential Output Voltage Magnitude
Between Logic States
VOS(SS)
Steady-State Common-Mode Output Voltage
1.6
2.10
50
RL = 50Ω
See Figure 1 and Figure 2
|ΔVOS(SS)
|
Change in Steady-State Common-Mode Output Voltage
Between Logic States
mV
VA(OC)
VB(OC)
VP(H)
Maximum Steady-State Open-Circuit Output Voltage
Maximum Steady-State Open-Circuit Output Voltage
Voltage Overshoot, Low-to-High Level Output(5)
Voltage Overshoot, High-to-Low Level Output(5)
0
0
2.4
2.4
V
V
V
See Figure 4
RL = 50Ω, CL = 5 pF
CD = 0.5 pF, see Figure 6
and Figure 7
1.2VSS
VP(L)
−0.2VSS
V
IOS
Output Short-Circuit Current(6)
See Figure 5
-43
0
43
32
20
0
mA
μA
μA
μA
μA
μA
μA
VA = 3.8V, VB = 1.2V
VA = 0V or 2.4V, VB = 1.2V
VA = −1.4V, VB = 1.2V
VA = 3.8V, VB = 1.2V
VA = 0V or 2.4V, VB = 1.2V
VA = −1.4V, VB = 1.2V
VA = VB, −1.4V ≤ V ≤ 3.8V
IA
Driver High-Impedance Output Current
−20
−32
0
32
20
0
IB
Driver High-Impedance Output Current
−20
−32
IAB
Driver High-Impedance Output Differential Curent
(IA − IB)
−4
4
μA
IA(OFF)
Driver High-Impedance Output Power-Off Current
VA = 3.8V, VB = 1.2V
DE = 0V
0
32
μA
0V ≤ VDD ≤ 1.5V
VA = 0V or 2.4V, VB = 1.2V
DE = 0V
0V ≤ VDD ≤ 1.5V
−20
−32
0
20
0
μA
μA
μA
μA
μA
VA = −1.4V, VB = 1.2V
DE = 0V
0V ≤ VDD ≤ 1.5V
IB(OFF)
Driver High-Impedance Output Power-Off Current
VA = 3.8V, VB = 1.2V
DE = 0V
0V ≤ VDD ≤ 1.5V
32
20
0
VA = 0V or 2.4V, VB = 1.2V
DE = 0V
0V ≤ VDD ≤ 1.5V
−20
−32
VA = −1.4V, VB = 1.2V
DE = 0V
0V ≤ VDD ≤ 1.5V
(1) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
(2) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
except VOD and ΔVOD
.
(3) Typical values represent most likely parametric norms for VDD = +3.3V and TA = +25°C, and at the Recommended Operating Conditions
at the time of product characterization and are not ensured.
(4) CL includes fixture capacitance and CD includes probe capacitance.
(5) Specification is specified by characterization and is not tested in production.
(6) Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
4
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SNLS145E –JUNE 2008–REVISED APRIL 2013
DC ELECTRICAL CHARACTERISTICS(1)(2)(3)(4) (continued)
Over supply voltage and operating temperature ranges, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
IAB(OFF)
Driver High-Impedance Output Power-Off Current
VA = VB, −1.4V ≤ V ≤ 3.8V
DE = 0V
(IA(OFF) − IB(OFF)
)
−4
4
μA
0V ≤ VDD ≤ 1.5V
CA
Driver Output Capacitance
7.8
7.8
3
pF
pF
pF
CB
Driver Output Capacitance
VDD = 0V
CAB
CA/B
ICC
Driver Output Differential Capacitance
Driver Output Capacitance Balance (CA/CB)
Power Supply Current
1
RL = 50Ω (All Outputs)
DI = VDD or GND (All Inputs)
DE = VDD, DE = GND
f = 125 MHz
65
19
75
24
mA
mA
ICCZ
TRI-STATE Power Supply Current
RL = 50Ω (All Outputs)
DI = VDD or GND (All Inputs)
DE = GND, DE = VDD
SWITCHING CHARACTERISTICS(1)(2)(3)
Over supply voltage and operating temperature ranges, unless otherwise specified.
Symbol
tPHL
Parameter
Conditions
Min
Typ
Max
5.0
Units
ns
Differential Propagation Delay High to Low
1.5
1.5
0
3.1
3.1
70
tPLH
Differential Propagation Delay Low to High
5.0
ns
(4)(5)
tSKD1
tSKD2
tSKD3
Differential Pulse Skew |tPHL − tPLH
Channel-to-Channel Skew(4)(6)
Differential Part-to-Part Skew(4)(7)
|
140
200
ps
RL = 50Ω
CL = 5 pF,
CD = 0.5 pF
See Figure 6 and Figure 7
0
70
ps
0
0.8
1.5
ns
(Constant TA and VDD
)
tSKD4
tTLH
tTHL
tPHZ
tPLZ
tPZH
tPZL
fMAX
Differential Part-to-Part Skew(8)
Rise Time(4)
0
3.5
3.0
ns
ns
1.1
1.1
2.0
2.0
7
Fall Time(4)
3.0
ns
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
Maximum Operating Frequency
12.5
12.5
12.5
12.5
ns
RL = 50Ω
CL = 5 pF,
CD = 0.5 pF
See Figure 8 and Figure 9
7
ns
7
ns
7
ns
See(4)
125
MHz
(1) The Electrical Characteristics list ensured specifications under the listed Recommended Operating Conditions except as otherwise
modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not
ensured.
(2) Typical values represent most likely parametric norms for VDD = +3.3V and TA = +25°C, and at the Recommended Operating Conditions
at the time of product characterization and are not ensured.
(3) CL includes fixture capacitance and CD includes probe capacitance.
(4) Specification is specified by characterization and is not tested in production.
(5) tSKD1, |tPLHD − tPHLD|, Pulse Skew, is the magnitude difference in differential propagation delay time between the positive going edge and
the negative going edge of the same channel.
(6) tSKD2, Channel-to-Channel Skew, is the difference in propagation delay (tPLHD or tPHLD) among all output channels.
(7) tSKD3, Part-to-Part Skew, is defined as the difference between the minimum and maximum differential propagation delays. This
specification applies to devices at the same VDD and within 5°C of each other within the operating temperature range.
(8) tSKD4, Part-to-Part Skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices
over recommended operating temperature and voltage ranges, and across process distribution. tSKD4 is defined as |Max − Min|
differential propagation delay.
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PARAMETER MEASUREMENT INFORMATION
Figure 1. Differential Driver Test Circuit
A
~ 1.9V
~ 1.3V
B
DV
OS(SS)
V
V
OS
OS(PP)
Figure 2. Differential Driver Waveforms
Figure 3. Differential Driver Full Load Test Circuit
6
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SNLS145E –JUNE 2008–REVISED APRIL 2013
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 4. Differential Driver DC Open Test Circuit
Figure 5. Differential Driver Short-Circuit Test Circuit
Figure 6. Driver Propagation Delay and Transition Time Test Circuit
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PARAMETER MEASUREMENT INFORMATION (continued)
Figure 7. Driver Propagation Delay and Transition Time Waveforms
Figure 8. Driver TRI-STATE Delay Test Circuit
8
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PARAMETER MEASUREMENT INFORMATION (continued)
Figure 9. Driver TRI-STATE Delay Waveforms
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TYPICAL PERFORMANCE CHARACTERISTICS
2.8
2.8
f = 125 MHz
f = 125 MHz
V
= 3.0V
V
= 3.0V
CC
CC
2.5
2.2
2.5
2.2
1.9
1.9
V
= 3.6V
CC
V
= 3.6V
CC
1.6
1.3
1.6
1.3
V
= 3.3V
CC
V
= 3.3V
30
CC
1.0
-50
1.0
-50
-10
30
70
110
150
-10
70
110
150
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 10. Driver Rise Time as a Function of Temperature
Figure 11. Driver Fall Time as a Function of Temperature
900
4.5
f = 125 MHz
V
= 3.0V
CC
750
600
4.0
3.5
450
3.0
V
= 3.6V
CC
300
150
2.5
2.0
f = 1 MHz
= 3.3V
V
= 3.3V
CC
V
CC
= 25°C
T
A
0
1.5
-50
0
25
50
75
100
125
-10
30
70
110
150
RESISTIVE LOAD (W)
TEMPERATURE (°C)
Figure 12. Driver Output Signal Amplitude as a Function of
Resistive Load
Figure 13. Driver Propagation Delay (tPLHD) as a Function
of Temperature
4.5
180
f = 125 MHz
V
= 3.0V
CC
4.0
3.5
150
120
3.0
90
V
= 3.3V
CC
V
= 3.6V
CC
2.5
2.0
60
30
T
= 25°C
A
V
= 3.3V
CC
R
= 50W (On all CH)
DE = H
L
DE* = L
1.5
-50
0
-10
30
70
110
150
0
25
50
75
100
125
TEMPERATURE (°C)
FREQUENCY (MHz)
Figure 14. Driver Propagation Delay (tPHLD) as a Function
of Temperature
Figure 15. Driver Power Supply Current as a Function of
Frequency
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SNLS145E –JUNE 2008–REVISED APRIL 2013
REVISION HISTORY
Changes from Revision D (April 2013) to Revision E
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 10
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
DS91M047TMA/NOPB
DS91M047TMAX/NOPB
ACTIVE
SOIC
SOIC
D
D
16
16
48
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
DS91M047
TMA
ACTIVE
2500 RoHS & Green
SN
DS91M047
TMA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
DS91M047TMAX/NOPB
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.3
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC 16
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
DS91M047TMAX/NOPB
D
2500
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TUBE
*All dimensions are nominal
Device
Package Name Package Type
SOIC
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
DS91M047TMA/NOPB
D
16
48
495
8
4064
3.05
Pack Materials-Page 3
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相关型号：
DS91M047TMAX/NOPB
IC QUAD LINE DRIVER, PDSO16, 0.150 INCH, ROHS COMPLIANT, SOIC-16, Line Driver or Receiver
NSC
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