INA148UA/2K5G4 [TI]
+-200V 共模电压差动放大器 | D | 8 | -55 to 125;
| 型号： | INA148UA/2K5G4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | +-200V 共模电压差动放大器 | D | 8 | -55 to 125 放大器 光电二极管 |
| 文件： | 总18页 (文件大小：285K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
INA148
INA148
For most current data sheet and other product
information, visit www.burr-brown.com
±200V Common-Mode Voltage
DIFFERENCE AMPLIFIER
DESCRIPTION
FEATURES
● HIGH COMMON-MODE VOLTAGE:
+75V at VS = +5V
The INA148 is a precision, low-power, unity-gain
difference amplifier with a high common-mode input
voltage range. It consists of a monolithic precision
bipolar op amp with a thin-film resistor network.
±200V at VS = ±15V
● FIXED DIFFERENTIAL GAIN = 1V/V
● LOW QUIESCENT CURRENT: 260µA
● WIDE SUPPLY RANGE:
Single Supply: 2.7V to 36V
Dual Supplies: ±1.35V to ±18V
● LOW GAIN ERROR: 0.075% max
● LOW NONLINEARITY: 0.002% max
● HIGH CMR: 86dB
The on-chip resistors are laser trimmed for an accu-
rate 1V/V differential gain and high common-mode
rejection. Excellent temperature tracking of the resis-
tor network maintains high gain accuracy and com-
mon-mode rejection over temperature. The INA148
will operate on single or dual supplies.
The INA148 is available in a small SO-8 surface-
mount package and it is specified for the –40°C to
+85°C extended industrial temperature range.
● SO-8 PACKAGE
APPLICATIONS
● CURRENT SHUNT MEASUREMENTS
● DIFFERENTIAL SENSOR AMPLIFIERS
● LINE RECEIVERS
● BATTERY POWERED SYSTEMS
● AUTOMOTIVE INSTRUMENTATION
● STACKED CELL MONITORS
1MΩ
50kΩ
50kΩ
2
VI–N
2.7778kΩ
6
VO
A1
52.6316kΩ
1MΩ
3
VI+N
INA148
4
1
7
V+
V–
Ref
International Airport Industrial Park
•
Mailing Address: PO Box 11400, Tucson, AZ 85734
•
Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706
• Tel: (520) 746-1111
Twx: 910-952-1111 Internet: http://www.burr-brown.com/
•
•
Cable: BBRCORP Telex: 066-6491
•
•
FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
•
©1999 Burr-Brown Corporation
PDS-1579A
Printed in U.S.A.December, 1999
SBOS123
SPECIFICATIONS: VS = ±5V to ±15V Dual Supplies
At TA = +25°C, RL = 10kΩ connected to ground and Ref pin connected to ground, unless otherwise noted.
INA148UA
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
OFFSET VOLTAGE (VO)
RTI(1)(2)
Input Offset Voltage
VOS
VS = ±15V, VCM = 0V
±1
±1
±5
±5
mV
mV
VS = ±5V, VCM = 0V
Drift
∆VOS/∆T
At TA = –40°C to +85°C
VS = ±1.35V to ±18V, VCM = 0V
±10
±50
µV°C
µV/V
vs Power Supply
PSRR
±400
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
VCM
VS = ±15V, (VI+N) – (VI–N) = 0V
VS = ±5V, (VI+N) – (VI–N) = 0V
–200
–100
70
+200
+80
V
V
Common-Mode Rejection
CMRR VS = ±15V, VCM = –200V to +200V, RS = 0Ω
VS = ±5V, VCM = –100V to +80V, RS = 0Ω
86
86
dB
dB
70
INPUT IMPEDANCE
Differential
2
1
MΩ
MΩ
Common Mode
NOISE
RTI(1)(3)
Voltage Noise, f = 0.1Hz to 10Hz
Voltage Noise Density, f = 1kHz
en
17
µVp-p
880
nV/√Hz
GAIN
Initial(1)
Gain Error
vs Temperature
1
V/V
%
V
O = (V–) + 0.5 to (V+) – 1.5
±0.01
±3
±0.075
±10
ppm/°C
Nonlinearity
VS = ±15V, VO = (V–) + 0.5 to (V+) – 1.5
VS = ±5V, VO = (V–) + 0.5 to (V+) – 1.5
±0.001
±0.001
±0.002
% of FSR
% of FSR
FREQUENCY RESPONSE
Small Signal Bandwidth
Slew Rate
100
1
kHz
V/µs
µs
Settling Time: 0.1%
0.01%
VS = ±15V, 10V Step
VS = ±15V, 10V Step
VS = ±5V, 6V Step
21
25
21
25
24
µs
0.1%
µs
0.01%
VS = ±5V, 6V Step
µs
Overload Recovery
50% Input Overload
µs
OUTPUT (VO)
Voltage Output
RL = 100kΩ
RL = 10kΩ
(V–) + 0.25
(V–) + 0.5
(V+) – 1
V
V
(V+) – 1.5
Output Current
IO
Short-Circiuit Current
Capacitive Load
Continuous to Common
Stable Operation
±13
mA
nF
10
POWER SUPPLY
Operating Range, Dual Supplies
Quiescent Current
±1.35
±18
V
VIN = 0, IO = 0
±260
±300
µA
TEMPERATURE RANGE
Specified
–40
–55
–55
85
°C
°C
°C
Operating
Storage
125
125
Thermal Resistance
θJA
SO-8 Surface Mount
150
°C/W
NOTES: (1) Overall difference amplifier configuration. Referred to input pins (VI+N and VI–N), gain = 1V/V (2) Input offset voltage specification includes effects of
amplifier's input bias and offset currents. (3) Includes effects of input current noise and thermal noise contribution of resistor network.
®
2
INA148
SPECIFICATIONS: VS = +5V Single Supply
At TA = +25°C, RL = 10kΩ connected to VS/2 and Ref pin connected to VS/2, unless otherwise noted.
INA148UA
TYP
PARAMETER
CONDITIONS
MIN
MAX
UNITS
OFFSET VOLTAGE (VO)
Input Offset Voltage
Drift
RTI(1)(2)
VCM = VS/2
VOS
∆VOS/∆T
PSRR
±1
±5
mV
At TA = –40°C to +85°C
VS = +2.7V to +36V, VCM = VS/2
±10
±50
µV°C
µV/V
vs Power Supply
±400
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
VCM
(VI+N) – (VI–N) = 0V, VREF = 0.25V
(VI+N) – (VI–N) = 0V, VREF = VS/2
VCM = –47.5V to +32.5V, RS = 0Ω
–4
–47.5
70
+75
V
V
+32.5
Common-Mode Rejection
CMRR
86
dB
INPUT IMPEDANCE
Differential
2
1
MΩ
MΩ
Common Mode
NOISE
RTI(1)(3)
Voltage Noise, f = 0.1Hz to 10Hz
Voltage Noise Density, f = 1kHz
en
17
µVp-p
880
nV/√Hz
GAIN
Initial(1)
Gain Error
1
V/V
%
V
O = +0.5V to +3.5V
±0.01
±0.075
±10
vs Temperature
Nonlinearity
±3
ppm/°C
VO = +0.5V to +3.5V
±0.001
% of FSR
FREQUENCY RESPONSE
Small Signal Bandwidth
Slew Rate
100
1
kHz
V/µs
µs
Settling Time: 0.1%
0.01%
VS = +5V, 3V Step
VS = +5V, 3V Step
50% Input Overload
21
25
13
µs
Overload Recovery
µs
OUTPUT (VO)
Voltage Output
RL = 100kΩ
RL = 10kΩ
(V–) + 0.25
(V–) + 0.5
(V+) – 1
V
V
(V+) – 1.5
Output Current
IO
Short-Circiuit Current
Capacitive Load
Continuous to Common
Stable Operation
±8
mA
nF
10
POWER SUPPLY
Operating Range, Single Supply
Quiescent Current
+2.7
+36
300
V
VIN = 0, IO = 0
260
µA
TEMPERATURE RANGE
Specified
–40
–55
–55
85
°C
°C
°C
Operating
Storage
125
125
Thermal Resistance
θJA
SO-8 Surface Mount
150
°C/W
NOTES: (1) Overall difference amplifier configuration. Referred to input pins (VI+N and VI–N), gain = 1V/V (2) Input offset voltage specification includes effects of
amplifier's input bias and offset currents. (3) Includes effects of input current noise and thermal noise contribution of resistor network.
®
3
INA148
PIN CONFIGURATION
ELECTROSTATIC
DISCHARGE SENSITIVITY
TOP VIEW
SO-8
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
Ref
–In
+In
V–
1
2
3
4
8
7
6
5
NC
V+
Out
NC
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage, V+ to V– .................................................................... 36V
Signal Input Terminals, Continuous ................................................ ±200V
Peak (0.1s) ............................................... ±500V
Output Short Circuit to GND Duration .................................... Continuous
Operating Temperature ..................................................–55°C to +125°C
Storage Temperature .....................................................–55°C to +125°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those specified is not implied.
PACKAGE/ORDERING INFORMATION
PACKAGE
SPECIFIED
DRAWING
NUMBER
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER(1)
TRANSPORT
MEDIA
PRODUCT
PACKAGE
INA148UA
SO-8
182
–40°C to +85°C
INA148UA
INA148UA
Rails
"
"
"
"
"
INA148UA/2K5
Tape and Reel
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces
of “INA148UA/2K5” will get a single 2500-piece Tape and Reel.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
4
INA148
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±15V, RL = 10kΩ to common, and VREF = 0V, unless otherwise noted.
GAIN vs FREQUENCY
COMMON-MODE REJECTION vs FREQUENCY
5
0
100
80
60
40
20
0
= VS = ±15V
VS= ±1.35V
= VS = ±1.35V
–5
VS = ±15V
–10
–20
–25
–30
–35
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
Frequency (Hz)
Frequency (Hz)
INPUT VOLTAGE NOISE SPECTRAL DENSITY
POWER SUPPLY REJECTION vs FREQUENCY
110
100
90
80
70
60
50
40
30
20
10
1k
PSR+
(VS = ±18V)
800
600
400
PSR+
(VS = ±1.35V)
PSR–
(VS = ±18V)
PSR–
(VS = ±1.35V)
200
100
10
100
1k
10k
100k
1
10
100
1k
10k
100K
Frequency (Hz)
Frequency (Hz)
VOLTAGE NOISE (RTI)
0.1Hz to 10Hz
QUIESCENT CURRENT vs TEMPERATURE
290
280
270
260
250
240
230
220
210
VS = ±15V
VS = ±2.5V
–60 –40 –20
0
20
40
60
80 100 120 140
1s/div
Temperature (°C)
®
5
INA148
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±15V, RL = 10kΩ to common, and VREF = 0V, unless otherwise noted.
LARGE-SIGNAL STEP RESPONSE
vs TEMPERATURE
SHORT-CIRCUIT CURRENT vs TEMPERATURE
20
15
+SC
10
5
+125°C
+125°C
–55°C
–55°C
0
–5
–10
–SC
–15
–20
–60 –40 –20
0
20
40
60
80 100 120 140
Temperature (°C)
25µs/div
LARGE-SIGNAL STEP RESPONSE
OUTPUT VOLTAGE SWING vs RL
(RL = 10kΩ, CL = 10pF)
RL = 100kΩ
RL = 1kΩ
RL = 1kΩ
RL = 10kΩ
RL = 10kΩ
RL = 100kΩ
1ms/div
25µs/div
SMALL-SIGNAL STEP RESPONSE
LARGE-SIGNAL CAPACITIVE LOAD RESPONSE
(CL = 1nF and 10nF)
(RL = 10kΩ, CL = 10pF)
CL = 1nF
CL = 10nF
G = +1V/V
VIN
10µs/div
100µs/div
®
6
INA148
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±15V, RL = 10kΩ to common, and VREF = 0V, unless otherwise noted.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
S = ±2.5V
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
24
20
16
12
8
24
18
12
6
V
V
S = ±15V
4
0
0
Offset Voltage, RTI (mV)
Offset Voltage, RTI (mV)
OFFSET VOLTAGE DRIFT
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
PRODUCTION DISTRIBUTION
20
15
10
5
20
15
10
5
VS = ±15V
VS = ±2.5V
0
0
Offset Voltage Drift, RTI (µV/°C)
Offset Voltage Drift, RTI (µV/°C)
GAIN DRIFT PRODUCTION DISTRIBUTION
S = ±15V
GAIN DRIFT PRODUCTION DISTRIBUTION
S = ±2.5V
40
30
20
10
0
40
30
20
10
0
V
V
Gain Drift (ppm/°C)
Gain Drift (ppm/°C)
®
7
INA148
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±15V, RL = 10kΩ to common, and VREF = 0V, unless otherwise noted.
INVERTING INPUT
NON-INVERTING INPUT
50% OVERLOAD RECOVERY TIME
50% OVERLOAD RECOVERY TIME
VS = ±15V
VS = ±15V
VIN
+
0V
0V
–
VIN
VOUT
VOUT
0V
5µs/div
5µs/div
capacitors should be connected as close to pins 4 and 7 as
practicable. Ceramic or tantalum types are recommended for
use as bypass capacitors.
APPLICATION INFORMATION
The INA148 is a unity gain difference amplifier with a high
common-mode input voltage range. A basic diagram of the
circuit and pin connections is shown in Figure 1.
The input impedances are unusually high for a difference
amplifier and this should be considered when routing input
signal traces on a PC board. Avoid placing digital signal
traces near the difference amplifier’s input traces to mini-
mize noise pickup.
To achieve its high common-mode voltage range, the INA148
features a precision laser-trimmed thin-film resistor network
with a 20:1 input voltage divider ratio. High input voltages
are thereby reduced in amplitude, allowing the internal op
amp to “see” input voltages that are within its linear oper-
ating range. A “Tee” network in the op amp feedback
network places the amplifier in a gain of 20V/V, thus
restoring the circuit’s overall gain to unity (1V/V).
OPERATING VOLTAGE
The INA148 is specified for ±15V and ±5V dual supplies
and +5V single supplies. The INA148 can be operated with
single or dual supplies with excellent performance.
External voltages can be summed into the amplifier’s output
by using the Ref pin, making the differential amplifier a
highly versatile design tool. Voltages on the Ref pin will
also influence the INA148’s common-mode voltage range.
The INA148 is fully characterized for supply voltages from
±1.35V to ±18V and over temperatures of –55ºC to +125 ºC.
Parameters that vary significantly with operating voltage,
load conditions, or temperature are shown in the Typical
Performance Curves section.
In accordance with good engineering practice for linear
integrated circuits, the INA148’s power-supply bypass
+VS
0.1µF
7
1MΩ
1MΩ
50kΩ
50kΩ
2
3
VI–N
VO = (VI+N – VI–N
)
2.7778kΩ
6
VO
A1
52.6316kΩ
VI+N
INA148
4
1
0.1µF
–VS
FIGURE 1. Basic Circuit Connections.
®
8
INA148
THE GAIN EQUATION
OFFSET TRIM
An internal on-chip resistor network sets the overall differ-
ential gain of the INA148 to precisely 1V/V. It’s output is
accordance with the equation:
The INA148 is laser-trimmed for low offset voltage and
drift. Most applications will require no external offset ad-
justment.
Since a voltage applied to the reference (Ref) pin (pin 1) will
be summed directly into the amplifier’s output signal, this
technique can be used to null the amplifier’s input offset
voltage. Figure 2 shows an optional circuit for trimming the
offset voltage.
VOUT = (VI+N – VI–N ) + VREF
(1)
COMMON-MODE RANGE
To maintain high common-mode rejection (CMR), the source
impedance of any signal applied to the Ref terminal should
be very low (≤5Ω).
The 20:1 input resistor ratio of the INA148 provides an input
common-mode range that extends well beyond its power
supply rails.
A source impedance of only 10Ω at the Ref pin will reduce
the INA148’s CMR to approximately 74dB. High CMR can
be restored if a resistor is added in series with the amplifier’s
positive input terminal (pin 3). This resistor should be 19
times the source impedance that drives the Ref pin. For
example, if the Ref pin sees a source impedance of 10Ω, a
resistor of 190Ω should be added in series with pin 3.
The exact input voltage range depends on the amplifier’s
power-supply voltage and the voltage applied to the Ref
terminal (pin 1). Typical input voltage ranges at different
power supply voltages can be found in the applications
circuits section.
+VS
7
1MΩ
50kΩ
50kΩ
2
VI–N
VO = (VI+N – VI–N) + VREF
2.7778kΩ
6
VO
A1
52.6316kΩ
190Ω
1MΩ
3
VI+N
INA148
+15V
VREF
10kΩ
4
1
10kΩ
–VS
±15mV Offset
10Ω
Trim Range, RTI
–15V
FIGURE 2. Optional Offset Trim Voltage.
+15V
7
1MΩ
50kΩ
50kΩ
2
VI–N
VO = (VI+N – VI–N) + VREF
2.7778kΩ
6
VO
A1
52.6316kΩ
1MΩ
3
VI+N
INA148
4
VREF 1
+15V
100kΩ
–15V
OPA237
±15mV Offset
100kΩ
Trim Range, RTI
100Ω
–15V
FIGURE 3. Preferred Offset Trim Circuit.
®
9
INA148
Preferably, the offset trim voltage applied to the Ref pin
should be buffered with an amp such as an OPA237
(see Figure 3). In this case, the op amp output impedance is
low enough that no external resistor is needed to maintain
the INA148’s excellent CMR.
Unless the shunt resistor is less than approximately 100Ω, an
additional equal compensating resistor (RC) is recommended
to maintain input balance and high CMR.
Source impedances (or shunts) greater than 5kΩ are not
recommended, even if they are “perfectly” compensated.
This is because the internal resistor network is laser-trimmed
for accurate voltage divider ratios, but not necessarily to
absolute values. Input resistors are shown as 1MΩ, however,
this is only their nominal value.
INPUT IMPEDANCE
The input resistor network determines the impedance of
each of the INA148’s inputs. It is approximately 1MΩ.
Unlike an instrumentation amplifier, signal source imped-
ances at the two input terminals must be nearly equal to
maintain good common-mode rejection.
In practice, the input resistors’ absolute values may vary by
as much as 30 percent. The two input resistors match to
about 5 percent, so adding compensating resistors greater
than 5kΩ can cause a serious mismatch in the resulting
resistor network voltage divider ratios, thus degrading CMR.
A mismatch between the two inputs’ source impedances will
cause a differential amplifier’s common-mode rejection to
be degraded. With a source impedance imbalance of only
500Ω, CMR can fall to approximately 66dB.
Attempts to extend the INA148 input voltage range by
adding external resistors is not recommended for the reasons
just described in the last paragraph. CMR will suffer a
serious degradation unless the resistors are carefully trimmed
for CMR and gain. This is an iterative adjustment and can be
tedious and time consuming.
Figure 4 shows a common application—measuring power
supply current through a shunt resistor (RS). A shunt resistor
creates an unbalanced source resistance condition that can
degrade a differential amplifier’s common mode rejection.
+15V
7
LOAD
1MΩ
50kΩ
50kΩ
2
VO = IL • RS
IL
2.7778kΩ
6
VO
A1
RS
52.6316kΩ
RC
1MΩ
3
INA148
VCM
4
1
200V
–15V
Make RC = RS if RS ≥ 100Ω
FIGURE 4. Shunt-Resistor Current Measurement Circuit.
+15V
C1
4.7µF(1)
7
250V
1MΩ
50kΩ
50kΩ
2
VI–N
VO = (VI+N – VI–N
)
2.7778kΩ
6
VCM = 200Vpk
VO
A1
C2
4.7µF(1)
250V
52.6316kΩ
1MΩ
3
VI+N
INA148
4
1
Typical CMR: 50Hz = 59dB
60Hz = 61dB
–15V
400Hz = 78dB
NOTE: (1) Metallized polypropylene, ±5% tolerance.
FIGURE 5. AC-Coupled Difference Amplifier.
®
10
INA148
+VS
7
fC 0.75 Hz HPF
U1
1MΩ
50kΩ
50kΩ
2
VI–N
V
O = (VI+N – VI–N) + VREF
2.7778kΩ
6
VO
A1
52.6316kΩ
1MΩ
3
VI+N
1MΩ
INA148
0.22µF
+VS
1
4
–VS
7
6
U2:
2
OPA132 for VS = ±5V to ±15V
OPA340 for VS = ±2.5
U2
4
VREF
3
–VS
FIGURE 6. Quasi-AC-Coupled Differential Amplifier.
+5V
7
0.1µF
1MΩ
50kΩ
50kΩ
2
VI–N
V
O = (VI+N – VI–N) + 1.235V
2.7778kΩ
6
VO
VCM = –23V to +56V
A1
52.6316kΩ
1MΩ
3
VI+N
INA148
34kΩ
4
1
5Ω
+5V
+
10µF
REF1004-1.2
FIGURE 7. Single-Supply Differential Amplifier.
RS
IC
0.01Ω
+
–
0.1µF
50kΩ
28V
Supply
7
1MΩ
50kΩ
2
2.7778kΩ
VO = 1.235V + (IC • RS)
6
A1
52.6316kΩ
1MΩ
3
271kΩ
INA148
5Ω
4
1
+
10µF
REF1004-1.2
FIGURE 8. Battery Monitor Circuit.
®
11
INA148
0.47µF ceramic (all)
RS
50mV
shunt
6
I
+15
+VISO
IN5245
+15V
+VS
1
VCM = ±200V max
5
C
1kΩ
200kΩ
O
2
IN5245
–VISO
+15V
0.1µF
7
–15
+VISO
7
DCP011515D
2
3
6
7
OPA277
1MΩ
50kΩ
50kΩ
2
4
–VISO
2.7778kΩ
VO
6
A1
±50mV Input = ±10V Output
52.6316kΩ
1MΩ
3
INA148
4
1
0.1µF
–15V
FIGURE 9. 50mV Current Shunt Amplifier with ±200V Common-Mode Voltage Range.
®
12
INA148
PACKAGE OPTION ADDENDUM
www.ti.com
29-Jun-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
INA148UA
INA148UA/2K5
INA148UA/2K5G4
INA148UAG4
ACTIVE
SOIC
SOIC
SOIC
SOIC
D
D
D
D
8
8
8
8
75
RoHS & Green
NIPDAU
Level-3-260C-168 HR
Level-3-260C-168 HR
Level-3-260C-168 HR
Level-3-260C-168 HR
-55 to 125
-55 to 125
-55 to 125
-55 to 125
INA
148UA
Samples
Samples
ACTIVE
LIFEBUY
LIFEBUY
2500 RoHS & Green
2500 RoHS & Green
NIPDAU
NIPDAU
NIPDAU
INA
148UA
INA
148UA
75
RoHS & Green
INA
148UA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
29-Jun-2023
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF INA148 :
Automotive : INA148-Q1
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
INA148UA/2K5
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC
SPQ
Length (mm) Width (mm) Height (mm)
356.0 356.0 35.0
INA148UA/2K5
D
8
2500
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TUBE
T - Tube
height
L - Tube length
W - Tube
width
B - Alignment groove width
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
INA148UA
D
D
SOIC
SOIC
8
8
75
75
506.6
506.6
8
8
3940
3940
4.32
4.32
INA148UAG4
Pack Materials-Page 3
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023, Texas Instruments Incorporated
相关型号：
©2020 ICPDF网 联系我们和版权申明