INA2132UA [TI]

Dual, Low Power, Single-Supply DIFFERENCE AMPLIFIER;


型号：	INA2132UA
厂家：	TEXAS INSTRUMENTS
描述：	Dual, Low Power, Single-Supply DIFFERENCE AMPLIFIER 放大器
文件：	总17页 (文件大小：855K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

INA2132

Dual, Low Power, Single-Supply

DIFFERENCE AMPLIFIER

APPLICATIONS

FEATURES

● DIFFERENTIAL INPUT AMPLIFIER

● DESIGNED FOR LOW COST

● INSTRUMENTATION AMPLIFIER

● LOW QUIESCENT CURRENT:

160µA per Amplifier

BUILDING BLOCK

● UNITY-GAIN INVERTING AMPLIFIER

● G = 1/2 AMPLIFIER

● WIDE POWER SUPPLY RANGE:

Single Supply: 2.7V to 36V

Dual Supplies: ±1.35V to ±18V

● G = 2 AMPLIFIER

● LOW GAIN ERROR: ±0.05% max

● LOW NONLINEARITY: 0.001% max

● HIGH CMRR: 90dB

● SUMMING AMPLIFIER

● DIFFERENTIAL CURRENT RECEIVER

● VOLTAGE-CONTROLLED CURRENT SOURCE

● BATTERY-POWERED SYSTEMS

● GROUND LOOP ELIMINATOR

● HIGHLY VERSATILE CIRCUIT

● EASY TO USE

● SO-14 PACKAGE

V+

DESCRIPTION

The INA2132 is a dual low power, unity-gain differ-

ence amplifier offering excellent value at very low

cost. Each channel consists of a precision op amp with

a laser-trimmed precision resistor network, providing

accurate gain and high common-mode rejection. Ex-

cellent TCR tracking of the resistors maintains gain

accuracy and common-mode rejection over tempera-

ture. The internal op amp’s common-mode range

extends to the negative supply—ideal for single-sup-

ply applications.

40kΩ

–In A

Sense A

Out A

40kΩ

+In A

–In B

Ref A

40kΩ

Sense B

The difference amplifier is the foundation of many

commonly used circuits. The INA2132 provides this

circuit function without using an expensive precision

resistor network. The INA2132 is available in the

SO-14 surface-mount package and is specified for

operation over the extended industrial temperature

range, –40°C to +85°C.

Out B

Ref B

40kΩ

+In B

INA2132

A single version of this product with similar specifi-

cations is also available. See the INA132 data sheet

for details.

V–

International Airport Industrial Park

•

Mailing Address: PO Box 11400, Tucson, AZ 85734

•

Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706

• Tel: (520) 746-1111

Twx: 910-952-1111 Internet: http://www.burr-brown.com/

•

Cable: BBRCORP Telex: 066-6491

•

FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132

•

PDS-1488A

Printed in U.S.A. December, 1998

SBOS108

SPECIFICATIONS: V_S= ±15V

At T_A= +25°C, R_L= 10kΩ connected to ground, and reference pins connected to ground unless otherwise noted.

INA2132U

INA2132UA

TYP

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

MAX

UNITS

OFFSET VOLTAGE⁽¹⁾

RTO

Initial

V_OS

dV_OS/dT

PSRR

±75

±1

±250

±5

✻

±500

±10

✻

µV

vs Temperature

vs Power Supply

vs Time

µV/°C

µV/V

µV/mo

µV/V

V_S= ±1.35V to ±18V

±5

0.3

0.04

±30

Channel Separation⁽²⁾

INPUT IMPEDANCE⁽³⁾

Differential

✻

kΩ

Common-Mode

INPUT VOLTAGE RANGE

Common-Mode Voltage Range⁽⁴⁾

V_O= 0V

2 (V–)

2 (V+) –2

✻

Common-Mode Rejection Ratio CMRR V_CM= –30V to 28V, R_S= 0Ω

✻

OUTPUT VOLTAGE NOISE⁽⁵⁾

f = 0.1Hz to 10Hz

f = 1kHz

RTO

1.6

✻

µVp-p

nV/√Hz

GAIN

Initial

✻

V/V

Error

V_O= –14V to 13.5V

±0.01

±1

±0.05

±10

±0.1

✻

vs Temperature

Nonlinearity

ppm/°C

% of FS

±0.0001

±0.001

±0.002

OUTPUT

Voltage, Positive

Negative

R_L= 100kΩ to Ground

R_L= 10kΩ to Ground

Continuous to Common

(V+) –1 (V+) –0.8

(V–) +0.5 (V–) +0.15

(V+) –1.5 (V+) –0.8

(V–) +1 (V–) +0.25

±12

✻

Positive

Negative

Current Limit, per Amplifier

Capacitive Load (stable operation)

FREQUENCY RESPONSE

Small-Signal Bandwidth

–3dB

300

0.1

✻

kHz

V/µs

µs

Slew Rate

Settling Time: 0.1%

0.01%

V_O= 10V Step

50% Overdrive

µs

Overload Recovery Time

µs

POWER SUPPLY

Rated Voltage

V_S

±15

±1.35

✻

Voltage Range

±18

✻

Quiescent Current (per amplifier) I_Q

I_O= 0mA

±160

±185

µA

TEMPERATURE RANGE

Specification

–40

–55

100

+85

+125

✻

°C

Operation

Storage

°C

Thermal Resistance

θ_JA

✻

°C/W

✻ Specifications the same as INA2132U.

NOTES: (1) Includes effects of amplifier’s input bias and offset currents. (2) Measured output offset change of one channel for a full-scale swing (V_O= –14V

to 13.5V) on the opposite channel. (3) 40kΩ resistors are ratio matched but have ±20% absolute value. (4) 2 (V–) –V_REF< V_CM< 2 ((V+) –1) –V_REF. For more detail,

see Applications Information section. (5) Includes effects of amplifier’s input current noise and thermal noise contribution of resistor network.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes

no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change

without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant

any BURR-BROWN product for use in life support devices and/or systems.

INA2132

SPECIFICATIONS: V_S= +5V Single Supply

At T_A= +25°C, R_L= 10kΩ connected to V_S/2, and reference pin connected to V_S/2, unless otherwise noted.

INA2132U

INA2132UA

TYP

PARAMETER

OFFSET VOLTAGE⁽¹⁾

Initial

CONDITIONS

MIN

TYP

MAX

MIN

MAX

UNITS

RTO

V_OS

±150

±2

±500

✻

±750

µV

vs Temperature

dV_OS/dT

µV/°C

INPUT VOLTAGE RANGE

Common-Mode Voltage Range⁽²⁾

–2.5

+5.5

✻

Common-Mode Rejection

CMRR V_CM= –2.5V to +5.5V, R_S= 0Ω

✻

OUTPUT

Voltage, Positive

Negative

R_L= 100kΩ to Ground

R_L= 10kΩ to Ground

(V+) –1 (V+) –0.75

+0.25 +0.06

(V+) –1 (V+) –0.8

✻

Positive

Negative

+0.25

+0.12

POWER SUPPLY

Rated Voltage

V_S

✻

Voltage Range

Quiescent Current

+2.7

+36

✻

I_Q

I_O= 0mA

±155

±185

µA

✻ Specifications the same as INA2132U.

NOTE: (1) Includes effects of amplifier’s input bias and offset currents. (2) 2 (V–) –V_REF< V_CM< 2 ((V+) –1) –V_REF. For more detail, see Applications Information

section.

PIN CONFIGURATION

ABSOLUTE MAXIMUM RATINGS

Top View

SO-14

Supply Voltage, V+ to V–.................................................................... 36V

Input Voltage Range.......................................................................... ±80V

Output Short-Circuit (to ground).............................................. Continuous

Operating Temperature ..................................................–55°C to +125°C

Storage Temperature .....................................................–55°C to +125°C

Junction Temperature .................................................................... +150°C

Lead Temperature (soldering, 10s)............................................... +300°C

Ref A

Out A

Sense A

V+

–In A

ELECTROSTATIC

DISCHARGE SENSITIVITY

+In A

V–

This integrated circuit can be damaged by ESD. Burr-Brown

recommends that all integrated circuits be handled with ap-

propriate precautions. Failure to observe proper handling and

installation procedures can cause damage.

+In B

–In B

10 Sense B

ESD damage can range from subtle performance degradation

to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric

changes could cause the device not to meet its published

specifications.

Out B

Ref B

NC = No Connection

PACKAGE/ORDERING INFORMATION

PACKAGE

DRAWING

NUMBER⁽¹⁾

SPECIFIED

TEMPERATURE

RANGE

PACKAGE

MARKING

ORDERING

NUMBER⁽²⁾

TRANSPORT

MEDIA

PRODUCT

PACKAGE

INA2132U

SO-14 Surface-Mount

235

–40°C to +85°C

INA2132U

INA2132U/2K5

INA2132UA

Rails

Tape and Reel

Rails

INA2132UA

SO-14 Surface-Mount

–40°C to +85°C

INA2132UA

INA2132UA/2K5

Tape and Reel

NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are

available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “INA2132U/2K5” will get a single

2500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.

INA2132

TYPICAL PERFORMANCE CURVES

At T_A= +25°C and V_S= ±15V, unless otherwise noted.

COMMON-MODE REJECTION vs FREQUENCY

GAIN vs FREQUENCY

100

V_S= ±15V or +5V

C_L= 100pF

R_L= 10kΩ

V_S= ±15V

–20

–40

–60

V_S= +5V

C_L= 1000pF

R_L= ∞

10k

100k

Frequency (Hz)

100

10k

100k

Frequency (Hz)

POWER SUPPLY REJECTION vs FREQUENCY

CHANNEL SEPARATION vs FREQUENCY

120

100

150

140

130

120

110

100

+PSRR

V_S= ±15V

V_S= +5V

–PSRR

100

10k

100k

0.1

100

10k

100k

Frequency (Hz)

QUIESCENT and SHORT-CIRCUIT CURRENT

vs TEMPERATURE

OUTPUT VOLTAGE SWING vs OUTPUT CURRENT

210

200

190

180

170

160

150

V+

(V+) –0.5

(V+) –1

(V+) –1.5

(V+) –2

(V+) –2.5

(V–) +2.5

(V–) +2

(V–) +1.5

(V–) +1

(V–) +0.5

V–

125°C

85°C

25°C

±I_SC

–55°C

–40°C

–55°C

–40°C

I_Q

85°C

25°C

125°C

–75

–50

–25

100

125

±2

±4

±6

±8

±10

Temperature (°C)

Output Current (mA)

INA2132

TYPICAL PERFORMANCE CURVES (CONT)

At T_A= +25°C and V_S= ±15V, unless otherwise noted.

SMALL-SIGNAL STEP RESPONSE

_L= 200pF

SLEW RATE vs TEMPERATURE

0.18

0.16

0.14

0.12

0.10

0.08

0.06

10µs/div

–75

–50

–25

100

125

Temperature (°C)

SMALL-SIGNAL STEP RESPONSE

C_L= 1000pF

LARGE-SIGNAL STEP RESPONSE

10µs/div

100µs/div

INPUT COMMON-MODE VOLTAGE RANGE

vs OUTPUT VOLTAGE

SETTLING TIME vs LOAD CAPACITANCE

10V Step

100

V_S= ±15V

V_S= +5V

0.01%

–10

–20

–30

–40

V_S= ±5V

V_REF= 0V

G = 1

0.1%

100pF

1000pF

10,000pF

–16

–12

–8

–4

Load Capacitance

Output Voltage (V)

INA2132

TYPICAL PERFORMANCE CURVES (CONT)

At T_A= +25°C and V_S= ±15V, unless otherwise noted.

0.1Hz to 10Hz PEAK-TO-PEAK

VOLTAGE NOISE

OFFSET VOLTAGE

PRODUCTION DISTRIBUTION

V_S= ±15V

500ms/div

Offset Voltage (µV)

OFFSET VOLTAGE

OFFSET VOLTAGE DRIFT

PRODUCTION DISTRIBUTION

V_S= +5V

V_S= ±15V

Offset Voltage Drift (µV/°C)

Offset Voltage (µV)

INA2132

In the case where V_REFis grounded, the equation simplifies to:

2 • (V–) < V_CM< 2 • ((V+) – 1)

APPLICATIONS INFORMATION

Figure 1 shows the basic connections required for operation

of the INA2132. Power supply bypass capacitors should be

connected close to the device pins.

For more information, see the typical performance curve titled

“Input Common-Mode Voltage Range vs Output Voltage.”

The differential input signal is connected to pins 2 and 3 (or

pins 6 and 5) as shown. The source impedances connected to

the inputs must be nearly equal to assure good common-

mode rejection. An 8Ω mismatch in source impedance will

degrade the common-mode rejection of a typical device to

approximately 80dB. Gain accuracy will also be slightly

affected. If the source has a known impedance mismatch, an

additional resistor in series with one input can be used to

preserve good common-mode rejection.

OPERATING VOLTAGE

The INA2132 operates from single (+2.7V to +36V) or dual

(±1.35V to ±18V) supplies with excellent performance.

Specifications are production tested with +5V and ±15V

supplies. Most behavior remains unchanged throughout the

full operating voltage range. Parameters which vary signifi-

cantly with operating voltage are shown in the Typical

Performance Curves.

Do not interchange pins 3 and 14 (or pins 5 and 8) or pins

2 and 12 (or pins 6 and 10), even though nominal resistor

values are equal. These resistors are laser-trimmed for pre-

cise resistor ratios to achieve accurate gain and highest

CMRR. Interchanging these pins may not provide specified

performance. As shown in Figure 1, sense line should be

connected as close to the load as possible.

The INA2132 can accurately measure differential signals

that are beyond the power supply rails. Linear common-

mode range extends to twice the negative power supply

voltage and nearly twice the positive power supply voltage.

Output phase reversal does not occur when the inputs to the

internal operational amplifier are overloaded to either rail.

See typical performance curve, “Common-Mode Range vs

Output Voltage.”

NOTE: Pin numbers in parentheses ( ) refer to channel B.

V–

V+

OFFSET VOLTAGE TRIM

1µF

The INA2132 is laser-trimmed for low offset voltage and

drift. Most applications require no external offset adjust-

ment. Figure 2 shows an optional circuit for trimming the

output offset voltage. The output is referred to the output

reference terminal (pin 14 or pin 8), which is normally

grounded. A voltage applied to the Ref terminal will be

summed with the output signal. This can be used to null

offset voltage. The source impedance of a signal applied to

the Ref terminal should be less than 8Ω to maintain good

common-mode rejection. To assure low impedance at the

Ref terminal, the trim voltage can be buffered with an op

amp, such as the OPA277.

INA2132

R₂

40kΩ

R₁

2(6)

12 (10)

13 (9)

V₂

40kΩ

R₃

3 (5)

V₃

R_L

40kΩ

R₄

40kΩ

V_OUT= V₃– V₂

14 (8)

Ref

INA2132

R₁

R₂

2 (6)

12 (10)

13 (9)

V₂

FIGURE 1. Basic Power Supply and Signal Connections.

V_O

To ensure valid operation of the differential amplifier, please

note the following points:

8Ω

R₃

3 (5)

V₃

1) V_OUT= V₃– V₂+ V_REF

R₄

2) V_OUTmust be within the specified linear range. For

example, with ±15V supplies and a 100kΩ load, the

output will be defined by:

+15V

–15V

14 (8)

Ref

R = 237kΩ

_O= V₃– V₂

100kΩ

Offset Adjustment

Range = ±500µV

(V–) + 0.15V < V_OUT< (V+) – 0.8V

8Ω

3) Input common-mode range at the nodes of the op amp

must be V– ≤ V_CM≤ (V+) – 1. To ensure that the inputs

to the differential amp (+In and –In) meet this criteria,

limit the common-mode voltage inputs to:

NOTE: For ±750µV range, R = 158kΩ.

2 • (V–) – V_REF< V_CM< 2 • ((V+) – 1) – V_REF

FIGURE 2. Offset Adjustment.

INA2132

CAPACITIVE LOAD DRIVE CAPABILITY

directly adjacent on the top and bottom sides of a circuit

board. Stray coupling then produces a common-mode signal

which is rejected by the INA2132’s input.

The INA2132 can drive large capacitive loads, even at low

supplies. It is stable with a 10nF load. Refer to the “Small-

Signal Step Response” and “Settling Time vs Load Capaci-

tance” typical performance curves.

+5V

CHANNEL CROSSTALK

INA2132

The two channels of the INA2132 are completely indepen-

dent, including all bias circuitry. At dc and low frequency,

there is virtually no signal coupling between channels.

Crosstalk increases with frequency and is dependent on

source impedance and signal characteristics. See the typical

performance curve “Channel Separation vs Frequency” for

more information.

12 (10)

13 (9)

14 (8)

2 (6)

–In

12 Bits

Out

ADS7806⁽¹⁾

0V-4V

Input

Most crosstalk is produced by capacitive coupling of signals

from one channel to the input section of the other channel.

To minimize coupling, separate the input traces as far as

practical from any signals associated with the opposite

channel. A grounded guard trace surrounding the inputs

helps reduce stray coupling between channels. Run the

differential inputs of each channel parallel to each other or

3 (5)

+In

τ_S= 45µs (4V Step to 0.01%)

NOTE: (1) For 16-bit output, use ADS7809.

FIGURE 5. Differential Input Data Acquisition.

BUF634 inside feedback

loop contributes no error.

INA2132

Logic In

V_O

–V₁

+V₁

INA2132

2 (6)

12 (10)

–In

+In

2 (6)

12 (10)

13 (9)

V₁

13 (9)

14 (8)

BUF634

V_O

DG188

R_L

3 (5)

(Low I_Qmode)

14 (8)

FIGURE 3. Low Power, High Output Current Precision

Difference Amplifier.

Logic

FIGURE 6. Digitally Controlled Gain of ±1 Amplifier.

INA2132

2 (6)

12 (10)

13 (9)

V₂

INA2132

2 (6)

12 (10)

13 (9)

14 (8)

V₂

3 (5)

V₃

3 (5)

14 (8)

V₁

I_O= (V₁– V₂) (1/40k + 1/R)

_O= (V₃– V₂)/R

Load

I_O

Load

FIGURE 4. Differential Input Voltage-to-Current Converter

FIGURE 7. Precision Voltage-to-Current Converter with

Differential Inputs.

for Low I_OUT

INA2132

V₂

V₀₁

V₁

V₀₁

V₃

V₂

V₀₂

V_LS

Level-Shift

Voltage

Reference

V_LS

V₀₁– V₀₂= 2 (V₂– V₁)

V₀₁= (V₃– V₂) +

FIGURE 8. Differential Output Difference Amplifier.

FIGURE 9. Precision Level Shifter.

V₁

INA2132

The INA2132 can be combined with op amps to form

a complete instrumentation amplifier with specialized

performance characteristics. Burr-Brown offers many

complete high performance IAs. Products with similar

performances are shown below.

–In

A₁

2 (6)

12 (10)

13 (9)

R₂

R₁

V_O

R₂

14 (8)

3 (5)

A₂

V₂

+In

V_O= (1 + 2R₂/R₁) (V₂–V₁)

SIMILAR COMPLETE

BURR-BR0WN IAs

A₁, A₂

FEATURES

OPA227

OPA129

OPA2277

OPA2130

Low Noise

INA103

INA116

INA114, INA128

INA121

INA122, INA118

INA122, INA126

Ultra-Low Bias Current (fA)

Low Offset Drift, Low Noise

Low Power, FET-Input (pA)

Single Supply, Precision, Low Power

Single Supply, Low Power, MSOP-8

OPA2234, OPA2241, OPA2244

OPA2237

FIGURE 10. Precision Instrumentation Amplifier.

INA2132

2 (6)

INA2132

2 (6)

12 (10)

13 (9)

12 (10)

V₂

13 (9)

V₀

3 (5)

V₁

14 (8)

₀= V₁

3 (5)

14 (8)

FIGURE 14. Precision Unity-Gain Buffer.

V₀= – V₂

FIGURE 11. Precision Inverting Unity-Gain Amplifier.

INA2132

12 (10)

13 (9)

2 (6)

INA2132

2 (6)

V₀

12 (10)

13 (9)

3 (5)

V₁

14 (8)

V₀

3 (5)

V₃

= 1/2 V₃

V₀= 2 • V₁

14 (8)

V₀= V₃/2

FIGURE 15. Precision Gain = 2 Amplifier.

FIGURE 12. Precision Gain = 1/2 Amplifier.

INA2132

12 (10)

13 (9)

2 (6)

12 (10)

13 (9)

V₀

3 (5)

V₁

V₃

14 (8)

V₀

3 (5)

V₁

14 (8)

V₃

V₀= (V₁+ V₃)/2

₀= V₁+ V₃

FIGURE 13. Precision Average Value Amplifier.

FIGURE 16. Precision Summing Amplifier.

INA2132

PACKAGE OPTION ADDENDUM

www.ti.com

11-Apr-2013

PACKAGING INFORMATION

Orderable Device

INA2132U

Status Package Type Package Pins Package

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

-40 to 85

Top-Side Markings

Samples

Drawing

Qty

(1)

(2)

(3)

(4)

ACTIVE

SOIC

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-3-260C-168 HR

INA2132U

INA2132U/2K5

INA2132UA

ACTIVE

2500

Green (RoHS

& no Sb/Br)

-40 to 85

INA2132U

Green (RoHS

& no Sb/Br)

-40 to 85

INA2132U

INA2132UA/2K5

2500

Green (RoHS

& no Sb/Br)

-40 to 85

INA2132U

INA2132UA/2K5E4

INA2132UA/2K5G4

OBSOLETE

ACTIVE

SOIC

TBD

Call TI

-40 to 85

2500

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-3-260C-168 HR

INA2132U

INA2132UAE4

INA2132UAG4

INA2132UE4

INA2132UG4

ACTIVE

SOIC

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-3-260C-168 HR

-40 to 85

INA2132U

Green (RoHS

& no Sb/Br)

INA2132U

Green (RoHS

& no Sb/Br)

INA2132U

Green (RoHS

& no Sb/Br)

INA2132U

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

11-Apr-2013

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)

Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a

continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

26-Jan-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

INA2132U/2K5

INA2132UA/2K5

SOIC

2500

330.0

16.4

6.5

9.0

2.1

8.0

16.0

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

26-Jan-2013

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

INA2132U/2K5

INA2132UA/2K5

SOIC

2500

367.0

38.0

Pack Materials-Page 2

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INA2132UA [TI]

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