INA301 [TI]
具有比较器的 36V、550kHz、4V/µs 高精度电流感应放大器;
| 型号： | INA301 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有比较器的 36V、550kHz、4V/µs 高精度电流感应放大器 放大器 比较器 |
| 文件： | 总29页 (文件大小：1084K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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INA301
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
INA301 带有高速过流比较器的
36V 高速、零漂移、电压输出分流监控器
1 特性
3 说明
1
•
•
•
宽共模输入范围：0V 至 36V
INA301 由高共模电流感测放大器和高速比较器组成，
通过测量电流感测或分流电阻两侧的电压并将该电压与
定义的阈值限值作比较来检测过流情况。该器件 具有
一个可调限制阈值范围，此范围由单个外部限值设定电
阻器设置。此分流监控器能够在 0V 至 36V 的共模电
压范围内测量差分电压信号，并且与电源电压无关。
双输出：放大器和比较器输出
高精度放大器：
–
–
–
–
偏移电压：35µV（最大值）
偏移电压漂移：0.5μV/°C（最大值）
增益误差：0.1%（最大值）
增益误差漂移：10ppm/°C
开漏报警输出可配置为透明模式（输出状态与输入状态
保持一致）或锁存模式（复位锁存时清除报警输出）。
器件报警响应时间不到 1µs，能够快速检测过流事件。
•
可用放大器增益：
–
–
–
INA301A1：20V/V
INA301A2：50V/V
INA301A3：100V/V
这款器件由 2.7V-5.5V 单电源供电运行，最大电源电
流消耗为 700µA。此器件在扩展级温度范围（-40°C
至 +125°C）下额定运行，并采用 8 引脚 VSSOP 封
装。
•
•
•
•
可编程的报警阈值，通过单个电阻设置
总报警响应时间：1µs
锁存模式下的开漏输出
封装：超薄小外形尺寸封装 (VSSOP)-8
器件信息
器件型号
INA301
封装
封装尺寸
2 应用范围
超薄小外形尺寸封装
(VSSOP) (8)
3.00mm × 3.00mm
•
•
•
•
•
•
过流保护
电源保护
断路器
计算机和服务器
电信设备
电池管理
典型应用
2.7 V to 5.5 V
CBYPASS
0.1 mF
RPULL-UP
Supply
10 kꢀ
(0 V to 36 V)
VS
INA301
Microcontroller
ADC
IN+
IN-
+
OUT
ALERT
RESET
GPIO
GPIO
Load
LIMIT
DAC
GND
RLIMIT
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SBOS713
INA301
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
www.ti.com.cn
目录
7.3 Feature Description................................................. 14
7.4 Device Functional Modes........................................ 19
Applications and Implementation ...................... 21
8.1 Application Information .......................................... 21
8.2 Typical Application .................................................. 21
Power Supply Recommendations...................... 23
1
2
3
4
5
6
特性.......................................................................... 1
应用范围................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 7
Detailed Description ............................................ 13
7.1 Overview ................................................................. 13
7.2 Functional Block Diagram ....................................... 13
8
9
10 Layout................................................................... 23
10.1 Layout Guidelines ................................................. 23
10.2 Layout Example .................................................... 23
11 器件和文档支持 ..................................................... 24
11.1 社区资源................................................................ 24
11.2 商标....................................................................... 24
11.3 静电放电警告......................................................... 24
11.4 Glossary................................................................ 24
12 机械、封装和可订购信息....................................... 24
7
4 修订历史记录
Changes from Original (September 2015) to Revision A
Page
•
已发布为“量产数据”................................................................................................................................................................. 1
2
Copyright © 2015–2016, Texas Instruments Incorporated
INA301
www.ti.com.cn
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
5 Pin Configuration and Functions
DGK Package
8-Pin VSSOP
Top View
VS
OUT
1
2
3
4
8
IN+
7
6
5
IN-
LIMIT
GND
ALERT
RESET
Pin Functions
PIN
I/O
DESCRIPTION
NO.
1
NAME
VS
Analog
Power supply, 2.7 V to 5.5 V
Output voltage
2
OUT
Analog output
Alert threshold limit input; see the Setting The Current-Limit Threshold section for
details on setting the limit threshold
3
LIMIT
Analog input
4
5
6
7
8
GND
RESET
ALERT
IN–
Analog
Ground
Digital input
Digital output
Analog input
Analog input
Transparent or latch mode selection input
Overlimit alert, active-low, open-drain output
Connect to load side of the shunt resistor
Connect to supply side of the shunt resistor
IN+
Copyright © 2015–2016, Texas Instruments Incorporated
3
INA301
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
Supply voltage, VS
6
40
V
(2)
Differential (VIN+) – (VIN–
Common-mode(3)
LIMIT pin
)
–40
Analog inputs (IN+, IN–)
V
GND – 0.3
GND – 0.3
GND – 0.3
GND – 0.3
GND – 0.3
40
Analog input
(VS) + 0.3
(VS) + 0.3
(VS) + 0.3
6
V
V
Analog output
OUT pin
Digital input
RESET pin
V
Digital output
ALERT pin
V
Junction temperature, TJ
Storage temperature, Tstg
150
°C
°C
–65
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively.
(3) Input voltage can exceed the voltage shown without causing damage to the device if the current at that pin is limited to 5 mA.
6.2 ESD Ratings
VALUE
±2000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
12
MAX
UNIT
VCM
VS
Common-mode input voltage
Operating supply voltage
V
V
5
TA
Operating free-air temperature
–40
125
°C
6.4 Thermal Information
INA301
THERMAL METRIC(1)
DGK (MSOP)
8 PINS
161.5
62.3
UNIT
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
81.4
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
6.8
ψJB
80
RθJC(bot)
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
4
Copyright © 2015–2016, Texas Instruments Incorporated
INA301
www.ti.com.cn
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
6.5 Electrical Characteristics
at TA = 25°C, VSENSE = VIN+ – VIN– = 10 mV, VS = 5 V, VIN+ = 12 V, and VLIMIT = 2 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
INPUT
VCM
Common-mode input voltage range
Differential input voltage range
0
0
0
0
36
250
100
50
VIN = VIN+ – VIN–, INA301A1
VIN = VIN+ – VIN–, INA301A2
VIN = VIN+ – VIN–, INA301A3
VIN
mV
INA301A1, VIN+ = 0 V to 36 V,
TA = –40ºC to +125ºC
100
106
110
110
118
120
INA301A2, VIN+ = 0 V to 36 V,
TA = –40ºC to +125ºC
CMR
Common-mode rejection
Offset voltage, RTI(1)
dB
µV
INA301A3, VIN+ = 0 V to 36 V,
TA = –40ºC to +125ºC
INA301A1
±25
±15
±10
0.1
±125
±50
±35
0.5
VOS
INA301A2
INA301A3
dVOS/dT
PSRR
Offset voltage drift, RTI(1)
Power-supply rejection ratio
TA= –40ºC to +125ºC
µV/°C
µV/V
VS = 2.7 V to 5.5 V, VIN+ = 12 V,
TA = –40ºC to +125ºC
±0.1
±10
IB
Input bias current
Input offset current
IB+, IB–
120
µA
µA
IOS
VSENSE = 0 mV
±0.1
OUTPUT
INA301A1
20
50
G
Gain
INA301A2
V/V
INA301A3
100
INA301A1, VOUT = 0.5 V to VS – 0.5 V
INA301A2, VOUT = 0.5 V to VS – 0.5 V
INA301A3, VOUT = 0.5 V to VS – 0.5 V
TA= –40ºC to 125ºC
±0.03%
±0.05%
±0.11%
3
±0.1%
±0.15%
±0.2%
10
Gain error
ppm/°C
pF
Nonlinearity error
VOUT = 0.5 V to VS – 0.5 V
No sustained oscillation
±0.01%
500
Maximum capacitive load
VOLTAGE OUTPUT
RL = 10 kΩ to GND,
TA = –40ºC to +125ºC
Swing to VS power-supply rail
VS – 0.05
VGND + 20
VS – 0.1
V
RL = 10 kΩ to GND,
TA = –40ºC to +125ºC
Swing to GND
VGND + 30
mV
FREQUENCY RESPONSE
INA301A1
INA301A2
INA301A3
550
500
450
4
BW
Bandwidth
kHz
V/µs
SR
Slew rate
NOISE, RTI(1)
Voltage noise density
30
nV/√Hz
(1) RTI = referred-to-input.
Copyright © 2015–2016, Texas Instruments Incorporated
5
INA301
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
www.ti.com.cn
Electrical Characteristics (continued)
at TA = 25°C, VSENSE = VIN+ – VIN– = 10 mV, VS = 5 V, VIN+ = 12 V, and VLIMIT = 2 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
COMPARATOR
Total alert propagation delay
Slew-rate-limited tp
Input overdrive = 1 mV
0.75
1
1
1.5
80.3
80.8
3.5
4
tp
µs
VOUT step = 0.5 V to 4.5 V, VLIMIT = 4 V
TA = 25ºC
79.7
79.2
80
ILIMIT
Limit threshold output current
µA
TA = –40ºC to +125ºC
INA301A1
1
1
VOS
Comparator offset voltage
INA301A2
mV
mV
INA301A3
1.5
20
4.5
INA301A1
HYS
Hysteresis
INA301A2
50
INA301A3
100
VIH
VIL
High-level input voltage
1.4
0
6
0.4
300
1
V
V
Low-level input voltage
VOL
Alert low-level output voltage
ALERT pin leakage input current
Digital leakage input current
IOL = 3 mA
VOH = 3.3 V
0 ≤ VIN ≤ VS
70
0.1
1
mV
µA
µA
POWER SUPPLY
VS
Operating supply range
TA = –40ºC to +125ºC
VSENSE = 0 mV, TA = 25ºC
TA = –40ºC to +125ºC
2.7
5.5
650
700
V
500
IQ
Quiescent current
µA
TEMPERATURE RANGE
Specified range
–40
125
°C
6
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INA301
www.ti.com.cn
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
6.6 Typical Characteristics
at TA = 25°C, VS = 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ (unless otherwise noted)
Input Offset Voltage (mV)
Input Offset Voltage (mV)
图 1. Input Offset Voltage Distribution (INA301A1)
图 2. Input Offset Voltage Distribution (INA301A2)
60
40
20
0
INA301A1
INA301A2
INA301A3
-20
-50
-25
0
25
50
75
100
125
150
Temperature (èC)
Input Offset Voltage (mV)
图 3. Input Offset Voltage Distribution (INA301A3)
图 4. Input Offset Voltage vs Temperature
CMRR (mV/V)
CMRR (mV/V)
图 5. Common-Mode Rejection Ratio Distribution (INA301A1)
图 6. Common-Mode Rejection Ratio Distribution (INA301A2)
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7
INA301
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
www.ti.com.cn
Typical Characteristics (接下页)
at TA = 25°C, VS = 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ (unless otherwise noted)
3
2.5
2
INA301A1
INA301A2
INA301A3
1.5
1
0.5
0
-0.5
-1
-50
-25
0
25
50
75
100
125
150
Temperature (èC)
CMRR (mV/V)
图 7. Common-Mode Rejection Ratio Distribution (INA301A3)
图 8. Common-Mode Rejection Ratio vs Temperature
140
INA301A1
INA301A2
INA301A3
120
100
80
60
10
100
1k
10k
100k
1M
Frequency (Hz)
Gain Error (%)
图 9. Common-Mode Rejection Ratio vs Frequency
图 10. Gain Error Distribution (INA301A1)
Gain Error (%)
Gain Error (%)
图 11. Gain Error Distribution (INA301A2)
图 12. Gain Error Distribution (INA301A3)
8
版权 © 2015–2016, Texas Instruments Incorporated
INA301
www.ti.com.cn
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
Typical Characteristics (接下页)
at TA = 25°C, VS = 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ (unless otherwise noted)
0.5
0.4
0.3
0.2
0.1
0
50
40
30
20
10
0
INA301A1
INA301A2
INA301A3
-0.1
-0.2
-0.3
-0.4
-0.5
INA301A1
INA301A2
INA301A3
-10
-20
-50
-25
0
25
50
75
100
125
150
1
10
100
1k
10k
100k
1M
10M
Temperature (èC)
Frequency (Hz)
图 13. Gain Error vs Temperature
图 14. Gain vs Frequency
VS
140
120
100
80
V
S - 1
V
S - 2
GND + 3
GND + 2
GND + 1
GND
60
125ºC
25ºC
-40ºC
40
20
0
2
4
6
8
10
12
14
1
10
100
1k
10k
100k
1M
10M
Output Current (mA)
Frequency (Hz)
图 16. Output Voltage Swing vs Output Current
图 15. Power-Supply Rejection Ratio vs Frequency
250
200
150
100
50
150
120
90
60
30
0
-50
0
0
0
5
10
15
20
25
30
35
40
5
10
15
20
25
30
35
40
Common-Mode Voltage (V)
Common-Mode Voltage (V)
图 17. Input Bias Current vs Common-Mode Voltage
图 18. Input Bias Current vs Common-Mode Voltage
(VS = 5 V)
(VS = 0 V)
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INA301
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
www.ti.com.cn
Typical Characteristics (接下页)
at TA = 25°C, VS = 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ (unless otherwise noted)
145
140
135
130
125
120
115
110
105
100
600
550
500
450
400
350
300
-50
-25
0
25
50
75
100
125
150
2.7
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
Supply Voltage (V)
Temperature (èC)
图 19. Input Bias Current vs Temperature
图 20. Quiescent Current vs Supply Voltage
540
520
500
480
460
440
420
35
30
25
20
15
10
5
INA301A1
INA301A2
INA301A3
0
-50
-25
0
25
50
75
100
125
150
1
10
100
1k
10k
100k
1M
Temperature (èC)
Frequency (Hz)
图 21. Quiescent Current vs Temperature
图 22. Input-Referred Voltage Noise vs Frequency
Input
Output
Time (1 s/div)
Time (1 ms/div)
图 23. 0.1-Hz to 10-Hz Voltage Noise
图 24. Voltage Output Rising Step Response
(Referred-to-Input)
(4-VPP Output Step)
10
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INA301
www.ti.com.cn
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
Typical Characteristics (接下页)
at TA = 25°C, VS = 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ (unless otherwise noted)
Input
Output
VCM
VOUT
Time (1 ms/div)
Time (2 ms/div)
图 25. Voltage Output Falling Step Response
图 26. Common-Mode Voltage Transient Response
(4-VPP Output Step)
80.8
80.6
80.4
80.2
80
79.8
79.6
79.4
79.2
VSUPPLY
VOUT
Time (5 ms/div)
-50
-25
0
25
50
75
100
125
150
Temperature (èC)
图 28. Limit Current Source vs Temperature
图 27. Start-Up Response
VIN * 20 V/V
Alert
VIN * 50 V/V
Alert
VLIMIT
VLIMIT
Time (200 ns/div)
Time (200 ns/div)
图 29. Total Propagation Delay (INA301A1)
图 30. Total Propagation Delay (INA301A2)
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INA301
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
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Typical Characteristics (接下页)
at TA = 25°C, VS = 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ (unless otherwise noted)
1,000
800
600
VIN * 100 V/V
Alert
VLIMIT
400
200
0
-50
Time (200 ns/div)
-25
0
25
50
75
100
125
150
Temperature (èC)
图 32. Comparator Propagation Delay vs Temperature (VOD
=
图 31. Total Propagation Delay (INA301A3)
1 mV)
120
100
80
60
40
20
0
120
100
INA301A1
INA301A2
INA301A3
80
60
40
20
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
-50
-25
0
25
50
75
100
125
150
Low-Level Output Current (mA)
Temperature (èC)
图 33. Comparator Alert VOL vs IOL
图 34. Hysteresis vs Temperature
Reset
Alert
Time (2 ms/div)
图 35. Comparator Reset Response
12
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INA301
www.ti.com.cn
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
7 Detailed Description
7.1 Overview
The INA301 is a 36-V common-mode, zero-drift topology, current-sensing amplifier that can be used in both low-
side and high-side configurations. These specially-designed, current-sensing amplifiers are able to accurately
measure voltages developed across current-sensing resistors (also known as current-shunt resistors) on
common-mode voltages that far exceed the supply voltage powering the device. Current can be measured on
input voltage rails as high as 36 V, and the device can be powered from supply voltages as low as 2.7 V. The
device can also withstand the full 36-V common-mode voltage at the input pins when the supply voltage is
removed without causing damage.
The zero-drift topology enables high-precision measurements with maximum input offset voltages as low as
35 μV with a temperature contribution of only 0.5 μV/°C over the full temperature range of –40°C to +125°C. The
low total offset voltage of the INA301 enables smaller current-sense resistor values to be used, and allows for a
more efficient system operation without sacrificing measurement accuracy resulting from the smaller input signal.
The INA301 uses a single external resistor to allow for a simple method of setting the corresponding current
threshold level for the device to use for out-of-range comparison. Combining the precision measurement of the
current-sense amplifier and the on-board comparator enables an all-in-one overcurrent detection device. This
combination creates a highly-accurate solution that is capable of fast detection of out-of-range conditions and
allows the system to take corrective actions to prevent potential component or system-wide damage.
7.2 Functional Block Diagram
2.7 V to 5.5 V
CBYPASS
0.1 mF
Power Supply
(0 V to 36 V)
VS
INA301
RPULL-UP
IN+
IN-
10kꢀ
+
OUT
Gain = 20, 50,
100
Load
ALERT
RESET
+
LIMIT
RSET
GND
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INA301
ZHCSEK8A –SEPTEMBER 2015–REVISED FEBRUARY 2016
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7.3 Feature Description
7.3.1 Alert Output
The device ALERT pin is an active-low, open-drain output that is designed to be pulled low when the input
conditions are detected to be out-of-range. This open-drain output pin is recommended to include a 10-kΩ, pullup
resistor to the supply voltage. This open-drain pin can be pulled up to a voltage beyond the supply voltage, VS,
but must not exceed 5.5 V.
图 36 shows the alert output response of the internal comparator. When the output voltage of the amplifier is
lower than the voltage developed at the LIMIT pin, the comparator output is in the default high state. When the
amplifier output voltage exceeds the threshold voltage set at the LIMIT pin, the comparator output becomes
active and pulls low. This active low output indicates that the measured signal at the amplifier input has
exceeded the programmed threshold level, indicating an overcurrent or out-of-range condition has occurred.
6
VOUT
VLIMIT
ALERT
5
4
3
2
1
0
œ1
Time (5 ms/div)
C001
图 36. Overcurrent Alert Response
7.3.2 Alert Mode
The device has two output operating modes, transparent and latched, that are selected based on the RESET pin
setting. These modes change how the ALERT pin responds following an alert when the overcurrent condition is
removed.
7.3.2.1 Transparent Output Mode
The device is set to transparent mode when the RESET pin is pulled low, thus allowing the output alert state to
change and follow the input signal with respect to the programmed alert threshold. For example, when the
differential input signal rises above the alert threshold, the alert output pin is pulled low. As soon as the
differential input signal drops below the alert threshold, the output returns to the default high output state. A
common implementation using the device in transparent mode is to connect the ALERT pin to a hardware
interrupt input on a microcontroller. As soon as an overcurrent condition is detected and the ALERT pin is pulled
low, the controller interrupt pin detects the output state change and can begin making changes to the system
operation required to address the overcurrent condition. Under this configuration, the ALERT pin transition from
high to low is captured by the microcontroller so the output can return to the default high state when the
overcurrent event is removed.
7.3.2.2 Latch Output Mode
Some applications do not have the functionality available to continuously monitor the state of the output ALERT
pin to detect an overcurrent condition as described in the Transparent Output Mode section. A typical example of
this application is a system that is only able to poll the ALERT pin state periodically to determine if the system is
functioning correctly. If the device is set to transparent mode in this type of application, the state change of the
ALERT pin can be missed when ALERT is pulled low to indicate an out-of-range event if the out-of-range
condition does not appear during one of these periodic polling events. Latch mode is specifically intended to
accommodate these applications.
14
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Feature Description (接下页)
The device is placed into the corresponding output modes based on the signal connected to RESET, as shown
in 表 1. The difference between latch mode and transparent mode is how the alert output responds when an
overcurrent event ends. In transparent mode (RESET = low), when the differential input signal drops below the
limit threshold level after the ALERT pin asserts because of an overcurrent event, the ALERT pin state returns to
the default high setting to indicate that the overcurrent event has ended.
表 1. Output Mode Settings
OUTPUT MODE
Transparent mode
Latch mode
RESET PIN SETTING
RESET = low
RESET = high
In latch mode (RESET = high), when an overlimit condition is detected and the ALERT pin is pulled low, the
ALERT pin does not return to the default high state when the differential input signal drops below the alert
threshold level. In order to clear the alert, the RESET pin must be pulled low for at least 100 ns. Pulling the
RESET pin low allows the ALERT pin to return to the default high level provided that the differential input signal
has dropped below the alert threshold. If the input signal is still above the threshold limit when the RESET pin is
pulled low, the ALERT pin remains low. When the alert condition is detected by the system controller, the RESET
pin can be set back to high in order to place the device back in latch mode.
The latch and transparent modes are represented in 图 37. In 图 37, when VIN drops back below the VLIMIT
threshold for the first time, the RESET pin is pulled high. With the RESET pin is pulled high, the device is set to
latch mode so that the alert output state does not return high when the input signal drops below the VLIMIT
threshold. Only when the RESET pin is pulled low does the ALERT pin return to the default high level, thus
indicating that the input signal is below the limit threshold. When the input signal drops below the limit threshold
for the second time, the RESET pin is already pulled low. The device is set to transparent mode at this point and
the ALERT pin is pulled back high as soon as the input signal drops below the alert threshold.
VLIMIT
VIN
(VIN+ - VIN-
)
0 V
Latch Mode
RESET
Transparent Mode
Alert Clears
ALERT
Alert Does Not Clear
图 37. Transparent versus Latch Mode
7.3.3 Setting The Current-Limit Threshold
The INA301 determines if an overcurrent event is present by comparing the amplified measured voltage
developed across the current-sensing resistor to the corresponding signal developed at the LIMIT pin. The
threshold voltage for the LIMIT pin can be set using a single external resistor or by connecting an external
voltage source to the LIMIT pin.
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7.3.3.1 Resistor-Controlled Current Limit
The typical approach for setting the limit threshold voltage is to connect a resistor from the LIMIT pin to ground.
The value of this resistor, RLIMIT, is chosen in order to create a corresponding voltage at the LIMIT pin equivalent
to the output voltage, VOUT, when the maximum desired load current is flowing through the current-sensing
resistor. An internal 80-µA current source is connected to the LIMIT pin to create a corresponding voltage used
to compare to the amplifier output voltage, depending on the value of the RLIMIT resistor.
In the equations from 表 2, VTRIP represents the overcurrent threshold that the device is programmed to monitor
for and VLIMIT is the programmed signal set to detect the VTRIP level.
表 2. Calculating the Limit Threshold Setting Resistor, RLIMIT
PARAMETER
EQUATION
ILOAD × RSENSE x Gain
VLIMIT = VTRIP
VTRIP
VLIMIT
VOUT at the desired current trip value
Threshold limit voltage
ILIMIT × RLIMIT
VLIMIT / ILIMIT
RLIMIT
Calculate the threshold limit-setting resistor
VLIMIT / 80 µA
7.3.3.1.1 Resistor-Controlled Current Limit: Example
For example, if the current level indicating an out-of-range condition is present is 20 A and the current-sense
resistor value is 10 mΩ, then the input threshold signal is 200 mV. The INA301A1 has a gain of 20 so the
resulting output voltage at the 20-A input condition is 4 V. The value for RLIMIT is selected to allow the device to
detect to this 20-A threshold, indicating an overcurrent event has occurred. When the INA301 detects this out-of-
range condition, the ALERT pin asserts and pulls low. For this example, the value of RLIMIT to detect a 4-V level
is calculated to be 50 kΩ, as shown in 表 3.
表 3. Calculating the Limit Threshold Setting Resistor, RLIMIT: Example
PARAMETER
EQUATION
ILOAD × RSENSE x Gain
20 A x 10 mΩ x 20 V/V = 4 V
VLIMIT = VTRIP
VTRIP
VLIMIT
RLIMIT
VOUT at the desired current trip value
Threshold limit voltage
ILIMIT × RLIMIT
VLIMIT / ILIMIT
Calculate the threshold limit-setting resistor
4 V / 80 µA = 50 kΩ
7.3.3.2 Voltage-Source-Controlled Current Limit
The second method for setting the limit voltage is to connect the LIMIT pin to a programmable digital-to-analog
converter (DAC) or other external voltage source. The benefit of this method is the ability to adjust the current-
limit threshold to account for different threshold voltages that are used for different system operating conditions.
For example, this method can be used in a system that has one current-limit threshold level that must be
monitored during a power-up sequence but different threshold levels that must be monitored during other system
operating modes.
In 表 4, VTRIP represents the overcurrent threshold that the device is programmed to monitor for and VSOURCE is
the programmed signal set to detect the VTRIP level.
表 4. Calculating the Limit Threshold Voltage Source, VSOURCE
PARAMETER
EQUATION
ILOAD × RSENSE × Gain
VSOURCE = VTRIP
VTRIP
VOUT at the desired current trip value
Program the threshold limit voltage
VSOURCE
16
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7.3.4 Selecting a Current-Sensing Resistor
The device measures the differential voltage developed across a resistor when current flows through the
component to determine if the current being monitored exceeds a defined limit. This resistor is commonly
referred to as a current-sensing resistor or a current-shunt resistor, with each term commonly used
interchangeably. The flexible design of the device allows for measuring a wide differential input signal range
across this current-sensing resistor.
Selecting the value of this current-sensing resistor is based primarily on two factors: the required accuracy of the
current measurement and the allowable power dissipation across the current-sensing resistor. Larger voltages
developed across this resistor allow for more accurate measurements to be made. Amplifiers have fixed internal
errors that are largely dominated by the inherent input offset voltage. When the input signal decreases, these
fixed internal amplifier errors become a larger portion of the measurement and increase the uncertainty in the
measurement accuracy. When the input signal increases, the measurement uncertainty is reduced because the
fixed errors are a smaller percentage of the signal being measured. Therefore, the use of larger value current-
sensing resistors inherently improves the measurement accuracy.
However, a system design trade-off must be evaluated through use of larger input signals for improving the
measurement accuracy. Increasing the current sense resistor value results in an increase in power dissipation
across the current-sensing resistor. Increasing the value of the current-shunt resistor increases the differential
voltage developed across the resistor when current passes through the component. This increase in voltage
across the resistor increases the power that the resistor must be able to dissipate. Decreasing the value of the
current-shunt resistor value reduces the power dissipation requirements of the resistor, but increases the
measurement errors resulting from the decreased input signal. Selecting the optimal value for the shunt resistor
requires factoring both the accuracy requirement for the specific application and the allowable power dissipation
of this component.
An increasing number of very low ohmic-value resistors are becoming more widely available with values reaching
down as low as 200 µΩ or lower with power dissipations of up to 5 W that enable large currents to be accurately
monitored with sensing resistors.
7.3.4.1 Selecting a Current-Sensing Resistor: Example
In this example, the trade-offs involved in selecting a current-sensing resistor are discussed. This example
requires 2.5% accuracy for detecting a 10-A overcurrent event where only 250 mW is allowable for the
dissipation across the current-sensing resistor at the full-scale current level. Although the maximum power
dissipation is defined as 250 mW, a lower dissipation is preferred to improve system efficiency. Some initial
assumptions are made that are used in this example: the limit-setting resistor (RLIMIT) is a 1% component and the
maximum tolerance specification for the internal threshold setting current source (0.5%) is used. Given the total
error budget of 2.5%, up to 1% of error is available to be attributed to the measurement error of the device under
these conditions.
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As shown in 表 5, the maximum value calculated for the current-sensing resistor with these requirements is 2.5
mΩ. Although this value satisfies the maximum power dissipation requirement of 250 mW, headroom is available
from the 2.5% maximum total overcurrent detection error to reduce the value of the current-sensing resistor and
reduce the power dissipation further. Selecting a 1.5-mΩ, current-sensing resistor value offers a good tradeoff for
reducing the power dissipation in this scenario by approximately 40% and still remaining within the accuracy
region.
表 5. Calculating the Current-Sensing Resistor, RSENSE
PARAMETER
Maximum current
EQUATION
VALUE
10
UNIT
A
IMAX
PD_MAX
RSENSE_MAX
VOS
Maximum allowable power dissipation
Maximum allowable RSENSE
Offset voltage
250
mW
mΩ
µV
2
PD_MAX / IMAX
2.5
150
VOS_ERROR
EG
Initial offset voltage error
Gain error
(VOS / (RSENSE_MAX × IMAX ) × 100
0.6%
0.25%
0.65%
2.5%
1.5%
1%
2
ERRORTOTAL
Total measurement error
Allowable current threshold accuracy
Initial threshold error
√(VOS_ERROR2 + EG
)
ERRORINITIAL
ILIMIT Tolerance + RLIMIT Tolerance
ERRORAVAILABLE Maximum allowable measurement error
Maximum Error – ERRORINITIAL
2
VOS_ERROR_MAX
VDIFF_MIN
RSENSE_MIN
PD_MIN
Maximum allowable offset error
Minimum differential voltage
Minimum sense resistor value
Lowest possible power dissipation
√(ERRORAVAILABLE2 – EG
VOS / VOS_ERROR_MAX (1%)
VDIFF_MIN / IMAX
)
0.97%
15
mV
mΩ
mW
1.5
2
RSENSE_MIN × IMAX
150
7.3.5 Hysteresis
The on-board comparator in the INA301 is designed to reduce the possibility of oscillations in the alert output
when the measured signal level is near the overlimit threshold level because of noise. When the output voltage
(VOUT) exceeds the voltage developed at the LIMIT pin, the ALERT pin is asserted and pulls low. The output
voltage must drop below the LIMIT pin threshold voltage by the gain-dependent hysteresis level in order for the
ALERT pin to de-assert and return to the nominal high state, as shown in 图 38.
ALERT
Alert
Output
VOUT
VLIMIT - Hysteresis
VLIMIT
图 38. Typical Comparator Hysteresis
18
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7.4 Device Functional Modes
7.4.1 Input Filtering
External system noise can significantly affect the ability of a comparator to accurately measure and detect
whether input signals exceed the reference threshold levels, thus reliably indicating an overrange condition. The
most obvious effect that external noise can have on the operation of a comparator is to cause a false alert
condition. If a comparator detects a large noise transient coupled into the signal, the device can easily interpret
this transient as an overrange condition.
External filtering can help reduce the amount of noise that reaches the comparator and reduce the likelihood of a
false alert from occurring. The tradeoff to adding this noise filter is that the alert response time is increased
because of the input signal being filtered as well as the noise. 图 39 shows the implementation of an input filter
for the device.
2.7 V to 5.5 V
CBYPASS
0.1 mF
Supply
RPULL-UP
(0 V to 36 V)
10 kꢀ
VS
INA301
IN+
IN-
+
CFILTER
RFILTER
≤10 ꢀ
OUT
ALERT
RESET
Load
LIMIT
GND
RLIMIT
图 39. Input Filter
Limiting the amount of input resistance used in this filter is important because this resistance can have a
significant affect on the input signal that reaches the device input pins resulting from the device input bias
currents. A typical system implementation involves placing the current-sensing resistor very near the device so
the traces are very short and the trace impedance is very small. This layout helps reduce the ability of coupling
additional noise into the measurement. Under these conditions, the characteristics of the input bias currents have
minimal affect on device performance.
As illustrated in 图 40, the input bias currents increase in opposite directions when the differential input voltage
increases. This increase results from the design of the device that allows common-mode input voltages to far
exceed the device supply voltage range. With input filter resistors now placed in series with these unequal input
bias currents, there are unequal voltage drops developed across these input resistors. The difference between
these two drops appears as an added signal that (in this case) subtracts from the voltage developed across the
current-sensing resistor, thus reducing the signal that reaches the device input pins. Smaller value input resistors
reduce this effect of signal attenuation to allow for a more accurate measurement.
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Device Functional Modes (接下页)
225
200
175
150
125
100
75
50
25
0
0
50
100
150
200
250
Differential Input Voltage (mV)
C002
图 40. Input Bias Current vs Differential Input Voltage
For example, with a differential voltage of 10 mV developed across a current-sensing resistor and using 20-Ω
resistors, the differential signal that actually reaches the device is 9.85 mV. A measurement error of 1.5% is
created as a result of these external input filter resistors. Using 10-Ω input filter resistors instead of the 20-Ω
resistors reduces this added error from 1.5% down to 0.75%.
7.4.2 Using The INA301 with Common-Mode Transients Above 36 V
With a small amount of additional circuitry, the device can be used in circuits subject to transients higher than
36 V. Use only zener diodes or zener-type transient absorbers (sometimes referred to as transzorbs). Any other
type of transient absorber has an unacceptable time delay. Start by adding a pair of resistors, as shown in 图 41,
as a working impedance for the zener diode. Keeping these resistors as small as possible is best, preferably 10
Ω or less. Larger values can be used with an additional induced error resulting from a reduced signal that
actually reaches the device input pins. Because this circuit limits only short-term transients, many applications
are satisfied with a 10-Ω resistor along with conventional zener diodes of the lowest power rating available. This
combination uses the least amount of board space. These diodes can be found in packages as small as SOT-
523 or SOD-523.
2.7 V to 5.5 V
CBYPASS
0.1 mF
Supply
RPULL-UP
(0 V to 36 V)
10kꢀ
VS
INA301
IN+
IN-
+
RPROTECT
≤10 ꢀ
OUT
ALERT
RESET
Load
LIMIT
GND
RLIMIT
图 41. Transient Protection
20
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8 Applications and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The INA301 is designed to enable easy configuration for detecting overcurrent conditions in an application. This
device is individually targeted towards unidirectional overcurrent detection of a single threshold. However, this
device can also be paired with additional devices and circuitry to create more complex monitoring functional
blocks.
8.2 Typical Application
CBYPASS
0.1 mF
2.7 V to 5.5 V
RPULL-UP
10 kꢀ
VS
IN+
+
OUT
IN-
OCP+
ALERT
LIMIT
Power Supply
(0 V to 36 V)
GND
RLIMIT
Current
Output
CBYPASS
0.1 mF
2.7 V to 5.5 V
Load
RPULL-UP
10 kꢀ
IN+
VS
+
OUT
IN-
OCP-
ALERT
LIMIT
GND
RLIMIT
图 42. Bidirectional Application
8.2.1 Design Requirements
Although the device is only able to measure current through a current-sensing resistor flowing in one direction, a
second INA301 can be used to create a bidirectional monitor.
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Typical Application (接下页)
8.2.2 Detailed Design Procedure
With the input pins of a second device reversed across the same current-sensing resistor, the second device is
now able to detect current flowing in the other direction relative to the first device; see 图 42. The outputs of each
device connect to an AND gate to detect if either of the limit threshold levels are exceeded. As shown in 表 6, the
output of the AND gate is high if neither overcurrent limit thresholds are exceeded. A low output state of the AND
gate indicates that either the positive overcurrent limit or the negative overcurrent limit are surpassed.
表 6. Bidirectional Overcurrent Output Status
OCP STATUS
OCP+
OUTPUT
0
0
1
OCP–
No OCP
8.2.3 Application Curve
图 43 shows two INA301 devices being used in a bidirectional configuration and an output control circuit to detect
if one of the two alerts is exceeded.
Positive Limit
0V
Negtive Limit
Time (5 ms/div)
图 43. Bidirectional Application Curve
22
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9 Power Supply Recommendations
The device input circuitry can accurately measure signals on common-mode voltages beyond the power-supply
voltage, VS. For example, the voltage applied to the VS power-supply pin can be 5 V, whereas the load power-
supply voltage being monitored (VCM) can be as high as 36 V. Note also that the device can withstand the full
–0.3 V to 36 V range at the input pins, regardless of whether the device has power applied or not.
Power-supply bypass capacitors are required for stability and must be placed as closely as possible to the supply
and ground pins of the device. A typical value for this supply bypass capacitor is 0.1 µF. Applications with noisy
or high-impedance power supplies can require additional decoupling capacitors to reject power-supply noise.
10 Layout
10.1 Layout Guidelines
•
Place the power-supply bypass capacitor as closely as possible to the supply and ground pins. The
recommended value of this bypass capacitor is 0.1 µF. Additional decoupling capacitance can be added to
compensate for noisy or high-impedance power supplies.
•
Make the connection of RLIMIT to the ground pin as direct as possible to limit additional capacitance on this
node. Routing this connection must be limited to the same plane if possible to avoid vias to internal planes. If
the routing can not be made on the same plane and must pass through vias, ensure that a path is routed
from RLIMIT back to the ground pin and that RLIMIT is not simply connected directly to a ground plane.
•
The open-drain output pin is recommended to be pulled up to the supply voltage rail through a 10-kΩ pullup
resistor.
10.2 Layout Example
RSHUNT
Power
Supply
Load
Alert Output
IN+
IN-
ALERT RESET
RPULL-UP
INA301
VIA to
Ground
Plane
VS
OUT
LIMIT
GND
VIA to
Ground
Plane
Supply
Voltage
RLIMIT
Output Voltage
CBYPASS
NOTE: Connect the limit resistor directly to the GND pin.
图 44. Recommended Layout
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11 器件和文档支持
11.1 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.3 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页中包括机械封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对本
文档进行修订的情况下发生改变。要获得这份数据表的浏览器版本，请查阅左侧的导航栏。
24
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
INA301A1IDGKR
INA301A1IDGKT
INA301A2IDGKR
INA301A2IDGKT
INA301A3IDGKR
INA301A3IDGKT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
DGK
DGK
DGK
DGK
DGK
DGK
8
8
8
8
8
8
2500 RoHS & Green
250 RoHS & Green
2500 RoHS & Green
250 RoHS & Green
2500 RoHS & Green
250 RoHS & Green
NIPDAUAG | SN
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
ZGD6
ZGD6
ZGI6
Samples
Samples
Samples
Samples
Samples
Samples
NIPDAUAG | SN
NIPDAUAG
NIPDAUAG
ZGI6
NIPDAUAG | SN
NIPDAUAG | SN
ZGH6
ZGH6
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
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Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF INA301 :
Automotive : INA301-Q1
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
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