INA901HKX/EM [TI]
具有直列式滤波器选项的耐辐射、-15V 至 65V、分离级电流感应放大器 | HKX | 8 | 25 to 25;型号: | INA901HKX/EM |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有直列式滤波器选项的耐辐射、-15V 至 65V、分离级电流感应放大器 | HKX | 8 | 25 to 25 放大器 |
文件: | 总26页 (文件大小:842K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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INA901-SP
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
共模范围为 –15V 至 80V 的 INA901-SP 耐辐射
单向电流分流监控器
1 特性
3 说明
1
•
5962-1821001
INA901-SP 是一款电压输出、电流检测放大器,可在
独立于电源电压的 –15V 至 +80V 共模电压中感应分流
电阻上的压降。INA901-SP 由 2.7V 至 16V 单电源供
电,消耗的电源电流为 700μA(典型值)。
–
在低剂量率下的耐辐射 (RHA) 剂量为
100krad (Si)
–
单粒子闩锁 (SEL) 在 125°C 下的
抗扰度可达 93MeV-cm2/mg
INA901-SP 的增益为 20 V/V。130kHz 带宽简化了在
电流控制环路中的使用。其引脚排列可充分支持滤波。
–
请参阅辐射报告
–
–
符合军用级
温度范围要求(-55°C 至 125°C)
该器件具有 –55°C 至 +125°C 的扩展额定工作温度范
围,并且采用 8 引脚 CFP 封装。
高性能 8 引脚
陶瓷扁平封装 (HKX)
器件信息(1)
•
•
•
宽共模范围:–15V 至 80V
CMRR:120dB
精度:
器件型号
等级
封装
QMLV RHA
[100 krad(Si)]
8 引线 CFP
[HKX]
5962R1821001VXC
–
–
–
–
±0.5mV 的失调电压
±0.2% 增益误差
5962-1821001VXC QMLV
6.48 × 6.48mm
重量:0.39g(3)
INA901HKX/EM
工程样片(2)
2.5μV/°C 的温漂
INA901EVM-CVAL 陶瓷评估板
—
50ppm/°C 的增益漂移
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附
录。
•
•
•
•
•
带宽:高达 130kHz
增益:20V/V
(2) 这些部件仅适用于工程评估。部件按照不合规的流程进行加工
处理。这些部件不适用于质检、生产、辐射测试或飞行。这些
零部件无法在 –55°C 至 125°C 的完整 MIL 额定温度范围内或
运行寿命中保证其性能。
静态电流:700μA
电源电压:2.7V 至 16V
可用于滤波
(3) 重量误差在 ±10% 以内。
简化原理图
2 应用
RS
–16 V to +80 V
Supply
Load
•
•
•
•
•
电源监控
Single-Pole Filter
Capacitor
过流和欠流检测
卫星遥测
+2.7 V to +18 V
PRE OUT
BUF IN
IN+
IN-
V+
空间信号调节
电机控制环路
5 kW
5 kW
OUT
A1
96 kW
A2
RL
GND
1
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。 有关适用的官方英文版本的最新信息,请访问 www.ti.com,其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SBOS938
INA901-SP
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
www.ti.com.cn
目录
7.4 Device Functional Modes........................................ 13
Application and Implementation ........................ 16
8.1 Application Information............................................ 16
8.2 Typical Application .................................................. 16
Power Supply Recommendations...................... 18
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 3
6.1 Absolute Maximum Ratings ...................................... 3
6.2 ESD Ratings.............................................................. 3
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Quality Conformance Inspection............................... 6
6.7 Typical Characteristics.............................................. 7
Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagram ....................................... 10
7.3 Feature Description................................................. 11
8
9
10 Layout................................................................... 19
10.1 Layout Guidelines ................................................. 19
10.2 Layout Example .................................................... 19
11 器件和文档支持 ..................................................... 20
11.1 文档支持................................................................ 20
11.2 接收文档更新通知 ................................................. 20
11.3 社区资源................................................................ 20
11.4 商标....................................................................... 20
11.5 静电放电警告......................................................... 20
11.6 术语表 ................................................................... 20
12 机械、封装和可订购信息....................................... 21
7
4 修订历史记录
注:之前版本的页码可能与当前版本有所不同。
Changes from Revision A (December 2018) to Revision B
Page
•
已更改 将器件状态从预告信息 更改为生产数据...................................................................................................................... 1
2
Copyright © 2018, Texas Instruments Incorporated
INA901-SP
www.ti.com.cn
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
5 Pin Configuration and Functions
HKX Package
8-Pin CFP
Top View
IN+
IN-
1
2
3
4
8
7
6
5
NC(1)
V+
GND
PRE OUT
BUF IN
INA901
OUT
NOTE (1): NC denotes no internal connection.
Pin Functions
PIN
I/O
TYPE(1) DESCRIPTION
NAME
BUF IN
NO.
4
I
A
GND
A
Connect to output of filter from PRE OUT.
Ground.
GND
IN–
2
—
I
1
Connect to load side of shunt resistor.
Connect to supply side of shunt resistor.
Recommend connect to ground.
Output voltage.
IN+
8
I
A
NC
7
—
O
O
—
—
A
OUT
PRE OUT
V+
5
3
A
Connect to input of filter to BUF IN.
Power supply, 2.7 V to 18 V.
6
P
(1) A = analog, P = power, GND = ground
6 Specifications
6.1 Absolute Maximum Ratings(1)
MIN
MAX
18
UNIT
Supply voltage (VS)
V
Differential, (VIN+) – (VIN–
)
–18
–16
18
Analog inputs, VIN+, VIN–
V
Common-mode
80
Analog output: OUT and PRE OUT pins
Input current into any pin
Operating temperature
GND – 0.3
(V+) + 0.3
5
V
mA
°C
°C
°C
–55
150
Junction temperature
150
Storage temperature, Tstg
–65
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
±3000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Copyright © 2018, Texas Instruments Incorporated
3
INA901-SP
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
www.ti.com.cn
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
–15
2.7
MAX
80
UNIT
V
VCM
VS
Common-mode input voltage
Operating supply voltage
16
V
TA
Operating free-air temperature
–55
125
°C
6.4 Thermal Information
INA901-SP
HKX (CFP)
8 PINS
116.7
THERMAL METRIC(1)
UNIT
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
39.1
98.8
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
32.5
ψJB
93.1
RθJC(bot)
26.5
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
4
Copyright © 2018, Texas Instruments Incorporated
INA901-SP
www.ti.com.cn
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
6.5 Electrical Characteristics
VS = 2.7 V and 16 V, VCM = –15 V, 12 V and 80 V, VSENSE = 100 mV, and PRE OUT connected to BUF IN, unless otherwise
noted. TA is as shown in SUBGROUP column.
PARAMETER
TEST CONDITIONS
SUBGROUP(1)
MIN
TYP
MAX
UNIT
INPUT
VSENSE
VCM
Full-scale input voltage
VSENSE = (VIN+) – (VIN–
)
[1, 2, 3]
[1, 2, 3]
[1]
0.15 (VS – 0.2) / Gain
V
V
Common-mode input range
–16
80
80
120
120
CMRR
VOS
Common-mode rejection ratio
Offset voltage, RTI
VIN+ = –15 V to 80 V
dB
[2, 3]
[1]
70
±0.5
±2.5
±3.5
mV
[2, 3]
dVOS/dT
PSR
2.5
5
μV/°C
μV/V
VOS vs power-supply
[1, 2, 3]
[1]
250
±16
±19
±8
IB
Input bias current, VIN– pin
μA
[2, 3]
PRE OUT output impedance
Buffer input bias current
96
kΩ
–50
nA
Buffer input bias current
temperature coefficient
±0.03
nA/°C
OUTPUT (VSENSE ≥ 20 mV)(2)
G
Gain
20
2
V/V
V/V
GBUF
Output buffer gain
Total gain error
VSENSE = 20 mV to 100 mV
TA = –55°C to 125°C
[4, 5, 6]
±0.2%
50
±1.5%
Total gain error vs temperature
ppm/°C
[4]
±0.75%
±2%
±3%
Total output error(3)
[5, 6]
Nonlinearity error
VSENSE = 20 mV to 100 mV
No sustained oscillation
±0.002%
1.5
RO
Output impedance, pin 5
Maximum capacitive load
Ω
10
nF
VOLTAGE OUTPUT (RL = 10 kΩ to GND)
Swing to V+ power-supply rail
Swing to GND
[1, 2, 3]
[1, 2, 3]
(V+) – 0.05
(V+) – 0.2
V
V
VGND + 0.003
VGND + 0.05
FREQUENCY RESPONSE
BW
Bandwidth
Phase margin
Slew rate
CLOAD = 5 pF
CLOAD < 10 nF
130
40
1
kHz
°
SR
tS
V/μs
VSENSE = 10 mV to 100 mVPP
CLOAD = 5 pF
,
Settling time (1%)
2
μs
(1) For subgroup definitions, please see Quality Conformance Inspection table.
(2) For output behavior when VSENSE < 20 mV, see the Accuracy Variations as a Result of VSENSE and Common-Mode Voltage section.
(3) Total output error includes effects of gain error and VOS
.
Copyright © 2018, Texas Instruments Incorporated
5
INA901-SP
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
www.ti.com.cn
Electrical Characteristics (continued)
VS = 2.7 V and 16 V, VCM = –15 V, 12 V and 80 V, VSENSE = 100 mV, and PRE OUT connected to BUF IN, unless otherwise
noted. TA is as shown in SUBGROUP column.
PARAMETER
TEST CONDITIONS
SUBGROUP(1)
MIN
TYP
MAX
UNIT
nV/√Hz
V
NOISE, RTI(4)
en Voltage noise density
POWER SUPPLY
VS Operating range
40
[1, 2, 3]
[1]
2.7
16
900
700
700
350
350
VOUT = 2 V
[2, 3]
[1]
1200
500
IQ
Quiescent current
μA
VSENSE = 0 mV
[2, 3]
650
(4) RTI means Referred-to-Input.
6.6 Quality Conformance Inspection
MIL-STD-883, Method 5005 - Group A
SUBGROUP
DESCRIPTION
TEMP (°C)
1
2
Static tests at
Static tests at
25
125
–55
25
3
Static tests at
4
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
Setting time at
5
125
–55
25
6
7
8A
8B
9
125
–55
25
10
11
12
13
14
125
–55
25
Setting time at
125
–55
Setting time at
6
Copyright © 2018, Texas Instruments Incorporated
INA901-SP
www.ti.com.cn
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
6.7 Typical Characteristics
At TA = 25°C, VS = 12 V, VCM = 12 V, and VSENSE = 100 mV, unless otherwise noted.
45
40
35
30
25
20
15
10
5
45
40
35
30
25
20
15
10
5
10k
100k
1M
10k
100k
1M
Frequency (Hz)
Frequency (Hz)
CLOAD = 1000 pF
CLOAD = 1000 pF
CLOAD = 0 pF
Figure 1. Gain vs Frequency
Figure 2. Gain vs Frequency
20
18
16
14
12
10
8
140
130
120
110
100
90
CMRR
PSR
80
70
6
60
4
50
2
40
10
0
100
1k
10k
100k
Frequency (Hz)
VSENSE (mV)
VS = 18 V
Figure 3. Gain Plot
Figure 4. Common-Mode and Power-Supply Rejection vs
Frequency
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
0
50
100 150 200
VSENSE (mV)
250 300
350 400 450
500
-8 -4
0
16 20
...
76
80
-16 -12
4
8
12
Common-Mode Voltage (V)
Figure 5. Total Output Error vs VSENSE
Figure 6. Output Error vs Common-Mode Voltage
Copyright © 2018, Texas Instruments Incorporated
7
INA901-SP
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
www.ti.com.cn
Typical Characteristics (continued)
At TA = 25°C, VS = 12 V, VCM = 12 V, and VSENSE = 100 mV, unless otherwise noted.
1000
900
800
700
600
500
400
300
200
100
0
12
11
10
9
VS = 12V
Sourcing Current
+25°C
8
-40°C
+125°C
7
6
VS = 3V
5
Sourcing Current
4
-40°C
+25°C
Output stage is designed
to source current. Current
sinking capability is
3
2
approximately 400mA.
1
+125°C
0
5
10
20
25
0
15
30
1
2
0
3
4
5
6
7
8
9
10
Output Current (mA)
Output Voltage (V)
Figure 7. Positive Output Voltage Swing vs Output Current
Figure 8. Quiescent Current vs Output Voltage
875
34
30
26
22
18
14
10
6
-40°C
+25°C
VSENSE = 100mV:
VS = 12V
VS = 2.7V
775
675
575
475
375
275
175
+125°C
VS = 12V
VSENSE = 0mV:
VS = 2.7V
-8 -4
0
4
20
76
80
-16 -12
8
12 16
...
2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5 17
Supply Voltage (V)
18
VCM (V)
Figure 10. Output Short-Circuit Current vs Supply Voltage
Figure 9. Quiescent Current vs Common-Mode Voltage
200
150
Phase
100
50
Gain
0
-50
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
RPREOUT (kW)
Figure 12. Buffer Gain vs Frequency
Figure 11. PRE OUT Output Resistance Production
Distribution
8
Copyright © 2018, Texas Instruments Incorporated
INA901-SP
www.ti.com.cn
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
Typical Characteristics (continued)
At TA = 25°C, VS = 12 V, VCM = 12 V, and VSENSE = 100 mV, unless otherwise noted.
10ms/div
10ms/div
Figure 13. Small-Signal Step Response
(10-mV to 20-mV Input)
Figure 14. Large-Signal Step Response
(10-mV to 100-mV Input)
Copyright © 2018, Texas Instruments Incorporated
9
INA901-SP
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
www.ti.com.cn
7 Detailed Description
7.1 Overview
The INA901-SP current-shunt monitor with voltage output can sense drops across current shunts at common-
mode voltages from –16 V to 80 V, independent of the supply voltage. The INA901-SP pinouts readily enable
filtering.
The INA901-SP is available with a 20-V/V output voltage scale. The 130-kHz bandwidth simplifies use in current-
control loops.
The INA901-SP operates from a single 2.7-V to 18-V supply, drawing a maximum of 900 μA of supply current.
The devices are specified over the extended operating temperature range of –55°C to 125°C and are offered in
an 8-pin CFP package.
7.2 Functional Block Diagram
PRE OUT
IN+
IN-
BUF IN
V+
A1
A2
OUT
GND
10
Copyright © 2018, Texas Instruments Incorporated
INA901-SP
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ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
7.3 Feature Description
7.3.1 Basic Connection
Figure 15 shows the basic connection of the INA901-SP. Connect the input pins (IN+ and IN–) as closely as
possible to the shunt resistor to minimize any resistance in series with the shunt resistance.
Power-supply bypass capacitors are required for stability. Applications with noisy or high-impedance power
supplies may require additional decoupling capacitors to reject power-supply noise. Place minimum bypass
capacitors of 0.01 μF and 0.1 μF in value close to the supply pins. Although not mandatory, an additional 10-mF
electrolytic capacitor placed in parallel with the other bypass capacitors may be useful in applications with
particularly noisy supplies.
RS
–16 V to +80 V
Supply
Load
Single-Pole Filter
Capacitor
+2.7 V to +18 V
PRE OUT
BUF IN
0.01 mF
0.1 mF
IN+
IN-
V+
5 kW
5 kW
OUT
A1
96 kW
A2
R
L
GND
Figure 15. INA901-SP Basic Connections
7.3.2 Selecting RS
The value chosen for the shunt resistor, RS, depends on the application and is a compromise between small-
signal accuracy and maximum permissible voltage loss in the measurement line. High values of RS provide better
accuracy at lower currents by minimizing the effects of offset, while low values of RS minimize voltage loss in the
supply line. For most applications, best performance is attained with an RS value that provides a full-scale shunt
voltage range of 50 mV to 100 mV. Maximum input voltage for accurate measurements is (VS – 0.2) / Gain.
7.3.3 Transient Protection
The –16-V to 80-V common-mode range of INA901-SP is ideal for withstanding fault conditions ranging from 12-
V battery reversal up to 80-V transients because no additional protective components are needed up to those
levels. In the event that INA901-SP exposed to transients on the inputs in excess of their ratings, external
transient absorption with semiconductor transient absorbers (Zeners or Transzorbs) are necessary.
Copyright © 2018, Texas Instruments Incorporated
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INA901-SP
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
www.ti.com.cn
Feature Description (continued)
Use of MOVs or VDRs is not recommended except when they are used in addition to a semiconductor transient
absorber. Select the transient absorber such that it never allows the INA901-SP to be exposed to transients
greater than 80 V (that is, allow for transient absorber tolerance, as well as additional voltage because of
transient absorber dynamic impedance). Despite the use of internal Zener-type ESD protection, the INA901-SP is
not suited to using external resistors in series with the inputs because the internal gain resistors can vary up to
±30%, but are tightly matched (if gain accuracy is not important, then resistors can be added in series with the
INA901-SP inputs with two equal resistors on each input).
12
Copyright © 2018, Texas Instruments Incorporated
INA901-SP
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ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
7.4 Device Functional Modes
7.4.1 First- or Second-Order Filtering
The output of the INA901-SP is accurate within the output voltage swing range set by the power-supply pin, V+.
The INA901-SP readily enables the inclusion of filtering between the preamp output and buffer input. Single-pole
filtering can be accomplished with a single capacitor because of the 96-kΩ output impedance at PRE OUT on pin
3, as shown in Figure 16a.
The INA901-SP readily lends to second-order Sallen-Key configurations, as shown in Figure 16b. When
designing these configurations consider that the PRE OUT 96-kΩ output impedance exhibits an initial variation of
±30% with the addition of a –2200-ppm/°C temperature coefficient.
RS
Supply
Load
RS
Supply
Load
Second-Order, Sallen-Key Filter Connection
CFILT
CFILT
RS
Single-Pole Filter
Capacitor
+2.7 V to +18 V
V+
+2.7 V to +18 V
BUF IN
V+
PRE OUT
BUF IN
PRE OUT
IN+
IN-
IN+
IN-
5 kW
5 kW
5 kW
5 kW
Output
A1
A2
A1
A2
Output
96 kW
96 kW
RL
RL
GND
GND
a) Single-Pole Filter
b) Second-Order, Sallen-Key Filter
NOTE: Remember to use the appropriate buffer gain = 2 when designing Sallen-Key configurations.
Figure 16. The INA901-SP Can Be Easily Connected for First- or Second-Order Filtering
7.4.2 Accuracy Variations as a Result of VSENSE and Common-Mode Voltage
The accuracy of the INA901-SP current shunt monitors is a function of two main variables: VSENSE (VIN+ – VIN–
)
and common-mode voltage (VCM) relative to the supply voltage, VS. VCM is expressed as (VIN+ + VIN–) / 2;
however, in practice, VCM is used as the voltage at VIN+ because the voltage drop across VSENSE is usually small.
This section addresses the accuracy of these specific operating regions:
Normal Case 1: VSENSE ≥ 20 mV, VCM ≥ VS
Normal Case 2: VSENSE ≥ 20 mV, VCM < VS
Low VSENSE Case 1:
VSENSE < 20 mV, –16 V ≤ VCM < 0
Low VSENSE Case 2:
VSENSE < 20 mV, 0 V ≤ VCM ≤ VS
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INA901-SP
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
www.ti.com.cn
Device Functional Modes (continued)
Low VSENSE Case 3:
VSENSE < 20 mV, VS < VCM ≤ 80 V
7.4.2.1 Normal Case 1: VSENSE ≥ 20 mV, VCM ≥ VS
This region of operation provides the highest accuracy. Here, the input offset voltage is characterized and
measured using a two-step method. First, the gain is determined by Equation 1.
VOUT1 - VOUT2
G =
100mV - 20mV
where
•
•
VOUT1 = Output voltage with VSENSE = 100 mV and
VOUT2 = Output voltage with VSENSE = 20 mV.
(1)
Then the offset voltage is measured at VSENSE = 100 mV and referred to the input (RTI) of the current shunt
monitor, as shown in Equation 2.
VOUT1
VOSRTI (Referred-To-Input) =
- 100mV
G
(2)
In the Typical Characteristics section, the Output Error vs Common-Mode Voltage curve (Figure 6) shows the
highest accuracy for the this region of operation. In this plot, VS = 12 V; for VCM ≥ 12 V, the output error is at its
minimum. This case is also used to create the VSENSE ≥ 20-mV output specifications in the Electrical
Characteristics table.
7.4.2.2 Normal Case 2: VSENSE ≥ 20 mV, VCM < VS
This region of operation has slightly less accuracy than Normal Case 1 as a result of the common-mode
operating area in which the device functions, as illustrated in the Output Error vs Common-Mode Voltage curve
(Figure 6). As noted, for this graph VS = 12 V; for VCM < 12 V, the output error increases when VCM becomes less
than 12 V, with a typical maximum error of 0.005% at the most negative VCM = –16 V.
7.4.2.3 Low VSENSE Case 1: VSENSE < 20 mV, –16 V ≤ VCM < 0; and Low VSENSE Case 3: VSENSE < 20 mV,
VS < VCM ≤ 80 V
Although the INA901-SP is not designed for accurate operation in either of these regions, some applications are
exposed to these conditions. For example, when monitoring power supplies that are switched on and off while VS
is still applied to the INA901-SP, knowing what the behavior of the devices is in these regions is important.
14
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INA901-SP
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ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
Device Functional Modes (continued)
When VSENSE approaches 0 mV, in these VCM regions, the device output accuracy degrades. A larger-than-
normal offset can appear at the current shunt monitor output with a typical maximum value of VOUT = 60 mV for
VSENSE = 0 mV. When VSENSE approaches 20 mV, VOUT returns to the expected output value with accuracy as
specified in the Electrical Characteristics table. Figure 17 shows this effect using the INA901-SP (gain = 20).
0.40
0.36
0.32
0.28
0.24
Actual
0.20
0.16
Ideal
0.12
0.08
0.04
0
0
2
4
6
8
10
12
14
16
18
20
VSENSE (mV)
Figure 17. Example For Low VSENSE Cases 1 and 3 (INA901-SP Gain = 20)
7.4.2.4 Low VSENSE Case 2: VSENSE < 20 mV, 0 V ≤ VCM ≤ VS
This region of operation is the least accurate for the INA901-SP. To achieve the wide input common-mode
voltage range, these devices use two op amp front ends in parallel. One op amp front end operates in the
positive input common-mode voltage range, and the other in the negative input region. For this case, neither of
these two internal amplifiers dominates and overall loop gain is very low. Within this region, VOUT approaches
voltages close to linear operation levels for Normal Case 2.
This deviation from linear operation becomes greatest the closer VSENSE approaches 0 V. Within this region,
when VSENSE approaches 20 mV, device operation is closer to that described by Normal Case 2. Figure 18
shows this behavior for the INA901-SP. The VOUT maximum peak for this case is determined by maintaining a
constant VS, setting VSENSE = 0 mV, and sweeping VCM from 0 V to VS. The exact VCM at which VOUT peaks
during this case varies from device to device. The maximum peak voltage for the INA901-SP is 0.4 V.
0.48
VOUT Limit
0.44
VCM1
0.40
Ideal
0.36
VCM2
0.32
0.28
VCM3
0.24
0.20
VOUT limit at VSENSE = 0 mV,
0.16
0.12
0.08
0.04
0
VCM4
0 ≤ VCM1 ≤ VS
VCM2, VCM3, and VCM4 illustrate the variance
from part to part of the VCM that can cause
maximum VOUT with VSENSE < 20 mV.
0
2
4
6
8
10 12 14 16 18 20 22 24
VSENSE (mV)
Figure 18. Example for Low VSENSE Case 2 (INA901-SP, Gain = 20)
Copyright © 2018, Texas Instruments Incorporated
15
INA901-SP
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
www.ti.com.cn
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The INA901-SP measures the voltage developed across a current-sensing resistor when current passes through
it. There is also a filtering feature to remove unwanted transients and smooth the output voltage.
8.2 Typical Application
RS
–16 V to +80 V
Supply
Load
Single-Pole Filter
Capacitor
+2.7 V to +18 V
PRE OUT
BUF IN
0.01 mF
0.1 mF
IN+
IN-
V+
5 kW
5 kW
OUT
A1
96 kW
A2
R
L
GND
Figure 19. Filtering Configuration
8.2.1 Design Requirements
In this application, the device is configured to measure a triangular periodic current at 10 kHz with filtering. The
average current through the shunt is the information that is desired. This current can be either solenoid current or
inductor current where current is being pulsed through.
Selecting the capacitor size is based on the lowest frequency component to be filtered out. The amount of signal
that is filtered out is dependant on this cutoff frequency. From the cutoff frequency, the attenuation is 20 dB per
decade.
16
Copyright © 2018, Texas Instruments Incorporated
INA901-SP
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ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
Typical Application (continued)
8.2.2 Detailed Design Procedure
Without this filtering capability, an input filter must be used. When series resistance is added to the input, large
errors also come into play because the resistance must be large to create a low cutoff frequency. By using a
10-nF capacitor for the single-pole filter capacitor, the 10-kHz signal is averaged. The cutoff frequency made by
the capacitor is set at 166-Hz frequency. This frequency is well below the periodic frequency and reduces the
ripple on the output and the average current can easily be measured.
8.2.3 Application Curves
Figure 20 shows the output waveform without filtering. The output signal tracks the input signal with a large
ripple. If this current is sampled by an ADC, many samples must be taken to average the current digitally. This
process requires additional time for sampling or operating at a higher sampling rate, which may be undesirable
for the application.
Figure 21 shows the output waveform with filtering. shows the output waveform with filtering. The average value
of the current with a small ripple can now be easily sampled by the converter without the need for digital
averaging.
Figure 20. Without Filtering
Figure 21. With Filtering
Copyright © 2018, Texas Instruments Incorporated
17
INA901-SP
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
www.ti.com.cn
9 Power Supply Recommendations
The input circuitry of the INA901-SP can accurately measure beyond its power-supply voltage, V+. For example,
the V+ power supply can be 5 V, whereas the load power-supply voltage is up to 80 V. The output voltage range
of the OUT terminal, however, is limited by the voltages on the power-supply pin.
18
Copyright © 2018, Texas Instruments Incorporated
INA901-SP
www.ti.com.cn
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
10 Layout
10.1 Layout Guidelines
•
Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique
ensures that only the current-sensing resistor impedance is detected between the input pins. Poor routing of
the current-sensing resistor commonly results in additional resistance present between the input pins. Given
the very low ohmic value of the current resistor, any additional high-current carrying impedance can cause
significant measurement errors.
•
Place the power-supply bypass capacitor as closely as possible to the supply and ground pins. The
recommended value of this bypass capacitor is 0.1 μF. Additional decoupling capacitance can be added to
compensate for noisy or high-impedance power supplies.
10.1.1 RFI and EMI
Attention to good layout practices is always recommended. Keep traces short and, when possible, use a printed
circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible.
Small ceramic capacitors placed directly across amplifier inputs can reduce RFI and EMI sensitivity. PCB layout
must locate the amplifier as far away as possible from RFI sources. Sources can include other components in
the same system as the amplifier itself, such as inductors (particularly switched inductors handling a lot of current
and at high frequencies). RFI can generally be identified as a variation in offset voltage or dc signal levels with
changes in the interfering RF signal. If the amplifier cannot be located away from sources of radiation, shielding
may be needed. Twisting wire input leads makes them more resistant to RF fields.
10.2 Layout Example
Shunt Resistor
IN-
IN+
NC
V+
Supply Bypass
Capacitor
GND
PRE
OUT
Single-Pole Filter
Capacitor
Supply Voltage
Analog Output
BUF IN
OUT
Via to Power or Ground Plane
Via to Internal Layer
Figure 22. Example Layout
版权 © 2018, Texas Instruments Incorporated
19
INA901-SP
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
www.ti.com.cn
11 器件和文档支持
11.1 文档支持
11.1.1 相关文档
请参阅 ti.com.cn 中的 INA901-SP 产品文件夹,获取技术文档和工具与软件的链接。
11.2 接收文档更新通知
要接收文档更新通知,请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册,即可每周接收产
品信息更改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
11.3 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范,
并且不一定反映 TI 的观点;请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中,您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
11.4 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
11.6 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
20
版权 © 2018, Texas Instruments Incorporated
INA901-SP
www.ti.com.cn
ZHCSIX1B –OCTOBER 2018–REVISED DECEMBER 2018
12 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更,恕不另行通知,且
不会对此文档进行修订。如需获取此数据表的浏览器版本,请查阅左侧的导航栏。
版权 © 2018, Texas Instruments Incorporated
21
PACKAGE OPTION ADDENDUM
www.ti.com
15-Jul-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
5962-1821001VXC
5962L1821001VXC
INA901HKX/EM
ACTIVE
CFP
CFP
CFP
HKX
8
8
8
1
RoHS & Green
RoHS & Green
RoHS & Green
NIAU
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
25 to 25
1821001VXC
INA901-SP
Samples
Samples
Samples
ACTIVE
ACTIVE
HKX
1
NIAU
NIAU
5962L1821001VXC
INA901-SP
HKX
1
INA901HKX/EM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
15-Jul-2023
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TUBE
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
5962-1821001VXC
5962L1821001VXC
INA901HKX/EM
HKX
HKX
HKX
CFP (HSL)
CFP (HSL)
CFP (HSL)
8
8
8
1
1
1
506.98
506.98
506.98
26.16
26.16
26.16
6220
6220
6220
NA
NA
NA
Pack Materials-Page 1
PACKAGE OUTLINE
HKX0008A
CFP - 2.785 mm max height
S
C
A
L
E
1
.
0
0
0
CERAMIC FLATPACK
B
6X 1.27
2X 3.81
1
4
8
5
6.725
6.225
0.52
8X
0.42
6.735
6.235
A
0.2
C A B
2.785 MAX
0.20
0.12
0.95 MAX
(4.445)
C
4
5
8
1
PIN 1 ID
24 MAX
4223439/C 08/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This package is hermetically sealed with a metal lid.
4. The leads are gold plated.
www.ti.com
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