JM38510/65753BRA [TI]
具有 TTL 兼容型 CMOS 输入和三态输出的军用 8 通道 4.5V 至 5.5V 反相器 | J | 20 | -55 to 125;
| 型号： | JM38510/65753BRA |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有 TTL 兼容型 CMOS 输入和三态输出的军用 8 通道 4.5V 至 5.5V 反相器 | J | 20 | -55 to 125 |
| 文件： | 总6页 (文件大小：87K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54HCT240, SN74HCT240
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS174C – MARCH 1984 – REVISED FEBRUARY 2000
SN54HCT240 . . . J OR W PACKAGE
SN74HCT240 . . . DW, N, OR PW PACKAGE
(TOP VIEW)
Inputs Are TTL-Voltage Compatible
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
High-Current Outputs Drive up to 15 LSTTL
Loads
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
2OE
1Y1
2A4
1Y2
2A3
1Y3
Package Options Include Plastic
Small-Outline (DW), Thin Shrink
Small-Outline (PW), and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J) DIPs
13 2A2
12 1Y4
description
11
2A1
These octal buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. The ’HCT240 devices are organized
as two 4-bit buffers/drivers with separate
output-enable (OE) inputs. When OE is low, the
device passes inverted data from the A inputs to
the Y outputs. When OE is high, the outputs are
in the high-impedance state.
SN54HCT240 . . . FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
4
5
6
7
8
17
16
15
14
The SN54HCT240 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HCT240 is characterized for
operation from –40°C to 85°C.
9 10 11 12 13
FUNCTION TABLE
(each buffer/driver)
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
L
H
Z
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2000, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HCT240, SN74HCT240
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS174C – MARCH 1984 – REVISED FEBRUARY 2000
†
logic symbol
1
19
EN
EN
2OE
1OE
2
4
6
8
18
11
13
15
17
9
7
5
3
1A1
1A2
1A3
1A4
1Y1
1Y2
1Y3
1Y4
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
16
14
12
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1
19
1OE
2OE
18
16
2
9
7
11
13
1Y1
1Y2
1Y3
1Y4
1A1
2Y1
2Y2
2A1
2A2
2A3
2A4
4
1A2
14
12
5
3
6
15
17
1A3
2Y3
2Y4
8
1A4
‡
absolute maximum ratings over operating free-air temperature range
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
CC
Output clamp current, I
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HCT240, SN74HCT240
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS174C – MARCH 1984 – REVISED FEBRUARY 2000
recommended operating conditions (see Note 3)
SN54HCT240
MIN NOM MAX
SN74HCT240
MIN NOM MAX
UNIT
V
V
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
I
High-level input voltage
Low-level input voltage
Input voltage
V
V
= 4.5 V to 5.5 V
= 4.5 V to 5.5 V
CC
0
0.8
0
0.8
V
CC
0
V
V
0
V
V
V
CC
CC
Output voltage
0
0
V
O
CC
CC
t
Input transition (rise and fall) time
Operating free-air temperature
0
500
125
0
500
85
ns
°C
t
T
–55
–40
A
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54HCT240 SN74HCT240
A
PARAMETER
TEST CONDITIONS
V
UNIT
V
CC
MIN
TYP
MAX
MIN
4.4
MAX
MIN
4.4
MAX
I
I
I
I
= –20 µA
= –6 mA
= 20 µA
= 6 mA
4.4 4.499
OH
OH
OL
OL
V
V = V or V
IH
4.5 V
4.5 V
OH
OL
I
IL
IL
3.98
4.3
0.001
0.17
3.7
3.84
0.1
0.26
±100
±0.5
8
0.1
0.4
0.1
0.33
±1000
±5
V
V = V or V
V
I
IH
I
I
I
V = V
I
or 0
5.5 V
5.5 V
5.5 V
±0.1
±1000
±10
nA
µA
µA
I
CC
V
O
= V
or 0,
V = V or V
±0.01
OZ
CC
CC
or 0,
I
IH
IL
V = V
I
I
O
= 0
160
80
CC
One input at 0.5 V or 2.4 V,
Other inputs at 0 or V
†
5.5 V
1.4
3
2.4
10
3
2.9
mA
pF
∆I
CC
CC
4.5 V
to 5.5 V
C
10
10
i
†
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
CC
.
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
13
SN54HCT240 SN74HCT240
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
ns
CC
MIN
MAX
25
MIN
MAX
37
MIN
MAX
32
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
t
t
t
t
A
Y
Y
Y
Y
pd
en
dis
t
12
23
33
29
21
35
53
44
ns
OE
OE
19
32
48
40
19
35
53
44
ns
18
32
48
40
8
12
18
15
ns
7
11
16
14
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HCT240, SN74HCT240
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS174C – MARCH 1984 – REVISED FEBRUARY 2000
switching characteristics over recommended operating free-air temperature range, C = 150 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
20
SN54HCT240 SN74HCT240
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
ns
CC
MIN
MAX
42
MIN
MAX
63
MIN
MAX
53
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
t
pd
t
en
t
t
A
Y
Y
Y
19
38
56
48
25
52
79
65
ns
OE
22
47
71
59
17
42
63
53
ns
14
38
57
48
operating characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
TYP
UNIT
C
Power dissipation capacitance
No load
40
pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HCT240, SN74HCT240
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS174C – MARCH 1984 – REVISED FEBRUARY 2000
PARAMETER MEASUREMENT INFORMATION
V
CC
PARAMETER
R
C
S1
S2
L
L
50 pF
or
150 pF
t
Open
Closed
Closed
Open
S1
S2
PZH
Test
Point
t
t
1 kΩ
1 kΩ
en
R
t
L
PZL
From Output
Under Test
t
t
Open
Closed
Open
PHZ
PLZ
50 pF
C
dis
L
Closed
(see Note A)
50 pF
or
150 pF
t
or t
––
Open
Open
pd
t
LOAD CIRCUIT
Input
3 V
2.7 V
2.7 V
1.3 V
0.3 V
1.3 V
0.3 V
0 V
t
t
r
f
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
3 V
0 V
Output
Control
(Low-Level
Enabling)
3 V
0 V
Input
1.3 V
1.3 V
1.3 V
1.3 V
t
t
PLH
PHL
90%
t
t
PLZ
PZL
V
V
OH
In-Phase
Output
≈ V
Output
Waveform 1
(See Note B)
CC
90%
t
1.3 V
10%
1.3 V
10%
1.3 V
10%
90%
OL
V
OL
t
r
f
f
t
t
t
PHL
90%
PLH
PZH
Out-of-
Phase
Output
V
V
OH
V
OH
Output
Waveform 2
(See Note B)
90%
t
1.3 V
10%
1.3 V
10%
1.3 V
OL
≈ 0 V
t
t
r
PHZ
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES
NOTES: A.
C includes probe and test-fixture capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
are the same as t
are the same as t
.
dis
en
.
pd
PLZ
PZL
PLH
PHZ
PZH
PHL
.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
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BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 2000, Texas Instruments Incorporated
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