L8543SQ [TI]
SMBus/I2C Controlled WLED Driver for Medium-Sized LCD Backlight; 的SMBus / I2C控制的WLED驱动器,用于中型LCD背光型号: | L8543SQ |
厂家: | TEXAS INSTRUMENTS |
描述: | SMBus/I2C Controlled WLED Driver for Medium-Sized LCD Backlight |
文件: | 总36页 (文件大小:650K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LP8543
LP8543 SMBus/I2C Controlled WLED Driver for Medium-Sized LCD Backlight
Literature Number: SNVS604C
November 14, 2011
LP8543
SMBus/I2C Controlled WLED Driver for Medium-Sized LCD
Backlight
General Description
Features
The LP8543 is a white LED driver with integrated boost con-
verter. It has 7 adjustable current sinks which can be con-
trolled by SMBus or I2C-compatible serial interface, PWM
input and Ambient Light Sensor (ALS).
High-voltage DC/DC boost converter with integrated FET
■
■
5.5V to 22V input voltage range to support 2x, 3x and 4x
Li-Ion batteries.
PWM phase shift control with adaptive boost output to
increase efficiency compared to conventional boost
converters topologies
■
The boost converter has adaptive output voltage control
based on the LED driver voltages. This feature minimizes the
power consumption by adjusting the voltage to lowest suffi-
cient level in all conditions. Phase Shift PWM dimming offers
further power saving especially when there is poor matching
in the forward voltages of the LED strings. Boost voltage can
also be controlled through the SMBus/I2C.
PWM brightness control for single wire control and stand-
alone use
■
Digital Ambient light sensor interface with user-
programmed ambient light to backlight brightness curve
■
Easy-to-use EEPROM calibration for current, intensity and
ambient light response setting
■
Internal EEPROM stores the data for backlight brightness and
ambient light sensor calibration. Brightness can be calibrated
during the backlight unit production so that all units produce
the same brightness. EEPROM also stores the coefficients
for the LED control equations and the default LED current
value. LED current has 8–bit adjustment from 0 to 60 mA.
Seven LED drivers with LED fault (short/open) detection
■
■
■
Eight-bit LED current control
Internal thermal protection and backlight safety dimming
feature
Two wire, SMBus/ I2C-compatible control interface
■
■
■
■
The LP8543 has several safety and diagnostic features. Low-
input voltage detection turns the chip off if the system gets
stuck and battery fully discharges. Input voltage detection
threshold is adjustable for different battery configurations.
Thermal regulation reduces backlight brightness above a set
temperature. LED fault detection reports open or LED short
fault. Boost over-current fault detection protects the chip in
case of over-current event.
Low-input voltage detection and shutdown
Minimum number of external components
LLP 24-pin package, 4 x 4 x 0.8 mm
Applications
Medium sized (>10 inches) LCD Display Backlight
■
■
LP8543 is available in the LLP 24-pin package.
LED Lighting
Typical Application
30085870
© 2011 Texas Instruments Incorporated
300858
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Typical Application, Using 7 Outputs for Display1
30085871
Typical Application, Stand-Alone Mode
30085869
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2
Connection Diagrams and Package Mark Information
24–pin Leadless Leadframe Package (LLP)
4.0 x 4.0 x 0.8mm, 0.5 mm pitch
NS Package Number SQA24A
30085872
30085875
Bottom View
Top View
Package Mark
30085896
Package Mark - Top View
U = Fab
Z = Assembly
XY = 2–Digit Date Code
TT = Die Traceability
L8543SQ = Product Identification
Ordering Information
Order Number
Spec/flow
Package Marking
Supplied As
4500 units, Tape-and-Reel
LP8543SQX
HFLF
L8543SQ
3
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Pin Descriptions
Pin #
Name
GND_SW
PWM
Type
Description
1
2
3
G
I
Boost ground
PWM dimming input. This pin must be connected to GND if not used.
Serial interface mode selection: IF_SEL= Low for I2C-compatible interface and
IF_SEL=High for SMBus interface.
IF_SEL
I
4
5
EN
I
I
Enable input pin
ALSI
Ambient light sensor frequency input pin. This pin must be connected to GND if ALS is
not used.
6
ALSO
FAULT
VDDIO
O
OD
P
Ambient light sensor enable output
7
Fault indication output
Digital IO reference voltage 1.65V to 5.5V. Needed in SMBus/I2C and stand alone mode.
8
9
GND_S
SCLK
SDA
G
I
Signal ground
10
11
12
13
14
15
16
17
18
19
20
Serial clock. This pin must be connected to GND if not used.
Serial data. This pin must be connected to GND if not used.
Current sink output
I/O
A
OUT1
OUT2
OUT3
GND_L
OUT4
OUT5
OUT6
OUT7
ADR
A
Current sink output
A
Current sink output
G
A
Ground for current sink outputs
Current sink output
A
Current sink output. Can be left floating if not used.
Current sink output. Can be left floating if not used.
Current sink output. Can be left floating if not used.
A
A
I
Serial interface address selection. See serial interface chapter for details. This pin must
be connected to GND if not used.
21
22
23
24
FB
VLDO
VIN
A
A
P
A
Boost feedback input
LDO output voltage. 470 nF capacitor should be connected to this pin.
Input power supply 5.5V to 22V
Boost switch
SW
A: Analog Pin, G: Ground Pin, P: Power Pin, I: Input Pin, I/O: Input/Output Pin, O: Output Pin, OD: Open Drain Pin
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Operating Ratings (Note 1, Note 2)
Absolute Maximum Ratings (Note 1, Note
2)
Input Voltage Range VIN
VDDIO
5.5 to 22.0V
1.65 to 5V
0 to 40V
−40°C to +125°C
If Military/Aerospace specified devices are required,
please contact the Texas Instruments Sales Office/
Distributors for availability and specifications.
V (OUT1...OUT7, SW, FB)
Junction Temperature (TJ) Range
Ambient Temperature (TA) Range
VIN
-0.3V to +24.0V
-0.3V to +6.0V
-0.3V to +6.0V
(Note 6)
−40°C to +85°C
VDDIO, VLDO
Voltage on Logic Pins (PWM, ADR
EN, IF_SEL, ALSO, ALSI)
Thermal Properties
Junction-to-Ambient Thermal
Resistance (θJA), SQA Package
(Note 7)
Voltage on Logic Pins (SCLK, SDA,
FAULT)
-0.3V to VDDIO
35 - 50°C/W
V (OUT1...OUT7 SW, FB)
Continuous Power Dissipation
-0.3V to +44.0V
Internally Limited
(Note 3)
Junction Temperature (TJ-MAX
)
125°C
-65°C to +150°C
(Note 4)
Storage Temperature Range
Maximum Lead Temperature
(Soldering)
ESD Rating
Human Body Model:
Machine Model:
(Note 5)
2 kV
OUT7: 150V
All other pins : 200V
Electrical Characteristics (Note 2, Note 8)
Limits in standard typeface are for TA = 25°C. Limits in boldface type apply over the full operating ambient temperature range
(−40°C < TA < +85°C). Unless otherwise specified: VIN = 12.0V, VDDIO = 2.8V, CVLDO = 470 nF, L1 = 15 μH, CIN = 10 μF, COUT
4.7 μF. (Note 9)
=
Symbol
Parameter
Condition
Internal LDO disabled
EN=L and PWM=L
Min
Typ
Max
1
Units
Standby supply current
μA
IIN
Normal mode supply current
LDO enabled, boost enabled, no current
going through LED outputs
3.5
mA
fOSC
Internal Oscillator Frequency
Accuracy
-4
-7
4
7
%
VLDO
ILDO
Internal LDO Voltage
4.5
5.0
5.5
V
Internal LDO External Loading
5.0
mA
Boost Converter Electrical Characteristics
Symbol
RDS-ON
VMAX
Parameter
Condition
Min
Typ
Max
Units
Ω
Switch ON resistance
ISW = 0.5A
0.12
38
Boost maximum output voltage
V
400
180
Maximum Continuous Load
Current
VIN ≥ 12V, VOUT = 38V
ILOAD
fSW
mA
VIN = 5.5V, VOUT = 38V
Switching Frequency
BOOST_FREQ_SEL = 0
BOOST_FREQ_SEL = 1
625
1250
kHz
VBOOST = 38V
VBOOST < 38V
VBOOST + 1.6V
VBOOST + 4V
VOV
Over-voltage protection voltage
V
tPULSE
tDELAY
Switch pulse minimum width
Startup delay
no load
50
2
ns
EN_STANDALONE = 1, PWM input
active, EN is set from low to high
ms
5
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Symbol
Parameter
Condition
Min
Typ
Max
Units
tSTARTUP Startup time
(Note 10)
8
ms
IMAX_SEL[1:0] = 00
IMAX_SEL[1:0] = 01
IMAX_SEL[1:0] = 10
IMAX_SEL[1:0] = 11
0.9
1.4
2.0
2.5
IMAX
SW pin current limit
A
LED Driver Electrical Characteristics
Symbol
ILEAKAGE
IMAX
Parameter
Condition
Min
-1
Typ
Max
1
Units
µA
Outputs OUT1 to OUT7 (Voltage on pins
40V)
Leakage current
Maximum Source Current
Outputs OUT1 to OUT7
60
mA
%
Output current accuracy
-3
-4
3
4
IOUT
Output current set to 20 mA
(Note 11)
IMATCH
IMATCH
1.5
Matching OUT1-7 (Note 11)
Matching OUT1-6 (Note 11)
Output current set to 20 mA
Output current set to 20 mA
fPWM_OUT ≤ 4883 Hz
0.8
0.5
10
9
%
%
1.35
PWMRES
PWM output resolution
bit
fPWM_OUT = 9766Hz
fPWM_OUT = 19531Hz
8
PWM_FREQ[2:0] = 000b
Min LED Switching Frequency PSPWM_FREQ[1:0] = 00b,
PWM_MODE = 0
-4%
-7%
4%
7%
229
fLED
Hz
PWM_FREQ[2:0] = 111b,
Max LED Switching Frequency PSPWM_FREQ[1:0] = 11b,
PWM_MODE = 0
-4%
-7%
4%
7%
19531
270
330
Output current set to 20 mA
Saturation voltage (Note 12)
200
300
VSAT
mV
400
540
Output current set to 60 mA
Ambient Light Sensor Interface Characteristics
Symbol
Parameter
ALS Frequency Range
ALS Duty Cycle
Condition
Min
0.2
40
Typ
Max
2000
60
Units
kHz
%
fALS
tCONV
Conversion Time
500
ms
PWM Interface Characteristics
Symbol
Parameter
Condition
Min
Typ
Max
Units
fPWM
PWM Frequency Range
0.1
25
kHz
PWM input low time for turn off, stand-alone
mode, slope disabled
50
tSTBY
tPULSE
Turn Off Delay
ms
ns
PWM Input Pulse Width
200
fPWM_IN < 4.5 kHz
fPWM_IN = 20 kHz
10
8
PWMRES
PWM input resolution
bit
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Under-Voltage Protection
Symbol
Parameter
Condition
UVLO_THR = 1, falling
Min
2.55
2.62
5.11
5.38
Typ
2.70
2.76
5.40
5.70
Max
2.94
3.00
5.68
5.98
Units
UVLO_THR = 1, rising
UVLO_THR = 0, falling
UVLO_THR = 0, rising
VUVLO
UVLO Threshold Voltage
V
Logic Interface Characteristics
Symbol
Logic Input PWM
Parameter
Condition
Min
Typ
Max
0.4
Units
VIL
VIH
II
Input Low Level
V
V
2.2
Input High Level
Input Current
-1.0
1.0
0.4
µA
Logic Input EN
VIL
VIH
II
Input Low Level
Input High Level
Input Current
V
V
1.2
-1.0
1.0
µA
Logic Input SCLK, SDA, ADR, ALSI, IF_SEL
VIL
VIH
II
0.2xVDDIO
1.0
Input Low Level
Input High Level
Input Current
V
V
0.8xVDDIO
-1.0
µA
Logic Outputs SDA, FAULT
VOL
IL
IOUT = 3 mA (pull-up current)
VOUT = 2.8V
0.3
0.3
0.5
1.0
Output Low Level
V
-1.0
Output Leakage Current
µA
Logic Output ALSO
VOL
VOH
IL
IOUT = 3 mA (pull-up current)
IOUT = –3 mA (pull-up current)
VOUT = 2.8V
0.5
1.0
Output Low Level
V
V
VLDO - 0.5V VLDO - 0.3V
Output High Level
-1.0
Output Leakage Current
µA
I2C Serial Bus Timing Parameters (SDA, SCLK) (Note 13)
Limit
Symbol
Parameter
Units
Min
Max
fSCLK
1
Clock Frequency
400
kHz
µs
µs
ns
ns
ns
ns
ns
ns
ns
µs
Hold Time (repeated) START Condition
Clock Low Time
0.6
1.3
2
3
Clock High Time
600
4
Setup Time for a Repeated START Condition
Data Hold Time
600
5
50
6
Data Setup Time
100
7
Rise Time of SDA and SCL
Fall Time of SDA and SCL
20+0.1Cb
15+0.1Cb
600
300
300
8
9
Set-up Time for STOP condition
Bus Free Time between a STOP and a START Condition
10
1.3
Capacitive Load for Each Bus Line
Load of 1 pF corresponds to 1 ns.
Cb
10
200
ns
7
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30085898
SMBus Timing Parameters (SDA, SCLK) (Note 13, Note 14)
Limit
Units
Symbol
Parameter
Min
10
Max
fSCLK
1
Clock Frequency
100
kHz
µs
µs
µs
µs
ns
ns
ns
ns
µs
µs
Hold Time (repeated) START Condition
Clock Low Time
4.0
4.7
4.0
4.7
300
250
2
3
Clock High Time
50
4
Setup Time for a Repeated START Condition
Data Hold Time
5
6
Data Setup Time
7
Rise Time of SDA and SCL
Fall Time of SDA and SCL
1000
300
8
9
Set-up Time for STOP condition
Bus Free Time between a STOP and a START Condition
4.0
4.7
10
Capacitive Load for Each Bus Line
Load of 1 pF corresponds to 1 ns.
Cb
10
200
ns
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation
of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,
see the Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pins.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 150°C (typ.) and disengages at TJ
= 130°C (typ.).
Note 4: For detailed soldering specifications and information, please refer to Texas Instruments AN1187: Leadless Leadframe Package (LLP).
Note 5: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin. MIL-STD-883 3015.7
Note 6: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
Note 7: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,
special care must be paid to thermal dissipation issues in board design.
Note 8: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 9: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
Note 10: Start-up time is measured from the moment boost is activated until the VOUT crosses 90% of its target value.
Note 11: Output Current Accuracy is the difference between the actual value of the output current and programmed value of this current. Matching is the maximum
difference from the average. For the constant current sinks on the part (OUT1 to OUT7), the following are determined: the maximum output current (MAX), the
minimum output current (MIN), and the average output current of all outputs (AVG). Two matching numbers are calculated: (MAX-AVG)/AVG and (AVG-MIN/
AVG). The largest number of the two (worst case) is considered the matching figure. The typical specification provided is the most likely norm of the matching
figure for all parts. Note that some manufacturers have different definitions in use.
Note 12: Saturation voltage is defined as the voltage when the LED current has dropped 10% from the value measured at 2V.
Note 13: Guaranteed by design. VDDIO = 1.65V to 5.5V.
Note 14: The switching characteristics of the LP8543 fully meets or exceeds the published System Management Bus (SMBus) Specification Version 2.0.
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Typical Performance Characteristics
Unless otherwise specified: VBATT = 12.0V, CVLDO = 470 nF, L1 = 15 μH, CIN = 10 μF, COUT = 4.7 μF
LED Drive Efficiency, fLED = 19.5 kHz, PSPWM enabled
Boost Converter Efficiency
30085825
30085819
Boost Maximum Output Current at VBOOST = 38V
Battery Current
30085828
30085827
Boost Converter Typical Waveforms
VBOOST = 38V, IOUT = 50 mA
Boost Line Transient Response
30085830
30085829
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Typical Waveforms in PSPWM Mode, fLED = 4.2 kHz
Typical Waveforms in Normal PWM Mode, fLED = 4.2 kHz
30085831
30085832
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Functional Overview
The LP8543 is a high-voltage LED driver for medium-sized
LCD backlight applications. It includes 38V boost converter,
7 current sink outputs for the backlight and an interface for
digital Ambient Light Sensor (ALS). LP8543 can be controlled
through SMBus or I2C serial interface or PWM input. Light-to-
frequency type ambient light sensor can be directly connected
to LP8543 and the sensor response vs. LED brightness curve
can be programmed in the on-chip EEPROM memory.
3. INDIVIDUALLY CONTROLLED LED STRING FOR
BACKSIDE DISPLAY BACKLIGHT
OUT7 string can be either used for main backlight or for
possible back side sub display. Separate control allows
dimming through I2C interface and reduces extra
components or ICs in display module.
4. LED FAULT DETECTION
LED fault detection enables higher yield in display
manufacturing process and also makes possible to
monitor backlight faults during normal operation. Fault
test detects both open circuit (string with unconnected or
open circuit LED) and short circuit of 2 or more shorted
LEDs. Single LED short can also be detected if the
amount of LEDs per string and/or the VF variation are
sufficiently low. Threshold levels are EEPROM
programmable. Fault information is available in the
status register and in the open drain active low FAULT
output.
LP8543 differs from conventional LED drivers due to fol-
lowing advanced features.
1. PHASE SHIFT PWM FEATURE
LP8543 supports a state-of-the-art feature called Phase
Shift PWM (PSPWM). Key advantages of the PSPWM is
improved power efficiency when there is variation in the
forward voltages amongst the LED strings. Due to an
unmatched LED VF there is a random difference in each
string forward voltage. PSPWM optimizes the boost
converter output voltage by turning off LED outputs
periodically. The lower the brightness, the more strings
can be simultaneously off. When the strings with higher
forward voltages are turned off, the boost voltage is
automatically lowered thereby improving efficiency. The
second benefit of PSPWM control is that it will make the
boost and battery loading more constant. In other words,
the peak current needed from the battery is greatly
reduced beause not all LED outputs are simultaneously
on.
5. LED PWM TEMPERATURE REGULATION
This feature will decrease the effect of high temperature
LED lifetime reduction. LP8543 reduces output PWM of
the LEDs at high temperatures and prevents overheating
of the device and LEDs. Temperature threshold can be
programmed to EEPROM.
6. AMBIENT LIGHT SENSOR INTERFACE WITH USER
PROGRAMMABLE CONTROL CURVE
Ambient light sensing reduces power consumption and it
allows natural backlight in any ambient light condition.
Programmability allows display manufacturer and even
end user to control sensor to backlight control loop. By
integrating this feature LP8543 reduces external
component count, wiring and complexity of the design.
LP8543 supports digital light-to-frequency type sensors.
Prescaler and compensation curve can be programmed
in to the EEPROM.
2. PROGRAMMABLE OUTPUT STRINGS
Programmability helps display manufacturers to fit
LP8543 to several sizes of displays. The number of
output strings in use is a parameter in EEPROM and can
be fixed during the manufacturing process of displays.
Based on the configuration the device will automatically
adjust the phase Shift PWM function for a given number
of output strings. LP8543 supports of minimum of 4
strings and a maximum of 7 strings. In this datasheet ,
strings 1 through 6 are classified as Display1, and string
7 is classified as Display2.
11
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cycle of this input signal to calculate the output PWM
value. Input PWM frequency can vary from 100 Hz to 25
kHz. Based on the configuration selected, this external
PWM control can linearly reduce the brightness from the
value set by the Brightness Register. This external PWM
control can also be used as the only control for LP8543.
In this case, when PWM input is permanently low, the
chip is turned off. When there is signal in PWM input, the
chip turns on and adjusts brightness according to PWM
signal duty cycle. In addition, PSPWM can also be used
in this mode.
Brightness Control Methods
1. CURRENT CONTROL
The 8-bit LED current default value is read from
EEPROM when the chip is activated. Current value can
be used for fine tuning the backlight brightness between
panels. This current setting can be overridden by a
register write from the serial interface. Current control
range is from 0 to 60 mA with 0.23 mA step. This fine
grained current control gives backlight manufacturer
possibility to adapt different LED bins in one product and
maintain the full PWM control range. There are separate
controls for both Display1 and Display2.
4. AMBIENT LIGHT SENSING
External ambient light sensor can be used for controlling
the brightness of the LEDs. Light-to- Frequency type light
sensor can be connected to ALSI input in LP8543 for
ambient light compensation. Transfer curve coefficients
for response setting are stored in EEPROM. LP8543 has
an enable output, ALSO to activate the light sensor
(active high/low, programmed to EEPROM). Light sensor
supply voltage can be taken from the 5V regulator in
LP8543. Ambient light control is possible for Display1
(4-7 outputs).
2. INTERNAL PWM CONTROL
The basic brightness control is register based 8-bit PWM
control. There is a piecewise linear transfer curve from
register value to LED PWM value and the curve
coefficients are stored in the EEPROM. This makes
possible to calibrate the 100% brightness and the
dimming behavior. LED PWM frequency is selectable
from 229 Hz to 19.5 kHz. In addition PSPWM can be
used.
3. EXTERNAL PWM CONTROL
An external PWM signal can be used to set the
brightness of the display. LP8543 measures the duty
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Calibration
Energy Efficiency
LP8543 has an internal EEPROM to store different control
parameters which allows calibrating the backlight brightness
at various brightness settings so that every display has ex-
actly the same brightness and several LP8543 circuits can be
used in the same display if needed.
The voltage across the LED drivers is constantly monitored
and boost voltage is adjusted to minimum sufficient voltage
when adaptive boost mode is selected. Inductive boost con-
verter maintains good efficiency over wide input and output
operating voltage ranges. The boost output has over voltage
protection limiting the maximum output to 38V. The boost is
internally compensated and the output voltage can be either
controlled with 5-bit register value or automatically adjusted
based on the LED driver voltages.
Programming the EEPROM is easy. User needs to write the
data in the shadow RAM memory and give the EEPROM write
command. On-chip boost converter produces the needed
erase and program voltages, no external voltages other than
normal input voltage are required.
LP8543 has an internal 5V LDO with low current consump-
tion. The 5V LDO can supply 5 mA current for external devices
like ALS (Ambient Light Sensor). LDO is switched off in stand-
by mode. The internal LDO is used for powering internal
blocks as well; therefore the 470 nF CVLDO capacitor must be
used even if external load is not used.
Calibration in backlight or display production can be done ac-
cording to the flowchart below
Serial Communication
LP8543 supports two serial protocols: SMBus and I2C.
IF_SEL input is used to determine the selection. SMBus in-
terface is selected when IF_SEL is high and I2C is selected
when IF_SEL is low.
30085803
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Block Diagram
30085874
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LED Driver Control
BASIC OPERATION
Principle of the LED driver control is shown in the following
figure:
30085804
Principle of the LED Control Methods
LED CURRENT CONTROL
LP8543 is designed to be flexible to support backlighting
needs for the main display as well as lighting needs of a sub
display (also for e.g. keyboard lighting or status LED) when
required. In addition, a variety of PWM options are supported
to drive the backlight LED strings. Various configurations that
are supported using a set of programmable internal registers
and EEPROM are described below. Both the register map
and the EEPROM memory map are listed at the end of this
datasheet.
Two 8-bit EEPROM registers, Display1 current and Dis-
play2 current (addresses B0H and B1H) hold the default
LED string current for the Display1 and Display2 groups re-
spectively. The default values are read from EEPROM when
the chip is activated. When required the LED current can be
adjusted also in the registers Display1 and Display2 cur-
rent (addresses 05H and 06H). Use of this register is enabled
by setting bit 1 in Config2 register. Default value for <CUR-
RENT SEL> bit is 0, which means that current values in
EEPROM are used. Current control range is linear from 0 to
60 A with 0.23 mA step. Factory default current for Display1
and Display2 is 20 mA.
OUTPUT GROUPING
LP8543 features a total of 7 strings (OUT1-OUT7), which can
be arranged into 2 groups (Display1 and Display2). Display1
refers to backlighting for main display and Display2 refers to
lighting for a sub display. Number of outputs used for Display1
can be defined using EEPROM register bits, as shown in the
table below. LP8543 supports a minimum of 4 strings and a
maximum of 7 strings for Display1. Outputs must be used in
order starting from OUT1. Unused outputs can be left open.
When needed OUT7 can be configured for Display2 and it has
its own current and PWM control registers for independent
control. EEPROM default factory setting is 6 outputs for Dis-
play1 and OUT7 for Display2.
LED ON/OFF CONTROL
LED strings can be activated with 100% PWM by writing
<DRV[7:0]> bits high. All these controls are in Direct con-
trol register.
PWM CONTROL SELECTION
PWM control of the LED strings can be established through
4 combinations of user configurable options as shown in the
table below. <PM_MD> and <PWM_SEL> bits are part of
Config1 Register.
TABLE 1. Output Configurations
Default setting is external PWM input signal. Each of the op-
tion is explained in the following sections.
OUTPUT_CONF[1:0]
Outputs for
Display1
Outputs for
Display2
00
01
10
11
OUT1-OUT4
OUT1-OUT5
OUT1-OUT6
OUT1-OUT7
OUT7
OUT7
OUT7
-
15
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TABLE 2. PWM Control Selection
PWM_MD PWM_SEL
PWM source
1
1
PWM input (Direct control)
PWM input pin (Duty cycle
based), default
0
1
1
0
Brightness register
PWM input pin (Duty cycle
0
0
based) and Brightness register
In addition Ambient light sensor (when used) and on-chip
temperature regulation also influence the output PWM con-
trol. This is described later.
A. Direct PWM Input Control
Display1 group can be directly controlled with external PWM
signal (bypassing all the PWM logic) by setting <PWM_MD>
and <PWM_SEL> bits high. Outputs will be active when the
PWM input pin is high, and when the input is low the outputs
will be off. Input PWM frequency can vary from 100 Hz to 25
kHz. Display2 is not controlled with this signal.
30085821
Three-Segment Transfer Curve Example
D. PWM Pin and Register Control
Note: In this mode, Ambient Light sensor and PSPWM
scheme do not influence the output PWM.
In this mode, PWM control pin can linearly reduce the bright-
ness of Display1 from the value set by the Brightness Register
and Ambient Light sensor. Same controls can be used as in
brightness register based PWM control. Output PWM fre-
quency is set by EEPROM registers. This mode is compatible
with Intel DPST (Display Power Saving Technology).
B. PWM Input Pin Control (Duty Cycle-based)
An external PWM signal can be used to set the brightness of
the Display1 group. LP8543 measures the duty cycle of this
input signal to calculate the output PWM value. Input PWM
frequency can vary from 100 Hz to 25 kHz. Output PWM fre-
quency is set by EEPROM registers.
STAND ALONE MODE
Note: In this mode, Ambient Light compensation and PSPWM
scheme can be also used.
LP8543 can be set to operate in stand alone mode, where
LP8543 operates without I2C / SMBus and EN and PWM input
pins are the only controls for the device. To enable stand-
alone mode, EEPROM bit <EN_STANDALONE> must be set
to 1 in register B4h. In this mode PWM pin sets the brightness
and with EN pin the backlight can be turned on. When PWM
or EN input pin is permanently low, the chip is turned off. Turn
off time is typically 50 ms. When there is signal in PWM input
and EN is high, the chip turns on and adjusts brightness ac-
cording to PWM signal duty cycle. All settings needed for
operation like LED current, number of LEDs etc. are obtained
from EEPROM. If only one signal control is needed, the EN
and PWM pin can be tied together and PWM signal can be
connected to this. Stand alone mode is useful in applications
where I2C or SMBus control is not possible or available to use.
C. PWM Control Using Brightness Register
Generation of PWM for LED strings can be based on Bright-
ness register value. For Display1 group, this scheme is en-
abled when <PWM_SEL> bit is set to 0 and <PWM_MD> is
set to 1. Display2 group has the brightness register control
enabled by default. Two separate 8-bit registers Displ1
brightness and Displ2 brightness store the brightness val-
ues for Display1 and Display2 respectively. For Display1, this
8-bit brightness value from the register is converted to 10-bit
LED PWM value using a three-part piecewise linear transfer
curve as shown below. This makes it possible to calibrate the
100% brightness and the dimming behavior. The curve coef-
ficients are stored in the EEPROM and are user pro-
grammable if needed. The LED PWM frequency is set by
EEPROM register.
AMBIENT LIGHT COMPENSATION
LP8543 supports an external ambient light sensor to control
the backlight brightness (Display1) and its usage is controlled
with two bits in the Config2 register, namely <ALSO_EN>
and <ALSO_CALC_EN>. <ALSO_EN> bit controls enabling/
disabling of the sensor itself, and <ALSO_CALC_EN> bit de-
termines whether the ALS measurement data will be used by
an external processor (Host) or by LP8543’s internal control
logic to control the brightness.
Note: In this mode, Ambient Light compensation and PSPWM
scheme can be also used.
If <ALSO_EN> bit is 1 the ALSO output pin is set high and the
input frequency measuring is enabled. Frequency is mea-
sured for 500 ms, and the result is divided with 10-bit
prescaler (defined in EEPROM), resulting in a 10-bit value.
This 10-bit result can be read from ALS MSB and ALS LSB
registers. ALS MSB register must be read first followed by
ALS LSB register. If ALS_CALC_EN bit is set to 0, then the
measurement data is not used by LP8543’s internal PWM
logic but left for the host to adjust the brightness.
On the other hand if the ALS_CALC_EN bit is set to 1, ALS
measurement result will control backlight brightness in all but
direct external PWM control mode. The measured ALS value
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16
is converted to PWM value using a three segment linear
curve. The calculated PWM value is used as a multiplier for
the LED PWM value obtained from brightness register, PWM
input pin or combination of both depending which mode is
selected. The conversion curve parameters are stored in
EEPROM memory. Conversion curve is similar as in PWM
control.
Phase shift frequency can either be the same as the PWM
frequency or a lower frequency can be selected with
<PHASE_SHIFT_FREQ[1:0]> EEPROM bits. At highest 19.5
kHz PSPWM frequency, the boost will use a constant voltage
based on the highest VF string because of timing constraints
of the high PWM frequency. PSPWM is enabled by default,
but it can be disabled by setting <DISABLE_PS> EEPROM
bit to 1.
Smoothing filter is used to prevent rapid changes. Smoothing
filter has EEPROM programmable slopes from 0 to 2s. The
slope defines the time it takes to change brightness from one
value to next. Slope control can be also used to smooth
changes to backlight brightness caused by other PWM con-
trols (brightness register or external PWM input).
Two PSPWM modes are available. PSPWM mode is selected
with <PWM_MODE> EEPROM bit. Difference between
modes is in the PWM frequencies available. PWM and PSP-
WM frequency settings are shown in Table 4.
Number of strings simultaneously on in PSPWM mode with
different PWM values and different output configurations is
shown in the following diagram.
TABLE 3. Slope Selections
SLOPE_SEL[1:0]
Slope
130 ms
0.5s
00
01
10
11
1.0s
2s
ALSO output can be used as GPO if not used for ALS control.
ALSO pin state is then controlled with <ALSO_EN> register
bit.
PHASE SHIFT PWM (PSPWM)
PSPWM improves the system efficiency by optimizing the
boost converter voltage on a cycle by cycle basis instead of
maintaining a constant voltage based on the highest VF string.
PSPWM scheme can be used for Display1 group. Phase shift
PWM control principle is illustrated in the picture below using
an example of 6 string implementation and 41.7% brightness
setting. In a 6-string implementation, each of the string sup-
ports a maximum of 16.67% (1/6) of the total backlight bright-
ness. The brightness set value in this example is 41.7%.
Hence two strings are fully on (2 x 16.67% = 33.33%) and one
string is 50% on (0.5 x 16.67% = 8.34%). This pattern of two
100% and one 50% strings is then cycled through all 6 output
strings. After 6 cycles the brightness value is changed to
83.33%, resulting in 5 LEDs fully on (5 x 16.67%).
30085806
Number of Simultaneously Active Strings
30085805
Principle of the PSPWM Operation
17
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TABLE 4. PSPWM Frequency Selection in EEPROM Registers (N = number of strings used)
PWM_MODE = 0 PWM_MODE = 1
PWM Frequency Shift Frequency Output Frequency Output Frequency Shift Frequency
PWM_FREQ[2:0] +
PSPWM_FREQ[1:0]
(Hz)
(Hz)
(Hz)
(Hz)
(Hz)
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
992
992
992/N
229
229 x N
992
496
496/N
305
305 x N
992
248
248/N
381
381 x N
992
124
124/N
458
458 x N
1526
1526
1526
1526
1983
1983
1983
1983
2441
2441
2441
2441
2974
2974
2974
2974
3965
3965
3965
3965
4883
4883
4883
4883
19531
19531
19531
19531
1526
763
1526/N
763/N
534
534 x N
610
610 x N
382
382/N
687
687 x N
191
191/N
763
763 x N
1983
993
1983/N
993/N
839
839 x N
916
916 x N
496
496/N
992
992 x N
248
248/N
1068
1144
1221
1297
1373
1450
1526
1602
1678
1755
1831
1908
1983
2060
2671
3203
3737
4270
4808
9766
19531
1068 x N
1144 x N
1221 x N
1297 x N
1373 x N
1450 x N
1526 x N
1602 x N
1678 x N
1755 x N
1831 x N
1908 x N
1983 x N
2060 x N
2671 x N
3203 x N
3737 x N
4270 x N
4808 x N
9766 x N
19531 x N
2441
1221
610
2441/N
1221/N
610/N
305
305/N
2974
1487
744
2974/N
1487/N
744/N
372
372/N
3965
1983
991
3965/N
1983/N
991/N
496
496/N
4883
2441
1221
610
4883/N
2441/N
1221/N
610/N
19531
9766
4883
2441
19531/N
9766/N
4883/N
2441/N
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18
TABLE 5. PWM Frequencies with Phase Shift Disabled
PWM_MODE = 0
PWM_MODE = 1
PWM_FREQ[2:0] +
PSPWM_FREQ[1:0]
PWM Frequency (Hz)
Output Frequency (Hz)
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
992
992
229
305
992
381
992
458
1526
1526
1526
1526
1983
1983
1983
1983
2441
2441
2441
2441
2974
2974
2974
2974
3965
3965
3965
3965
4883
4883
4883
4883
19531
19531
19531
19531
534
610
687
763
839
916
992
1068
1144
1221
1297
1373
1450
1526
1602
1678
1755
1831
1908
1983
2060
2671
3203
3737
4270
4808
9766
19531
19
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Device Thermal Regulation
LP8543 has an internal temperature sensor which can be
used to measure the junction temperature of the device and
protect the device from overheating. During thermal regula-
tion, LED PWM is reduced by 4% of full scale per °C whenever
the temperature threshold is reached. I.e., with 100% PWM
value the PWM goes to 0% 25°C above threshold tempera-
ture. With lower PWM start value 0% is reached earlier.
Temperature regulation is enabled automatically when the
chip is enabled. 11-bit temperature value can be read from
Temp MSB and Temp LSB registers, MSB should be read
first. Temperature limit can be programmed in EEPROM as
shown in the following table.
TABLE 6. Over Temperature Limit Settings
TEMP_LIM[1:0]
Over Temperature Limit (ºC)
00
01
10
11
100
110
120
130
30085823
Internal Temperature Sensor Readings
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20
BBh) have only NVM and SRAM. Other EEPROM cells have
also EEPROM registers. For the cells which have also EEP-
ROM registers, the changes made to SRAM does not take
effect until update command is sent. This is done by setting
EE_UPDATE and EE_READ bits to 1. After an update, these
bits must be set back to 0. For EEPROM bits which do not
have registers, changes take effect immediately.
EEPROM
EEPROM memory stores various parameters for chip control.
The 256 bit EEPROM memory is organized as 32 x 8 bits. The
EEPROM structure consists of a SRAM front end and the
Non-volatile memory (NVM). SRAM data can be read and
written through the serial interface. To erase and write NVM,
separate commands need to be sent. Erase and Write volt-
ages are generated on-chip, no other voltages than normal
input voltage are required. A complete EEPROM memory
map is shown in the chapter LP8543 EEPROM Memory Map.
At startup the values in NVM part of the EEPROM is loaded
to SRAM and to EEPROM registers. User can also load val-
ues from NVM to SRAM and EEPROM registers by writing
EE_READ to 1.
EEPROM structure is described in the figure below. User has
read and write access to SRAM part of the EEPROM directly
through I2C / SMBus when PWM calculation is not enabled;
i.e., <BL_CTL> = 0 and external PWM pin = low. To see
whether the EEPROM can be accessed user can read
<EE_READY> bit. ALS and brightness coefficient curves (ad-
dress A0h – Afh) and empty EEPROM cells (address B4h –
To write SRAM values to NVM user needs to first erase EEP-
ROM and the program it. This is done by first writing
EE_ERASE to 1 and then 0. At this point NVM is erased. To
burn new values to NVM, user needs to write EE_PROG to 1
and then 0. The LP8543 generates the needed erase and
write voltage from boost output voltage.
30085839
EEPROM Memory Control and Usage Principle
21
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automatically based on LED driver saturation. In adaptive
mode the boost output voltage control steps are 0.25V. En-
abling the adaptive mode is done with <BOOST_AUTO> bit
in Boost Control register. If boost is started with adaptive
mode enabled (default) then the initial voltage value is defined
with EEPROM bits at address 29H in order to eliminate long
iteration time when the chip is started. If adaptive mode is
enabled after boost startup, then the boost will use register
07H values as initial voltage value. The output voltage control
changes the resistor divider in the feedback loop. The follow-
ing figure shows the boost topology with the protection cir-
cuitry.
Boost Converter
OPERATION
The LP8543 boost DC/DC converter generates a 10…38V
supply voltage for the LEDs from 5.5…22V input voltage. The
output voltage is controlled with a 5-bit register in 1V steps.
The converter is a magnetic switching PWM mode DC/DC
converter with a current limit. The topology of the magnetic
boost converter is called CPM (current programmed mode)
control, where the inductor current is measured and con-
trolled with the feedback. Switching frequency is selectable
between 625 kHz and 1.25 MHz with EEPROM bit
<BOOST_FREQ>. Boost is enabled with <EN_BOOST> bit.
User can program the output voltage of the boost converter
or use adaptive mode where boost output voltage is adjusted
30085840
PROTECTION
TABLE 7. Boost Output Voltage Controls
Four different protection schemes are implemented:
VPROG[4:0]
Voltage (typical)
1. Over-voltage protection limit changes dynamically based
on output voltage setting
Bin
Dec
Volts
10
11
12
13
14
...
00000
00001
00010
00011
00100
...
0
1
Over-voltage protection limit changes dynamically
based on output voltage setting.
—
2
Keeps the output below breakdown voltage.
—
—
Prevents boost operation if battery voltage is much
higher than desired output.
3
4
2. SW current limiting, limits the maximum inductor current.
...
27
28
3. Over-current protection enables fault flag and shuts
down boost converter in over-current condition.
11011
11100
37
38
4. Duty cycle limiting.
ADAPTIVE BOOST CONTROL
MANUAL OUTPUT VOLTAGE CONTROL
Adaptive boost control function adjusts the boost voltage to
the minimum sufficient voltage for proper LED driver opera-
tion. When PSPWM is used the output voltage can be adjust-
ed for every phase shift step separately except in 19.5 kHz
PSPWM mode due to timing constraints. To enable PSPWM
to each phase, the <BOOST_MODE> EEPROM bit must be
0. This enables power saving when strings have mismatch in
VF voltages. The correct voltage for each string is stored and
used in predicting when the boost has to start increasing volt-
age for the next step. The boost setup time can be defined
with two EEPROM bits. Principle of the boost voltage adjust-
ment with PSPWM is illustrated below. If higher PWM value
is used then more strings are on at the same time, and voltage
is adjusted based on highest VF on simultaneously active
strings.
User can control the boost output voltage with Boost_out-
put (07H) register when adaptive mode is disabled; i.e.,
<BOOST_AUTO> = 0.
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22
30085842
Normal Operation, High PWM Value
If one LED driver voltage is below Low, boost voltage will be
increased. This is seen in the following figure.
30085841
Boost Adaptive Voltage Control for 5–String PSPWM
When adaptive boost mode is selected the voltages across
the LED drivers are constantly monitored. There are three
voltage thresholds used, Low, Mid and High. Low and High
thresholds are adjustable with 3 EEPROM bits. Low threshold
range is from 0.5V to 2.25V and High threshold range is from
3 to 10V. Mid threshold is set 0.5V above Low threshold.
Threshold levels are listed in the table below. Adjustability is
provided to enable adaptation to different conditions. If there
is a lot of variation between LED string VF, then higher thresh-
old levels must be used to avoid false fault indications. If there
is low variation between LED string VF, then lower thresholds
are recommended to maintain good efficiency. Fault detec-
tion chapter describes how these thresholds are used also for
fault detection.
30085843
Boost voltage too Low
TABLE 8. LED Voltage Comparator Thresholds
If all driver voltages are above Mid threshold (or any of the
voltages in PSPWM adaptation mode and with low PWM val-
ue), boost voltage will be lowered. Decision is always based
on number of strings active at the same time. In the illustra-
tions 6 outputs are active, which basically means close to
100% PWM value with PSPWM.
EEPROM bits
Threshold (V)
LED_FAULT_THR[5:3]
(HIGH comparator)
DRV_HEADR_CTRL[2:0]
(LOW comparator)
Low
High
Mid
000
001
010
011
100
101
110
111
0.50
0.75
1.00
1.25
1.50
1.75
2.00
2.25
3
4
5
6
Low + 0.5V
7
8
9
10
If only one string is on at a time (Brightness value lower than
100% divided by number of strings) the voltage for each string
is adjusted so that the voltage across the driver will fall be-
tween Low and Mid threshold. If more strings are on at the
same time (high PWM value, or PSPWM not used) the situ-
ation looks like in the following diagram. In this diagram 6
outputs are on at the same time. In normal operation voltages
across all LED driver outputs are between high and low
threshold.
30085844
Boost voltage too High
23
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Fault Detection
LP8543 has fault detection for LED fault, low-battery voltage,
overcurrent and thermal shutdown. The open drain output pin
(FAULT) can be used to indicate occurred fault. The cause
for the fault can be read from status register. Refreshing the
<BL_CTL> bit high will reset the fault register and fault pin
state.
LED FAULT DETECTION
There are two methods of detecting the LED fault. First
method is based on measuring the voltage on LED driver pins
(analog fault detection) and another is based on adaptive
boost voltage hopping between strings (digital fault detec-
tion). The used fault detection mode is selected in EEPROM
as well as the threshold levels. <FAULT_SEL[1:0]> bits se-
lects the used mode as follows:
30085845
Open Fault
TABLE 9. LED Fault Mode Selection
If one or more LEDs are shorted, this causes the voltage to
rise in this LED driver output pin above the high threshold.
This causes short fault detection as seen in the following fig-
ure:
FAULT_SEL[1:0]
Fault mode
No fault detection
00
Analog fault detection based on
LED driver voltage
01
10
11
Digital fault detection based on
boost voltage hopping
Both analog and digital fault
detection
Two fault detection methods are used to detect faults in dif-
ferent conditions. Analog detection works better with high
PWM values (in PSPWM mode) where many strings are ac-
tive at a same time. It does not work when only one string is
active at a time, because it is based on comparing driver volt-
ages on strings active simultaneously. Digital fault detection
is used to complement this case.
Digital fault detection works better with low PWM values,
where not all strings are on at the same time. Digital short
detection works only with cases where one string is active at
the same time.
30085846
Short Fault
DIGITAL FAULT DETECTION
With digital fault detection the voltage hopping between LED
strings is monitored in PSPWM mode. In normal PWM mode
or with high PWM values with PSPWM mode this does not
apply.
ANALOG FAULT DETECTION
When analog fault detection mode is selected, the voltages
across the LED drivers are constantly monitored. The same
threshold levels (Low, Mid and High) are used for fault detec-
tion to adjust the boost voltage.
If there’s open in one of the LED strings, the LED driver output
pin will drop to 0V. When this happens the boost will try to
increase the voltage to get enough headroom for the driver.
When the voltage for one string reaches maximum voltage
(38V) and the difference between consecutive LED strings is
higher than set threshold level an open LED fault is detected.
If all voltages are close to 38V then the threshold condition is
not met and no fault is detected. If the LED output is shorted
to GND it will be detected same way. Open fault detection is
seen in the following figure:
If one of the LED strings has an open fault (LED driver output
pin has no contact to LED string), the output pin voltage drops
to 0V. When this happens the boost voltage will be adjusted
higher to get enough headroom, but at some point the voltage
for all other strings will rise over the high threshold. In this
case the LP8543 detects open fault, and adjusts the boost
voltage based on other LED strings needs, i.e., the faulty LED
string voltage is not used anymore for adjusting boost output
voltage. If the LED driver output pin is shorted to GND the
fault detection works exactly the same. This situation with 6
LEDs active at the same time is illustrated in the following
diagram:
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24
fault does not cause the FAULT pin to be pulled down uless
chip is reset by setting EN pin low and high again. The faults
will be seen in the register however. If LED fault is detected,
the string which created the fault is no longer used for adjust-
ing the boost voltage. Otherwise the LP8543 operates as
normally.
Note: Due to the nature of fault detection it is possible to gen-
erate false faults during startup etc. conditions. Therefore
when fault is detected it is recommended to read the fault/
status register twice to make sure that the first fault is real. If
the second reading gives the same result then the fault is real.
30085847
UNDER-VOLTAGE DETECTION
Digital Open Fault Detection
LP8543 has detection for too low VIN voltage. Threshold level
for the voltage is set with EEPROM register bits as seen in
the following table:
If there is one or more LEDs shorted in one string, the boost
will drop the voltage for this string. When the difference be-
tween consecutive LED strings is higher than set threshold
level a short LED fault is detected. This is described in the
following figure:
TABLE 11. Under-Voltage Detection Thresholds
UVLO_THR
Threshold (V)
0
1
6
3
Under voltage detection is always on. When under voltage is
detected the LED outputs and boost will shutdown, Fault pin
will be pulled down (open drain output) and corresponding
fault bit is set in status register. Fault can be reset by reading
the status register. LEDs and boost will start again when the
voltage has increased above the threshold level. Hysteresis
is implemented to threshold level to avoid continuous trigger-
ing of fault when threshold is reached.
30085848
Digital Short Fault Detection
Note: Due to the nature of fault detection it is possible to gen-
erate false faults during startup etc. conditions. Therefore
when fault is detected it is recommended to read the fault/
status register twice to make sure that the first fault is real. If
the second reading gives the same result then the fault is real.
Threshold level is programmed to EEPROM as shown in the
following table. Threshold level adjustability is provided to al-
low adaptation to different LED VF used in the application.
TABLE 10. Digital LED Fault Detection Thresholds
OVER-CURRENT DETECTION
DIG_COMP[1:0]
Threshold Voltage (V)
LP8543 has detection for too high loading on the boost con-
verter. When over current fault is detected the LP8543 will
shut down and set the fault flag.
00
01
10
11
3
5
7
9
THERMAL SHUTDOWN
If the LP8543 reaches thermal shutdown temperature
(150°C) the LED outputs and boost will shut down to protect
it from damage. Also the fault pin will be pulled down to indi-
cate the fault state. Device will activate again when temper-
ature drops below 130°C.
When Fault is detected the FAULT pin will be pulled down
(open drain output), and corresponding status register bit is
set. To clear the fault user must read the status register.
Note: LED fault output signal is generated only once for cer-
tain fault type. If, for example, open fault occurs, new open
25
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SMBus/I2C Compatible Serial Bus
Interface
INTERFACE BUS OVERVIEW
The SMBus/I2C-compatible synchronous serial interface pro-
vides access to the programmable functions and registers on
the device. This protocol uses a two-wire interface for bidi-
rectional communications between the IC's connected to the
bus. The two interface lines are the Serial Data Line (SDA),
and the Serial Clock Line (SCL / SCLK). These lines should
be connected to a positive supply, via a pull-up resistor and
remain HIGH even when the bus is idle.
Every device on the bus is assigned a unique address and
acts as either a Master or a Slave depending on whether it
generates or receives the serial clock (SCLK). LP8543 is al-
ways a slave device.
30085820
DATA TRANSACTIONS
Start and Stop
One data bit is transferred during each clock pulse. Data is
sampled during the high state of the serial clock (SCL). Con-
sequently, throughout the clock’s high period, the data should
remain stable. Any changes on the SDA line during the high
state of the SCLK and in the middle of a transaction, aborts
the current transaction. New data should be sent during the
low SCLK state. This protocol permits a single data line to
transfer both command/control information and data using the
synchronous serial clock.
The Master device on the bus always generates the Start and
Stop Conditions (control codes). After a Start Condition is
generated, the bus is considered busy and it retains this sta-
tus until a certain time after a Stop Condition is generated. A
high-to-low transition of the data line (SDA) while the clock
(SCLK) is high indicates a Start Condition. A low-to-high tran-
sition of the SDA line while the SCLK is high indicates a Stop
Condition.
30085849
Bit Transfer
30085850
Each data transaction is composed of a Start Condition, a
number of byte transfers (set by the software) and a Stop
Condition to terminate the transaction. Every byte written to
the SDA bus must be 8 bits long and is transferred with the
most significant bit first. After each byte, an Acknowledge sig-
nal must follow. The following sections provide further details
of this process.
Start and Stop Conditions
In addition to the first Start Condition, a repeated Start Con-
dition can be generated in the middle of a transaction. This
allows another device to be accessed, or a register read cycle.
ACKNOWLEDGE CYCLE
The Acknowledge Cycle consists of two signals: the acknowl-
edge clock pulse the master sends with each byte transferred,
and the acknowledge signal sent by the receiving device.
The master generates the acknowledge clock pulse on the
ninth clock pulse of the byte transfer. The transmitter releases
the SDA line (permits it to go high) to allow the receiver to
send the acknowledge signal. The receiver must pull down
the SDA line during the acknowledge clock pulse and ensure
that SDA remains low during the high period of the clock
pulse, thus signaling the correct reception of the last data byte
and its readiness to receive the next byte.
“ACKNOWLEDGE AFTER EVERY BYTE” RULE
The master generates an acknowledge clock pulse after each
byte transfer. The receiver sends an acknowledge signal after
every byte received.
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26
There is one exception to the “acknowledge after every byte”
rule. When the master is the receiver, it must indicate to the
transmitter an end of data by not-acknowledging (“negative
acknowledge”) the last byte clocked out of the slave. This
“negative acknowledge” still includes the acknowledge clock
pulse (generated by the master), but the SDA line is not pulled
down.
Control Register Read Cycle
•
•
Master device generates a start condition.
Master device sends slave address (7 bits) and the data
direction bit (r/w = 0).
•
Slave device sends acknowledge signal if the slave
address is correct.
•
•
•
•
Master sends control register address (8 bits).
Slave sends acknowledge signal.
Master device generates repeated start condition.
Master sends the slave address (7 bits) and the data
direction bit (r/w = 1).
ADDRESSING TRANSFER FORMATS
Each device on the bus has a unique slave address. The
LP8543 operates as a slave device with the 7-bit address
combined with data direction bit. Slave address is pin-se-
lectable as follows:
•
Slave sends acknowledge signal if the slave address is
correct.
TABLE 12. Address Selection
•
•
Slave sends data byte from addressed register.
Slave Address
Write (8 bits)
Slave Address Read
(8 bits)
If the master device sends acknowledge signal, the control
register address will be incremented by one. Slave device
sends data byte from addressed register.
ADR
0
1
01011000 (58H)
01011010 (5AH)
01011001 (59H)
01011011 (5BH)
•
Read cycle ends when the master does not generate
acknowledge signal after data byte and generates stop
condition.
Before any data is transmitted, the master transmits the ad-
dress of the slave being addressed. The slave device should
send an acknowledge signal on the SDA line, once it recog-
nizes its address.
TABLE 13. Data Read and Write Cycles
Address Mode
The slave address is the first seven bits after a Start Condi-
tion. The direction of the data transfer (R/W) depends on the
bit sent after the slave address — the eighth bit.
<Start Condition>
<Slave Address><r/w = 0>[Ack]
<Register Addr.>[Ack]
When the slave address is sent, each device in the system
compares this slave address with its own. If there is a match,
the device considers itself addressed and sends an acknowl-
edge signal. Depending upon the state of the R/W bit (1:read,
0:write), the device acts as a transmitter or a receiver.
<Repeated Start Condition>
Data Read
<Slave Address><r/w = 1>[Ack]
[Register Data]<Ack or NAck>
… additional reads from subsequent
register address possible
I2C Chip Address
<Stop Condition>
<Start Condition>
<Slave Address><r/w=’0’>[Ack]
<Register Addr.>[Ack]
<Register Data>[Ack]
Data Write
… additional writes to subsequent
register address possible
<Stop Condition>
30085851
Control Register Write Cycle
<>Data from master [ ] Data from slave
•
•
Master device generates start condition.
Master device sends slave address (7 bits) and the data
direction bit (r/w = 0).
•
Slave device sends acknowledge signal if the slave
address is correct.
•
•
•
Master sends control register address (8 bits).
Slave sends acknowledge signal.
Master sends data byte to be written to the addressed
register.
•
•
Slave sends acknowledge signal.
If master will send further data bytes the control register
address will be incremented by one after acknowledge
signal.
•
Write cycle ends when the master creates stop condition.
27
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Register Read and Write Detail
30085894
30085895
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28
Recommended External Components
Inductor Selection
As a result the inductor should be selected according to the
ISAT. A more conservative and recommended approach is to
choose an inductor that has a saturation current rating greater
than the maximum current limit of 0.9...2.5A (programmed to
EEPROM). Maximum current limit needed for the application
can be approximated with calculations above. A 15 μH induc-
tor with a saturation current rating of 2.5A is recommended
for most applications. The inductor’s resistance should be
less than 300 mΩ for good efficiency. For high efficiency
choose an inductor with high frequency core material such as
ferrite to reduce core losses. To minimize radiated noise, use
shielded core inductor. Inductor should be placed as close to
the SW pin and the IC as possible. Special care should be
used when designing the PCB layout to minimize radiated
noise and to get good performance from the boost converter.
A 15 µH shielded inductor is suggested for LP8543 boost
converter. Inductor maximum current can be calculated from
the equations below.
OUTPUT CAPACITOR
• IRIPPLE: Average to peak inductor current
• IOUTMAX: Maximum load current
A ceramic capacitor with 50V voltage rating or higher is rec-
ommended for the output capacitor. The DC-bias effect can
reduce the effective capacitance by up to 80%, which needs
to be considered in capacitance value selection. For light
loads (<100 mA) 4.7 µF capacitor is sufficient. For maximum
output voltage/current 10 µF capacitor (4 uF effective capac-
itance @ 38V) is recommended to reduce the output ripple.
Small 33 pF capacitor is recommended to use in parallel with
the output capacitor to suppress high frequency noise.
• VIN: Maximum input voltage in application
• L: Min inductor value including worst case tolerances
• f: Minimum switching frequency
• VOUT: Output voltage
Example using above equations:
•
•
•
•
•
•
VIN = 12V
VOUT = 38V
IOUT = 400 mA
L = 15 µH − 20% = 12 µH
f = 1.25 MHz
LDO CAPACITOR
A 470 nF ceramic capacitor with 10V voltage rating is recom-
mended for the LDO capacitor.
ISAT = 1.6A
OUTPUT DIODE
A schottky diode should be used for the output diode. Peak
repetitive current should be greater than inductor peak current
(0.9...2.5A) to ensure reliable operation. Average current rat-
ing should be greater than the maximum output current.
Schottky diodes with a low forward drop and fast switching
speeds are ideal for increasing efficiency in portable applica-
tions. Choose a reverse breakdown voltage of the Schottky
diode significantly larger (~60V) than the output voltage. Do
not use ordinary rectifier diodes, since slow switching speeds
and long recovery times cause the efficiency and the load
regulation to suffer.
AMBIENT LIGHT SENSOR
LP8543 uses light-to-frequency type ambient light sensor.
Suitable frequency range for ALS is 200 Hz to 2 MHz.
29
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30
31
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32
Physical Dimensions inches (millimeters) unless otherwise noted
SQA24A: LLP-24, 0.5mm pitch, no pullback
33
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Notes
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