LM1036 [TI]
LM1036 Dual DC Operated Tone/Volume/Balance Circuit;
| 型号： | LM1036 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LM1036 Dual DC Operated Tone/Volume/Balance Circuit |
| 文件： | 总21页 (文件大小：1000K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM1036
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SNAS525C –JAN 1995–REVISED APRIL 2013
LM1036 Dual DC Operated Tone/Volume/Balance Circuit
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1
FEATURES
DESCRIPTION
The LM1036 is a DC controlled tone (bass/treble),
volume and balance circuit for stereo applications in
car radio, TV and audio systems. An additional
control input allows loudness compensation to be
simply effected.
2
•
•
•
•
•
Wide Supply Voltage Range, 9V to 16V
Large Volume Control Range, 75 dB Typical
Tone Control, ±15 dB Typical
Channel Separation, 75 dB Typical
Low Distortion, 0.06% Typical for An Input
Level of 0.3 Vrms
Four control inputs provide control of the bass, treble,
balance and volume functions through application of
DC voltages from a remote control system or,
alternatively, from four potentiometers which may be
biased from a zener regulated supply provided on the
circuit.
•
•
High Signal to Noise, 80 dB Typical for an
Input Level of 0.3 Vrms
Few External Components Required
Each tone response is defined by a single capacitor
chosen to give the desired characteristic.
Block and Connection Diagram
Figure 1. PDIP and SOIC Packages
See Package Numbers NFH0020A or DW0020B
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1995–2013, Texas Instruments Incorporated
LM1036
SNAS525C –JAN 1995–REVISED APRIL 2013
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
Supply Voltage
16V
VCC
Control Pin Voltage (Pins 4, 7, 9, 12, 14)
Operating Temperature Range
Storage Temperature Range
Power Dissipation
0°C to +70°C
−65°C to +150°C
1W
Lead Temp. (Soldering, 10 seconds)
260°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Electrical Characteristics(1)
VCC=12V, TA=25°C (unless otherwise stated)
Parameter
Conditions
Min
Typ
35
Max
16
Units
V
Supply Voltage Range
Supply Current
Zener Regulated Output
Voltage
Pin 11
Pin 17
9
45
mA
5.4
V
Current
5
mA
Maximum Output Voltage
Pins 8, 13; f=1 kHz
VCC=9V, Maximum Gain
VCC=12V
0.8
1.0
1.6
Vrms
Vrms
Vrms
0.8
1.3
Maximum Input Voltage
Pins 2, 19; f=1 kHz, VCC 2V
Gain=−10 dB
Input Resistance
Output Resistance
Maximum Gain
Pins 2, 19; f=1 kHz
Pins 8, 13; f=1 kHz
V(Pin 12)=V(Pin 17); f=1 kHz
f=1 kHz
20
30
20
0
kΩ
Ω
−2
2
3
dB
dB
Volume Control Range
Gain Tracking
70
75
f=1 kHz
Channel 1–Channel 2
0 dB through −40 dB
−40 dB through −60 dB
Pins 8, 13; f=1 kHz
1
2
dB
dB
dB
dB
Balance Control Range
Bass Control Range(2)
1
−26
−20
f=40 Hz, Cb=0.39 μF
V(Pin 14)=V(Pin 17)
V(Pin 14)=0V
12
15
18
dB
dB
−12
−15
−18
Treble Control Range(2)
Total Harmonic Distortion
Channel Separation
f= 16 kHz, Ct,=0.01 μF
V(Pin 4)=V(Pin 17)
V(Pin 4)=0V
12
15
18
dB
dB
−12
−15
−18
f=1 kHz, VIN=0.3 Vrms
Gain=0 dB
0.06
0.03
75
0.3
%
%
Gain=−30 dB
f=1 kHz, Maximum Gain
60
dB
(1) The maximum permissible input level is dependent on tone and volume settings. See Application Notes.
(2) The tone control range is defined by capacitors Cb and Ct. See Application Notes.
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Electrical Characteristics(1) (continued)
VCC=12V, TA=25°C (unless otherwise stated)
Parameter
Conditions
Unweighted 100 Hz–20 kHz
Maximum Gain, 0 dB=0.3 Vrms
CCIR/ARM(3)
Min
Typ
Max
Units
Signal/Noise Ratio
80
dB
Gain=0 dB, VIN=0.3 Vrms
Gain=−20 dB, VIN=1.0 Vrms
CCIR/ARM(3)
75
35
79
72
dB
dB
Output Noise Voltage at Minimum Gain
Supply Ripple Rejection
10
16
μV
dB
200 mVrms, 1 kHz Ripple
Pins 4, 7, 9, 12, 14 (V=0V)
−1 dB (Flat Response
20 Hz–16 kHz)
50
Control Input Currents
−0.6
250
−2.5
μA
kHz
Frequency Response
(3) Gaussian noise, measured over a period of 50 ms per channel, with a CCIR filter referenced to 2 kHz and an average-responding
meter.
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Typical Performance Characteristics
Volume Control Characteristics
Balance Control Characteristic
Figure 2.
Figure 3.
Tone Control Characteristic
Tone Characteristic (Gain vs Frequency)
Figure 4.
Figure 5.
Tone Characteristic (Gain vs Frequency)
Loudness Compensated Volume Characteristic
Figure 6.
Figure 7.
4
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Typical Performance Characteristics (continued)
Input Signal Handling vs Supply Voltage
THD vs Gain
Figure 8.
Figure 9.
Channel Separation vs Frequency
Loudness Control Characteristic
Figure 10.
Figure 11.
Output Noise Voltage vs Gain
THD vs Input Voltage
Figure 12.
Figure 13.
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Application Notes
TONE RESPONSE
The maximum boost and cut can be optimized for individual applications by selection of the appropriate values of
Ct (treble) and Cb (bass).
The tone responses are defined by the relationships:
where
•
•
ab=at=0 for maximum bass and treble boost respectively
ab=at=1 for maximum cut
(1)
For the values of Cb and Ct of 0.39 μF and 0.01 μF as shown in the Application Circuit, 15 dB of boost or cut is
obtained at 40 Hz and 16 kHz.
ZENER VOLTAGE
A zener voltage (pin 17=5.4V) is provided which may be used to bias the control potentiometers. Setting a DC
level of one half of the zener voltage on the control inputs, pins 4, 9, and 14, results in the balanced gain and flat
response condition. Typical spread on the zener voltage is ±100 mV and this must be taken into account if
control signals are used which are not referenced to the zener voltage. If this is the case, then they will need to
be derived with similar accuracy.
LOUDNESS COMPENSATION
A simple loudness compensation may be effected by applying a DC control voltage to pin 7. This operates on the
tone control stages to produce an additional boost limited by the maximum boost defined by Cb and Ct. There is
no loudness compensation when pin 7 is connected to pin 17. Pin 7 can be connected to pin 12 to give the
loudness compensated volume characteristic as illustrated without the addition of further external components.
(Tone settings are for flat response, Cb and Ct as given in Application Circuit.) Modification to the loudness
characteristic is possible by changing the capacitors Cb and Ct for a different basic response or, by a resistor
network between pins 7 and 12 for a different threshold and slope.
SIGNAL HANDLING
The volume control function of the LM1036 is carried out in two stages, controlled by the DC voltage on pin 12,
to improve signal handling capability and provide a reduction of output noise level at reduced gain. The first
stage is before the tone control processing and provides an initial 15 dB of gain reduction, so ensuring that the
tone sections are not overdriven by large input levels when operating with a low volume setting. Any combination
of tone and volume settings may be used provided the output level does not exceed 1 Vrms, VCC=12V (0.8 Vrms,
VCC=9V). At reduced gain (<−6 dB) the input stage will overload if the input level exceeds 1.6 Vrms, VCC=12V(1.1
Vrms, VCC=9V). As there is volume control on the input stages, the inputs may be operated with a lower overload
margin than would otherwise be acceptable, allowing a possible improvement in signal to noise ratio.
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Application Circuit
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APPLICATIONS INFORMATION
OBTAINING MODIFIED RESPONSE CURVES
The LM1036 is a dual DC controlled bass, treble, balance and volume integrated circuit ideal for stereo audio
systems.
In the various applications where the LM1036 can be used, there may be requirements for responses different to
those of the standard application circuit given in the data sheet. This application section details some of the
simple variations possible on the standard responses, to assist the choice of optimum characteristics for
particular applications.
TONE CONTROLS
Summarizing the relationship given in the data sheet, basically for an increase in the treble control range Ct must
be increased, and for increased bass range Cb must be reduced.
Figure 14 shows the typical tone response obtained in the standard application circuit. (Ct=0.01 μF, Cb=0.39 μF).
Response curves are given for various amounts of boost and cut.
Figure 14. Tone Characteristic (Gain vs Frequency)
Figure 15 and Figure 16 show the effect of changing the response defining capacitors Ct and Cb to 2Ct, Cb/2 and
4Ct, Cb/4 respectively, giving increased tone control ranges. The values of the bypass capacitors may become
significant and affect the lower frequencies in the bass response curves.
Figure 15. Tone Characteristic (Gain vs Frequency)
8
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Figure 16. Tone Characteristic (Gain vs Frequency)
Figure 17 shows the effect of changing Ct and Cb in the opposite direction to Ct/2, 2Cb respectively giving
reduced control ranges. The various results corresponding to the different Ct and Cb values may be mixed if it is
required to give a particular emphasis to, for example, the bass control. The particular case with Cb/2, Ct is
illustrated in Figure 18.
Restriction of Tone Control Action at High or Low Frequencies
It may be desired in some applications to level off the tone responses above or below certain frequencies for
example to reduce high frequence noise.
This may be achieved for the treble response by including a resistor in series with Ct. The treble boost and cut
will be 3 dB less than the standard circuit when R=XC.
A similar effect may be obtained for the bass response by reducing the value of the AC bypass capacitors on
pins 5 (channel 1) and 16 (channel 2). The internal resistance at these pins is 1.3 kΩ and the bass boost/cut will
be approximately 3 dB less with XC at this value. An example of such modified response curves is shown in
Figure 19. The input coupling capacitors may also modify the low frequency response.
It will be seen from Figure 15 and Figure 16 that modifying Ct and Cb for greater control range also has the effect
of flattening the tone control extremes and this may be utilized, with or without additional modification as outlined
above, for the most suitable tone control range and response shape.
Other Advantages of DC Controls
The DC controls make the addition of other features easy to arrange. For example, the negative-going peaks of
the output amplifiers may be detected below a certain level, and used to bias back the bass control from a high
boost condition, to prevent overloading the speaker with low frequency components.
LOUDNESS CONTROL
The loudness control is achieved through control of the tone sections by the voltage applied to pin 7; therefore,
the tone and loudness functions are not independent. There is normally 1 dB more bass than treble boost (40
Hz–16 kHz) with loudness control in the standard circuit. If a greater difference is desired, it is necessary to
introduce an offset by means of Ct or Cb or by changing the nominal control voltage ranges.
Figure 20 shows the typical loudness curves obtained in the standard application circuit at various volume levels
(Cb=0.39 μF).
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Figure 17. Tone Characteristic (Gain vs Frequency) Figure 18. Tone Characteristic (Gain vs Frequency)
Figure 19. Tone Characteristic (Gain vs Frequency)
Figure 20. Loudness Compensated Volume
Characteristic
Figure 21 and Figure 22 illustrate the loudness characteristics obtained with Cb changed to Cb/2 and Cb/4
respectively, Ct being kept at the nominal 0.01 μF. These values naturally modify the bass tone response as in
Figure 15 and Figure 16.
With pins 7 (loudness) and 12 (volume) directly connected, loudness control starts at typically −8 dB volume, with
most of the control action complete by −30 dB.
Figure 23 and Figure 24 show the effect of resistively offsetting the voltage applied to pin 7 towards the control
reference voltage (pin 17). Because the control inputs are high impedance, this is easily done and high value
resistors may be used for minimal additional loading. It is possible to reduce the rate of onset of control to extend
the active range to −50 dB volume control and below.
The control on pin 7 may also be divided down towards ground bringing the control action on earlier. This is
illustrated in Figure 25, With a suitable level shifting network between pins 12 and 7, the onset of loudness
control and its rate of change may be readily modified.
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Figure 21. Loudness Compensated Volume
Figure 22. Loudness Compensated Volume
Characteristic
Characteristic
Figure 23. Loudness Compensated Volume
Characteristic
Figure 24. Loudness Compensated Volume
Characteristic
Figure 25. Loudness Compensated Volume Characteristic
When adjusted for maximum boost in the usual application circuit, the LM1036 cannot give additional boost from
the loudness control with reducing gain. If it is required, some additional boost can be obtained by restricting the
tone control range and modifying Ct, Cb, to compensate. A circuit illustrating this for the case of bass boost is
shown in Figure 26. The resulting responses are given in Figure 27 showing the continuing loudness control
action possible with bass boost previously applied.
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USE OF THE LM1036 ABOVE AUDIO FREQUENCIES
The LM1036 has a basic response typically 1 dB down at 250 kHz (tone controls flat) and therefore by scaling Cb
and Ct, it is possible to arrange for operation over a wide frequency range for possible use in wide band
equalization applications. As an example Figure 28 shows the responses obtained centered on 10 kHz with
Cb=0.039 μF and Ct=0.001 μF.
Figure 26. Modified Application Circuit for Additional Bass Boost with Loudness Control
Figure 27. Loudness Compensated Volume
Characteristic
Figure 28. Tone Characteristic (Gain vs Frequency)
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Simplified Schematic Diagram
(One Channel)
*Connections reversed
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REVISION HISTORY
Changes from Revision B (April 2013) to Revision C
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 13
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PACKAGE OPTION ADDENDUM
www.ti.com
1-Oct-2016
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
LM1036M/NOPB
LM1036MX/NOPB
LM1036N/NOPB
OBSOLETE
OBSOLETE
OBSOLETE
SOIC
SOIC
PDIP
DW
20
20
20
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
0 to 70
0 to 70
0 to 70
LM1036M
DW
LM1036M
LM1036N
NFH
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
1-Oct-2016
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
NFH0020A
N20A (Rev G)
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PACKAGE OUTLINE
DW0020A
SOIC - 2.65 mm max height
S
C
A
L
E
1
.
2
0
0
SOIC
C
10.63
9.97
SEATING PLANE
TYP
PIN 1 ID
AREA
0.1 C
A
18X 1.27
20
1
13.0
12.6
NOTE 3
2X
11.43
10
11
0.51
0.31
20X
2.65 MAX
7.6
7.4
B
0.25
C A B
NOTE 4
0.33
0.10
TYP
0.25
SEE DETAIL A
GAGE PLANE
0 - 8
0.3
0.1
1.27
0.40
DETAIL A
TYPICAL
4220724/A 05/2016
NOTES:
1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm per side.
5. Reference JEDEC registration MS-013.
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EXAMPLE BOARD LAYOUT
DW0020A
SOIC - 2.65 mm max height
SOIC
20X (2)
SYMM
1
20
20X (0.6)
18X (1.27)
SYMM
(R0.05)
TYP
10
11
(9.3)
LAND PATTERN EXAMPLE
SCALE:6X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
METAL
SOLDER MASK
0.07 MAX
ALL AROUND
0.07 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4220724/A 05/2016
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
DW0020A
SOIC - 2.65 mm max height
SOIC
20X (2)
SYMM
1
20
20X (0.6)
18X (1.27)
SYMM
10
11
(9.3)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:6X
4220724/A 05/2016
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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