LM2462TA/NOPB [TI]

IC,TV/VIDEO CIRCUIT,DRIVER,BIPOLAR,ZIP,11PIN,PLASTIC;
LM2462TA/NOPB
型号: LM2462TA/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

IC,TV/VIDEO CIRCUIT,DRIVER,BIPOLAR,ZIP,11PIN,PLASTIC

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文件: 总13页 (文件大小:1107K)
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LM2462  
LM2462 Monolithic Triple 3 ns CRT Driver  
Literature Number: SNOSA01  
February 2002  
LM2462  
Monolithic Triple 3 ns CRT Driver  
General Description  
Features  
n Higher gain to match LM126X CMOS preamplifiers  
The LM2462 is an integrated high voltage CRT driver circuit  
designed for use in color monitor applications. The IC con-  
tains three high input impedance, wide band amplifiers  
which directly drive the RGB cathodes of a CRT. Each  
channel has its gain internally set to −20 and can drive CRT  
capacitive loads as well as resistive loads present in other  
applications, limited only by the package’s power dissipation.  
n 0V to 3.75V input range  
n Stable with 0–20 pF capacitive loads and inductive  
peaking networks  
n Convenient TO-220 staggered lead package style  
n Maintains standard LM240X Family pinout which is  
designed for easy PCB layout  
The IC is packaged in an industry standard 11-lead TO-220  
molded plastic power package. See Thermal Considerations  
section.  
Applications  
n 1600 x 1200 displays up to 85Hz refresh  
n Pixel clock frequencies up to 230 MHz  
n Monitors using video blanking  
Schematic and Connection Diagrams  
DS200376-2  
Note: Tab is at GND  
Top View  
Order Number LM2462TA  
NS Package Number: TA11B  
DS200376-1  
FIGURE 1. Simplified Schematic Diagram  
(One Channel)  
© 2002 National Semiconductor Corporation  
DS200376  
www.national.com  
Absolute Maximum Ratings (Notes 1, 3)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
Lead Temperature  
<
(Soldering, 10 sec.)  
300˚C  
2kV  
ESD Tolerance, Human Body Model  
Machine Model  
250V  
Supply Voltage (VCC  
)
+90V  
+16V  
Operating Ranges (Note 2)  
Bias Voltage (VBB  
)
)
Input Voltage (VIN  
0V to 4.5V  
VCC  
+60V to +85V  
+8V to +15V  
Storage Temperature Range (TSTG  
)
−65˚C to +150˚C  
VBB  
VIN  
+0V to +3.75V  
+15V to +75V  
−20˚C to +100˚C  
VOUT  
Case Temperature  
Do not operate the part without a heat sink.  
Electrical Characteristics  
(See Figure 2 for Test Circuit)  
Unless otherwise noted: VCC = +80V, VBB = +12V, CL = 8 pF, TC = 50˚C  
DC Tests: VIN = 2.25VDC  
AC Tests: Output = 40VPP(25V - 65V) at 1MHz  
LM2462  
Typical  
Symbol  
Parameter  
Supply Current  
Conditions  
Units  
Min  
Max  
ICC  
All Three Channels, No Input Signal,  
No Output Load  
63  
mA  
IBB  
VOUT  
AV  
Bias Current  
DC Output Voltage  
DC Voltage Gain  
Gain Matching  
Linearity Error  
Rise Time  
All Three Channels  
42  
65  
−20  
1.0  
8
mA  
No AC Input Signal, VIN = 1.25V  
No AC Input Signal  
62  
68  
VDC  
−18  
−22  
AV  
LE  
(Note 4), No AC Input Signal  
(Notes 4, 5), No AC Input Signal  
(Note 6), 10% to 90%  
(Note 6), 90% to 10%  
(Note 6)  
dB  
%
tR  
3.0  
3.3  
8
3.8  
4.1  
ns  
ns  
%
tF  
Fall Time  
OS  
Overshoot  
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.  
Note 2: Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and  
test conditions, see the Electrical Characteristics. Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis. The guaranteed  
specifications apply only for the test conditions listed. Some performance characteristics may change when the device is not operated under the listed test  
conditions.  
Note 3: All voltages are measured with respect to GND, unless otherwise specified.  
Note 4: Calculated value from Voltage Gain test on each channel.  
Note 5: Linearity Error is the variation in dc gain from V = 1.0V to V = 3.5V.  
IN  
IN  
<
f
Note 6: Input from signal generator: t , t  
1 ns.  
r
Note 7: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.  
www.national.com  
2
AC Test Circuit  
DS200376-3  
Note: 8 pF load includes parasitic capacitance.  
FIGURE 2. Test Circuit (One Channel)  
Figure 2 shows a typical test circuit for evaluation of the LM2462. This circuit is designed to allow testing of the LM2462 in a 50Ω  
environment without the use of an expensive FET probe. The two 2490resistors form a 200:1 divider with the 50resistor and  
the oscilloscope. A test point is included for easy use of an oscilloscope probe.  
3
www.national.com  
Typical Performance Characteristics (VCC = +80VDC, VBB = +12VDC, CL = 8pF, VOUT = 40VPP  
(25V−65V), TCASE = 60˚C, Test Circuit - Figure 2 unless otherwise specified)  
DS200376-24  
FIGURE 6. Power Dissipation vs Frequency  
DS200376-19  
FIGURE 3. VOUT vs VIN  
DS200376-18  
DS200376-17  
FIGURE 7. Speed vs Offset  
FIGURE 4. Speed vs Temp.  
DS200376-25  
DS200376-16  
FIGURE 5. LM2462 Pulse Response  
TCASE = 50˚C  
FIGURE 8. Speed vs Load Capacitance  
www.national.com  
4
ARC PROTECTION  
Theory of Operation  
During normal CRT operation, internal arcing may occasion-  
ally occur. Spark gaps, in the range of 200V, connected from  
the CRT cathodes to CRT ground will limit the maximum  
voltage, but to a value that is much higher than allowable on  
the LM2462. This fast, high voltage, high energy pulse can  
damage the LM2462 output stage. The application circuit  
shown in Figure 9 is designed to help clamp the voltage at  
the output of the LM2462 to a safe level. The clamp diodes,  
D1 and D2, should have a fast transient response, high peak  
current rating, low series impedance and low shunt capaci-  
tance. FDH400 or equivalent diodes are recommended. Do  
not use 1N4148 diodes for the clamp diodes. D1 and D2  
should have short, low impedance connections to VCC and  
ground respectively. The cathode of D1 should be located  
very close to a separately decoupled bypass capacitor (C3 in  
Figure 9). The ground connection of D2 and the decoupling  
capacitor should be very close to the LM2462 ground. This  
will significantly reduce the high frequency voltage transients  
that the LM2462 would be subjected to during an arcover  
condition. Resistor R2 limits the arcover current that is seen  
by the diodes while R1 limits the current into the LM2462 as  
well as the voltage stress at the outputs of the device. R2  
The LM2462 is a high voltage monolithic three channel CRT  
driver suitable for high resolution display applications. The  
LM2462 operates with 80V and 12V power supplies. The  
part is housed in the industry standard 11-lead TO-220  
molded plastic power package.  
The circuit diagram of the LM2462 is shown in Figure 1. The  
PNP emitter follower, Q5, provides input buffering. Q1 and  
Q2 form a fixed gain cascode amplifier with resistors R1 and  
R2 setting the gain at −20. Emitter followers Q3 and Q4  
isolate the high output impedance of the cascode stage from  
the capacitance of the CRT cathode which decreases the  
sensitivity of the device to changes in load capacitance. Q6  
provides biasing to the output emitter follower stage to re-  
duce crossover distortion at low signal levels.  
Figure 2 shows a typical test circuit for evaluation of the  
LM2462. This circuit is designed to allow testing of the  
LM2462 in a 50environment without the use of an expen-  
sive FET probe. In this test circuit, the two 2.49kresistors  
form a 200:1 wideband, low capacitance probe when con-  
nected to a 50coaxial cable and a 50load (such as a  
50oscilloscope input). The input signal from the generator  
is ac coupled to the base of Q5.  
should be a 1⁄  
2
W solid carbon type resistor. R1 can be a 1⁄  
W
4
metal or carbon film type resistor. Having large value resis-  
tors for R1 and R2 would be desirable, but this has the effect  
of increasing rise and fall times. Inductor L1 is critical to  
reduce the initial high frequency voltage levels that the  
LM2462 would be subjected to. The inductor will not only  
help protect the device but it will also help optimize rise and  
fall times as well as minimize EMI. For proper arc protection,  
it is important to not omit any of the arc protection compo-  
nents shown in Figure 9.  
Application Hints  
INTRODUCTION  
National Semiconductor (NSC) is committed to provide ap-  
plication information that assists our customers in obtaining  
the best performance possible from our products. The fol-  
lowing information is provided in order to support this com-  
mitment. The reader should be aware that the optimization of  
performance was done using a specific printed circuit board  
designed at NSC. Variations in performance can be realized  
due to physical changes in the printed circuit board and the  
application. Therefore, the designer should know that com-  
ponent value changes may be required in order to optimize  
performance in a given application. The values shown in this  
document can be used as a starting point for evaluation  
purposes. When working with high bandwidth circuits, good  
layout practices are also critical to achieving maximum per-  
formance.  
IMPORTANT INFORMATION  
The LM2462 performance is targeted for the high end 19“  
and 21“ market with resolutions up to 1600 x 1200 and an  
85Hz refresh rate. The application circuits shown in this  
document were specifically designed to optimize the perfor-  
mance of the LM2462 as well as protect it from damage due  
to a CRT arc-over. If another member of the LM246X family  
is used, please refer to its datasheet.  
POWER SUPPLY BYPASS  
Since the LM2462 is a wide bandwidth amplifier, proper  
power supply bypassing is critical for optimum performance.  
Improper power supply bypassing can result in large over-  
shoot, ringing or oscillation. 0.1 µF capacitors should be  
connected from the supply pins, VCC and VBB, to ground, as  
close to the LM2462 as is practical. Additionally, a 47 µF or  
larger electrolytic capacitor should be connected from both  
supply pins to ground reasonably close to the LM2462.  
5
www.national.com  
Application Hints (Continued)  
DS200376-10  
FIGURE 9. One Channel of the LM2462 with the Recommended Arc Protection Circuit  
OPTIMIZING TRANSIENT RESPONSE  
case). This graph gives the designer the information needed  
to determine the heat sink requirement for his application.  
The designer should note that if the load capacitance is  
increased the AC component of the total power dissipation  
will also increase.  
Referring to Figure 9, there are three components (R1, R2  
and L1) that can be adjusted to optimize the transient re-  
sponse of the application circuit. Increasing the values of R1  
and R2 will slow the circuit down while decreasing over-  
shoot. Increasing the value of L1 will speed up the circuit as  
well as increase overshoot. It is very important to use induc-  
tors with very high self-resonant frequencies, preferably  
above 300 MHz. Ferrite core inductors from J.W. Miller  
Magnetics (part # 78-FRK) were used for optimizing the  
performance of the device in the NSC application board. The  
values shown in Figure 9 can be used as a good starting  
point for the evaluation of the LM2462. Using a variable  
resistor for R1 will simplify finding the value needed for  
optimum performance in a given application. Once the opti-  
mum value is determined, the variable resistor can be re-  
placed with a fixed value.  
The LM2462 case temperature must be maintained below  
100˚C. If the maximum expected ambient temperature is  
65˚C and the maximum power dissipation is 16.5W (from  
Figure 6, 100MHz bandwidth) then a maximum heat sink  
thermal resistance can be calculated:  
This example assumes a capacitive load of 8 pF and no  
resistive load.  
TYPICAL APPLICATION  
A typical application of the LM2462 is shown in Figure 10  
and Figure 11. Used in conjunction with an LM1262 video  
pre-amp and an LM2479/2480 bias clamp, a complete video  
channel from monitor input to CRT cathode can be achieved.  
Performance is ideal for 1600 X 1200 resolution displays  
with pixel clock frequencies up to 230MHz. Figure 10 and  
Figure 11 are the schematic for the NSC demonstration  
board that can be used to evaluate the LM1262/2462/2480  
combination in a monitor.  
EFFECT OF LOAD CAPACITANCE  
Figure 8 shows the effect of increased load capacitance on  
the speed of the device. This demonstrates the importance  
of knowing the load capacitance in the application. The rise  
time increased about 0.08 nsec for an increase of 1 pF in the  
load capacitance. The fall time increased about 0.14 nsec for  
a 1 pF increase in the load capacitance.  
EFFECT OF OFFSET  
Figure 7 shows the variation in rise and fall times when the  
output offset of the device is varied from 40 to 50 VDC. The  
rise time varies less than 0.10 nsec. The fall time varies a  
little under 0.50 nsec, but only 0.15 nsec from the fastest fall  
time at 40V offset.  
PC BOARD LAYOUT CONSIDERATIONS  
For optimum performance, an adequate ground plane, iso-  
lation between channels, good supply bypassing and mini-  
mizing unwanted feedback are necessary. Also, the length of  
the signal traces from the preamplifier to the LM2462 and  
from the LM2462 to the CRT cathode should be as short as  
possible. The following references are recommended:  
THERMAL CONSIDERATIONS  
Figure 4 shows the performance of the LM2462 in the test  
circuit shown in Figure 2 as a function of case temperature.  
The figure shows that both the rise and fall times of the  
LM2462 increase by approximately 46% as the case tem-  
perature increases from 30˚C to 95˚C. This corresponds to a  
speed degradation of 7.1% for every 10˚C rise in case  
temperature.  
Ott, Henry W., “Noise Reduction Techniques in Electronic  
Systems”, John Wiley & Sons, New York, 1976.  
“Video Amplifier Design for Computer Monitors”, National  
Semiconductor Application Note 1013.  
Pease, Robert A., “Troubleshooting Analog Circuits”,  
Butterworth-Heinemann, 1991.  
Because of its high small signal bandwidth, the part may  
oscillate in a monitor if feedback occurs around the video  
channel through the chassis wiring. To prevent this, leads to  
the video amplifier input circuit should be shielded, and input  
circuit wiring should be spaced as far as possible from output  
circuit wiring.  
Figure 6 shows the maximum power dissipation of the  
LM2462 vs. Frequency when all three channels of the device  
are driving an 8pF load with a 40Vp-p alternating one pixel  
on, one pixel off. The graph assumes a 72% active time  
(device operating at the specified frequency) which is typical  
in a monitor application. The other 28% of the time the  
device is assumed to be sitting at the black level (65V in this  
www.national.com  
6
Application Hints (Continued)  
NSC DEMONSTRATION BOARD  
Figure 12 shows the routing and component placement on  
the NSC LM126X/246X demonstration board. The sche-  
matic of the board is shown in Figure 10 and Figure 11. This  
board provides a good example of a layout that can be used  
as a guide for future layouts. Note the location of the follow-  
ing components:  
C16, C19VCC bypass capacitor, located very close to  
pin 4 and ground pins  
C17, C20VBB bypass capacitors, located close to pin 8  
and ground  
C46, C47, C48VCC bypass capacitors, near LM2462  
and VCC clamp diodes. Very important for arc protection.  
The routing of the LM2462 outputs to the CRT is very critical  
to achieving optimum performance. Figure 13 shows the  
routing and component placement from pin 1 of the LM2462  
to the blue cathode. The white line through the PCB traces  
show the path of the blue video. Note that the components  
are placed so that they almost line up from the output pin of  
the LM2462 to the blue cathode pin of the CRT connector.  
This is done to minimize the length of the video path be-  
tween these two components. Note also that D8, D9, R24  
and D6 are placed to minimize the size of the video nodes  
that they are attached to. This minimizes parasitic capaci-  
tance in the video path and also enhances the effectiveness  
of the protection diodes. The anode of protection diode D8 is  
connected directly to a section of the ground plane that has  
a short and direct path to the LM2462 ground pins. The  
cathode of D9 is connected to VCC very close to decoupling  
capacitor C48 (see Figure 13) which is connected to the  
same section of the ground plane as D8. The diode place-  
ment and routing is very important for minimizing the voltage  
stress on the LM2462 during an arc-over event. Lastly, no-  
tice that S3 is placed very close to the blue cathode and is  
tied directly to CRT ground.  
7
www.national.com  
Application Hints (Continued)  
DS200376-23  
FIGURE 10. LM126X/LM246X Demonstration Board Schematic  
www.national.com  
8
Application Hints (Continued)  
DS200376-21  
FIGURE 11. LM126X/LM246X Demonstration Board Schematic (continued)  
9
www.national.com  
Application Hints (Continued)  
DS200376-22  
FIGURE 12. LM126X/LM246X Demo Board Layout  
DS200376-20  
FIGURE 13. Trace Routing and Component Placement for Blue Channel Output  
www.national.com  
10  
Physical Dimensions inches (millimeters) unless otherwise noted  
CONTROLLING DIMENSION IS INCH  
VALUES IN [ ] ARE MILLIMETERS  
NS Package Number TA11B  
Order Number LM2462TA  
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