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LM2611AMFX/NOPB [TI]

1.4MHz Cuk 转换器 | DBV | 5 | -40 to 125;
LM2611AMFX/NOPB
型号： LM2611AMFX/NOPB
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述：

1.4MHz Cuk 转换器 | DBV | 5 | -40 to 125

开关 光电二极管 转换器
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LM2611  
SNOS965J –JUNE 2001–REVISED DECEMBER 2015  
LM2611 1.4-MHz Cuk Converter  
1 Features  
3 Description  
The LM2611 is a current mode, PWM inverting  
1
•
•
•
•
•
•
•
•
•
1.4-MHz Switching Frequency  
Low RDS(ON) DMOS FET  
switching regulator. Operating from a 2.7-V to 4-V  
supply, it is capable of producing a regulated  
negative output voltage of up to −(36 VIN(MAX)). The  
LM2611 utilizes an input and output inductor, which  
enables low voltage ripple and RMS current on both  
the input and the output. With a switching frequency  
of 1.4 MHz, the inductors and output capacitor can be  
physically small and low cost. High efficiency is  
achieved through the use of a low RDS(ON) FET.  
1-mVp-p Output Ripple  
−5 V at 300 mA From 5-V Input  
Better Regulation Than a Charge Pump  
Uses Tiny Capacitors and Inductors  
Wide Input Range: 2.7 V to 14 V  
Low Shutdown Current: <1 µA  
5-Pin SOT-23 Package  
The LM2611 features a shutdown pin, which can be  
activated when the part is not needed to lower the Iq  
and save battery life. A negative feedback (NFB) pin  
provides a simple method of setting the output  
voltage, using just two resistors. Cycle-by-cycle  
current limiting and internal compensation further  
simplify the use of the LM2611.  
2 Applications  
•
•
•
•
•
MR Head Bias  
Digital Camera CCD Bias  
LCD Bias  
The LM2611 is available as a small 5-pin, SOT-23  
package and comes in two grades. Grade A has a  
1.2-A current limit and 0.5-Ω RDS(ON), and Grade B  
GaAs FET Bias  
Positive to Negative Conversion  
has a 0.9-A current limit and 0.7-Ω RDS(ON)  
.
Device Information(1)  
PART NUMBER  
LM2611  
PACKAGE  
BODY SIZE (NOM)  
SOT-23 (5)  
1.60 mm × 2.90 mm  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
Typical Application Circuit  
C
L2  
47 mH  
L1  
15 mH  
CUK  
V
- 5V  
OUT  
300 mA  
1 mF  
V
IN  
5V  
5
1
R
FB1  
C
FF  
29.4k  
V
SW  
330 pF  
IN  
D
C
IN  
4
3
C
OUT  
LM2611A NFB  
SHDN  
22 mF  
22 mF  
GND  
2
R
FB2  
10k  
C
C
C
: TAIYO YUDEN X5R JMK325BJ226MM  
IN  
: TAIYO YUDEN X5R EMK316BJ105MF  
: TAIYO YUDEN X5R JMK325BJ226MM  
CUK  
OUT  
D: ON SEMICONDUCTOR MBR0520  
L1: SUMIDA CR32-150  
L2: SUMIDA CR32-470  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
 
LM2611  
SNOS965J –JUNE 2001–REVISED DECEMBER 2015  
www.ti.com  
Table of Contents  
7.3 Feature Description................................................... 8  
7.4 Device Functional Modes........................................ 12  
Application and Implementation ........................ 13  
8.1 Application Information............................................ 13  
8.2 Typical Application .................................................. 13  
Power Supply Recommendations...................... 19  
1
2
3
4
5
6
Features.................................................................. 1  
Applications ........................................................... 1  
Description ............................................................. 1  
Revision History..................................................... 2  
Pin Configuration and Functions......................... 3  
Specifications......................................................... 3  
6.1 Absolute Maximum Ratings ...................................... 3  
6.2 ESD Ratings.............................................................. 3  
6.3 Recommended Operating Conditions....................... 4  
6.4 Thermal Information.................................................. 4  
6.5 Electrical Characteristics........................................... 4  
6.6 Typical Characteristics.............................................. 6  
Detailed Description .............................................. 8  
7.1 Overview ................................................................... 8  
7.2 Functional Block Diagram ......................................... 8  
8
9
10 Layout................................................................... 20  
10.1 Layout Guidelines ................................................. 20  
10.2 Layout Example .................................................... 20  
11 Device and Documentation Support ................. 21  
11.1 Community Resources.......................................... 21  
11.2 Trademarks........................................................... 21  
11.3 Electrostatic Discharge Caution............................ 21  
11.4 Glossary................................................................ 21  
7
12 Mechanical, Packaging, and Orderable  
Information ........................................................... 21  
4 Revision History  
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.  
Changes from Revision I (April 2013) to Revision J  
Page  
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation  
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and  
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1  
Changes from Revision H (April 2013) to Revision I  
Page  
•
Changed layout of National Data Sheet to TI format ........................................................................................................... 19  
2
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Copyright © 2001–2015, Texas Instruments Incorporated  
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LM2611  
www.ti.com  
SNOS965J –JUNE 2001–REVISED DECEMBER 2015  
5 Pin Configuration and Functions  
DBV Package  
5-Pin SOT-23  
Top View  
SW  
ꢀ
VIN  
1
Db5  
2
3
NFB  
4
{I5b  
Pin Functions  
PIN  
TYPE(1)  
DESCRIPTION  
NO.  
1
NAME  
SW  
A
GND  
A
Drain of internal switch. Connect at the node of the input inductor and Cuk capacitor.  
Analog and power ground.  
2
GND  
NFB  
3
Negative feedback. Connect to output via external resistor divider to set output voltage.  
Shutdown control input. VIN = Device on. Ground = Device in shutdown.  
4
SHDN  
I
Analog and power input. Filter out high frequency noise with a 0.1-µF ceramic capacitor  
placed close to the pin.  
5
VIN  
PWR  
(1) A = Analog, I = Input, GND = Ground, PWR = Power  
6 Specifications  
6.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)(1)  
MIN  
MAX  
14.5  
36  
UNIT  
V
Input voltage, VIN  
SW voltage  
–0.4  
–6  
V
NFB voltage  
0.4  
V
SHDN voltage  
–0.4  
14.5  
125  
V
Maximum junction temperature  
°C  
(2)  
Power dissipation  
Internally limited  
Lead temperature  
300  
150  
°C  
°C  
Storage temperature, Tstg  
−65  
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings  
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended  
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal  
resistance, θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance of various layouts.  
The maximum allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) − TA)/θJA. Exceeding  
the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown.  
6.2 ESD Ratings  
VALUE  
±2000  
±200  
UNIT  
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(2)  
Machine Model (MM)(3)  
V(ESD)  
Electrostatic discharge  
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.  
(3) The machine model is a 200-pF capacitor discharged directly into each pin.  
Copyright © 2001–2015, Texas Instruments Incorporated  
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SNOS965J –JUNE 2001–REVISED DECEMBER 2015  
www.ti.com  
6.3 Recommended Operating Conditions  
MIN  
2.7  
NOM  
MAX  
14  
UNIT  
V
Supply voltage  
Operating junction temperature, TJ  
−40  
125  
°C  
6.4 Thermal Information  
LM2611  
THERMAL METRIC(1)  
DBV (SOT-23)  
5 PINS  
163.5  
115.2  
27.4  
UNIT  
RθJA  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
RθJC(top)  
RθJB  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
12.9  
ψJB  
26.9  
RθJC(bot)  
n/a  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application  
report, SPRA953.  
6.5 Electrical Characteristics  
Specifications in standard type face are for TJ = 25°C, unless otherwise specified. VIN = 5 V and IL = 0 A, unless otherwise  
specified.  
(1)  
(2)  
(1)  
PARAMETER  
TEST CONDITIONS  
TJ = −40°C to +85°C  
MIN  
TYP  
MAX  
UNIT  
VIN  
Input voltage  
2.7  
1
14  
V
Grade A  
1.2  
0.9  
Grade A; TJ = −40°C to +85°C  
Grade B  
2
ISW  
Switch current limit  
A
Grade B; TJ = −40°C to +85°C  
Grade A  
0.7  
0.5  
0.7  
0.65  
0.9  
RDSON  
Switch ON resistance  
Shutdown threshold  
Ω
Grade B  
Device enabled; TJ = −40°C to +85°C  
Device disabled; TJ = −40°C to +85°C  
VSHDN = 0 V  
1.5  
SHDNTH  
V
0.5  
0
0
ISHDN  
Shutdown pin bias current  
VSHDN = 5 V  
µA  
VSHDN = 5 V; TJ = −40°C to +85°C  
VIN = 3 V  
1
−1.255  
−6.7  
−1.23  
−4.7  
1.8  
NFB  
INFB  
Negative feedback reference  
NFB pin bias current  
V
VIN = 3 V; TJ = −40°C to +85°C  
VNFB =−1.23 V  
−1.205  
−2.7  
µA  
VNFB =−1.23 V; TJ = −40°C to +85°C  
VSHDN = 5 V, Switching  
mA  
µA  
VSHDN = 5 V, Switching;  
TJ = −40°C to +85°C  
3.5  
VSHDN = 5 V, Not Switching  
270  
Iq  
Quiescent current  
VSHDN = 5 V, Not Switching;  
TJ = −40°C to +85°C  
500  
1
VSHDN = 0 V  
0.024  
0.02  
µA  
VSHDN = 0 V; TJ = −40°C to +85°C  
%VOUT  
ΔVIN  
/
Reference line regulation  
2.7 V ≤ VIN ≤ 14 V  
%/V  
(1) All limits are specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits  
are 100% tested through statistical analysis. All limits at temperature extremes via correlation using standard Statistical Quality Control  
(SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).  
(2) Typical numbers are at 25°C and represent the expected value of the parameter.  
4
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LM2611  
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SNOS965J –JUNE 2001–REVISED DECEMBER 2015  
Electrical Characteristics (continued)  
Specifications in standard type face are for TJ = 25°C, unless otherwise specified. VIN = 5 V and IL = 0 A, unless otherwise  
specified.  
(1)  
(2)  
(1)  
PARAMETER  
TEST CONDITIONS  
TJ = 25°C  
MIN  
TYP  
MAX  
UNIT  
1.4  
fS  
Switching frequency  
MHz  
TJ = −40°C to +85°C  
TJ = 25°C  
1
1.8  
1
88%  
DMAX  
IL  
Maximum duty cycle  
Switch leakage  
TJ = −40°C to +85°C  
VSW = 5 V, Not Switching  
82%  
µA  
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LM2611  
SNOS965J –JUNE 2001–REVISED DECEMBER 2015  
www.ti.com  
6.6 Typical Characteristics  
1
0.55  
0.5  
0.8  
0.6  
0.4  
0.2  
0
0.45  
0.4  
0.35  
0.3  
2
4
6
8
10  
12  
14  
-50  
0
50  
100  
150  
TEMPERATURE (oC)  
VIN (V)  
VIN = 5 V  
Figure 1. RDS(ON) vs VIN  
Figure 2. RDS(ON) vs Ambient Temperature  
1.4  
1.45  
1.4  
1.39  
1.38  
1.37  
1.36  
1.35  
1.35  
1.3  
1.25  
1.2  
1.15  
-50  
0
50  
100  
150  
2
4
12  
6
8
10  
TEMPERATURE (oC)  
VIN (V)  
VIN = 5 V  
Figure 4. Switch Current Limit vs Ambient Temperature  
Figure 3. Switch Current Limit vs VIN  
1.48  
1.46  
1.50  
1.48  
1.46  
1.44  
1.44  
1.42  
1.40  
1.42  
1.40  
1.38  
1.36  
1.34  
1.38  
1.36  
1.34  
1.32  
1.30  
1.32  
1.30  
-60-40 -20  
0
60 80 100120140 160  
20 40  
2
0
4
14  
6
8
10  
12  
VIN (V)  
TEMPERATURE (oC)  
VIN = 5 V  
Figure 5. Oscillator Frequency vs VIN  
Figure 6. Oscillator Frequency vs Ambient Temperature  
6
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SNOS965J –JUNE 2001–REVISED DECEMBER 2015  
Typical Characteristics (continued)  
-1.218  
-1.220  
-1.222  
-1.224  
-1.226  
-1.228  
-1.215  
-1.22  
-1.225  
-1.23  
-1.235  
-1.24  
-1.230  
-1.232  
-1.245  
-1.25  
-30 -5  
20  
45  
70 95 120  
-55  
0
10  
5
15  
TEMPERATURE (oC)  
VIN (V)  
VOUT = −5 V  
TA = 25°C  
VIN = 5 V  
Figure 7. VNFB vs VIN  
Figure 8. VNFB vs Ambient Temperature  
4.45  
4.4  
4.4  
4.3  
4.2  
4.1  
4.35  
4.3  
4.0  
3.9  
4.25  
4.2  
-50  
-25  
0
25  
50  
75 100 125 150  
15  
5
0
10  
TEMPERATURE (oC)  
VIN (V)  
TA = 25°C  
VOUT = −5 V  
VIN = 3.5 V  
VOUT = −5 V  
Figure 9. INFB vs VIN  
Figure 10. INFB vs Ambient Temperature  
0.9  
260  
0.85  
0.8  
255  
250  
245  
240  
235  
230  
225  
220  
0.75  
0.7  
On Threshold  
0.65  
0.6  
Off Threshold  
0.55  
0.5  
-50  
0
50  
100  
150  
-50  
0
50  
100  
150  
TEMPERATURE (oC)  
TEMPERATURE (oC)  
VIN = 5 V  
Figure 12. VSHUTDOWN vs Ambient Temperature  
Figure 11. Iq vs Ambient Temperature (No Load)  
Copyright © 2001–2015, Texas Instruments Incorporated  
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LM2611  
SNOS965J –JUNE 2001–REVISED DECEMBER 2015  
www.ti.com  
7 Detailed Description  
7.1 Overview  
The LM2611 consists of a current mode controller with an integrated primary switch and integrated current  
sensing circuitry. The feedback is connected to the internal error amplifier and a type II/III internal compensation  
scheme is used. A ramp generator provides some slope compensation to the system. SHDN pin is a logic input  
designed to shut down the converter.  
7.2 Functional Block Diagram  
VI  
N
5
1
{í  
w5  
w6  
ÇI9wa![  
{IÜÇꢀhíb  
tía /hat!w!Çhw  
+
-
CC  
s
-
gm  
w
w
ꢀwLë9w  
v
RC  
CC  
w!at  
D9b9w!Çhw  
v1  
w
+
v2  
x10  
ƒ
/Üww9bÇ [LaLÇ  
/hat!w!Çhw  
w3  
30k  
+
-
1.4aIz  
h{/L[[!Çhw  
w4  
140k  
0.05  
VO  
3
bCꢁ  
w1  
9óÇ9wb![  
CFF  
(OPTIONAL)  
{Iꢀb  
4
{IÜÇꢀhíb  
2
Dbꢀ  
w2  
9óÇ9wb![  
7.3 Feature Description  
7.3.1 Cuk Converter  
+
CCUK  
-
+ CCUK -  
+
[1  
-
-
[2 +  
- [2 +  
+
[1 -  
+
+
VIN  
COUT  
COUT  
VOUT  
VOUT  
VIN  
-
-
a
b
Figure 13. Operating Cycles of a Cuk Converter  
The LM2611 is a current mode, fixed frequency PWM switching regulator with a −1.23-V reference that makes it  
ideal for use in a Cuk converter. The Cuk converter inverts the input and can step up or step down the absolute  
value. Using inductors on both the input and output, the Cuk converter produces very little input and output  
current ripple. This is a significant advantage over other inverting topologies such as the buck-boost and flyback.  
The operating states of the Cuk converter are shown in Figure 13. During the first cycle, the transistor switch is  
closed and the diode is open. L1 is charged by the source and L2 is charged by CCUK, while the output current is  
provided by L2. In the second cycle, L1 charges CCUK and L2 discharges through the load. By applying the volt-  
second balance to either of the inductors, use Equation 1 to determine the relationship of VOUT to the duty cycle  
(D).  
8
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SNOS965J –JUNE 2001–REVISED DECEMBER 2015  
Feature Description (continued)  
D
IN 1-D  
VOUT = -V  
(1)  
The following sections review the steady-state design of the LM2611 Cuk converter.  
7.3.2 Output and Input Inductor  
Figure 14 and Figure 15 show the steady-state voltage and current waveforms for L1 and L2, respectively.  
Referring to Figure 13 (a), when the switch is closed, VIN is applied across L1. In the next cycle, the switch opens  
and the diode becomes forward biased, and VOUT is applied across L1 (the voltage across CCUK is VIN − VOUT.)  
vL1(V)  
VIN  
t
VOUT  
iL1(A)  
DIL1  
IL1  
t
Figure 14. Voltage and Current Waveforms in Inductor L1 of a Cuk Converter  
The voltage and current waveforms of inductor L2 are shown in Figure 15. During the first cycle of operation,  
when the switch is closed, VIN is applied across L2. When the switch opens, VOUT is applied across L2.  
CCUK  
2.2mF  
VOUT-5V  
375mA  
L1A  
22mH  
L1B  
22mH  
VIN  
12V  
1
5
RFB1  
29.4k  
CFF  
1000pF  
VDD  
5V  
SW  
VIN  
D
COUT  
22mF  
4
3
LM2611A  
NFB  
SHDN  
CIN  
GND  
2
22mF  
RFB2  
10k  
CIN: VISHAY/SPRAGUE 595D226X0020C2T  
CCUK: TAIYO YUDEN X5R LMK212BJ105MG  
COUT: TAIYO YUDEN X5R JMK325BJ226MM  
D: ON SEMICONDUCTOR MBR0520  
L1: SUMIDA CLS62-220 or MURATA LZH3C220 (UNCOUPLED)  
Figure 15. Schematic of the Cuk Converter Using LM2611  
Equation 2 to Equation 5 define the values given in Figure 14 and Figure 15:  
IL2 = IOUT  
(2)  
9
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Feature Description (continued)  
V ´D´ TS  
IN  
DiL2  
=
2´L2  
(3)  
(4)  
D
D
IL1 =  
IL2  
=
IOUT  
1-D  
1-D  
V ´D´ TS  
IN  
DiL1 =  
2´L1  
(5)  
Use these equations to choose correct core sizes for the inductors. The design of the LM2611's internal  
compensation assumes L1 and L2 are equal to 10 to 22 µH, thus TI recommends staying within this range.  
7.3.3 Switch Current Limit  
The LM2611 incorporates a separate current limit comparator, making current limit independent of any other  
variables. The current limit comparator measures the switch current versus a reference that represents current  
limit. If at any time the switch current surpasses the current limit, the switch opens until the next switching period.  
To determine the maximum load for a given set of conditions, both the input and output inductor currents must be  
considered. The switch current is equal to iL1 + iL2, and is drawn in Figure 16. In summary, Equation 6 shows:  
iSW(PEAK) = iL1 + iL2 = IL1 + IL2 + DiL1 + DiL2  
æ
ç
è
ö
÷
ø
V ´D´ TS  
D
1
1
æ
ö
IN  
= IOUT ´ 1+  
+
´
+
L1 L2  
ç
÷
1-D  
2
è
ø
(6)  
ISW(PEAK) must be less than the current limit (1.2 A typical), but will also be limited by the thermal resistivity of the  
LM2611 device's 5-pin, SOT-23 package (θJA = 265°C/W).  
iSW(A)  
ICL  
DiL1 +DiL2  
IL1+ IL2  
ISW  
t
iSW  
The peak value is equal to the sum of the average currents through L1 and L2 and the average-to-peak current  
ripples through L1 and L2.  
Figure 16. Switch Current Waveform in a Cuk Converter.  
7.3.4 Input Capacitor  
The input current waveform to a Cuk converter is continuous and triangular, as shown in Figure 14. The input  
inductor insures that the input capacitor sees fairly low ripple currents. However, as the input inductor gets  
smaller, the input ripple goes up. The RMS current in the input capacitor is shown in Equation 7.  
V
1
IN  
ICIN(RMS)  
=
æ
ö
2 3  
V
i
f L  
+1  
ç
÷
s 1ç  
÷
Vo  
è
ø
(7)  
The input capacitor should be capable of handling the RMS current. Although the input capacitor is not so critical  
in a Cuk converter, a 10-µF or higher value good quality capacitor prevents any impedance interactions with the  
input supply. TI recommends connecting a 0.1-µF or 1-µF ceramic bypass capacitor on the VIN pin (pin 5) of the  
IC. This capacitor must be connected very close to pin 5 (within 0.2 inches).  
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Feature Description (continued)  
7.3.5 Output Capacitor  
Like the input current, the output current is also continuous, triangular, and has low ripple (see IL2 in Figure 15).  
The output capacitor must be rated to handle its RMS current:  
DiL2  
V
IN  
1
ICOUT(RMS)  
=
=
æ
ö
3
2 3  
V
i
f L  
+1  
ç
÷
s 2 ç  
÷
Vo  
è
ø
(8)  
For example, ICOUT(RMS) can range from 30 mA to 180 mA with 10 µH ≤ L1,2 ≤ 22 µH, −10 V ≤ VOUT ≤ −3.3 V, and  
2.7 V ≤ VIN ≤ 30 V (VIN may be 30 V if using separate power and analog supplies, see Split Supply Operation in  
the Typical Application section). The worst case conditions are with L1,2, VOUT(MAX), and VIN(MAX). Many capacitor  
technologies will provide this level of RMS current, but ceramic capacitors are ideally suited for the LM2611.  
Ceramic capacitors provide a good combination of capacitance and equivalent series resistance (ESR) to keep  
the zero formed by the capacitance and ESR at high frequencies. Use Equation 9 to calculate the ESR zero.  
1
fESR  
=
(Hz)  
2pCOUTESR  
(9)  
A general rule of thumb is to keep fESR > 80 kHz for LM2611 Cuk designs. Low ESR tantalum capacitors will  
usually be rated for at least 180 mA in a voltage rating of 10 V or above. However the ESR in a tantalum  
capacitor (even in a low ESR tantalum capacitor) is much higher than in a ceramic capacitor and could place fESR  
low enough to cause the LM2611 to become unstable.  
7.3.6 Improving Transient Response and Compensation  
The compensator in the LM2611 is internal. However, a zero-pole pair can be added to the open-loop frequency  
response by inserting a feed-forward capacitor, CFF, in parallel to the top feedback resistor (RFB1). Phase margin  
and bandwidth can be improved with the added zero-pole pair. This in turn improves the transient response to a  
step load change (see Figure 17 and Figure 18). The position of the zero-pole pair is a function of the feedback  
resistors and the capacitor value:  
1
wZ =  
(rad / s)  
CFFRFB1  
(10)  
æ
ö
÷
ø
RFB1  
1
wp =  
1+  
(rad / s)  
ç
CFFRFB1  
RFB2  
è
(11)  
The optimal position for this zero-pole pair will vary with circuit parameters such as D, IOUT, COUT, L1, L2, and  
CCUK. For most cases, the value for the zero frequency is between 5 kHz to 20 kHz. Notice how the pole  
position, ωp, is dependant on the feedback resistors RFB1 and RFB2, and therefore also dependant on the output  
voltage. As the output voltage becomes closer to −1.26 V, the pole moves towards the zero, tending to cancel it  
out. If the absolute magnitude of the output voltage is less than 3.3 V, adding the zero-pole pair will not have  
much effect on the response.  
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Feature Description (continued)  
Figure 17. 130-mA to 400-mA Transient Response  
of the Circuit in Figure 24 With CFF= 1 nF  
Figure 18. 130-mA to 400-mA Transient Response  
of the Circuit in Figure 24 With CFF Disconnected  
7.4 Device Functional Modes  
7.4.1 Hysteretic Mode  
As the output current decreases, the energy stored in the Cuk capacitor eventually exceeds the energy required  
by the load. The excess energy is absorbed by the output capacitor, causing the output voltage to increase out of  
regulation. The LM2611 detects when this happens and enters a pulse-skipping, or hysteretic mode. In pulse-  
skipping mode, the output voltage increases as illustrated in Figure 20 as opposed to the regular PWM operation  
shown in Figure 19. Figure 19 shows the LM2611 in PWM Mode with very-low ripple. Figure 20 shows the  
LM2611 in pulse-skipping mode at low loads. In this mode, the output ripple increases slightly.  
Figure 19. PWM Mode  
Figure 20. Pulse-Skipping Mode  
7.4.1.1 Thermal Shutdown  
If the junction temperature of the LM2611 exceeds 163°C, the device enters thermal shutdown. In thermal  
shutdown, the part deactivates the driver and the switch turns off. The switch remains off until the junction  
temperature drops to 155°C, at which point the part begins switching again. It will typically take 10 ms for the  
junction temperature to drop from 163°C to 155°C with the switch off.  
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8 Application and Implementation  
NOTE  
Information in the following applications sections is not part of the TI component  
specification, and TI does not warrant its accuracy or completeness. TI’s customers are  
responsible for determining suitability of components for their purposes. Customers should  
validate and test their design implementation to confirm system functionality.  
8.1 Application Information  
The LM2611 is a Cuk controller with an integrated switch. The following section provides an approach to sizing  
the components for the target application and shows some typical examples of applications to help the designer.  
8.2 Typical Application  
8.2.1 Cuk Converter With Integrated Switch  
CCUK  
2.2mF  
VOUT-5V  
375mA  
L1A  
22mH  
L1B  
22mH  
VIN  
12V  
1
5
RFB1  
29.4k  
CFF  
1000pF  
VDD  
5V  
SW  
VIN  
D
COUT  
22mF  
4
3
LM2611A  
NFB  
SHDN  
CIN  
GND  
2
22mF  
RFB2  
10k  
CIN: VISHAY/SPRAGUE 595D226X0020C2T  
CCUK: TAIYO YUDEN X5R LMK212BJ105MG  
COUT: TAIYO YUDEN X5R JMK325BJ226MM  
D: ON SEMICONDUCTOR MBR0520  
L1: SUMIDA CLS62-220 or MURATA LZH3C220 (UNCOUPLED)  
Figure 21. Typical Cuk Converter Implementation Using LM26211  
8.2.1.1 Design Requirements  
The first variables needed are the output voltage and the input voltage range (min to max). The input voltage  
range ensures that the IC is suitable for the application and that the absolute maximum voltage are respected.  
The expected maximum output current is also needed to verify that the IC can deliver the required current.  
8.2.1.2 Detailed Design Procedure  
The first components to choose are the power inductors. Typically a smaller inductance yields a smaller solution  
footprint and lower cost but the higher ripple makes a smaller inductance not compatible with every application.  
Due to the internal compensation, TI recommends a 10-µH to 22-µH inductor. Try to choose the inductors so that  
the peak-to-peak ripple is lower than 0.3 A of the average current by using Equation 3 and Equation 5.  
Using the maximum output current and the input voltage range, calculate the worst case peak current in the  
switch using Equation 6. If the peak current is above the peak current limit for this part, consider increasing the  
inductance and re-calculate. If the inductance is above 22 µH for each inductor, the designer will have to pay  
special attention to stability over the extended range of operation (it's always a good practice to do so even if the  
inductance is within the recommended range).  
Using the desired output voltage, calculate the value of the feedback resistors. The reference voltage is 1.23 V.  
Resistors of 50 kΩ or less must be used due to the leakage at the NFB pin.  
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Typical Application (continued)  
It is a good idea to add a placeholder for a small capacitor across the top feedback resistor to act as a feed-  
forward component to optimize transient response. Optimization of the feed-forward capacitor depends a lot on  
the specific parameters including the parasitic components associated with the capacitors. Experimentation is  
key to ensure ideal sizing of the capacitor (either using load transient response or a loop response analyzer).  
See Improving Transient Response and Compensation for details regarding the CFF capacitor.  
8.2.1.3 Application Curves  
700  
700  
600  
500  
600  
500  
400  
300  
200  
100  
0
400  
300  
200  
100  
0
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20  
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20  
OUTPUT VOLTAGE (-V)  
OUTPUT VOLTAGE (-V)  
Figure 22. Maximum Output Current vs Output Voltage at  
VIN = 12 V (L1 = L2 = 22 µH)  
Figure 23. Maximum Output Current vs Output Voltage at  
VIN = 5 V (L1 = L2 = 22 µH)  
8.2.2 5-V to –5-V Inverting Converter  
C
L2  
47 mH  
L1  
15 mH  
CUK  
V
- 5V  
OUT  
300 mA  
1 mF  
V
IN  
5V  
5
1
R
FB1  
C
FF  
29.4k  
V
SW  
330 pF  
IN  
D
C
IN  
4
3
C
OUT  
LM2611A NFB  
SHDN  
22 mF  
22 mF  
GND  
2
R
FB2  
10k  
C
C
C
: TAIYO YUDEN X5R JMK325BJ226MM  
IN  
: TAIYO YUDEN X5R EMK316BJ105MF  
: TAIYO YUDEN X5R JMK325BJ226MM  
CUK  
OUT  
D: ON SEMICONDUCTOR MBR0520  
L1: SUMIDA CR32-150  
L2: SUMIDA CR32-470  
Figure 24. 5-V to –5-V Inverting Converter Schematic  
8.2.2.1 Design Requirements  
This design converts 5 V (VIN) to –5 V (VOUT). Adjust RFB2 to set a different output voltage.  
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Typical Application (continued)  
8.2.2.2 Application Curves  
90  
85  
80  
75  
70  
65  
60  
55  
50  
45  
40  
700  
600  
500  
400  
300  
200  
100  
0
0.05  
0.15  
0.25  
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20  
LOAD CURRENT (A)  
OUTPUT VOLTAGE (-V)  
Figure 25. Efficiency vs Load Current  
Figure 26. Maximum Output Current vs Output Voltage, 5  
V to –5 V  
8.2.3 9-V to –5-V Inverting Converter  
C
L2  
10 mH  
L1  
10 mH  
CUK  
V
OUT  
- 5V  
1 mF  
V
IN  
9V  
R
C
FB1  
FF  
5
1
29.4k  
330 pF  
V
SW  
IN  
D
C
IN  
4
3
C
OUT  
LM2611A  
NFB  
SHDN  
22 mF  
22 mF  
GND  
2
R
FB2  
10k  
C
C
C
: TAIYO YUDEN X5R JMK325BJ226MM  
IN  
: TAIYO YUDEN X5R EMK316BJ105MF  
: TAIYO YUDEN X5R JMK325BJ226MM  
CUK  
OUT  
D: ON SEMICONDUCTOR MBR0520  
L1: SUMIDA CR32-100  
L2: SUMIDA CR32-100  
Figure 27. 9-V to –5-V Inverting Converter Schematic  
8.2.3.1 Design Requirements  
This design converts 9 V (VIN) to –5 V (VOUT). Adjust RFB2 to set a different output voltage.  
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Typical Application (continued)  
8.2.3.2 Application Curve  
700  
600  
500  
400  
300  
200  
100  
0
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20  
OUTPUT VOLTAGE (-V)  
Figure 28. Maximum Output Current vs Output Voltage, 9 V to – 5 V  
8.2.4 12-V to –5-V Inverting Converter  
C
CUK  
L2  
22 mH  
L1  
22 mH  
V
OUT  
- 5V  
2.2 mF  
V
IN  
12V  
5
1
R
FB1  
C
FF  
29.4k  
V
SW  
1000 pF  
IN  
D
C
IN  
4
3
C
OUT  
LM2611A NFB  
SHDN  
22 mF  
22 mF  
GND  
2
R
FB2  
10k  
C
C
C
: TAIYO YUDEN X5R JMK325BJ226MM  
IN  
: TAIYO YUDEN X5R EMK316BJ225ML  
: TAIYO YUDEN X5R JMK325BJ226MM  
CUK  
OUT  
D: ON SEMICONDUCTOR MBR0520  
L1: SUMIDA CR32-220  
L2: SUMIDA CR32-220  
The maximum output current vs output voltage (adjust RFB2 to set a different output voltage) when the input voltage is  
12 V.  
Figure 29. 12-V to –5-V Inverting Converter Schematic  
8.2.4.1 Design Requirements  
This design converts 12 V (VIN) to –5 V (VOUT). Adjust RFB2 to set a different output voltage.  
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Typical Application (continued)  
8.2.4.2 Application Curve  
700  
600  
500  
400  
300  
200  
100  
0
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20  
OUTPUT VOLTAGE (-V)  
Figure 30. Maximum Output Current vs Output Voltage, 12 V to –5 V  
8.2.5 LM2611 Operating With Separate Power and Biasing Supplies  
CCUK  
2.2mF  
VOUT-5V  
375mA  
L1A  
22mH  
L1B  
22mH  
VIN  
12V  
1
5
RFB1  
29.4k  
CFF  
1000pF  
VDD  
5V  
VIN  
SW  
D
COUT  
22mF  
CBYP  
0.1mF  
4
3
LM2611A  
NFB  
SHDN  
CIN  
GND  
2
22mF  
RFB2  
10k  
CIN: VISHAY/SPRAGUE 595D226X0020C2T  
CCUK: TAIYO YUDEN X5R EMK316BJ225ML  
COUT: TAIYO YUDEN X5R JMK325BJ226MM  
D: ON SEMICONDUCTOR MBR0520  
L1: SUMIDA CR32-220  
Figure 31. LM2611 Operating With Separate Power and Biasing Supplies Schematic  
8.2.5.1 Design Requirements  
Follow the design requirements in Cuk Converter With Integrated Switch.  
8.2.5.2 Detailed Design Procedure  
8.2.5.2.1 Split Supply Operation  
The LM2611 may be operated with separate power and bias supplies. In the circuit shown in Figure 31, VIN is the  
power supply that the regulated voltage is derived from, and VDD is a low current supply used to bias the  
LM2611. Equation 12 and Equation 13 show the conditions for the supplies are:  
2.7 V ≤ VDD ≤ 14 V  
(12)  
(13)  
0 V ≤ VIN ≤ (36 - IVOUTI) V  
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Typical Application (continued)  
As the input voltage increases, the maximum output current capacbility increases. Using a separate, higher  
voltage supply for power conversion enables the LM2611 to provide higher output currents than it would with a  
single supply that is limited in voltage by VIN(MAX)  
.
8.2.6 Shutdown and Soft-Start  
VSHDN  
CSS  
0.1uF  
RSS  
100k  
[1!  
22uI  
CCUK  
1uF  
[1.  
22uI  
VIN  
VOUT  
ꢀ
1
RFB1  
29.4k  
CFF  
1000pF  
CIN  
22uF  
VIN  
{í  
5
4
3
COUT  
22uF  
[a2611!  
{I5b  
bC.  
Db5  
2
RFB2  
10k  
Figure 32. LM2611 Soft-Start Circuit  
8.2.6.1 Design Requirements  
Follow the design requirements in Cuk Converter With Integrated Switch.  
8.2.6.2 Detailed Design Procedure  
8.2.6.2.1 Shutdown and Soft-Start  
A soft-start circuit is used in switching power supplies to limit the input inrush current upon start-up. Without a  
soft-start circuit, the inrush current can be several times the steady-state load current, and thus apply  
unnecessary stress to the input source. The LM2611 does not have soft-start circuitry, but implementing the  
circuit in Figure 32 lowers the peak inrush current. The SHDN pin is coupled to the output through CSS. The  
LM2611 is toggled between shutdown and run states while the output slowly decreases to its steady-state value.  
The energy required to reach steady state is spread over a longer time and the input current spikes decrease  
(see Figure 33 and Figure 34).  
8.2.6.3 Application Curves  
Figure 34. Start-Up Waveforms Without a Soft-Start Circuit  
Figure 33. Start-Up Waveforms With a Soft-Start Circuit  
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Typical Application (continued)  
8.2.7 High Duty Cycle and Load Current  
[1  
22uI  
[2  
22uI  
CCUK  
1uF  
VOUT  
-5V  
IN Ç 14ë  
V
Ç
2ꢁ7ë  
ꢀ
1
RFB1  
CFF1  
29.4k  
1000pF  
VIN  
{í  
bC.  
5
4
3
CIN  
COUT  
{I5b [a2611!  
10uF  
22uF  
Db5  
2
RFB2  
1k  
RFB3  
9k  
CFF2  
1uF  
CIN: TAIYO YUDEN X5R JMK325BJ106MN  
CCUK: TAIYO YUDEN X5R TMK316BJ105ML  
COUT: TAIYO YUDEN X5R JMK325BJ226MM  
D: ON SEMICONDUCTOR MBR0520  
L1, L2: SUMIDA CDRH6D28-220  
Figure 35. LM2611 High Current Schematic  
8.2.7.1 Design Requirements  
Follow the design requirements in Cuk Converter With Integrated Switch.  
8.2.7.2 Detailed Design Procedure  
8.2.7.2.1 High Duty Cycle and Load Current Operation  
The circuit in Figure 35 is used for high duty cycles (D > 0.5) and high load currents. The duty cycle begins to  
increase beyond 50% as the input voltage drops below the absolute magnitude of the output voltage. RFB3 and  
CFF2 are added to the feedback network to introduce a low frequency lag compensation (pole-zero pair)  
necessary to stabilize the circuit under the combination of high duty cycle and high load currents.  
9 Power Supply Recommendations  
The power supply must never exceed the absolute maximum rating of the device given in Absolute Maximum  
Ratings. If the regulator is connected to the input supply through long wires or PCB traces, special care is  
required to achieve good performance. The parasitic inductance and resistance of the input cables can have an  
adverse effect on the operation of the regulator. The parasitic inductance, in combination with the low ESR  
ceramic input capacitors, can form an under-damped resonant circuit. This circuit may cause overvoltage  
transients at the VIN pin, each time the input supply is cycled on and off.  
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10 Layout  
10.1 Layout Guidelines  
•
•
•
Connection between L1 and SW pin should be kept as short as possible to minimize inductance  
Connection between CCUK and SW should also be kept short  
The feedback resistor should be placed close to the NFB pin to minimize the path of the higher impedance  
feedback node  
•
•
•
The feedback trace leading from Vout to the output to the feedback resistors should not pass under the  
switch node between L1 and CCUK and the switch node between CCUK, L2 and D  
The feedback trace leading from Vout to the output to the feedback resistors should not pass under the  
inductors L1 and L2  
A bypass capacitor CBYP of 0.1 µF should be placed close to VIN and GND pin  
10.2 Layout Example  
Figure 36. Example Layout Top  
Figure 37. Example Layout Bottom  
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11 Device and Documentation Support  
11.1 Community Resources  
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective  
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of  
Use.  
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration  
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help  
solve problems with fellow engineers.  
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and  
contact information for technical support.  
11.2 Trademarks  
E2E is a trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
11.3 Electrostatic Discharge Caution  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
11.4 Glossary  
SLYZ022 — TI Glossary.  
This glossary lists and explains terms, acronyms, and definitions.  
12 Mechanical, Packaging, and Orderable Information  
The following pages include mechanical, packaging, and orderable information. This information is the most  
current data available for the designated devices. This data is subject to change without notice and revision of  
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.  
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PACKAGE OPTION ADDENDUM  
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6-Aug-2022  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
LM2611AMF  
NRND  
SOT-23  
DBV  
5
1000  
Non-RoHS  
& Green  
Call TI  
Level-1-260C-UNLIM  
-40 to 125  
S40A  
LM2611AMF/NOPB  
LM2611AMFX/NOPB  
LM2611BMF/NOPB  
LM2611BMFX/NOPB  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
5
5
5
5
1000 RoHS & Green  
3000 RoHS & Green  
1000 RoHS & Green  
3000 RoHS & Green  
SN  
SN  
SN  
SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
S40A  
S40A  
S40B  
S40B  
Samples  
Samples  
Samples  
Samples  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
6-Aug-2022  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
9-Aug-2022  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
K0  
P1  
W
B0  
Reel  
Diameter  
Cavity  
A0  
A0 Dimension designed to accommodate the component width  
B0 Dimension designed to accommodate the component length  
K0 Dimension designed to accommodate the component thickness  
Overall width of the carrier tape  
W
P1 Pitch between successive cavity centers  
Reel Width (W1)  
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE  
Sprocket Holes  
Q1 Q2  
Q3 Q4  
Q1 Q2  
Q3 Q4  
User Direction of Feed  
Pocket Quadrants  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LM2611AMF  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
5
5
5
5
5
1000  
1000  
3000  
1000  
3000  
178.0  
178.0  
178.0  
178.0  
178.0  
8.4  
8.4  
8.4  
8.4  
8.4  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
1.4  
1.4  
1.4  
1.4  
1.4  
4.0  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
8.0  
8.0  
Q3  
Q3  
Q3  
Q3  
Q3  
LM2611AMF/NOPB  
LM2611AMFX/NOPB  
LM2611BMF/NOPB  
LM2611BMFX/NOPB  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
9-Aug-2022  
TAPE AND REEL BOX DIMENSIONS  
Width (mm)  
H
W
L
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LM2611AMF  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
5
5
5
5
5
1000  
1000  
3000  
1000  
3000  
210.0  
210.0  
210.0  
210.0  
210.0  
185.0  
185.0  
185.0  
185.0  
185.0  
35.0  
35.0  
35.0  
35.0  
35.0  
LM2611AMF/NOPB  
LM2611AMFX/NOPB  
LM2611BMF/NOPB  
LM2611BMFX/NOPB  
Pack Materials-Page 2  
PACKAGE OUTLINE  
DBV0005A  
SOT-23 - 1.45 mm max height  
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR  
C
3.0  
2.6  
0.1 C  
1.75  
1.45  
1.45  
0.90  
B
A
PIN 1  
INDEX AREA  
1
2
5
(0.1)  
2X 0.95  
1.9  
3.05  
2.75  
1.9  
(0.15)  
4
3
0.5  
5X  
0.3  
0.15  
0.00  
(1.1)  
TYP  
0.2  
C A B  
NOTE 5  
0.25  
GAGE PLANE  
0.22  
0.08  
TYP  
8
0
TYP  
0.6  
0.3  
TYP  
SEATING PLANE  
4214839/G 03/2023  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. Refernce JEDEC MO-178.  
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not  
exceed 0.25 mm per side.  
5. Support pin may differ or may not be present.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
DBV0005A  
SOT-23 - 1.45 mm max height  
SMALL OUTLINE TRANSISTOR  
PKG  
5X (1.1)  
1
5
5X (0.6)  
SYMM  
(1.9)  
2
3
2X (0.95)  
4
(R0.05) TYP  
(2.6)  
LAND PATTERN EXAMPLE  
EXPOSED METAL SHOWN  
SCALE:15X  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
METAL UNDER  
SOLDER MASK  
METAL  
EXPOSED METAL  
EXPOSED METAL  
0.07 MIN  
ARROUND  
0.07 MAX  
ARROUND  
NON SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
4214839/G 03/2023  
NOTES: (continued)  
6. Publication IPC-7351 may have alternate designs.  
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
DBV0005A  
SOT-23 - 1.45 mm max height  
SMALL OUTLINE TRANSISTOR  
PKG  
5X (1.1)  
1
5
5X (0.6)  
SYMM  
(1.9)  
2
3
2X(0.95)  
4
(R0.05) TYP  
(2.6)  
SOLDER PASTE EXAMPLE  
BASED ON 0.125 mm THICK STENCIL  
SCALE:15X  
4214839/G 03/2023  
NOTES: (continued)  
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
9. Board assembly site may have different recommendations for stencil design.  
www.ti.com  
IMPORTANT NOTICE AND DISCLAIMER  
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE  
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”  
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY  
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD  
PARTY INTELLECTUAL PROPERTY RIGHTS.  
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate  
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable  
standards, and any other safety, security, regulatory or other requirements.  
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an  
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TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with  
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