LM26LVCISD-085/NOPB [TI]
具有模拟输出的 ±3°C 1.6V 至 5.5V、出厂预设跳变点温度开关 | NGF | 6 | -40 to 150;
| 型号： | LM26LVCISD-085/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有模拟输出的 ±3°C 1.6V 至 5.5V、出厂预设跳变点温度开关 | NGF | 6 | -40 to 150 开关 输出元件 传感器 换能器 |
| 文件： | 总33页 (文件大小：1664K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM26LV
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SNIS144F –JULY 2007–REVISED FEBRUARY 2013
LM26LV/LM26LV-Q1 1.6 V, WSON-6 Factory Preset Temperature Switch and Temperature
Sensor
Check for Samples: LM26LV
1
FEATURES
DESCRIPTION
The LM26LV/LM26LV-Q1 is a low-voltage, precision,
dual-output, low-power temperature switch and
temperature sensor. The temperature trip point
2
•
Low 1.6V Operation
•
•
Low Quiescent Current
Latching Function: Device Can Latch the Over
Temperature Condition
(TTRIP
temperature in the range of 0°C to 150°C in 1°C
increments. Built-in temperature hysteresis (THYST
) can be preset at the factory to any
)
•
Push-Pull and Open-Drain Temperature Switch
Outputs
keeps the output stable in an environment of
temperature instability.
•
•
Wide Trip Point Range of 0°C to 150°C
In normal operation the LM26LV/LM26LV-Q1
temperature switch outputs assert when the die
temperature exceeds TTRIP. The temperature switch
outputs will reset when the temperature falls below a
Very Linear Analog VTEMP Temperature Sensor
Output
•
•
VTEMP Output Short-Circuit Protected
temperature equal to (TTRIP
−
THYST). The
Accurate Over −50°C to 150°C Temperature
Range
OVERTEMP digital output, is active-high with a push-
pull structure, while the OVERTEMP digital output, is
active-low with an open-drain structure.
•
•
•
2.2 mm by 2.5 mm (typ) WSON-6 Package
Excellent Power Supply Noise Rejection
The analog output, VTEMP, delivers an analog output
voltage with Negative Temperature Coefficient (NTC).
LM26LVQISD–130 and LM26LVQISD-135 are
AEC-Q100 Grade 0 Qualified and are
Manufactured on an Automotive Grade Flow.
For Other Trip Points, Contact Your Sales
Office.
Driving the TRIP TEST input high: (1) causes the
digital outputs to be asserted for in-situ verification
and, (2) causes the threshold voltage to appear at the
VTEMP output pin, which could be used to verify the
temperature trip point.
APPLICATIONS
The LM26LV/LM26LV-Q1's low minimum supply
voltage makes it ideal for 1.8 Volt system designs. Its
wide operating range, low supply current, and
excellent accuracy provide a temperature switch
solution for a wide range of commercial and industrial
applications.
•
•
•
•
•
•
Cell Phones and Wireless Transceivers
Digital Cameras
Battery Management
Automotive
Disk Drives
Games and Appliances
Key Specifications
Supply Voltage
1.6V to 5.5V
Supply Current
8 μA (typ)
Accuracy, Trip Point Temperature
0°C to 150°C
0°C to 150°C
0°C to 120°C
−50°C to 0°C
±2.2°C
±2.3°C
Accuracy, VTEMP
±2.2°C
±1.7°C
VTEMP Output Drive
±100 μA
Operating Temperature
Hysteresis Temperature
−50°C to 150°C
4.5°C to 5.5°C
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2013, Texas Instruments Incorporated
LM26LV
SNIS144F –JULY 2007–REVISED FEBRUARY 2013
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Connection Diagram
TRIP
TEST
1
2
3
6
5
4
V
TEMP
GND
DAP
OVERTEMP
V
DD
OVERTEMP
Figure 1. WSON-6 (Top View)
See Package Number NGF0006A
Typical Transfer Characteristic
Figure 2. VTEMP Analog Voltage vs Die Temperature
Block Diagram
V
DD
4
TRIP TEST = 0
(Default)
LM26LV
6
3
V
TEMP
TRIP TEST = 1
OVERTEMP
V
V
TRIP
TS
V
DD
TEMP
SENSOR
TEMP
5
THRESHOLD
OVERTEMP
1
2
GND
TRIP
TEST
2
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SNIS144F –JULY 2007–REVISED FEBRUARY 2013
Pin Descriptions
Pin
No.
Name
Type
Equivalent Circuit
Description
V
DD
TRIP TEST pin. Active High input.
If TRIP TEST = 0 (Default) then:
VTEMP = VTS, Temperature Sensor Output Voltage
If TRIP TEST = 1 then:
OVERTEMP and OVERTEMP outputs are asserted and
VTEMP = VTRIP, Temperature Trip Voltage.
This pin may be left open if not used.
TRIP
TEST
Digital
Input
1
1 mA
GND
V
DD
Over Temperature Switch output
Active High, Push-Pull
Asserted when the measured temperature exceeds the Trip Point
Temperature or if TRIP TEST = 1
Digital
Output
5
OVERTEMP
This pin may be left open if not used.
GND
Over Temperature Switch output
Active Low, Open-drain (See Determining the Pull-up Resistor Value)
Asserted when the measured temperature exceeds the Trip Point
Temperature or if TRIP TEST = 1
Digital
Output
3
6
OVERTEMP
This pin may be left open if not used.
GND
V
DD
V
SENSE
VTEMP Analog Voltage Output
If TRIP TEST = 0 then
VTEMP = VTS, Temperature Sensor Output Voltage
If TRIP TEST = 1 then
Analog
Output
VTEMP
VTEMP = VTRIP, Temperature Trip Voltage
This pin may be left open if not used.
GND
4
2
VDD
Power
Positive Supply Voltage
Power Supply Ground
GND
Ground
The best thermal conductivity between the device and the PCB is achieved
by soldering the DAP of the package to the thermal pad on the PCB. The
thermal pad can be a floating node. However, for improved noise immunity
the thermal pad should be connected to the circuit GND node, preferably
directly to pin 2 (GND) of the device.
DAP
Die Attach Pad
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Typical Application
V
V
Supply
DD
DD
Analog
(+1.6V to +5.5V)
V
ADC Input
TEMP
Example: 2 to 3
Battery Cells
LM26LV
Microcontroller
OVERTEMP
OVERTEMP
TRIP TEST
GND
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)
Supply Voltage
−0.3V to +6.0V
−0.3V to +6.0V
−0.3V to (VDD + 0.5V)
−0.3V to (VDD + 0.5V)
±7 mA
Voltage at OVERTEMP pin
Voltage at OVERTEMP and VTEMP pins
TRIP TEST Input Voltage
Output Current, any output pin
Input Current at any pin(2)
Storage Temperature
5 mA
−65°C to +150°C
+155°C
Maximum Junction Temperature, TJ(MAX)
Human Body Model
Machine Model
4500V
ESD Susceptibility(3)
300V
Charged Device Model
1000V
For soldering specifications: see product folder at www.ti.com and http://www.ti.com/lit/SNOA549
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see
the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics
may degrade when the device is not operated under the listed test conditions.
(2) When the input voltage (VI) at any pin exceeds power supplies (VI < GND or VI > VDD), the current at that pin should be limited to 5mA.
(3) The Human Body Model (HBM) is a 100pF capacitor charged to the specified voltage then discharged through a 1.5kΩ resistor into
each pin. The Machine Model (MM) is a 200pF capacitor charged to the specified voltage then discharged directly into each pin. The
Charged Device Model (CDM) is a specified circuit characterizing an ESD event that occurs when a device acquires charge through
some triboelectric (frictional) or electrostatic induction processes and then abruptly touches a grounded object or surface.
Operating Ratings(1)
Specified Temperature Range:
TMIN ≤ TA ≤ TMAX
LM26LV/LM26LV-Q1
−50°C ≤ TA ≤ +150°C
+1.6 V to +5.5 V
152 °C/W
Supply Voltage Range (VDD
)
(2)
Thermal Resistance (θJA
)
WSON-6 (Package NGF0006A)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see
the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics
may degrade when the device is not operated under the listed test conditions.
(2) The junction to ambient temperature resistance (θJA) is specified without a heat sink in still air.
4
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SNIS144F –JULY 2007–REVISED FEBRUARY 2013
Accuracy Characteristics Trip Point Accuracy
Units
(Limit)
Parameter
Conditions
Limits(1)
Trip Point Accuracy(2)
0 − 150°C
VDD = 5.0 V
±2.2
°C (max)
(1) Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level).
(2) Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Conversion Table at the
specified conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the
specified conditions. Accuracy limits do not include load regulation; they assume no DC load.
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Accuracy Characteristics VTEMP Analog Temperature Sensor Output Accuracy(1)
There are four gains corresponding to each of the four Temperature Trip Point Ranges. Gain 1 is the sensor gain used for
Temperature Trip Point 0 - 69°C. Likewise Gain 2 is for Trip Points 70 - 109 °C; Gain 3 for 110 - 129 °C; and Gain 4 for 130 -
150 °C. These limits do not include DC load regulation. These stated accuracy limits are with reference to the values in the
LM26LV/LM26LV-Q1 Conversion Table.
Units
(Limit)
Parameter
Conditions
Limits(2)
TA = 20°C to 40°C
TA = 0°C to 70°C
TA = 0°C to 90°C
TA = 0°C to 120°C
TA = 0°C to 150°C
TA = −50°C to 0°C
TA = 20°C to 40°C
TA = 0°C to 70°C
TA = 0°C to 90°C
TA = 0°C to 120°C
TA = 0°C to 150°C
TA = −50°C to 0°C
TA = 20°C to 40°C
TA = 0°C to 70°C
TA = 0°C to 90°C
TA = 0°C to 120°C
TA = 0°C to 150°C
TA = −50°C to 0°C
TA = 20°C to 40°C
TA = 0°C to 70°C
TA = 0°C to 90°C
TA = 0°C to 120°C
TA = 0°C to 150°C
TA = −50°C to 0°C
VDD = 1.6 to 5.5 V
VDD = 1.6 to 5.5 V
VDD = 1.6 to 5.5 V
VDD = 1.6 to 5.5 V
VDD = 1.6 to 5.5 V
VDD = 1.7 to 5.5 V
VDD = 1.8 to 5.5 V
VDD = 1.9 to 5.5 V
VDD = 1.9 to 5.5 V
VDD = 1.9 to 5.5 V
VDD = 1.9 to 5.5 V
VDD = 2.3 to 5.5 V
VDD = 2.3 to 5.5 V
VDD = 2.5 to 5.5 V
VDD = 2.5 to 5.5 V
VDD = 2.5 to 5.5 V
VDD = 2.5 to 5.5 V
VDD = 3.0 to 5.5 V
VDD = 2.7 to 5.5 V
VDD = 3.0 to 5.5 V
VDD = 3.0 to 5.5 V
VDD = 3.0 to 5.5 V
VDD = 3.0 to 5.5 V
VDD = 3.6 to 5.5 V
±1.8
±2.0
±2.1
±2.2
±2.3
±1.7
±1.8
±2.0
±2.1
±2.2
±2.3
±1.7
±1.8
±2.0
±2.1
±2.2
±2.3
±1.7
±1.8
±2.0
±2.1
±2.2
±2.3
±1.7
Gain 1: for Trip Point
Range 0 - 69°C
°C (max)
Gain 2: for Trip Point
Range 70 - 109°C
°C (max)
°C (max)
°C (max)
VTEMP Temperature
Accuracy(3)
Gain 3: for Trip Point
Range 110 - 129°C
Gain 4: for Trip Point
Range 130 - 150°C
(1) Changes in output due to self heating can be computed by multiplying the internal dissipation by the temperature resistance.
(2) Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level).
(3) Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Conversion Table at the
specified conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the
specified conditions. Accuracy limits do not include load regulation; they assume no DC load.
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SNIS144F –JULY 2007–REVISED FEBRUARY 2013
Electrical Characteristics
Unless otherwise noted, these specifications apply for +VDD = +1.6V to +5.5V. Boldface limits apply for TA = TJ = TMIN to
TMAX ; all other limits TA = TJ = 25°C.
Units
(Limit)
Symbol
Parameter
Conditions
Typical(1)
Limits(2)
GENERAL SPECIFICATIONS
Quiescent Power Supply
IS
8
5
16
μA (max)
Current
5.5
4.5
°C (max)
°C (min)
Hysteresis
OVERTEMP DIGITAL OUTPUT
ACTIVE HIGH, PUSH-PULL
VDD ≥ 1.6V
VDD ≥ 2.0V
VDD ≥ 3.3V
VDD ≥ 1.6V
VDD ≥ 2.0V
VDD ≥ 3.3V
Source ≤ 340 μA
Source ≤ 498 μA
Source ≤ 780 μA
Source ≤ 600 μA
Source ≤ 980 μA
Source ≤ 1.6 mA
V
DD − 0.2V
V (min)
V (min)
VOH
Logic "1" Output Voltage
VDD − 0.45V
BOTH OVERTEMP and OVERTEMP DIGITAL OUTPUTS
VDD ≥ 1.6V
VDD ≥ 2.0V
VDD ≥ 3.3V
VDD ≥ 1.6V
VDD ≥ 2.0V
VDD ≥ 3.3V
Sink ≤ 385 μA
Sink ≤ 500 μA
Sink ≤ 730 μA
Sink ≤ 690 μA
Sink ≤ 1.05 mA
Sink ≤ 1.62 mA
0.2
VOL
Logic "0" Output Voltage
V (max)
0.45
OVERTEMP DIGITAL OUTPUT
Logic "1" Output Leakage
ACTIVE LOW, OPEN DRAIN
TA = 30 °C
0.001
0.025
IOH
1
μA (max)
Current(3)
TA = 150 °C
VTEMP ANALOG TEMPERATURE SENSOR OUTPUT
Gain 1: If Trip Point = 0 - 69°C
−5.1
−7.7
mV/°C
mV/°C
mV/°C
mV/°C
Gain 2: If Trip Point = 70 - 109°C
Gain 3: If Trip Point = 110 - 129°C
Gain 4: If Trip Point = 130 - 150°C
Source ≤ 90 μA
VTEMP Sensor Gain
−10.3
−12.8
−0.1
0.1
−1
1
mV (max)
mV (max)
mV (max)
mV (max)
(VDD − VTEMP) ≥ 200 mV
Sink ≤ 100 μA
TEMP ≥ 260 mV
1.6V ≤ VDD < 1.8V
V
VTEMP Load Regulation(4)
Source ≤ 120 μA
−0.1
0.1
−1
1
(VDD − VTEMP) ≥ 200 mV
VDD ≥ 1.8V
Sink ≤ 200 μA
VTEMP ≥ 260 mV
Source or Sink = 100 μA
1
Ω
mV
μV/V
dB
0.29
74
VDD Supply- to-VTEMP
DC Line Regulation(5)
VDD = +1.6V to +5.5V
−82
VTEMP Output Load
Capacitance
CL
Without series resistor. See CAPACITIVE LOADS
1100
pF (max)
(1) Typicals are at TJ = TA = 25°C and represent most likely parametric norm.
(2) Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level).
(3) The 1µA limit is based on a testing limitation and does not reflect the actual performance of the part. Expect to see a doubling of the
current for every 15°C increase in temperature. For example, the 1nA typical current at 25°C would increase to 16nA at 85°C.
(4) Source currents are flowing out of the LM26LV/LM26LV-Q1. Sink currents are flowing into the LM26LV/LM26LV-Q1.
(5) Line regulation (DC) is calculated by subtracting the output voltage at the highest supply voltage from the output voltage at the lowest
supply voltage. The typical DC line regulation specification does not include the output voltage shift discussed in Section 4.3.
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Electrical Characteristics (continued)
Unless otherwise noted, these specifications apply for +VDD = +1.6V to +5.5V. Boldface limits apply for TA = TJ = TMIN to
TMAX ; all other limits TA = TJ = 25°C.
Units
(Limit)
Symbol
Parameter
Conditions
Typical(1)
Limits(2)
TRIP TEST DIGITAL INPUT
VIH
VIL
Logic "1" Threshold Voltage
V
DD− 0.5
V (min)
V (max)
μA (max)
μA (max)
Logic "0" Threshold Voltage
Logic "1" Input Current
Logic "0" Input Current(6)
0.5
IIH
1.5
2.5
IIL
0.001
1
TIMING
Time from Power On to Digital
Output Enabled. See definition
below.
tEN
tV
1.1
1.0
2.3
2.9
ms (max)
ms (max)
Time from Power On to Analog VTEMP CL = 0 pF to 1100 pF
Temperature Valid. See
definition below.
(6) The 1µA limit is based on a testing limitation and does not reflect the actual performance of the part. Expect to see a doubling of the
current for every 15°C increase in temperature. For example, the 1nA typical current at 25°C would increase to 16nA at 85°C.
V
DD
1.3V
t
EN
OVERTEMP
OVERTEMP
Enabled
Enabled
V
DD
t
VTEMP
Valid
V
TEMP
Figure 3. Definitions of tEN and tV
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Typical Performance Characteristics
VTEMP Output Temperature Error
Minimum Operating Temperature
vs.
vs.
Temperature
Supply Voltage
Figure 4.
Figure 5.
Supply Current
vs.
Temperature
Supply Current
vs.
Supply Voltage
Figure 6.
Figure 7.
Load Regulation, 100 mV Overhead
T = 80°C Sourcing Current(1)
Load Regulation, 200 mV Overhead
T = 80°C Sourcing Current(1)
Figure 8.
Figure 9.
(1) The curves shown represent typical performance under worst-case conditions. Performance improves with larger overhead (VDD
VTEMP), larger VDD, and lower temperatures.
−
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Typical Performance Characteristics (continued)
Load Regulation, 1.72V Overhead
Load Regulation, 400 mV Overhead
T = 80°C Sourcing Current(1)
T = 150°C, VDD = 2.4V
Sourcing Current(1)
Figure 10.
Figure 11.
Load Regulation, VDD = 1.6V
Sinking Current(2)
Load Regulation, VDD = 1.8V
Sinking Current(2)
Figure 12.
Figure 13.
Change in VTEMP
vs.
Overhead Voltage
Load Regulation, VDD = 2.4V
Sinking Current(3)
Figure 14.
Figure 15.
(2) The curves shown represent typical performance under worst-case conditions. Performance improves with larger VTEMP, larger VDD and
lower temperatures.
(3) The curves shown represent typical performance under worst-case conditions. Performance improves with larger VTEMP, larger VDD and
lower temperatures.
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Typical Performance Characteristics (continued)
VTEMP Supply-Noise Rejection
Line Regulation
VTEMP vs. Supply Voltage
Gain 1: For Trip Points 0 - 69°C
vs.
Frequency
Figure 16.
Figure 17.
Line Regulation VTEMP vs. Supply Voltage
Gain 2: For Trip Points 70 - 109°C
Line Regulation VTEMP vs. Supply Voltage
Gain 3: For Trip Points 110 - 129°C
Figure 18.
Figure 19.
Line Regulation VTEMP vs. Supply Voltage
Gain 4: For Trip Points 130 - 150°C
Figure 20.
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LM26LV/LM26LV-Q1 VTEMP VS DIE TEMPERATURE CONVERSION TABLE
The LM26LV/LM26LV-Q1 has one out of four possible factory-set gains, Gain 1 through Gain 4, depending on
the range of the Temperature Trip Point. The VTEMP temperature sensor voltage, in millivolts, at each discrete die
temperature over the complete operating temperature range, and for each of the four Temperature Trip Point
ranges, is shown in the Conversion Table. This table is the reference from which the LM26LV/LM26LV-Q1
accuracy specifications (listed in the Electrical Characteristics section) are determined. This table can be used,
for example, in a host processor look-up table. See The Second-Order Equation (Parabolic) for the parabolic
equation used in the Conversion Table.
Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1)
VTEMP, Analog Output Voltage, mV
Die Temp.,
Gain 1: for
Gain 2: for
Gain 3: for
Gain 4: for
TTRIP = 130-150°C
°C
TTRIP = 0-69°C
TTRIP = 70-109°C
TTRIP = 110-129°C
−50
−49
−48
−47
−46
−45
−44
−43
−42
−41
−40
−39
−38
−37
−36
−35
−34
−33
−32
−31
−30
−29
−28
−27
−26
−25
−24
−23
−22
−21
−20
−19
−18
−17
1312
1307
1302
1297
1292
1287
1282
1277
1272
1267
1262
1257
1252
1247
1242
1237
1232
1227
1222
1217
1212
1207
1202
1197
1192
1187
1182
1177
1172
1167
1162
1157
1152
1147
1967
1960
1952
1945
1937
1930
1922
1915
1908
1900
1893
1885
1878
1870
1863
1855
1848
1840
1833
1825
1818
1810
1803
1795
1788
1780
1773
1765
1757
1750
1742
1735
1727
1720
2623
2613
2603
2593
2583
2573
2563
2553
2543
2533
2523
2513
2503
2493
2483
2473
2463
2453
2443
2433
2423
2413
2403
2393
2383
2373
2363
2353
2343
2333
2323
2313
2303
2293
3278
3266
3253
3241
3229
3216
3204
3191
3179
3166
3154
3141
3129
3116
3104
3091
3079
3066
3054
3041
3029
3016
3004
2991
2979
2966
2954
2941
2929
2916
2903
2891
2878
2866
(1) The VTEMP temperature sensor output voltage, in mV, vs Die Temperature, in °C, for each of the four gains corresponding to each of the
four Temperature Trip Point Ranges. Gain 1 is the sensor gain used for Temperature Trip Point 0 - 69°C. Likewise Gain 2 is for Trip
Points 70 - 109 °C; Gain 3 for 110 - 129 °C; and Gain 4 for 130 - 150 °C. VDD = 5.0V. The values in bold font are for the Trip Point
range.
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Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1) (continued)
VTEMP, Analog Output Voltage, mV
Die Temp.,
Gain 1: for
Gain 2: for
Gain 3: for
Gain 4: for
TTRIP = 130-150°C
°C
TTRIP = 0-69°C
TTRIP = 70-109°C
TTRIP = 110-129°C
−16
−15
−14
−13
−12
−11
−10
−9
−8
−7
−6
−5
−4
−3
−2
−1
0
1142
1137
1132
1127
1122
1116
1111
1106
1101
1096
1091
1086
1081
1076
1071
1066
1061
1056
1051
1046
1041
1035
1030
1025
1020
1015
1010
1005
1000
995
1712
1705
1697
1690
1682
1674
1667
1659
1652
1644
1637
1629
1621
1614
1606
1599
1591
1583
1576
1568
1561
1553
1545
1538
1530
1522
1515
1507
1499
1492
1484
1477
1469
1461
1454
1446
1438
1431
1423
1415
1407
1400
1392
1384
1377
1369
2283
2272
2262
2252
2242
2232
2222
2212
2202
2192
2182
2171
2161
2151
2141
2131
2121
2111
2101
2090
2080
2070
2060
2050
2040
2029
2019
2009
1999
1989
1978
1968
1958
1948
1938
1927
1917
1907
1897
1886
1876
1866
1856
1845
1835
1825
2853
2841
2828
2815
2803
2790
2777
2765
2752
2740
2727
2714
2702
2689
2676
2664
2651
2638
2626
2613
2600
2587
2575
2562
2549
2537
2524
2511
2498
2486
2473
2460
2447
2435
2422
2409
2396
2383
2371
2358
2345
2332
2319
2307
2294
2281
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
990
985
980
974
969
964
959
954
949
944
939
934
928
923
918
913
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Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1) (continued)
VTEMP, Analog Output Voltage, mV
Die Temp.,
Gain 1: for
Gain 2: for
Gain 3: for
Gain 4: for
TTRIP = 130-150°C
°C
TTRIP = 0-69°C
TTRIP = 70-109°C
TTRIP = 110-129°C
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
908
903
898
892
887
882
877
872
867
862
856
851
846
841
836
831
825
820
815
810
805
800
794
789
784
779
774
769
763
758
753
748
743
737
732
727
722
717
711
706
701
696
690
685
680
675
1361
1354
1346
1338
1331
1323
1315
1307
1300
1292
1284
1276
1269
1261
1253
1245
1238
1230
1222
1214
1207
1199
1191
1183
1176
1168
1160
1152
1144
1137
1129
1121
1113
1105
1098
1090
1082
1074
1066
1059
1051
1043
1035
1027
1019
1012
1815
1804
1794
1784
1774
1763
1753
1743
1732
1722
1712
1701
1691
1681
1670
1660
1650
1639
1629
1619
1608
1598
1588
1577
1567
1557
1546
1536
1525
1515
1505
1494
1484
1473
1463
1453
1442
1432
1421
1411
1400
1390
1380
1369
1359
1348
2268
2255
2242
2230
2217
2204
2191
2178
2165
2152
2139
2127
2114
2101
2088
2075
2062
2049
2036
2023
2010
1997
1984
1971
1958
1946
1933
1920
1907
1894
1881
1868
1855
1842
1829
1816
1803
1790
1776
1763
1750
1737
1724
1711
1698
1685
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Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1) (continued)
VTEMP, Analog Output Voltage, mV
Die Temp.,
Gain 1: for
Gain 2: for
Gain 3: for
Gain 4: for
TTRIP = 130-150°C
°C
TTRIP = 0-69°C
TTRIP = 70-109°C
TTRIP = 110-129°C
76
77
670
664
659
654
649
643
638
633
628
622
617
612
607
601
596
591
586
580
575
570
564
559
554
549
543
538
533
527
522
517
512
506
501
496
490
485
480
474
469
464
459
453
448
443
437
432
1004
996
988
980
972
964
957
949
941
933
925
917
909
901
894
886
878
870
862
854
846
838
830
822
814
807
799
791
783
775
767
759
751
743
735
727
719
711
703
695
687
679
671
663
655
647
1338
1327
1317
1306
1296
1285
1275
1264
1254
1243
1233
1222
1212
1201
1191
1180
1170
1159
1149
1138
1128
1117
1106
1096
1085
1075
1064
1054
1043
1032
1022
1011
1001
990
1672
1659
1646
1633
1620
1607
1593
1580
1567
1554
1541
1528
1515
1501
1488
1475
1462
1449
1436
1422
1409
1396
1383
1370
1357
1343
1330
1317
1304
1290
1277
1264
1251
1237
1224
1211
1198
1184
1171
1158
1145
1131
1118
1105
1091
1078
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
979
969
958
948
937
926
916
905
894
884
873
862
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Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1) (continued)
VTEMP, Analog Output Voltage, mV
Die Temp.,
Gain 1: for
Gain 2: for
Gain 3: for
Gain 4: for
TTRIP = 130-150°C
°C
TTRIP = 0-69°C
TTRIP = 70-109°C
TTRIP = 110-129°C
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
427
421
416
411
405
400
395
389
384
379
373
368
362
357
352
346
341
336
330
325
320
314
309
303
298
293
287
282
277
639
631
623
615
607
599
591
583
575
567
559
551
543
535
527
519
511
503
495
487
479
471
463
455
447
438
430
422
414
852
841
831
820
809
798
788
777
766
756
745
734
724
713
702
691
681
670
659
649
638
627
616
606
595
584
573
562
552
1065
1051
1038
1025
1011
998
985
971
958
945
931
918
904
891
878
864
851
837
824
811
797
784
770
757
743
730
716
703
690
VTEMP vs DIE TEMPERATURE APPROXIMATIONS
The LM26LV/LM26LV-Q1's VTEMP analog temperature output is very linear. The Conversion Table above and the
equation in the Section The Second-Order Equation (Parabolic) represent the most accurate typical performance
of the VTEMP voltage output vs Temperature.
The Second-Order Equation (Parabolic)
The data from the Conversion Table, or the equation below, when plotted, has an umbrella-shaped parabolic
curve. VTEMP is in mV.
GAIN1: VTEMP = 907.9 - 5.132 x (TDIE - 30°C) - 1.08e-3 x (T DIE - 30°C) 2
GAIN2: VTEMP = 1361.4 - 7.701 x (TDIE - 30°C) - 1.60e-3 x (T DIE - 30°C) 2
GAIN3: VTEMP = 1814.6 - 10.270 x (TDIE - 30°C) - 2.12e-3 x (T DIE - 30°C) 2
GAIN4: VTEMP = 2268.1 - 12.838 x (TDIE - 30°C) - 2.64e-3 x (T DIE - 30°C) 2
(1)
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The First-Order Approximation (Linear)
For a quicker approximation, although less accurate than the second-order, over the full operating temperature
range the linear formula below can be used. Using this formula, with the constant and slope in the following set
of equations, the best-fit VTEMP vs Die Temperature performance can be calculated with an approximation error
less than 18 mV. VTEMP is in mV.
GAIN1: VTEMP = 1060 - 5.18 x TDIE
GAIN2: VTEMP = 1590 - 7.77 x TDIE
GAIN3: VTEMP = 2119 - 10.36 x TDIE
GAIN4: VTEMP = 2649 - 12.94 x TDIE
(2)
First-Order Approximation (Linear) over Small Temperature Range
For a linear approximation, a line can easily be calculated over the desired temperature range from the
Conversion Table using the two-point equation:
V2 - V1
’
◊
’
ì
V - V1 =
(T - T1)
T2 - T1
(3)
Where V is in mV, T is in °C, T1 and V1 are the coordinates of the lowest temperature, T2 and V2 are the
coordinates of the highest temperature.
For example, if we want to determine the equation of a line with Gain 4, over a temperature range of 20°C to
50°C, we would proceed as follows:
◊
2010 mV - 2396 mV
’
◊
’
x
V - 2396 mV =
(T - 20°C)
50°C - 20°C
(4)
(5)
(6)
x
(-12.8 mV/°C) (T - 20°C)
V - 2396 mV =
x
(-12.8 mV/°C) (T-20°C) + 2396 mV
V =
Using this method of linear approximation, the transfer function can be approximated for one or more
temperature ranges of interest.
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OVERTEMP and OVERTEMP Digital Outputs
The OVERTEMP Active High, Push-Pull Output and the OVERTEMP Active Low, Open-Drain Output both assert
at the same time whenever the Die Temperature reaches the factory preset Temperature Trip Point. They also
assert simultaneously whenever the TRIP TEST pin is set high. Both outputs de-assert when the die temperature
goes below the Temperature Trip Point - Hysteresis. These two types of digital outputs enable the user the
flexibility to choose the type of output that is most suitable for his design.
Either the OVERTEMP or the OVERTEMP Digital Output pins can be left open if not used.
OVERTEMP OPEN-DRAIN DIGITAL OUTPUT
The OVERTEMP Active Low, Open-Drain Digital Output, if used, requires a pull-up resistor between this pin and
VDD. The following section shows how to determine the pull-up resistor value.
Determining the Pull-up Resistor Value
V
DD
i
T
R
Pull-Up
V
OUT
OVERTEMP
Digital Input
i
L
i
sink
The Pull-up resistor value is calculated at the condition of maximum total current, iT, through the resistor. The
total current is:
iT = iL + isink
(7)
where,
iT
iL
iT is the maximum total current through the Pull-up Resistor at VOL
iL is the load current, which is very low for typical digital inputs.
.
VOUT VOUT is the Voltage at the OVERTEMP pin. Use VOL for calculating the Pull-up resistor.
VDD(Max) VDD(Max) is the maximum power supply voltage to be used in the customer's system.
The pull-up resistor maximum value can be found by using the following formula:
Rpull-up = VDD (Max) œ VOL
iT
(8)
EXAMPLE CALCULATION
Suppose we have, for our example, a VDD of 3.3 V ± 0.3V, a CMOS digital input as a load, a VOL of 0.2 V.
1. We see that for VOL of 0.2 V the electrical specification for OVERTEMP shows a maximim isink of 385 µA.
2. Let iL= 1 µA, then iT is about 386 µA max. If we select 35 µA as the current limit then iT for the calculation
becomes 35 µA
3. We notice that VDD(Max) is 3.3V + 0.3V = 3.6V and then calculate the pull-up resistor as RPull-up = (3.6 −
0.2)/35 µA = 97k
4. Based on this calculated value, we select the closest resistor value in the tolerance family we are using.
In our example, if we are using 5% resistor values, then the next closest value is 100 kΩ.
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NOISE IMMUNITY
The LM26LV/LM26LV-Q1 is virtually immune from false triggers on the OVERTEMP and OVERTEMP digital
outputs due to noise on the power supply. Test have been conducted showing that, with the die temperature
within 0.5°C of the temperature trip point, and the severe test of a 3 Vpp square wave "noise" signal injected on
the VDD line, over the VDD range of 2V to 5V, there were no false triggers.
TRIP TEST Digital Input
The TRIP TEST pin simply provides a means to test the OVERTEMP and OVERTEMP digital outputs
electronically by causing them to assert, at any operating temperature, as a result of forcing the TRIP TEST pin
high.
When the TRIP TEST pin is pulled high the VTEMP pin will be at the VTRIP voltage.
If not used, the TRIP TEST pin may either be left open or grounded.
VTEMP Analog Temperature Sensor Output
The VTEMP push-pull output provides the ability to sink and source significant current. This is beneficial when, for
example, driving dynamic loads like an input stage on an analog-to-digital converter (ADC). In these applications
the source current is required to quickly charge the input capacitor of the ADC. See the Applications Circuits
section for more discussion of this topic. The LM26LV/LM26LV-Q1 is ideal for this and other applications which
require strong source or sink current.
NOISE CONSIDERATIONS
The LM26LV/LM26LV-Q1's supply-noise rejection (the ratio of the AC signal on VTEMP to the AC signal on VDD
)
was measured during bench tests. It's typical attenuation is shown in the Typical Performance Characteristics
section. A load capacitor on the output can help to filter noise.
For operation in very noisy environments, some bypass capacitance should be present on the supply within
approximately 2 inches of the LM26LV/LM26LV-Q1.
CAPACITIVE LOADS
The VTEMP Output handles capacitive loading well. In an extremely noisy environment, or when driving a switched
sampling input on an ADC, it may be necessary to add some filtering to minimize noise coupling. Without any
precautions, the VTEMP can drive a capacitive load less than or equal to 1100 pF as shown in Figure 21. For
capacitive loads greater than 1100 pF, a series resistor is required on the output, as shown in Figure 22, to
maintain stable conditions.
V
DD
V
TEMP
LM26LV
GND
OPTIONAL
BYPASS
CAPACITANCE
C
LOAD
Ç 1100 pF
Figure 21. LM26LV/LM26LV-Q1 No Decoupling Required for Capacitive Loads Less than 1100pF.
V
DD
R
S
V
TEMP
LM26LV
GND
OPTIONAL
BYPASS
CAPACITANCE
C
>
LOAD
1100 pF
Figure 22. LM26LV/LM26LV-Q1 with series resistor for capacitive loading greater than 1100pF
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CLOAD
1.1 nF to 99 nF
100 nF to 999 nF
1 μF
Minimum RS
3 kΩ
1.5 kΩ
800 Ω
VOLTAGE SHIFT
The LM26LV/LM26LV-Q1 is very linear over temperature and supply voltage range. Due to the intrinsic behavior
of an NMOS/PMOS rail-to-rail buffer, a slight shift in the output can occur when the supply voltage is ramped
over the operating range of the device. The location of the shift is determined by the relative levels of VDD and
VTEMP. The shift typically occurs when VDD − VTEMP = 1.0V.
This slight shift (a few millivolts) takes place over a wide change (approximately 200 mV) in VDD or VTEMP. Since
the shift takes place over a wide temperature change of 5°C to 20°C, VTEMP is always monotonic. The accuracy
specifications in the Electrical Characteristics table already includes this possible shift.
Mounting and Temperature Conductivity
The LM26LV/LM26LV-Q1 can be applied easily in the same way as other integrated-circuit temperature sensors.
It can be glued or cemented to a surface.
The best thermal conductivity between the device and the PCB is achieved by soldering the DAP of the package
to the thermal pad on the PCB. The temperatures of the lands and traces to the other leads of the
LM26LV/LM26LV-Q1 will also affect the temperature reading.
Alternatively, the LM26LV/LM26LV-Q1 can be mounted inside a sealed-end metal tube, and can then be dipped
into a bath or screwed into a threaded hole in a tank. As with any IC, the LM26LV/LM26LV-Q1 and
accompanying wiring and circuits must be kept insulated and dry, to avoid leakage and corrosion. This is
especially true if the circuit may operate at cold temperatures where condensation can occur. If moisture creates
a short circuit from the VTEMP output to ground or VDD, the VTEMP output from the LM26LV/LM26LV-Q1 will not be
correct. Printed-circuit coatings are often used to ensure that moisture cannot corrode the leads or circuit traces.
The thermal resistance junction-to-ambient (θJA) is the parameter used to calculate the rise of a device junction
temperature due to its power dissipation. The equation used to calculate the rise in the LM26LV/LM26LV-Q1's
die temperature is
TJ = TA + qJA (VDDIQ) + (VDD - VTEMP) IL
[
]
(9)
where TA is the ambient temperature, IQ is the quiescent current, IL is the load current on the output, and VO is
the output voltage. For example, in an application where TA = 30 °C, VDD = 5 V, IDD = 9 μA, Gain 4, VTEMP = 2231
mV, and IL = 2 μA, the junction temperature would be 30.021 °C, showing a self-heating error of only 0.021°C.
Since the LM26LV/LM26LV-Q1's junction temperature is the actual temperature being measured, care should be
taken to minimize the load current that the VTEMP output is required to drive. If The OVERTEMP output is used
with a 100 k pull-up resistor, and this output is asserted (low), then for this example the additional contribution is
[(152° C/W)x(5V)2/100k] = 0.038°C for a total self-heating error of 0.059°C. Table 2 shows the thermal resistance
of the LM26LV/LM26LV-Q1.
Table 2. LM26LV/LM26LV-Q1 Thermal Resistance
Device Number
NS Package Number
Thermal Resistance (θJA)
LM26LVCSID/LM26LVQCISD
NGF0006A
152° C/W
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Applications Circuits
V
DD
4
1
5
6
3
OVERTEMP
NC
Asserts when T
> T
TRIP
DIE
LM26LV
NC
See text.
NC
2
GND
Figure 23. Temperature Switch Using Push-Pull Output
V
DD
4
100k
OVERTEMP
1
3
6
NC
Asserts when T
> T
TRIP
DIE
LM26LV
NC
See text.
5
NC
2
GND
Figure 24. Temperature Switch Using Open-Drain Output
SAR Analog-to-Digital Converter
Reset
+1.6V to +5.5V
Input
Pin
LM26LV
Sample
R
IN
4
6
5
V
V
DD
TEMP
C
BP
C
PIN
C
C
TRIP
TEST
FILTER
1
2
SAMPLE
OT
3
OT
GND
Figure 25. Suggested Connection to a Sampling Analog-to-Digital Converter Input Stage
Most CMOS ADCs found in microcontrollers and ASICs have a sampled data comparator input structure. When
the ADC charges the sampling cap, it requires instantaneous charge from the output of the analog source such
as the LM26LV/LM26LV-Q1 temperature sensor and many op amps. This requirement is easily accommodated
by the addition of a capacitor (CFILTER). The size of CFILTER depends on the size of the sampling capacitor and the
sampling frequency. Since not all ADCs have identical input stages, the charge requirements will vary. This
general ADC application is shown as an example only.
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V
TEMP
V+
R3
V
V
T1
R4
T2
R1
V
T
(High = overtemp alarm)
4.1V
+
V
OUT
V
OUT
U1
LM4040
U3
0.1 mF
-
R2
(4.1)R2
V
V
=
=
T1
R1 + R2||R3
V
TEMP
LM26LV
U2
V
DD
(4.1)R2
T2
R2 + R1||R3
Figure 26. Celsius Temperature Switch
V
DD
100k
4
3
6
TRIP TEST
1
OVERTEMP
LM26LV
NC
OVERTEMP
5
2
GND
Figure 27. TRIP TEST Digital Output Test Circuit
V
DD
100k
4
TRIP TEST
1
OVERTEMP
5
6
LM26LV
NC
RESET
Momentary
OVERTEMP
3
2
GND
Figure 28. Latch Circuit using OVERTEMP Output
The TRIP TEST pin, normally used to check the operation of the OVERTEMP and OVERTEMP pins, may be
used to latch the outputs whenever the temperature exceeds the programmed limit and causes the digital outputs
to assert. As shown in Figure 28, when OVERTEMP goes high the TRIP TEST input is also pulled high and
causes OVERTEMP output to latch high and the OVERTEMP output to latch low. The latch can be released by
either momentarily pulling the TRIP TEST pin low (GND), or by toggling the power supply to the device. The
resistor limits the current out of the OVERTEMP output pin.
22
Submit Documentation Feedback
Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM26LV
LM26LV
www.ti.com
SNIS144F –JULY 2007–REVISED FEBRUARY 2013
REVISION HISTORY
Changes from Revision E (February 2013) to Revision F
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 22
Copyright © 2007–2013, Texas Instruments Incorporated
Submit Documentation Feedback
23
Product Folder Links: LM26LV
PACKAGE OPTION ADDENDUM
www.ti.com
17-May-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
LM26LVCISD-050/NOPB
LM26LVCISD-060/NOPB
LM26LVCISD-065/NOPB
LM26LVCISD-070/NOPB
LM26LVCISD-075/NOPB
LM26LVCISD-080/NOPB
LM26LVCISD-085/NOPB
LM26LVCISD-090/NOPB
LM26LVCISD-095/NOPB
LM26LVCISD-100/NOPB
LM26LVCISD-105/NOPB
LM26LVCISD-110/NOPB
LM26LVCISD-115/NOPB
LM26LVCISD-120/NOPB
LM26LVCISD-125/NOPB
LM26LVCISD-130/NOPB
LM26LVCISD-135/NOPB
ACTIVE
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
NGF
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
1000
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
050
060
065
070
075
080
085
090
095
100
105
110
115
120
125
130
135
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
17-May-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
0 to 150
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
LM26LVCISD-140/NOPB
LM26LVCISD-145/NOPB
LM26LVCISD-150/NOPB
LM26LVCISDX-050/NOPB
LM26LVCISDX-060/NOPB
LM26LVCISDX-065/NOPB
LM26LVCISDX-070/NOPB
LM26LVCISDX-075/NOPB
LM26LVCISDX-080/NOPB
LM26LVCISDX-085/NOPB
LM26LVCISDX-090/NOPB
LM26LVCISDX-095/NOPB
LM26LVCISDX-100/NOPB
LM26LVCISDX-105/NOPB
LM26LVCISDX-110/NOPB
LM26LVCISDX-115/NOPB
LM26LVCISDX-120/NOPB
LM26LVCISDX-125/NOPB
ACTIVE
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
NGF
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
1000
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
140
145
150
050
060
065
070
075
080
085
090
095
100
105
110
115
120
125
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
1000
1000
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
17-May-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 150
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
LM26LVCISDX-130/NOPB
LM26LVCISDX-135/NOPB
LM26LVCISDX-140/NOPB
LM26LVCISDX-145/NOPB
LM26LVCISDX-150/NOPB
LM26LVQISD-130/NOPB
LM26LVQISD-135/NOPB
LM26LVQISDX-130/NOPB
LM26LVQISDX-135/NOPB
ACTIVE
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
NGF
6
6
6
6
6
6
6
6
6
4500
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
130
135
140
145
150
Q30
Q35
Q30
Q35
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
4500
4500
4500
4500
1000
1000
4500
4500
Green (RoHS
& no Sb/Br)
0 to 150
Green (RoHS
& no Sb/Br)
0 to 150
Green (RoHS
& no Sb/Br)
0 to 150
Green (RoHS
& no Sb/Br)
0 to 150
Green (RoHS
& no Sb/Br)
-40 to 150
-40 to 150
-40 to 150
-40 to 150
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
17-May-2013
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM26LV, LM26LV-Q1 :
Catalog: LM26LV
•
Automotive: LM26LV-Q1
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM26LVCISD-050/NOPB WSON
LM26LVCISD-060/NOPB WSON
LM26LVCISD-065/NOPB WSON
LM26LVCISD-070/NOPB WSON
LM26LVCISD-075/NOPB WSON
LM26LVCISD-080/NOPB WSON
LM26LVCISD-085/NOPB WSON
LM26LVCISD-090/NOPB WSON
LM26LVCISD-095/NOPB WSON
LM26LVCISD-100/NOPB WSON
LM26LVCISD-105/NOPB WSON
LM26LVCISD-110/NOPB WSON
LM26LVCISD-115/NOPB WSON
LM26LVCISD-120/NOPB WSON
LM26LVCISD-125/NOPB WSON
LM26LVCISD-130/NOPB WSON
LM26LVCISD-135/NOPB WSON
LM26LVCISD-140/NOPB WSON
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Mar-2013
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM26LVCISD-145/NOPB WSON
LM26LVCISD-150/NOPB WSON
LM26LVCISDX-050/NOPB WSON
LM26LVCISDX-060/NOPB WSON
LM26LVCISDX-065/NOPB WSON
LM26LVCISDX-070/NOPB WSON
LM26LVCISDX-075/NOPB WSON
LM26LVCISDX-080/NOPB WSON
LM26LVCISDX-085/NOPB WSON
LM26LVCISDX-090/NOPB WSON
LM26LVCISDX-095/NOPB WSON
LM26LVCISDX-100/NOPB WSON
LM26LVCISDX-105/NOPB WSON
LM26LVCISDX-110/NOPB WSON
LM26LVCISDX-115/NOPB WSON
LM26LVCISDX-120/NOPB WSON
LM26LVCISDX-125/NOPB WSON
LM26LVCISDX-130/NOPB WSON
LM26LVCISDX-135/NOPB WSON
LM26LVCISDX-140/NOPB WSON
LM26LVCISDX-145/NOPB WSON
LM26LVCISDX-150/NOPB WSON
LM26LVQISD-130/NOPB WSON
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
1000
1000
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
1000
4500
178.0
178.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
178.0
330.0
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
LM26LVQISDX-130/NOP WSON
B
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Mar-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM26LVCISD-050/NOPB
LM26LVCISD-060/NOPB
LM26LVCISD-065/NOPB
LM26LVCISD-070/NOPB
LM26LVCISD-075/NOPB
LM26LVCISD-080/NOPB
LM26LVCISD-085/NOPB
LM26LVCISD-090/NOPB
LM26LVCISD-095/NOPB
LM26LVCISD-100/NOPB
LM26LVCISD-105/NOPB
LM26LVCISD-110/NOPB
LM26LVCISD-115/NOPB
LM26LVCISD-120/NOPB
LM26LVCISD-125/NOPB
LM26LVCISD-130/NOPB
LM26LVCISD-135/NOPB
LM26LVCISD-140/NOPB
LM26LVCISD-145/NOPB
LM26LVCISD-150/NOPB
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
Pack Materials-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Mar-2013
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM26LVCISDX-050/NOPB
LM26LVCISDX-060/NOPB
LM26LVCISDX-065/NOPB
LM26LVCISDX-070/NOPB
LM26LVCISDX-075/NOPB
LM26LVCISDX-080/NOPB
LM26LVCISDX-085/NOPB
LM26LVCISDX-090/NOPB
LM26LVCISDX-095/NOPB
LM26LVCISDX-100/NOPB
LM26LVCISDX-105/NOPB
LM26LVCISDX-110/NOPB
LM26LVCISDX-115/NOPB
LM26LVCISDX-120/NOPB
LM26LVCISDX-125/NOPB
LM26LVCISDX-130/NOPB
LM26LVCISDX-135/NOPB
LM26LVCISDX-140/NOPB
LM26LVCISDX-145/NOPB
LM26LVCISDX-150/NOPB
LM26LVQISD-130/NOPB
LM26LVQISDX-130/NOPB
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
WSON
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
NGF
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
4500
1000
4500
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
210.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
185.0
367.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
Pack Materials-Page 4
MECHANICAL DATA
NGF0006A
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