LM2717-ADJ [TI]
LM2717-ADJ Dual Step-Down DC/DC Converter;
| 型号： | LM2717-ADJ |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LM2717-ADJ Dual Step-Down DC/DC Converter |
| 文件： | 总24页 (文件大小：1077K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM2717-ADJ
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SNVS407C –DECEMBER 2005–REVISED MARCH 2013
LM2717-ADJ Dual Step-Down DC/DC Converter
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1
FEATURES
DESCRIPTION
The LM2717-ADJ is composed of two PWM DC/DC
buck (step-down) converters. Both converters are
used to generate an adjustable output voltage as low
as 1.267V. Both also feature low RDSON (0.16Ω)
internal switches for maximum efficiency. Operating
frequency can be adjusted anywhere between
300kHz and 600kHz allowing the use of small
external components. External soft-start pins for each
converter enables the user to tailor the soft-start
times to a specific application. Each converter may
also be shut down independently with its own
shutdown pin. The LM2717-ADJ is available in a low
profile 24-lead TSSOP package ensuring a low profile
overall solution.
2
•
Adjustable Buck Converter with a 2.2A, 0.16Ω,
Internal Switch (Buck 1)
•
Adjustable Buck Converter with a 3.2A, 0.16Ω,
Internal Switch (Buck 2)
•
•
•
Operating Input Voltage Range of 4V to 20V
Input Undervoltage Protection
300kHz to 600kHz Pin Adjustable Operating
Frequency
•
•
Over Temperature Protection
Small 24-Lead TSSOP Package
APPLICATIONS
•
•
•
•
•
TFT-LCD Displays
Handheld Devices
Portable Applications
Laptop Computers
Automotive Applications
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2013, Texas Instruments Incorporated
LM2717-ADJ
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
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Typical Application Circuit
C
BOOT1
L
1
CB1
SS1
SW1
SHDN1
R
V
FB1
OUT1
C
SS1
C
C
OUT1
D
1
R
FB2
Buck
FB1
Converter 1
V
IN
V
IN
R
C1
C
C1
V
IN
C1
R
F
L
2
FSLCT
SS2
SW2
CB2
V
OUT2
C
SS2
C
OUT2
D
2
R
R
FB3
Buck
C
BOOT2
C
BG
Converter 2
V
BG
FB2
SHDN2
R
FB4
C2
AGND
PGND
C
C2
V
C2
LM2717 - ADJ
Connection Diagram
Figure 1. 24-Lead TSSOP
Top View
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PIN DESCRIPTIONS
Pin
1
Name
PGND
PGND
AGND
FB1
Function
Power ground. PGND and AGND pins must be connected together directly at the part.
Power ground. PGND and AGND pins must be connected together directly at the part.
Analog ground. PGND and AGND pins must be connected together directly at the part.
Buck 1 output voltage feedback input.
2
3
4
5
VC1
Buck 1 compensation network connection. Connected to the output of the voltage error amplifier.
Bandgap connection.
6
VBG
7
VC2
Buck 2 compensation network connection. Connected to the output of the voltage error amplifier.
Buck 2 output voltage feedback input.
8
FB2
9
AGND
AGND
PGND
PGND
SW2
VIN
Analog ground. PGND and AGND pins must be connected together directly at the part.
Analog ground. PGND and AGND pins must be connected together directly at the part.
Power ground. PGND and AGND pins must be connected together directly at the part.
Power ground. PGND and AGND pins must be connected together directly at the part.
Buck 2 power switch input. Switch connected between VIN pins and SW2 pin.
10
11
12
13
14
Analog power input. All VIN pins are internally connected and should be connected together directly
at the part.
15
VIN
Analog power input. All VIN pins are internally connected and should be connected together directly
at the part.
16
17
18
19
CB2
SHDN2
SS2
Buck 2 converter bootstrap capacitor connection.
Shutdown pin for Buck 2 converter. Active low.
Buck 2 soft start pin.
FSLCT
Switching frequency select input. Use a resistor to set the frequency anywhere between 300kHz and
600kHz.
20
21
22
23
SS1
SHDN1
CB1
Buck 1 soft start pin.
Shutdown pin for Buck 1 converter. Active low.
Buck 1 converter bootstrap capacitor connection.
VIN
Analog power input. All VIN pins are internally connected and should be connected together directly
at the part.
24
SW1
Buck 1 power switch input. Switch connected between VIN pins and SW1 pin.
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Block Diagram
FSLCT
CB1
V
IN
93% Duty
Cycle Limit
+
+
OSC
SS1
Buck Load
Current
Measurement
SET
DC
LIMIT
+
PWM
Comp
-
Soft
RESET
Start
FB1
BUCK
Buck
DRIVE
Driver
SW1
OVP
TSH
-
Error
SD
+
Amp
+
OVP
Comp
-
PGND
Thermal
Shutdown
BG
SHDN1
Bandgap
Buck 1 Converter
V
V
C1
BG
FSLCT
OSC
CB2
V
IN
93% Duty
Cycle Limit
+
+
SS2
Buck Load
Current
Measurement
SET
DC
LIMIT
+
PWM
Soft
RESET
Comp
-
Start
FB2
BUCK
Buck
DRIVE
Driver
SW2
OVP
TSH
-
Error
Amp
+
SD
+
OVP
Comp
-
PGND
Thermal
Shutdown
BG
SHDN2
Bandgap
Buck 2 Converter
V
V
C2
BG
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1)
Absolute Maximum Ratings
VIN
−0.3V to 22V
−0.3V to 22V
−0.3V to 22V
−0.3V to 7V
SW1 Voltage
SW2 Voltage
FB1, FB2 Voltages
CB1, CB2 Voltages
−0.3V to VIN+7V
(VIN=VSW
)
VC1 Voltage
1.75V ≤ VC1 ≤ 2.25V
0.965V ≤ VC2 ≤ 1.565V
−0.3V to 7.5V
−0.3V to 7.5V
−0.3V to 2.1V
−0.3V to 2.1V
AGND to 5V
150°C
VC2 Voltage
SHDN1 Voltage
SHDN2 Voltage
SS1 Voltage
SS2 Voltage
FSLCT Voltage
Maximum Junction Temperature
Power Dissipation(2)
Lead Temperature
Vapor Phase (60 sec.)
Infrared (15 sec.)
Internally Limited
300°C
215°C
220°C
(3)
ESD Susceptibility
Human Body Model
2kV
(1) Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the
device is intended to be functional, but device parameter specifications may not be ensured. For ensured specifications and test
conditions, see the Electrical Characteristics table.
(2) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal
resistance, θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance. The maximum
allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) − TA)/θJA. Exceeding the maximum
allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown.
(3) The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin.
Operating Conditions
Operating Junction Temperature Range
(1)
−40°C to +125°C
Storage Temperature
Supply Voltage
−65°C to +150°C
4V to 20V
SW1 Voltage
20V
SW2 Voltage
20V
Switching Frequency
300kHz to 600kHz
(1) All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are
100% tested or specified through statistical analysis. All limits at temperature extremes are specified via correlation using standard
Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
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Electrical Characteristics
Specifications in standard type face are for TJ = 25°C and those with boldface type apply over the full Operating
Temperature Range (TJ = −40°C to +125°C). VIN = 5V, IL = 0A, and FSW = 300kHz unless otherwise specified.
Min
Typ
Max
Symbol
Parameter
Conditions
Units
(1)
(2)
(1)
IQ
Total Quiescent Current (both Not Switching
switchers)
2.7
6
6
mA
mA
µA
Switching, switch open
12
27
VSHDN = 0V
9
VBG
Bandgap Voltage
1.248
1.230
1.294
1.299
1.267
V
%/V
V
%VBG/ΔVIN
VFB1
Bandgap Voltage Line
Regulation
0.01
0.125
-0.01
Buck 1 Feedback Voltage
Buck 2 Feedback Voltage
Buck 1 Switch Current Limit
1.236
1.214
1.286
1.288
1.258
1.258
VFB2
1.236
1.214
1.286
1.288
V
(3)
(4)
ICL1
VIN = 8V
2.2
1.65
3.2
A
VIN = 12V, VOUT = 3.3V
1.4
2.6
2.0
(3)
(4)
ICL2
Buck 2 Switch Current Limit
VIN = 8V
A
VIN = 12V, VOUT = 5V
VIN = 20V
3.05
3.5
IB1
IB2
Buck 1 FB Pin Bias Current
70
65
400
nA
(5)
Buck 2 FB Pin Bias Current
VIN = 20V
400
20
nA
V
(5)
VIN
Input Voltage Range
4
gm1
Buck 1 Error Amp
Transconductance
ΔI = 20µA
ΔI = 20µA
1340
1360
134
µmho
gm2
AV1
AV2
Buck 2 Error Amp
Transconductance
µmho
V/V
Buck 1 Error Amp Voltage
Gain
Buck 2 Error Amp Voltage
Gain
136
V/V
DMAX
FSW
Maximum Duty Cycle
Switching Frequency
89
240
480
−5
93
%
RF = 46.4k
RF = 22.6k
300
600
360
720
5
kHz
kHz
µA
ISHDN1
ISHDN2
IL1
Buck 1 Shutdown Pin Current 0V < VSHDN1 < 7.5V
Buck 2 Shutdown Pin Current 0V < VSHDN2 < 7.5V
−5
5
µA
Buck 1 Switch Leakage
Current
VIN = 20V
0.01
0.01
160
160
5
5
µA
µA
IL2
Buck 2 Switch Leakage
Current
VIN = 20V
(6)
RDSON1
RDSON2
ThSHDN1
Buck 1 Switch RDSON
ISW = 100mA
ISW = 100mA
180
300
mΩ
mΩ
(6)
Buck 2 Switch RDSON
180
300
Buck 1 SHDN Threshold
Output High
Output Low
1.8
1.36
1.33
V
0.7
(1) All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are
100% tested or specified through statistical analysis. All limits at temperature extremes are specified via correlation using standard
Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) Duty cycle affects current limit due to ramp generator.
(4) Current limit at 0% duty cycle. See TYPICAL PERFORMANCE section for Switch Current Limit vs. Input Voltage.
(5) Bias current flows into FB pin.
(6) Includes the bond wires and package leads, RDSON from VIN pin(s) to SW pin.
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Electrical Characteristics (continued)
Specifications in standard type face are for TJ = 25°C and those with boldface type apply over the full Operating
Temperature Range (TJ = −40°C to +125°C). VIN = 5V, IL = 0A, and FSW = 300kHz unless otherwise specified.
Min
Typ
Max
Symbol
ThSHDN2
Parameter
Conditions
Units
(1)
(2)
(1)
Buck 2 SHDN Threshold
Output High
1.8
1.36
1.33
9
V
Output Low
0.7
15
15
ISS1
ISS2
UVP
Buck 1 Soft Start Pin Current
Buck 2 Soft Start Pin Current
On Threshold
4
4
4
µA
µA
9
3.8
3.6
V
Off Threshold
3.3
θJA
Thermal Resistance
TSSOP, package only
115
°C/W
(7)
(7) Refer to the www.ti.com/packaging for more detailed thermal information and mounting techniques for the TSSOP package.
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Typical Performance Characteristics
Shutdown IQ vs. Input Voltage
Switching IQ vs. Input Voltage(FSW = 300kHz)
9
8
7
6
5
4
3
2
1
0
16
14
12
10
8
6
4
2
0
4
6
8
10 12 14 16 18 20
INPUT VOLTAGE (V)
4
6
8
10 12 14
16 18
20
INPUT VOLTAGE (V)
Figure 2.
Figure 3.
Switching Frequency vs. Input Voltage(FSW = 300kHz)
Buck 1 RDS(ON) vs. Input Voltage
320
200
190
180
170
160
150
140
130
120
110
100
R
= 46.4k
F
315
310
305
300
295
290
4
6
8
10 12
14 16
18 20
4
6
8
10 12 14 16 18 20
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 4.
Figure 5.
Buck 2 RDS(ON) vs. Input Voltage
Buck 1 Efficiency vs. Load Current(VOUT = 3.3V)
100
200
190
180
170
160
150
140
130
120
110
100
= 5V
V
IN
90
80
70
60
50
40
30
20
10
0
V
= 12V
IN
V
= 18V
IN
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6
4
6
8
10 12 14 16 18 20
LOAD CURRENT (A)
INPUT VOLTAGE (V)
Figure 6.
Figure 7.
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Typical Performance Characteristics (continued)
Buck 2 Efficiency vs. Load Current(VOUT = 15V)
Buck 2 Efficiency vs. Load Current(VOUT = 5V)
100
100
90
80
70
60
50
40
30
20
90
80
70
60
50
40
30
20
V
= 18V
0.5
V
= 18V
0.5
IN
IN
10
0
10
0
0
1
1.5
2
2.5
0
1
1.5
2
2.5
LOAD CURRENT (A)
LOAD CURRENT (A)
Figure 8.
Figure 9.
Buck 1 Switch Current Limit vs. Input Voltage
2.4
Buck 2 Switch Current Limit vs. Input Voltage
4
3.8
3.6
3.4
2.2
2
V
OUT
= 3.3V
1.8
V
= 3.3V
= 5V
3.2
3
OUT
1.6
1.4
1.2
1
V
OUT
= 5V
V
2.8
2.6
2.4
2.2
OUT
5
7
9
11
13 15 17
19
5
7
9
11
13 15
17 19
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 10.
Figure 11.
Buck 1 Switch Current Limit vs. Temperature(VIN = 12V)
1.7
Buck 2 Switch Current Limit vs. Temperature(VIN = 12V)
3.4
1.65
3.3
V = 3.3V
OUT
V
OUT
= 3.3V
1.6
1.55
1.5
3.2
3.1
3
V
= 5V
OUT
V
OUT
= 5V
1.45
1.4
2.9
2.8
-40
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
AMBIENT TEMPERATURE (oC)
AMBIENT TEMPERATURE (oC)
Figure 12.
Figure 13.
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Typical Performance Characteristics (continued)
Buck 1 Switch ON Resistance vs. Temperature
300
Buck 2 Switch ON Resistance vs. Temperature
250
200
150
100
50
V
= 8V
V
IN
= 8V
IN
250
200
150
100
50
0
0
-40 -20
0
20 40 60 80 100 120
-40 -20
0
20 40 60 80 100 120
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
Figure 14.
Figure 15.
Switching Frequency vs. RF Resistance
700
650
600
550
500
450
400
350
300
250
200
V
IN
= 12V
20
25
30
35
(kW)
40
45
50
R
F
Figure 16.
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BUCK OPERATION
PROTECTION (BOTH REGULATORS)
The LM2717-ADJ has dedicated protection circuitry running during normal operation to protect the IC. The
Thermal Shutdown circuitry turns off the power devices when the die temperature reaches excessive levels. The
UVP comparator protects the power devices during supply power startup and shutdown to prevent operation at
voltages less than the minimum input voltage. The OVP comparator is used to prevent the output voltage from
rising at no loads allowing full PWM operation over all load conditions. The LM2717-ADJ also features a
shutdown mode for each converter decreasing the supply current to approximately 10µA (both in shutdown
mode).
CONTINUOUS CONDUCTION MODE
The LM2717-ADJ contains current-mode, PWM buck regulators. A buck regulator steps the input voltage down
to a lower output voltage. In continuous conduction mode (when the inductor current never reaches zero at
steady state), the buck regulator operates in two cycles. The power switch is connected between VIN and SW1
and SW2.
In the first cycle of operation the transistor is closed and the diode is reverse biased. Energy is collected in the
inductor and the load current is supplied by COUT and the rising current through the inductor.
During the second cycle the transistor is open and the diode is forward biased due to the fact that the inductor
current cannot instantaneously change direction. The energy stored in the inductor is transferred to the load and
output capacitor.
The ratio of these two cycles determines the output voltage. The output voltage is defined approximately as:
VOUT
D =
, D' = (1-D)
VIN
where
•
•
where D is the duty cycle of the switch
D and D′ will be required for design calculation
(1)
The LM2717-ADJ has a minimum switch ON time which corresponds to a minimum duty cycle of approximately
10% at 600kHz operation and approximately 5% at 300kHz operation. In the case of some high voltage
differential applications (low duty cycle operation) this minimum duty cycle may be exceeded causing the
feedback pin over-voltage protection to trip as the output voltage rises. This will put the device into a PFM type
operation which can cause an unpredictable frequency spectrum and may cause the average output voltage to
rise slightly. If this is a concern the switching frequency may be lowered and/or a pre-load added to the output to
keep the device full PWM operation. Note that the OVP function monitors the FB pin so it will not function if the
feedback resistor is disconnected from the output. Due to slight differences between the two converters it is
recommended that Buck 1 be used for the lower of the two output voltages for best operation.
DESIGN PROCEDURE
This section presents guidelines for selecting external components.
SETTING THE OUTPUT VOLTAGE
The output voltage is set using the feedback pin and a resistor divider connected to the output as shown in
Figure 20. The feedback pin voltage (VFB) is 1.258V, so the ratio of the feedback resistors sets the output voltage
according to the following equation:
VOUT - VFB1(2)
W
RFB1(3) = RFB2(4)
x
VFB1(2)
(2)
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INPUT CAPACITOR
A low ESR aluminum, tantalum, or ceramic capacitor is needed between the input pin and power ground. This
capacitor prevents large voltage transients from appearing at the input. The capacitor is selected based on the
RMS current and voltage requirements. The RMS current is given by:
(3)
The RMS current reaches its maximum (IOUT/2) when VIN equals 2VOUT. This value should be calculated for both
regulators and added to give a total RMS current rating. For an aluminum or ceramic capacitor, the voltage rating
should be at least 25% higher than the maximum input voltage. If a tantalum capacitor is used, the voltage rating
required is about twice the maximum input voltage. The tantalum capacitor should be surge current tested by the
manufacturer to prevent being shorted by the inrush current. The minimum capacitor value should be 47µF for
lower output load current applications and less dynamic (quickly changing) load conditions. For higher output
current applications or dynamic load conditions a 68µF to 100µF low ESR capacitor is recommended. It is also
recommended to put a small ceramic capacitor (0.1µF to 4.7µF) between the input pins and ground to reduce
high frequency spikes.
INDUCTOR SELECTION
The most critical parameter for the inductor in a current mode switcher is the minimum value required for stable
operation. To prevent subharmonic oscillations and achieve good phase margin a target minimum value for the
inductor is:
(D-0.5+2/p)(VIN-VOUT)RDSON
LMIN
=
(H)
(1-D)(0.164*FSW
)
(4)
Where VIN is the minimum input voltage and RDSON is the maximum switch ON resistance. For best stability the
inductor should be in the range of 0.5LMIN (absolute minimum) and 2LMIN. Using an inductor with a value less
than 0.5LMIN can cause subharmonic oscillations. The inductor should meet this minimum requirement at the
peak inductor current expected for the application regardless of what the inductor ripple current and output ripple
voltage requirements are. A value larger than 2LMIN is acceptable if the ripple requirements of the application
require it but it may reduce the phase margin and increase the difficulty in compensating the circuit.
The most important parameters for the inductor from an applications standpoint are the inductance, peak current
and the DC resistance. The inductance is related to the peak-to-peak inductor ripple current, the input and the
output voltages (for 300kHz operation):
(5)
A higher value of ripple current reduces inductance, but increases the conductance loss, core loss, and current
stress for the inductor and switch devices. It also requires a bigger output capacitor for the same output voltage
ripple requirement. A reasonable value is setting the ripple current to be 30% of the DC output current. Since the
ripple current increases with the input voltage, the maximum input voltage is always used to determine the
inductance. The DC resistance of the inductor is a key parameter for the efficiency. Lower DC resistance is
available with a bigger winding area. A good tradeoff between the efficiency and the core size is letting the
inductor copper loss equal 2% of the output power.
OUTPUT CAPACITOR
The selection of COUT is driven by the maximum allowable output voltage ripple. The output ripple in the constant
frequency, PWM mode is approximated by:
(6)
The ESR term usually plays the dominant role in determining the voltage ripple. Low ESR ceramic, aluminum
electrolytic, or tantalum capacitors (such as MuRata MLCC, Taiyo Yuden MLCC, Nichicon PL series, Sanyo OS-
CON, Sprague 593D, 594D, AVX TPS, and CDE polymer aluminum) is recommended. An aluminum electrolytic
capacitor is not recommended for temperatures below −25°C since its ESR rises dramatically at cold
temperatures. Ceramic or tantalum capacitors have much better ESR specifications at cold temperature and is
preferred for low temperature applications.
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BOOTSTRAP CAPACITOR
A 4.7nF ceramic capacitor or larger is recommended for the bootstrap capacitor. For applications where the input
voltage is less than twice the output voltage a larger capacitor is recommended, generally 0.1µF to 1µF to
ensure plenty of gate drive for the internal switches and a consistently low RDSON
.
SOFT-START CAPACITOR (BOTH REGULATORS)
The LM2717-ADJ contains circuitry that can be used to limit the inrush current on start-up of the DC/DC
switching regulators. This inrush current limiting circuitry serves as a soft-start. The external SS pins are used to
tailor the soft-start for a specific application. A current (ISS) charges the external soft-start capacitor, CSS. The
soft-start time can be estimated as:
TSS = CSS*0.6V/ISS
(7)
When programming the soft-start time use the equation given in the Soft-Start Capacitor section above. The soft-
start function is used simply to limit inrush current to the device that could stress the input voltage supply. The
soft-start time described above is the time it takes for the current limit to ramp to maximum value. When this
function is used the current limit starts at a low value and increases to nominal at the set soft-start time. Under
maximum load conditions the output voltage may rise at the same rate as the soft-start, however at light or no
load conditions the output voltage will rise much faster as the switch will not need to conduct much current to
charge the output capacitor.
SHUTDOWN OPERATION (BOTH REGULATORS)
The shutdown pins of the LM2717-ADJ are designed so that they may be controlled using 1.8V or higher logic
signals. If the shutdown function is not to be used the pin may be left open. The maximum voltage to the
shutdown pin should not exceed 7.5V. If the use of a higher voltage is desired due to system or other constraints
it may be used, however a 100k or larger resistor is recommended between the applied voltage and the
shutdown pin to protect the device.
SCHOTTKY DIODE
The breakdown voltage rating of D1 and D2 is preferred to be 25% higher than the maximum input voltage. The
current rating for the diode should be equal to the maximum output current for best reliability in most
applications. In cases where the input voltage is much greater than the output voltage the average diode current
is lower. In this case it is possible to use a diode with a lower average current rating, approximately (1-D)*IOUT
however the peak current rating should be higher than the maximum load current.
LOOP COMPENSATION
The general purpose of loop compensation is to meet static and dynamic performance requirements while
maintaining stability. Loop gain is what is usually checked to determine small-signal performance. Loop gain is
equal to the product of control-output transfer function and the output-control transfer function (the compensation
network transfer function). The DC loop gain of the LM2717 is usually around 55dB to 60dB when loaded.
Generally speaking it is a good idea to have a loop gain slope that is -20dB /decade from a very low frequency to
well beyond the crossover frequency. The crossover frequency should not exceed one-fifth of the switching
frequency, i.e. 60kHz in the case of 300kHz switching frequency. The higher the bandwidth is, the faster the load
transient response speed will potentially be. However, if the duty cycle saturates during a load transient, further
increasing the small signal bandwidth will not help. Since the control-output transfer function usually has very
limited low frequency gain, it is a good idea to place a pole in the compensation at zero frequency, so that the
low frequency gain will be relatively large. A large DC gain means high DC regulation accuracy (i.e. DC voltage
changes little with load or line variations). The rest of the compensation scheme depends highly on the shape of
the control-output plot.
As shown in Figure 17, the example control-output transfer function consists of one pole (fp), one zero (fz), and a
double pole at fn (half the switching frequency). The following can be done to create a -20dB /decade roll-off of
the loop gain: Place the first pole at 0Hz, the first zero at fp, the second pole at fz, and the second zero at fn.
The resulting output-control transfer function is shown in Figure 18.
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20
0
Asymptotic
(fp1 is at zero frequency)
0
-45
-90
-135
-180
B
-20
Phase
fz1
fz2
fp2
FREQUENCY
-40
Gain
-60
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 17. Control-Output Transfer Function
Figure 18. Output-Control Transfer Function
The control-output corner frequencies, and thus the desired compensation corner frequencies, can be
determined approximately by the following equations:
where
•
•
•
Co is the output capacitance
Re is the output capacitance ESR
f is the switching frequency
(8)
where
•
•
•
Co is the output capacitance
Ro is the load resistance
f is the switching frequency
(9)
Since fp is determined by the output network, it will shift with loading (Ro) and duty cycle. First determine the
range of frequencies (fpmin/max) of the pole across the expected load range, then place the first compensation
zero within that range.
Example: Vo = 5V, Re = 20mΩ, Co = 100µF, Romax = 5V/100mA = 50Ω, Romin = 5V/1A = 5Ω, L = 10µH, f =
300kHz:
1
= 80 kHz
fz =
ñ
ñ
2p 20 mW 100 mF
(10)
(11)
(12)
1
fp min
=
+
ñ
ñ
2p 50W 100 mF
0.5
ñ
= 297 Hz
ñ
ñ
2p 300k 10m 100 mF
1
+
fp max
=
ñ
ñ
2p 5W 100 mF
0.5
ñ
= 584 Hz
ñ
ñ
2p 300k 10m 100 mF
Once the fp range is determined, Rc1 should be calculated using:
14
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where
•
•
•
B is the desired gain in V/V at fp (fz1)
gm is the transconductance of the error amplifier
1 and R2 are the feedback resistors as shown in Figure 19
(13)
(14)
A gain value around 10dB (3.3v/v) is generally a good starting point.
Example: B = 3.3 v/v, gm=1350µmho, R1 = 20 KΩ, R2 = 59 KΩ:
3.3
20k + 59k
20k
1350m ñ
ö 9.76k
Rc1
=
Bandwidth will vary proportional to the value of Rc1. Next, Cc1 can be determined with the following equation:
(15)
Example: fpmin = 297 Hz, Rc1 = 20 KΩ:
1
ö 56 nF
Cc1
=
ñ
ñ
2p 297 Hz 9.76k
(16)
The value of Cc1 should be within the range determined by fpmin/max. A higher value will generally provide a
more stable loop, but too high a value will slow the transient response time.
The compensation network (Figure 19) will also introduce a low frequency pole which will be close to 0Hz.
A second pole should also be placed at fz. This pole can be created with a single capacitor Cc2 and a shorted
Rc2 (see Figure 19). The minimum value for this capacitor can be calculated by:
(17)
Cc2 may not be necessary, however it does create a more stable control loop. This is especially important with
high load currents.
Example: fz = 80 kHz, Rc1 = 20 KΩ:
(18)
A second zero can also be added with a resistor in series with Cc2. If used, this zero should be placed at fn,
where the control to output gain rolls off at -40dB/dec. Generally, fn will be well below the 0dB level and thus will
have little effect on stability. Rc2 can be calculated with the following equation:
(19)
Vo
Vc
gm
R2
CC1
CC2
RC2
compensation
network
RC1
R1
Figure 19. Compensation Network
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Note that the values calculated here give a good baseline for stability and will work well with most applications.
The values in some cases may need to be adjusted some for optimum stability or the values may need to be
adjusted depending on a particular applications bandwidth requirements.
LAYOUT CONSIDERATIONS
The LM2717-ADJ uses two separate ground connections, PGND for the drivers and boost NMOS power device
and AGND for the sensitive analog control circuitry. The AGND and PGND pins should be tied directly together
at the package. The feedback and compensation networks should be connected directly to a dedicated analog
ground plane and this ground plane must connect to the AGND pin. If no analog ground plane is available then
the ground connections of the feedback and compensation networks must tie directly to the AGND pin.
Connecting these networks to the PGND can inject noise into the system and effect performance.
The input bypass capacitor CIN, as shown in Figure 20, must be placed close to the IC. This will reduce copper
trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 0.1µF to 4.7µF
bypass capacitors can be placed in parallel with CIN, close to the VIN pins to shunt any high frequency noise to
ground. The output capacitors, COUT1 and COUT2, should also be placed close to the IC. Any copper trace
connections for the COUTX capacitors can increase the series resistance, which directly effects output voltage
ripple. The feedback network, resistors RFB1(3) and RFB2(4), should be kept close to the FB pin, and away from the
inductor to minimize copper trace connections that can inject noise into the system. Trace connections made to
the inductors and schottky diodes should be minimized to reduce power dissipation and increase overall
efficiency. For more detail on switching power supply layout considerations see Application Note AN-1149:
Layout Guidelines for Switching Power Supplies (SNVA021).
APPLICATION INFORMATION
Table 1. Some Recommended Inductors (Others May Be Used)
Manufacturer
Inductor
Contact Information
Coilcraft
DO3316 and DT3316 series
www.coilcraft.com
800-3222645
TDK
SLF10145 series
www.component.tdk.com
847-803-6100
Pulse
P0751 and P0762 series
www.pulseeng.com
www.sumida.com
Sumida
CDRH8D28 and CDRH8D43 series
Table 2. Some Recommended Input And Output Capacitors (Others May Be Used)
Manufacturer
Vishay Sprague
Taiyo Yuden
Capacitor
Contact Information
www.vishay.com
293D, 592D, and 595D series tantalum
High capacitance MLCC ceramic
www.t-yuden.com
ESRD seriec Polymer Aluminum Electrolytic
SPV and AFK series V-chip series
Cornell Dubilier
MuRata
www.cde.com
High capacitance MLCC ceramic
www.murata.com
16
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SNVS407C –DECEMBER 2005–REVISED MARCH 2013
L1
22 mH
3.3V OUT1
C
BOOT1
R
FB2
R
FB1
4.7 nF
20k 33.2k
C
OUT1A
D1
MBRS240
*Connect CINA (pin
23) and CINB (pins
14,15) as close as
possible to the VIN
pins.
C
U1
OUT1
1 mF
ceramic
C
68 mF
SS1
CB1
FB1
SS1
SW1
SHDN1
47 nF
4.7 nF
20k
17V to 20V IN
C
C1
V
IN
*C
*C
R
C1
1 nF
INB
INA
C
V
V
V
V
C1
BG
C2
IN
IN
IN
C
BG
4.7 mF
ceramic
4.7 mF
ceramic
68 mF
V
C
2k
C2
C
BOOT2
SHDN2
CB2
4.7 nF
R
C2
SS2
R
L2
22 mH
F
1 mF
22.6k
15V OUT2
FB2
SW2
FSLCT
AGND
AGND
AGND
C
SS2
47 nF
AGND
C
OUT2A
PGND
PGND
PGND
C
OUT2
R
FB3
1 mF
ceramic
D2
MBRS240
68 mF
221k
PGND
LM2717-ADJ
R
FB4
20k
PGND
Figure 20. 15V, 3.3V Output Application
L1
22 mH
3.3V OUT1
C
BOOT1
R
FB2
R
FB1
20k 33.2k
1 mF
C
OUT1A
D1
MBRS240
*Connect CINA (pin
23) and CINB (pins
14,15) as close as
possible to the VIN
pins.
C
U1
OUT1
1 mF
ceramic
C
68 mF
SS1
CB1
FB1
SS1
SW1
SHDN1
47 nF
4.7 nF
20k
8V to 20V IN
C
C1
V
IN
*C
*C
R
C1
1 nF
INB
INA
C
V
V
V
V
C1
BG
C2
IN
IN
IN
C
BG
4.7 mF
ceramic
4.7 mF
ceramic
68 mF
V
C
10k
C2
C
BOOT2
SHDN2
CB2
4.7 nF
R
C2
SS2
R
L2
22 mH
F
1 mF
22.6k
5V OUT2
FB2
SW2
FSLCT
AGND
AGND
AGND
C
SS2
47 nF
AGND
C
OUT2A
PGND
PGND
PGND
C
OUT2
R
FB3
FB4
1 mF
ceramic
D2
MBRS240
68 mF
59k
PGND
LM2717-ADJ
R
20k
PGND
Figure 21. 5V, 3.3V Output Application
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L1
10 mH
1.8V OUT1
C
BOOT1
R
FB2
R
FB1
20.5k 8.66k
1 mF
C
OUT1A
C
OUT1
D1
MBRS240
*Connect CINA (pin
23) and CINB (pins
14,15) as close as
possible to the VIN
pins.
U1
47 mF
ceramic
47 mF
ceramic
C
SS1
CB1
FB1
SS1
SW1
SHDN1
47 nF
82 nF
2k
5V to 15V IN
C
C1
V
IN
*C
*C
R
C1
1 nF
INB
INA
C
V
V
V
V
C1
BG
C2
IN
IN
IN
C
BG
4.7 mF
ceramic
4.7 mF
ceramic
68 mF
V
C
2k
C2
C
BOOT2
SHDN2
CB2
82 nF
R
C2
SS2
R
L2
10 mH
F
1 mF
22.6k
3.3V OUT2
FB2
SW2
FSLCT
AGND
AGND
AGND
C
SS2
47 nF
AGND
C
C
OUT2
OUT2A
PGND
PGND
PGND
R
FB3
47 mF
ceramic
D2
MBRS240
47 mF
ceramic
33.2k
PGND
LM2717-ADJ
R
FB4
20k
PGND
Figure 22. 3.3V, 1.8V Output Application
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SNVS407C –DECEMBER 2005–REVISED MARCH 2013
REVISION HISTORY
Changes from Revision B (March 2013) to Revision C
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 18
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PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2013
PACKAGING INFORMATION
Orderable Device
LM2717MT-ADJ/NOPB
LM2717MTX-ADJ/NOPB
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
ACTIVE
TSSOP
TSSOP
PW
24
24
61
Green (RoHS
& no Sb/Br)
CU SN
CU SN
Level-1-260C-UNLIM
LM2717
MT-ADJ
ACTIVE
PW
2500
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
-40 to 125
LM2717
MT-ADJ
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM2717MTX-ADJ/NOPB TSSOP
PW
24
2500
330.0
16.4
6.95
8.3
1.6
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
TSSOP PW 24
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
LM2717MTX-ADJ/NOPB
2500
Pack Materials-Page 2
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Applications
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