LM27762DSSR [TI]
具有集成 LDO 的低噪声正负输出电荷泵 | DSS | 12 | -40 to 85;
| 型号： | LM27762DSSR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有集成 LDO 的低噪声正负输出电荷泵 | DSS | 12 | -40 to 85 泵 光电二极管 |
| 文件： | 总29页 (文件大小：1591K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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LM27762
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
LM27762 集成低噪声正负输出的
电荷泵和 LDO
1 特性
3 说明
1
•
可生成低噪声、可调节的 1.5V 至 5V 的正电源电压
LM27762 提供 ±1.5V 至 ±5V 可调节、超低噪声正负
和 -5V 至 -1.5V 的负电源电压
输入电压范围为 2.7V 至 5.5V
±250mA 输出电流
输出。输入电压范围为 2.7V 至 5.5V，输出电流高达 ±
250mA。LM27762 的工作电流仅为 390µA并且关断电
流的典型值为 0.5µA，因此可为功率放大器、数模转换
器 (DAC) 偏置以及其他大电流、低噪声、负电压应用
提供理想性能。该器件采用小型解决方案尺寸，所需外
部组件很少。
•
•
•
•
•
•
反向电荷泵紧接一个负电压低压降稳压器 (LDO)
2MHz 固定频率、低噪声运行
2.5Ω 逆变器输出阻抗，VIN = 5V
电流为 100mA 时的负电压 LDO 压降电压为
30mV，VOUT = -5V
负电压由经过稳压的反相电荷泵生成，该电荷泵紧接一
个低噪声、负电压 LDO。LM27762 器件的反相电荷泵
在 2MHz（典型值）开关频率下运行，可减少输出阻抗
和电压纹波。正电压由低噪声正电压 LDO 的输入生
成。
•
电流为 100mA 时的正电压 LDO 压降电压为
45mV，VOUT = 5V
•
•
•
•
•
390µA 静态电流（典型值）
关断时的静态电流降至 0.5µA（典型值）
电流限制和热保护
LM27762 的正负电压输出配有专用使能输入。为满足
特定的系统电源排序需要，这些输出支持独立的正负电
源轨时序。使能输入也可短接在一起并与输入电压相
连。LM27762 具有可选的电源正常功能。
电源正常引脚（低电平有效）
使用 LM27762 并借助 WEBENCH® 电源设计器创
建定制设计
器件信息(1)
2 应用
器件型号
LM27762
封装
封装尺寸（标称值）
•
•
•
•
•
•
高保真 (Hi-Fi) 音频耳机放大器
WSON (12)
2.00mm x 3.00mm
运算放大器电源偏置
为数据转换器供电
无线通信系统
接口电源
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
空白
手持式仪表
简化电路原理图
2.7 V to 5.5 V
CP
VIN
CCP
1.5 V to 5 V
R1
OUT+
CVIN
RPU
FB+
COUT+
PGOOD
C1-
LM27762
R2
R4
GND
C1
C1+
EN+
COUT-
FB-
R3
OUT-
-1.5 V to -5 V
EN-
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SNVSAF7
LM27762
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
www.ti.com.cn
目录
7.4 Device Functional Modes........................................ 11
Application and Implementation ........................ 12
8.1 Application Information............................................ 12
8.2 Typical Application ................................................. 12
Power Supply Recommendations...................... 17
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 6
Detailed Description .............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................. 10
8
9
10 Layout................................................................... 17
10.1 Layout Guidelines ................................................. 17
10.2 Layout Example .................................................... 18
11 器件和文档支持 ..................................................... 19
11.1 器件支持................................................................ 19
11.2 接收文档更新通知 ................................................. 19
11.3 社区资源................................................................ 19
11.4 商标....................................................................... 19
11.5 静电放电警告......................................................... 19
11.6 Glossary................................................................ 19
12 机械、封装和可订购信息....................................... 20
7
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision A (September 2016) to Revision B
Page
•
已添加 添加了 WEBENCH 链接 ............................................................................................................................................ 1
Changes from Original (July 2016) to Revision A
Page
•
•
已更改 标题中的“开关电容”至“充电泵”.................................................................................................................................... 1
已更改 “可生成低噪声、可调节的 ±1.5V 至 ±5V 正负电源电压”至“可生成低噪声、可调节的 1.5V 至 5V 的正电源电压
和 -5V 至 -1.5V 的负电源电压”（“特性”中）........................................................................................................................... 1
2
Copyright © 2016–2017, Texas Instruments Incorporated
LM27762
www.ti.com.cn
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
5 Pin Configuration and Functions
DSS Package
12-Pin WSON With Thermal Pad
Top View
1
12
11
10
9
2
3
4
5
6
8
7
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
C1+
C1–
CP
NUMBER
10
9
Power
Power
Power
Input
Positive terminal for C1
Negative terminal for C1
5
Negative unregulated output voltage
EN+
EN–
FB+
12
8
Enable input for the positive LDO, Active high
Input
Enable input for the charge pump and negative LDO, Active high
2
Power
Feedback input. Connect FB+ to an external resistor divider between OUT+ and
GND. DO NOT leave unconnected.
FB–
7
Power
Feedback input. Connect FB– to an external resistor divider between OUT– and
GND. DO NOT leave unconnected.
GND
4
11
6
Ground
Power
Power
Output
Ground
OUT+
OUT–
PGOOD
Regulated positive output voltage
Regulated negative output voltage
1
Power Good flag; open drain; Logic 0 = power good, Logic 1 = power not good.
Connect to ground if not used.
VIN
3
Power
Positive power supply input
Thermal Pad
—
Ground
Ground. DO NOT leave unconnected.
Copyright © 2016–2017, Texas Instruments Incorporated
3
LM27762
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN
MAX
5.8
VIN
300
1
UNIT
V
VIN to GND or GND to VOUT
EN+, EN-
GND − 0.3
V
CPOUT, OUT+ and OUT- , continuous output current
OUT+, OUT- short-circuit duration to GND(3)
Continuous power dissipation(4)
mA
s
Internally limited
(4)
TJMAX
150
5.5
°C
V
Operating input voltage, VIN
2.7
0
Operating output current, IOUT
Operating ambient temperature, TA
Operating junction temperature, TJ
Storage temperature, Tstg
250
85
mA
°C
°C
°C
–40
–40
–65
125
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, contact the TI Sales Office/Distributors for availability and specifications.
(3) OUT may be shorted to GND for one second without damage. However, shorting OUT to VIN may damage the device and must be
avoided. Also, for temperatures above TA = 85°C, VOUT must not be shorted to GND or VIN or device may be damaged.
(4) Internal thermal shutdown circuitry protects the device from damage.
6.2 ESD Ratings
VALUE
±1000
±250
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
85
UNIT
Operating ambient temperature, TA
Operating junction temperature, TJ
–40
–40
°C
°C
125
6.4 Thermal Information
LM27762
THERMAL METRIC(1)
DSS (WSON)
12 PINS
62.2
UNIT
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
54.7
25.6
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
1.8
ψJB
25.6
RθJC(bot)
9.2
(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
4
Copyright © 2016–2017, Texas Instruments Incorporated
LM27762
www.ti.com.cn
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
6.5 Electrical Characteristics
Typical limits apply for TA = 25°C; minimum and maximum limits apply over the full temperature range. Unless otherwise
specified VIN = 5 V, CIN = COUT+ = COUT– = 2.2 μF, C1 = 1 μF, CPOUT = 4.7 μF.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Open circuit, no load, EN+, EN–
connected to VIN.
IQ
Supply current
390
µA
(1)
ISD
Shutdown supply current
Switching frequency
0.5
2
5
µA
MHz
Ω
ƒSW
VIN = 3.6 V
1.7
2.3
RNEG
VLDO–
PSRR
VN–
Output resistance to CPOUT
LDO dropout voltage
VIN = 5.5 V, IL = 100 mA
IL = 100 mA, VOUT– = −5 V
IL = 100 mA, VOUT– = −1.8 V, 10 kHz
IL = 80 mA, 10 Hz to 100 kHz
2.5
30
mV
dB
Power supply rejection ratio, OUT–
Output noise voltage
50
22
µVRMS
V
VFB–
Feedback pin reference voltage
Adjustable output voltage
Load regulation
–1.238
–5
–1.22
–1.202
–1.5
5.5 V ≥ VIN ≥ 2.7 V
V
VOUT–
0 to 250 mA, VOUT = –1.8 V
5 V ≥ VIN ≥ 2.7 V, IL = 50 mA
IL = 100 mA, VOUT = 5 V
34
1.5
45
µV/mA
mV/V
mV
dB
Line regulation
VLDO+
PSRR
VN+
LDO dropout voltage
Power supply rejection ratio, OUT+
Output noise voltage
IL = 100 mA, VOUT+ = 1.8 V, 10 kHz
IL = 80 mA, 10 Hz to 100 kHz
43
22
µVRMS
V
VFB+
Feedback pin reference voltage
Adjustable output voltage
Load regulation
1.182
1.5
1.2
1.218
5
5.5 V ≥ VIN ≥ 2.7 V
V
VOUT+
0 to 250 mA, VOUT = 1.8 V
5 V ≥ VIN ≥ 2.7 V, IL = 50 mA
5.5 V ≥ VIN ≥ 2.7 V
11
µV/mA
mV/V
V
Line regulation
1.9
VIH
VIL
Enable pin input voltage high
Enable pin input voltage low
1.2
5.5 V ≥ VIN ≥ 2.7 V
0.4
V
(1) When VIN = 5.5V charge pump may enter PWM mode in hot conditions.
版权 © 2016–2017, Texas Instruments Incorporated
5
LM27762
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
www.ti.com.cn
6.6 Typical Characteristics
5
4.5
4
3
2.8
2.6
2.4
2.2
2
VOUT+
VOUT-
VOUT-
VOUT+
3.5
3
2.5
2
1.8
1.6
1.4
1.2
1
1.5
1
0.5
0
25
50
75 100 125 150 175 200 225 250
Output Current (mA)
2.8
3
3.2
3.4
3.6
3.8
4
4.2
Input Voltage (V)
D014
D022
VIN = 3.7 V
VOUT = ±3 V
VOUT = ±3 V
IOUT = ±100 mA
图 1. Output Voltage Ripple vs Output Current
图 2. Output Voltage Ripple vs Input Voltage
500
100
120
100
80
60
40
20
0
85°C
25°C
-40°C
VOUT+
VOUT-
10
1
0.001
0.01
0.1
0.5
0
25
50
75 100 125 150 175 200 225 250
Output Current (mA)
IOUT(A)
D016
D015
VIN = 5.5 V
VOUT = ± 3.3 V
图 4. Charge Pump Output Resistance vs Output Current
图 3. LDO Dropout Voltage vs Output Current
-3.1
-3.125
-3.15
3.31
0 mA
50 mA
100 mA
0 mA
50 mA
100 mA
3.305
3.3
-3.175
-3.2
3.295
3.29
-3.225
-3.25
-3.275
-3.3
3.285
3.28
-3.325
-3.35
-3.375
3.275
3.25 3.5 3.75
4
4.25 4.5 4.75
Input Voltage (V)
5
5.25 5.5
3.25 3.5 3.75
4
4.25 4.5 4.75
Input Voltage (V)
5
5.25 5.5
D017
D018
VOUT = –3.3 V
VOUT = 3.3 V
图 5. Line Regulation for OUT-
图 6. Line Regulation for OUT+
6
版权 © 2016–2017, Texas Instruments Incorporated
LM27762
www.ti.com.cn
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
Typical Characteristics (接下页)
-3.29
-3.3
3.35
3.34
3.33
3.32
3.31
3.3
-40 °C
+25 °C
+85 °C
-40 °C
+25 °C
+85 °C
-3.31
-3.32
-3.33
-3.34
-3.35
-3.36
-3.37
-3.38
-3.39
-3.4
3.29
3.28
3.27
3.26
3.25
0
30
60
90
120 150 180 210 240 270
0
25
50
75 100 125 150 175 200 225 250
Output Current (mA)
Output Current (mA)
D019
D020
VIN = 4.3 V
VOUT = –3.3 V
VIN = 4.3 V
VOUT = 3.3 V
图 7. Load Regulation for OUT-
图 8. Load Regulation for OUT+
100
90
80
70
60
50
40
30
20
10
0
VOUT = -3.3V
VOUT= -5V
0
25
50
75 100 125 150 175 200 225 250
Output Current (mA)
D021
VIN = 5.5 V
图 10. Start-Up
图 9. Efficiency for OUT–
图 11. Shutdown
版权 © 2016–2017, Texas Instruments Incorporated
7
LM27762
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
www.ti.com.cn
7 Detailed Description
7.1 Overview
The LM27762 low-noise inverting charge pump with both positive and negative LDOs delivers very low-noise
adjustable positive and negative outputs between ±1.5 V and ±5 V. The output voltage levels of the positive and
negative LDO are independently controllable with external resistors. Input voltage range of LM27762 is from 2.7
V to 5.5 V. Five low-cost capacitors are used in this circuit to provide up to ±250 mA of output current. The
LM27762 operates at 2-MHz (typical) switching frequency to reduce output resistance and voltage ripple. With an
typical operating current of only 390 µA and 0.5-µA typical shutdown current, the LM27762 provides ideal
performance for power amplifiers and DAC bias and other high-current, low-noise negative voltage needs.
The LM27762 device has an enable input (EN+) for the positive LDO and another enable input (EN–) for the
negative charge pump and LDO. This supports independent timing for the positive and negative rails in system
power sequence. Enable inputs can be also shorted together and connected to VIN. When LDO is disabled,
output of the positive LDO has 50-kΩ pulldown to ground, and output of the negative LDO has 50-kΩ pullup to
ground. The LM27762 has power good monitoring for OUT+ and OUT– outputs. The PGOOD pin is an open-
drain output and requires an external pullup resistor. When Power Good feature is not used, PGOOD pin can be
connected to ground.
8
版权 © 2016–2017, Texas Instruments Incorporated
LM27762
www.ti.com.cn
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
7.2 Functional Block Diagram
Current Limit
VIN
C1+
Switch Array
Switch
Drivers
2-MHz Oscillator
C1-
CP
EN-
GND
Reference
LPF
EN-
PU
OUT-
FB-
Negative
Bandgap
LPF
LDO
Power Good
Monitoring
PGOOD
Current
Limit
EN+
LPF
EN+
PD
OUT+
FB+
Positive
Bandgap
LPF
LDO
Copyright © 2016, Texas Instruments Incorporated
版权 © 2016–2017, Texas Instruments Incorporated
9
LM27762
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
www.ti.com.cn
7.3 Feature Description
7.3.1 Undervoltage Lockout
The LM27762 has an internal comparator that monitors the voltage at VIN and forces the device into shutdown if
the input voltage drops to 2.4 V. If the input voltage rises above 2.6 V, the LM27762 resumes normal operation.
7.3.2 Input Current Limit
The LM27762 contains current limit circuitry that protects the device in the event of excessive input current
and/or output shorts to ground. The charge pump and positive LDO both have 500 mA (typical) input current limit
when the output is shorted directly to ground. When the LM27762 is current limiting, power dissipation in the
device is likely to be quite high. In this event, thermal cycling is expected.
7.3.3 PFM Operation
To minimize quiescent current during light load operation, the LM27762 allows PFM or pulse-skipping operation.
By allowing the charge pump to switch less when the output current is low, the quiescent current drawn from the
power source is minimized. The frequency of pulsed operation is not limited and can drop into the sub-2-kHz
range when unloaded. As the load increases, the frequency of pulsing increases until it transitions to constant
frequency. The fundamental switching frequency in the LM27762 is 2 MHz.
7.3.4 Output Discharge
In shutdown, the LM27762 actively pulls down on the outputs (OUT+, OUT–) of the device until the output
voltage reaches GND.
7.3.5 Power Good Output (PGOOD)
The LM27762 has monitoring for the OUT+ and OUT– output voltage levels and open-drain PGOOD output.
表 1. PGOOD (Active Low) Operation
EN+
Low
High
High
Low
Low
High
High
High
EN–
Low
Low
Low
High
High
High
High
High
OUT+
OUT–
PGOOD
High
High
Low
Don't care
Don't care
< 95% of target value
> 95% of target value
Don't care
Don't care
Don't care
< 95% of target value
> 95% of target value
Don't care
High
Low
Don't care
< 95% of target value
Don't care
High
High
Low
< 95% of target value
> 95% of target value
> 95% of target value
7.3.6 Thermal Shutdown
The LM27762 implements a thermal shutdown mechanism to protect the device from damage due to
overheating. When the junction temperature rises to 150°C (typical), the device switches into shutdown mode.
The LM27762 releases thermal shutdown when the junction temperature is reduced to 130°C (typical).
Thermal shutdown is most often triggered by self-heating, which occurs when there is excessive power
dissipation in the device and/or insufficient thermal dissipation. The LM27762 device power dissipation increases
with increased output current and input voltage. When self-heating brings on thermal shutdown, thermal cycling
is the typical result. Thermal cycling is the repeating process where the part self-heats, enters thermal shutdown
(where internal power dissipation is practically zero), cools, turns on, and then heats up again to the thermal
shutdown threshold. Thermal cycling is recognized by a pulsing output voltage and can be stopped by reducing
the internal power dissipation (reduce input voltage and/or output current) or the ambient temperature. If thermal
cycling occurs under desired operating conditions, thermal dissipation performance must be improved to
accommodate the power dissipation of the device.
10
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LM27762
www.ti.com.cn
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
7.4 Device Functional Modes
7.4.1 Shutdown Mode
When enable pins (EN+, EN–) are low, both positive and negative outputs of LM27762 are disabled, and the
device is in shutdown mode reducing the quiescent current to minimum level. In shutdown, the outputs of the
LM27762 are pulled to ground (internal 50 kΩ between each OUT pin and ground).
7.4.2 Enable Mode
Applying a voltage greater than 1.2 V to the EN+ pin enables the positive LDO. Applying a voltage greater than
1.2 V to the EN– pin enables the negative CP and LDO. When enabled, the positive and negative output
voltages are equal to levels set by external resistors. Care must be taken to both the positive LDO and the
inverting charge pump followed by negative LDO have enough headroom. Power Good ouput PGOOD indicates
the status of OUT+ and OUT– voltage levels.
版权 © 2016–2017, Texas Instruments Incorporated
11
LM27762
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
www.ti.com.cn
8 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LM27762 input voltage range is from 2.7 V to 5.5 V. The positive LDO provides a positive voltage
configurable with external gain setting resistors R1, R2. The low-noise charge-pump voltage converter inverts the
input voltage V to a negative output voltage. Charge pump is followed by the negative LDO which regulates a
negative output voltage configurable with external gain setting resistors R3, R4. Output voltage range is ± 1.5 V to
± 5 V. When selecting input (VIN) and output (OUT+, OUT-) voltages ranges, headroom required by the charge
pump and LDOs must to be considered. Charge-pump minimum headroom can be estimated based on the
maximum load current and charge pump output resistance.
The device uses five low-cost capacitors to provide up to 250 mA of output current. The LM27762 operates at a
2-MHz oscillator frequency to reduce charge-pump output resistance and voltage ripple under heavy loads.
When using the optional open-drain PGOOD feature, connect a 10-kΩ pullup resistor (RPU) to VIN. Connect pin
to ground if PGOOD is not used.
8.2 Typical Application
2.7 V to 5.5 V
CP
VIN
CCP
1.5 V to 5 V
R1
OUT+
CVIN
RPU
COUT+
FB+
PGOOD
C1-
LM27762
R2
R4
GND
C1
C1+
EN+
COUT-
FB-
R3
OUT-
-1.5 V to -5 V
EN-
Copyright © 2016, Texas Instruments Incorporated
图 12. LM27762 Typical Application
12
版权 © 2016–2017, Texas Instruments Incorporated
LM27762
www.ti.com.cn
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
Typical Application (接下页)
8.2.1 Design Requirements
The following example describes powering an amplifier driving high impedance headphones. Input voltage is
from a smart-phone battery. Amplifier is driving 2-VRMS to 600-Ω stereo headphones.
表 2. Application Example Design Parameters
DESIGN PARAMETER
Input voltage
Output voltage
Output current
CVIN, COUT+, COUT–
CCP
EXAMPLE VALUE
3.3 V to 4.2 V
±3 V
10 mA (LM27762 capability 250 mA maximum)
2.2 μF
4.7 μF
RPU
10 kΩ (optional, connect PGOOD pin to ground if feature is not used)
8.2.2 Detailed Design Procedure
8.2.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the LM27762 device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
•
•
•
•
Run electrical simulations to see important waveforms and circuit performance.
Run thermal simulations to understand board thermal performance.
Export customized schematic and layout into popular CAD formats.
Print PDF reports for the design, and share the design with colleagues.
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
8.2.2.2 Positive Low-Dropout Linear Regulator and OUT+ Voltage Setting
LM27762 features a low-dropout, linear positive voltage regulator (LDO). The LDO output is rated for a current of
250 mA. This LDO allows the device to provide a very low noise output, low output voltage ripple, high PSRR,
and low line or load transient response.
The positive output voltage of the LM27762 is externally configurable. The value of R1 and R2 determines the
output voltage setting. The output voltage can be calculated using 公式 1:
VOUT = 1.2 V × (R1 + R2) / R2
(1)
The value for R2 must be no less than 50 kΩ.
8.2.2.3 Charge-Pump Voltage Inverter
The main application of the LM27762 is to generate a regulated negative supply voltage. The voltage inverter
circuit uses only three external capacitors, and the LDO regulator circuit uses one additional output capacitor.
The voltage inverter portion of the LM27761 contains four large CMOS switches which are switched in sequence
to invert the input supply voltage. Energy transfer and storage are provided by external capacitors. 图 13 shows
the voltage switches S2 and S4 are open. In the second time interval, S1 and S3 are open; at the same time, S2
and S4 are closed, and C1 is charging CCP. After a number of cycles, the voltage across CCP is pumped into VIN.
Because the anode of CCP is connected to ground, the output at the cathode of CCP equals –(VIN) when there is
no load current. When a load is added, the output voltage drop is determined by the parasitic resistance (RDSON
of the MOSFET switches and the equivalent series resistance (ESR) of the capacitors) and the charge transfer
loss between the capacitors.
版权 © 2016–2017, Texas Instruments Incorporated
13
LM27762
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
www.ti.com.cn
S1
C1+
S2
VIN
CIN
GND
C1
CCPOUT
GND
S3
S4
C1-
CP
OSC.
2 MHz
+
PFM COMP
VIN
Copyright © 2016, Texas Instruments Incorporated
图 13. Voltage Inverting Principle
The output characteristic of this circuit can be approximated by an ideal voltage source in series with a
resistance. The voltage source equals –(VIN). The output resistance ROUT is a function of the ON resistance of
the internal MOSFET switches, the oscillator frequency, the capacitance, and the ESR of C1 and CCP. Because
the switching current charging and discharging C1 is approximately twice as the output current, the effect of the
ESR of the pumping capacitor C1 is multiplied by four in the output resistance. The charge-pump output capacitor
CCP is charging and discharging at a current approximately equal to the output current; therefore, its ESR only
counts once in the output resistance. A good approximation of charge-pump ROUT is shown in 公式 2:
ROUT = (2 × RSW) + [1 / (ƒSW × C1)] + (4 × ESRC1) + ESRCCP
where
•
RSW is the sum of the ON resistance of the internal MOSFET switches shown in 图 13.
(2)
High capacitance and low-ESR ceramic capacitors reduce the output resistance.
8.2.2.4 Negative Low-Dropout Linear Regulator and OUT– Voltage Setting
At the output of the inverting charge-pump the LM27762 features a low-dropout, linear negative voltage regulator
(LDO). The LDO output is rated for a current of 250 mA. This negative LDO allows the device to provide a very
low noise output, low output voltage ripple, high PSRR, and low line or load transient response.
The negative output voltage of the LM27762 is externally configurable. The value of R3 and R4 determines the
output voltage setting. The output voltage can be calculated using 公式 1:
VOUT = –1.22 V × (R3 + R4) / R4
(3)
The value for R4 must be no less than 50 kΩ.
8.2.2.5 External Capacitor Selection
The LM27762 requires 5 external capacitors for proper operation. Surface-mount multi-layer ceramic capacitors
are recommended. These capacitors are small, inexpensive, and have very low ESR (≤ 15 mΩ typical). Tantalum
capacitors, OS-CON capacitors, and aluminum electrolytic capacitors generally are not recommended for use
with the LM27762 due to their high ESR compared to ceramic capacitors.
For most applications, ceramic capacitors with an X7R or X5R temperature characteristic are preferable for use
with the LM27762. These capacitors have tight capacitance tolerances (as good as ±10%) and hold their value
over temperature (X7R: ±15% over –55°C to +125°C; X5R ±15% over –55°C to +85°C).
14
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LM27762
www.ti.com.cn
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
Using capacitors with a Y5V or Z5U temperature characteristic is generally not recommended for the LM27762.
These capacitors typically have wide capacitance tolerance (80%, ….20%) and vary significantly over
temperature (Y5V: 22%, –82% over –30°C to +85°C range; Z5U: 22%, –56% over 10°C to 85°C range). Under
some conditions a 1-µF-rated Y5V or Z5U capacitor could have a capacitance as low as 0.1 µF. Such
detrimental deviation is likely to cause Y5V and Z5U capacitors to fail to meet the minimum capacitance
requirements of the LM27762.
Net capacitance of a ceramic capacitor decreases with increased DC bias. This degradation can result in lower-
than-expected capacitance on the input and/or output, resulting in higher ripple voltages and currents. Using
capacitors at DC bias voltages significantly below the capacitor voltage rating usually minimizes DC bias effects.
Consult capacitor manufacturers for information on capacitor DC bias characteristics.
Capacitance characteristics can vary quite dramatically with different application conditions, capacitor types, and
capacitor manufacturers. TI strongly recommends that the LM27762 circuit be evaluated thoroughly early in the
design-in process with the mass-production capacitor of choice. This helps ensure that any such variability in
capacitance does not negatively impact circuit performance.
8.2.2.5.1 Charge-Pump Output Capacitor
In typical applications, Texas Instruments recommends a 4.7-µF low-ESR ceramic charge-pump output capacitor
(CCP). Different output capacitance values can be used to reduce charge pump ripple, shrink the solution size,
and/or cut the cost of the solution. However, changing the output capacitor may also require changing the flying
capacitor or input capacitor to maintain good overall circuit performance.
In higher-current applications, a 10-µF, 10-V low-ESR ceramic output capacitor is recommended. If a small
output capacitor is used, the output ripple can become large during the transition between PFM mode and
constant switching. To prevent toggling, a 2-µF capacitance is recommended. For example, 10-µF, 10-V output
capacitor in a 0402 case size typically has only 2-µF capacitance when biased to 5 V.
8.2.2.5.2 Input Capacitor
The input capacitor (C2) is a reservoir of charge that aids in a quick transfer of charge from the supply to the
flying capacitors during the charge phase of operation. The input capacitor helps to keep the input voltage from
drooping at the start of the charge phase when the flying capacitors are connected to the input. It also filters
noise on the input pin, keeping this noise out of the sensitive internal analog circuitry that is biased off the input
line.
Input capacitance has a dominant and first-order effect on the input ripple magnitude. Increasing (decreasing) the
input capacitance results in a proportional decrease (increase) in input voltage ripple. Input voltage, output
current, and flying capacitance also affects input ripple levels to some degree.
In typical applications, a 4.7-µF low-ESR ceramic capacitor is recommended on the input. When operating near
the maximum load of 250 mA, after taking into the DC bias derating, a minimum recommended input capacitance
is 2 µF or larger. Different input capacitance values can be used to reduce ripple, shrink the solution size, and/or
cut the cost of the solution.
8.2.2.5.3 Flying Capacitor
The flying capacitor (C1) transfers charge from the input to the output. Flying capacitance can impact both output
current capability and ripple magnitudes. If flying capacitance is too small, the LM27762 may not be able to
regulate the output voltage when load currents are high. On the other hand, if the flying capacitance is too large,
the flying capacitor might overwhelm the input and charge pump output capacitors, resulting in increased input
and output ripple.
In typical high-current applications, 0.47-µF or 1-µF 10-V low-ESR ceramic capacitors are recommended for the
flying capacitors. Polarized capacitors (tantalum, aluminum, electrolytic, etc.) must not be used for the flying
capacitor, as they could become reverse-biased during LM27762 operation.
8.2.2.5.4 LDO Output Capacitor
The LDO output capacitor (COUT+, COUT-) value and the ESR affect stability, output ripple, output noise, PSRR
and transient response. The LM27762 only requires the use of a 2.2-µF ceramic output capacitor for stable
operation. For typical applications, a 2.2-µF ceramic output capacitor located close to the output is sufficient.
版权 © 2016–2017, Texas Instruments Incorporated
15
LM27762
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
www.ti.com.cn
8.2.2.6 Power Dissipation
The allowed power dissipation for any package is a measure of the ability of the device to pass heat from the
junctions of the device to the heatsink and the ambient environment. Thus, the power dissipation is dependent
on the ambient temperature and the thermal resistance across the various interfaces between the die junction
and ambient air.
The maximum allowable power dissipation can be calculated by 公式 4:
PD-MAX = (TJ-MAX – TA) / RθJA
(4)
The actual power being dissipated in the device can be represented by 公式 5:
PD = PIN – POUT = VIN × (–IOUT– + IOUT+ + IQ) – (VOUT+ × IOUT+ + VOUT– × IOUT–
)
(5)
公式 4 and 公式 5 establish the relationship between the maximum power dissipation allowed due to thermal
consideration, the voltage drop across the device, and the continuous current capability of the device. These
equations must be used to determine the optimum operating conditions for the device in a given application.
In lower power dissipation applications the maximum ambient temperature (TA-MAX) may be increased. In higher
power dissipation applications the maximum ambient temperature(TA-MAX) may have to be derated. TA-MAX can be
calculated using 公式 6:
TA-MAX = TJ-MAX-OP – (RθJA × PD-MAX
)
where
•
•
•
TJ-MAX-OP = maximum operating junction temperature (125°C)
PD-MAX = the maximum allowable power dissipation
RθJA = junction-to-ambient thermal resistance of the package
(6)
Alternately, if TA-MAX cannot be derated, the power dissipation value must be reduced. This can be accomplished
by reducing the input voltage as long as the minimum VIN is not violated, or by reducing the output current, or
some combination of the two.
8.2.3 Application Curves
Refer also to Typical Characteristics
0
-5
0
-10
-20
-30
-40
-50
-60
-70
-80
VIN=3.7V,IOUT=100mA
VIN=3.7V,IOUT=10mA
VIN=3.3V,IOUT=10mA
VIN= 3.7V, IOUT=100mA
VIN= 3.3V, IOUT=100mA
VIN= 3.7V, IOUT=10mA
VIN= 3.3V, IOUT=10mA
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
10
100
1000
10000
100000
10
100
1000
10000
100000
Frequency(Hz)
Frequency (Hz)
D023
D024
图 14. PSRR for OUT-
图 15. PSRR for OUT+
16
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LM27762
www.ti.com.cn
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
9 Power Supply Recommendations
The LM27762 is designed to operate from an input voltage supply range between 2.7 V and 5.5 V. This input
supply must be well regulated and capable of supplying the required input current. If the input supply is located
far from the LM27762, additional bulk capacitance may be required in addition to the ceramic bypass capacitors.
10 Layout
10.1 Layout Guidelines
The high switching frequency and large switching currents of the LM27762 make the choice of layout important.
Use the following steps as a reference to ensure the device is stable and maintains proper LED current
regulation across its intended operating voltage and current range:
•
Place CIN on the top layer (same layer as the LM27762) and as close as possible to the device. Connecting
the input capacitor through short, wide traces to both the VIN and GND pins reduces the inductive voltage
spikes that occur during switching, which can corrupt the VIN line.
•
Place CCPOUT on the top layer (same layer as the LM27762) and as close as possible to the VOUT and GND
pins. The returns for both CIN and CCPOUT must come together at one point, as close as possible to the GND
pin. Connecting CCPOUT through short, wide traces reduces the series inductance on the VCPOUT and GND
pins that can corrupt the VCPOUT and GND lines and cause excessive noise in the device and surrounding
circuitry.
•
•
Place C1 on top layer (same layer as the LM27762) and as close as possible to the device. Connect the flying
capacitor through short, wide traces to both the C1+ and C1– pins.
Place COUT+, COUT– on the top layer (same layer as the LM27762) and as close to the respective OUT pin as
possible. For best performance the ground connection for COUT must connect back to the GND connection at
the thermal pad of the device.
•
Place R1 to R4 on the top layer (same layer as LM27762) and as close as possible to the respective FB pin.
For best performance the ground connection of R2, R4 must connect back to the GND connection at the
thermal pad of the device.
Connections using long trace lengths, narrow trace widths, or connections through vias must be avoided. These
add parasitic inductance and resistance that results in inferior performance, especially during transient
conditions.
版权 © 2016–2017, Texas Instruments Incorporated
17
LM27762
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
www.ti.com.cn
10.2 Layout Example
R1
Positive Rail, To Load
R2
COUT+
C1
R3
R4
Thermal Pad
COUT-
CIN
CCPOUT
To GND Plane
To Supply
图 16. LM27762 Layout Example
(Note: Pullup resistor for PGOOD not shown in example.)
18
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LM27762
www.ti.com.cn
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
11 器件和文档支持
11.1 器件支持
•
《使用 LM27762EVM 评估模块》
11.1.1 开发支持
11.1.1.1 使用 WEBENCH® 工具创建定制设计
请单击此处，使用 LM27762 器件并借助 WEBENCH® 电源设计器创建定制设计。
1. 在开始阶段键入输出电压 (VIN)、输出电压 (VOUT) 和输出电流 (IOUT) 要求。
2. 使用优化器拨盘优化关键设计参数，如效率、封装和成本。
3. 将生成的设计与德州仪器 (TI) 的其他解决方案进行比较。
WEBENCH Power Designer 提供一份定制原理图以及罗列实时价格和组件可用性的物料清单。
在多数情况下，可执行以下操作：
•
•
•
•
运行电气仿真，观察重要波形以及电路性能
运行热性能仿真，了解电路板热性能
将定制原理图和布局方案导出至常用 CAD 格式
打印设计方案的 PDF 报告并与同事共享
有关 WEBENCH 工具的详细信息，请访问 www.ti.com/WEBENCH。
11.2 接收文档更新通知
要接收文档更新通知，请导航至德州仪器 TI.com.cn 上的器件产品文件夹。请单击右上角的通知我 进行注册，即可
收到任意产品信息更改每周摘要。有关更改的详细信息，请查看任意已修订文档中包含的修订历史记录。
11.3 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
11.4 商标
E2E is a trademark of Texas Instruments.
WEBENCH is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
版权 © 2016–2017, Texas Instruments Incorporated
19
LM27762
ZHCSFJ0B –AUGUST 2016–REVISED FEBRUARY 2017
www.ti.com.cn
12 机械、封装和可订购信息
以下页面包括机械、封装和可订购信息。这些信息是指定器件的最新可用数据。这些数据发生变化时，我们可能不
会另行通知或修订此文档。如欲获取此产品说明书的浏览器版本，请参阅左侧的导航栏。
20
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PACKAGE OPTION ADDENDUM
www.ti.com
28-Sep-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM27762DSSR
LM27762DSST
ACTIVE
ACTIVE
WSON
WSON
DSS
DSS
12
12
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
L27762
L27762
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
28-Sep-2021
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Mar-2017
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM27762DSSR
LM27762DSST
WSON
WSON
DSS
DSS
12
12
3000
250
180.0
180.0
8.4
8.4
2.25
2.25
3.25
3.25
1.05
1.05
4.0
4.0
8.0
8.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Mar-2017
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM27762DSSR
LM27762DSST
WSON
WSON
DSS
DSS
12
12
3000
250
210.0
210.0
185.0
185.0
35.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DSS0012B
WSON - 0.8 mm max height
SCALE 4.500
PLASTIC SMALL OUTLINE - NO LEAD
2.1
1.9
A
B
0.35
0.25
PIN 1 INDEX AREA
0.3
0.2
3.1
2.9
DETAIL
OPTIONAL TERMINAL
TYPICAL
C
0.8 MAX
SEATING PLANE
0.08 C
1
0.1
(0.2) TYP
SYMM
0.05
0.00
EXPOSED
THERMAL PAD
6
7
SEE TERMINAL
DETAIL
2X
13
SYMM
2.5
2.65 0.1
1
12
10X 0.5
0.3
12X
0.2
0.1
0.05
0.35
0.25
12X
PIN 1 ID
(OPTIONAL)
C A B
C
4218908/A 01/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DSS0012B
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(1)
12X (0.5)
SYMM
1
12
12X (0.25)
13
SYMM
(2.65)
10X (0.5)
(R0.05) TYP
(1.075)
(
0.2) VIA
TYP
7
6
(1.9)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:25X
0.05 MIN
ALL AROUND
EXPOSDE METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4218908/A 01/2017
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
DSS0012B
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
EXPOSED METAL
TYP
12X (0.5)
SYMM
1
13
12
12X (0.25)
(0.685)
SYMM
10X (0.5)
2X (1.17)
(R0.05) TYP
7
6
2X (0.95)
(1.9)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 13:
83% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:25X
4218908/A 01/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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