LM2904BTQPWRQ1 [TI]
LM2904-Q1, LM2904B-Q1 Industry-Standard Dual Operational Amplifiers for Automotive Applications;
| 型号： | LM2904BTQPWRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LM2904-Q1, LM2904B-Q1 Industry-Standard Dual Operational Amplifiers for Automotive Applications |
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| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM2904-Q1, LM2904B-Q1
SLOS414J – MAY 2003 – REVISED FEBRUARY 2021
LM2904-Q1, LM2904B-Q1 Industry-Standard Dual Operational Amplifiers for
Automotive Applications
1 Features
3 Description
•
AEC Q-100 qualified for automotive applications
– Temperature grade 1: –40°C to +125°C
– Device HBM ESD classification 2
– Device CDM ESD classification C5
Wide supply range of 3 V to 36 V (LM2904B-Q1)
Supply-current of 300 µA per channel (LM2904B-
Q1, typical)
Unity-gain bandwidth of 1.2 MHz (LM2904B-Q1)
Common-mode input voltage range includes
ground, enabling direct sensing near ground
Low input offset voltage of 3 mV at 25°C
(LM2904B-Q1, maximum)
The LM2904-Q1 and LM2904B-Q1 are industry-
standard operational amplifiers that have been
qualified for automotive use in accordance to the
AEC-Q100 specifications. The LM2904B-Q1 is the
next-generation version of the LM2904-Q1, which
include two high-voltage (36 V) operational amplifiers
(op amps). The LM2904B-Q1 provides outstanding
value for cost-sensitive applications, with features
including low offset (1 mV, typical), common-mode
input range to ground, and high differential input
voltage capability.
•
•
•
•
•
The LM2904B-Q1 simplifies circuit design with
enhanced features such as unity-gain stability, lower
offset voltage of 1 mV (typical), and lower quiescent
current of 300 µA (typical). High ESD (2 kV, HBM) and
integrated EMI and RF filters enable the LM2904B-Q1
devices to be used in the most rugged,
environmentally challenging applications for the
automotive marketplace.
•
•
Internal RF and EMI filter (LM2904B-Q1)
Functional Safety-Capable
– Documentation available to aid functional safety
system design
2 Applications
•
•
•
•
•
•
•
Automotive lighting
Body electronics
Automotive head unit
Telematics control unit
Device Information
PART NUMBER(1)
PACKAGE
BODY SIZE (NOM)
4.90 mm × 3.90 mm
3.00 mm × 4.40 mm
3.00 mm × 3.00 mm
4.90 mm × 3.90 mm
3.00 mm × 4.40 mm
SOIC (8)
LM2904B-Q1
TSSOP (8)
VSSOP (8)
SOIC (8)
Emergency call (eCall)
Passive safety: brake system
Electric vehicle / hybrid electric:
– Inverter and motor control
– On-board (OBC) and wireless charger
– Battery management system (BMS)
LM2904-Q1
TSSOP (8)
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
RG
RF
R1
VOUT
VIN
C1
1
2pR1C1
f
=
-3 dB
VOUT
VIN
RF
1
1 + sR1C1
=
1 +
(
(
RG
Single-Pole, Low-Pass Filter
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM2904-Q1, LM2904B-Q1
SLOS414J – MAY 2003 – REVISED FEBRUARY 2021
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Table of Contents
1 Features............................................................................1
2 Applications.....................................................................1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................4
6 Pin Configuration and Functions...................................5
7 Specifications.................................................................. 6
7.1 Absolute Maximum Ratings........................................ 6
7.2 ESD Ratings............................................................... 6
7.3 Recommended Operating Conditions.........................7
7.4 Thermal Information....................................................7
7.5 Electrical Characteristics: LM2904B-Q1..................... 8
7.6 Electrical Characteristics: LM2904-Q1,
LM2904AV-Q1, LM2904V-Q1........................................9
7.7 Typical Characteristics..............................................10
8 Parameter Measurement Information..........................17
9 Detailed Description......................................................18
9.1 Overview...................................................................18
9.2 Functional Block Diagram.........................................18
9.3 Feature Description...................................................19
9.4 Device Functional Modes..........................................19
10 Application and Implementation................................20
10.1 Application Information........................................... 20
10.2 Typical Application.................................................. 20
11 Power Supply Recommendations..............................22
12 Layout...........................................................................23
12.1 Layout Guidelines................................................... 23
12.2 Layout Examples.................................................... 23
13 Device and Documentation Support..........................24
13.1 Documentation Support.......................................... 24
13.2 Related Links.......................................................... 24
13.3 Receiving Notification of Documentation Updates..24
13.4 Support Resources................................................. 24
13.5 Trademarks.............................................................24
13.6 Electrostatic Discharge Caution..............................24
13.7 Glossary..................................................................24
14 Mechanical, Packaging, and Orderable
Information.................................................................... 25
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision I (June 2020) to Revision J (February 2021)
Page
•
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•
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•
Updated the numbering format for tables, figures, and cross-references throughout the document .................1
Added Functional Safety-Capable feature and link to supporting document in Features section ..................... 1
Deleted preview tag on VSSOP (8) package throughout the data sheet............................................................1
Deleted SOT-23 (8) package information throughout the data sheet................................................................. 1
Deleted preview tag from VSSOP package in Pin Configuration and Functions section................................... 5
Deleted DDF (SOT23-8) package in Pin Configuration and Functions section..................................................5
Updated VSSOP package thermal information in Thermal Information section.................................................7
Changes from Revision H (December 2019) to Revision I (June 2020)
Page
•
•
•
•
•
•
•
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Added applications link in Application section.................................................................................................... 1
Deleted preview tag on TSSOP (8) package in Device Information table ......................................................... 1
Added information on VSSOP-8 package to Device Information table...............................................................1
Added information on VSSOP-8 package to the Device Comparison Table section..........................................4
Deleted preview tag on TSSOP-8 package in the Device Comparison Table section........................................4
Deleted preview tag from TSSOP package in Pin Configuration and Functions section....................................5
Added VSSOP package information in Pin Configuration and Functions section.............................................. 5
Added VSSOP package to Thermal Information table ...................................................................................... 7
Changed section title from Community Resources to Support Resources in the Device and Documentation
Support section.................................................................................................................................................24
Changes from Revision G (February 2019) to Revision H (December 2019)
Page
•
•
•
Added information on SOT23-8 package to Device Information table................................................................1
Added information on SOT23-8 package to the Device Comparison Table ...................................................... 4
Added the Typical Characteristics section for the LM2904B-Q1 device........................................................... 10
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Added test circuit for THD+N and small-signal step response, G = –1 in the Parameter Measurement
Information section........................................................................................................................................... 17
Changed specific voltages to a Recommended Operating Conditions reference............................................ 18
Changed the functional block diagram for LM2904B-Q1 in the Detailed Description section.......................... 18
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•
Changes from Revision F (April 2008) to Revision G (February 2019)
Page
•
Added Applications section, ESD Ratings table, Feature Description section, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ........... 1
Added new device to data sheet.........................................................................................................................1
Added AEC-Q100 qualification statement.......................................................................................................... 1
•
•
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PACKAGE
SLOS414J – MAY 2003 – REVISED FEBRUARY 2021
5 Device Comparison Table
AMBIENT
TEMPERATURE
RANGE
SUPPLY
VOLTAGE
VOS
IQ / CH
INTEGRATED EMI
FILTER
PART NUMBER
(MAXIMUM AT 25°C) (TYPICAL AT 25°C)
LM2904B-Q1
LM2904-Q1
3 V to 36 V
3 V to 26 V
3 V to 32 V
3 V to 32 V
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
3 mV
7 mV
7 mV
2 mV
300 µA
350 µA
350 µA
350 µA
Yes
No
No
No
D, DGK, PW
D, PW
LM2904V-Q1
LM2904AV-Q1
D, PW
D, PW
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6 Pin Configuration and Functions
OUT1
IN1œ
IN1+
Vœ
1
2
3
4
8
7
6
5
V+
OUT2
IN2œ
IN2+
Not to scale
Figure 6-1. D, DGK, and PW Package
8-Pin SOIC, VSSOP, and TSSOP
Top View
Table 6-1. Pin Functions
PIN(1)
I/O
DESCRIPTION
NAME
IN1–
NO.
2
I
I
Negative input
Positive input
Negative input
Positive input
Output
IN1+
IN2–
IN2+
OUT1
OUT2
V–
3
6
I
5
I
1
O
O
—
—
7
Output
4
Negative (lowest) supply or ground (for single-supply operation)
Positive (highest) supply
V+
8
(1) For a listing of which devices are available in what packages, see Section 5.
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7 Specifications
7.1 Absolute Maximum Ratings
over operating ambient temperature range (unless otherwise noted)(1)
MIN
MAX
40
UNIT
LM2904B-Q1
Supply voltage, VS = ([V+] – [V–])
LM2904V-Q1, LM2904AV-Q1
32
V
LM2904-Q1
26
LM2904B-Q1, LM2904V-Q1,
LM2904AV-Q1
–32
32
(2)
Differential input voltage, VID
V
LM2904-Q1
–26
–0.3
–0.3
–0.3
26
40
32
26
LM2904B-Q1
Input voltage, VI
Either input
LM2904V-Q1, LM2904AV-Q1
LM2904-Q1
V
s
Duration of output short circuit (one amplifier) to V– at (or below) TA = 25°C,
VS ≤ 15 V(3)
Unlimited
–40
Operating ambient temperature, TA
Operating virtual-junction temperature, TJ
Storage temperature, Tstg
125
150
150
°C
°C
°C
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Differential voltages are at IN+, with respect to IN−.
(3) Short circuits from outputs to the supply pins can cause excessive heating and eventual destruction.
7.2 ESD Ratings
VALUE
UNIT
LM2904B-Q1
V(ESD) Electrostatic discharge
Human-body model (HBM), per AEC Q100-002(1)
Charged-device model (CDM), per AEC Q100-011
±2000
±750
V
LM2904-Q1, LM2904AV-Q1, AND LM2904V-Q1
Human-body model (HBM), per AEC Q100-002(1)
±1000
±500
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per AEC Q100-011
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
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7.3 Recommended Operating Conditions
over operating ambient temperature range (unless otherwise noted)
MIN
3
MAX UNIT
LM2904B-Q1
36
VS
Supply voltage, VS = ([V+] – [V–])
LM2904AV-Q1, LM2904V-Q1
LM2904-Q1
3
30
26
V
3
VCM
TA
Common-mode voltage
V–
–40
(V+) – 2
125
V
Operating ambient temperature
°C
7.4 Thermal Information
LM2904-Q1, LM2904AV-Q1, LM2904B-Q1, LM2904V-Q1(2)
THERMAL METRIC(1)
D (SOIC)
8 PINS
124.7
66.9
DGK (VSSOP)
8 PINS
186.1
PW (TSSOP)
8 PINS
171.7
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
77.1
68.8
67.9
107.7
99.2
Junction-to-top characterization parameter
Junction-to-board characterization parameter
19.2
17.2
11.5
ψJB
67.2
106.1
97.9
(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
(2) For a listing of which devices are available in what packages, see Section 5.
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7.5 Electrical Characteristics: LM2904B-Q1
VS = (V+) – (V–) = 5 V – 36 V (±2.5 V – ±18 V), TA = 25°C, VCM = VOUT = VS / 2, RL = 10k connected to VS / 2
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
±0.3
±3.0
±4
VOS
Input offset voltage
LM2904B-Q1
mV
TA = –40°C to +125°C
TA = –40°C to +125°C(1)
dVOS/dT Input offset voltage drift
±3.5
±2
12 µV/°C
PSRR
Power supply rejection ratio
Channel separation, dc
15
µV/V
µV/V
f = 1 kHz to 20 kHz
±1
INPUT VOLTAGE RANGE
VS = 3 V to 36 V
VS = 5 V to 36 V
(V–)
(V–)
(V+) – 1.5
(V+) – 2
100
VCM
Common-mode voltage range
V
TA = –40°C to +125°C
TA = –40°C to +125°C
(V–) ≤ VCM ≤ (V+) – 1.5 V VS = 3 V to 36 V
(V–) ≤ VCM ≤ (V+) – 2.0 V VS = 5 V to 36 V
20
25
CMRR
Common-mode rejection ratio
µV/V
316
INPUT BIAS CURRENT
±10
0.5
10
±35
±50
4
IB
Input bias current
Input offset current
nA
TA = –40°C to +125°C(1)
IOS
nA
TA = –40°C to +125°C(1)
TA = –40°C to +125°C
5
dIOS/dT Input offset current drift
pA/℃
NOISE
En
en
Input voltage noise
f = 0.1 to 10 Hz
f = 1 kHz
3
µVPP
Input voltage noise density
40
nV/√/Hz
INPUT IMPEDANCE
ZID
ZIC
Differential
10 || 0.1
4 || 1.5
MΩ || pF
GΩ || pF
Common-mode
OPEN-LOOP GAIN
70
35
140
AOL
Open-loop voltage gain
VS = 15 V; VO = 1 V to 11 V; RL ≥ 10 kΩ, connected to (V–)
V/mV
TA = –40°C to +125°C
FREQUENCY RESPONSE
GBW
SR
Θm
tOR
ts
Gain bandwidth product
1.2
0.5
MHz
V/µs
°
Slew rate
G = +1
Phase margin
Overload recovery time
Settling time
G = +1, RL = 10 kΩ, CL = 20 pF
VIN × gain > VS
56
10
µs
To 0.1%, VS = 5 V, 2-V step , G = +1, CL = 100 pF
4
µs
THD+N Total harmonic distortion + noise
G = +1, f = 1 kHz, VO = 3.53 VRMS, VS = 36 V, RL = 100k, IOUT ≤ ±50 µA, BW = 80 kHz
0.001%
OUTPUT
IOUT = 50 µA
1.35
1.4
1.5
100
0.75
5
1.42
1.48
1.61
150
1
Positive rail (V+)
Negative rail (V–)
IOUT = 1 mA
V
IOUT = 5 mA(1)
VO
Voltage output swing from rail
IOUT = 50 µA
IOUT = 1 mA
mV
V
VS = 5 V, RL ≤ 10 kΩ connected to (V–) TA = –40°C to +125°C
20
mV
–20
–10
10
5
–30
VS = 15 V; VO = V–;
VID = 1 V
Source(1)
TA = –40°C to +125°C
mA
IO
Output current
20
VS = 15 V; VO = V+;
VID = –1 V
Sink(1)
TA = –40°C to +125°C
VID = –1 V; VO = (V–) + 200 mV
60
100
±40
100
300
μA
mA
pF
Ω
ISC
Short-circuit current
VS = 20 V, (V+) = 10 V, (V–) = –10 V, VO = 0 V
±60
CLOAD
RO
Capacitive load drive
Open-loop output resistance
f = 1 MHz, IO = 0 A
POWER SUPPLY
VS = 5 V; IO = 0 A
VS = 36 V; IO = 0 A
300
460
800
IQ Quiescent current per amplifier
TA = –40°C to +125°C
µA
(1) Specified by characterization only.
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7.6 Electrical Characteristics: LM2904-Q1, LM2904AV-Q1, LM2904V-Q1
For VS = (V+) – (V–) = 5 V, TA = 25°C, RL = 10 kΩ connected to V– (unless otherwise noted)
PARAMETER
TEST CONDITIONS(1)
MIN
TYP
±3
MAX
UNIT
OFFSET VOLTAGE
±7
±10
±2
LM2904-Q1,
LM2904V-A1
TA = –40°C to 125°C
VS = 5 V to maximum;
VC M = 0 V; VO = 1.4 V
VOS
Input offset voltage
mV
±1
LM2904AV-Q1
TA = –40°C to 125°C
TA = –40°C to 125°C
±4
dVOS/dT
PSRR
Input offset voltage drift
±7
100
120
µV/°C
dB
Input offset voltage vs power supply
(ΔVIO/ΔVS)
VS = 5 V to 30 V
65
VO1/ VO2 Channel separation
f = 1 kHz to 20 kHz
dB
INPUT VOLTAGE RANGE
(V–)
(V–)
65
(V+) – 1.5
(V+) – 2
VCM
Common-mode voltage range
VS = 5 V to maximum
V
TA = –40°C to 125°C
CMRR
Common-mode rejection ratio
VS = 5 V to maximum; VCM = 0 V
80
–20
2
dB
INPUT BIAS CURRENT
–250
–500
50
IB
Input bias current
VO = (V–) + 1.4 V
nA
nA
TA = –40°C to 125°C
TA = –40°C to 125°C
LM2904-Q1
300
50
IOS
Input offset current
VO = (V–) + 1.4 V
2
LM2904AV-Q1,
LM2904V-Q1
TA = –40°C to 125°C
TA = –40°C to 125°C
150
dIOS/dT
NOISE
en
Input offset current drift
10
40
100
pA/°C
Input voltage noise density
f = 1 kHz
nV/√ Hz
OPEN-LOOP GAIN
25
15
VS = 15 V; VO = (V–) + 1 V to (V–) + 11 V; RL ≥ 2 kΩ,
connected to (V–)
AOL
Open-loop voltage gain
V/mV
TA = –40°C to 125°C
FREQUENCY RESPONSE
GBW
Gain bandwidth product
0.7
0.3
MHz
V/µs
SR
Slew rate
G = +1
OUTPUT
RL ≥ 10 kΩ
VS – 1.5
4
VS = maximum;
RL = 2 kΩ
LM2904-Q1
VS = maximum;
RL ≥ 10 kΩ
3
6
5
2
4
Positive rail
Negative rail
V
TA = –40°C to 125°C
TA = –40°C to 125°C
VO
Voltage output swing from rail
VS = maximum;
RL = 2 kΩ
LM2904AV-Q1,
LM2904V-Q1
VS = maximum;
RL ≥ 10 kΩ
VS = 5 V;
RL ≤ 10 kΩ
5
20
mV
mA
–20
–10
10
–30
VS = 15 V; VO = V–; VID = 1 V
Source
TA = –40°C to 125°C
TA = –40°C to 125°C
20
VS = 15 V; VO = V+;
VID = –1 V
IO
Output current
Sink
5
LM2904-Q1
30
40
VID = –1 V; VO = (V–) + 200 mV
VS = 10 V; VO = VS / 2
µA
LM2904AV-Q1, LM2904V-Q1
12
ISC
Short-circuit current
±40
±60
mA
POWER SUPPLY
VO = VS / 2; IO = 0 A
350
500
600
IQ Quiescent current per amplifier
TA = –40°C to 125°C
µA
VS = maximum; VO = maximum / 2; IO = 0 A
1000
(1) All characteristics are measured with zero common-mode input voltage, unless otherwise specified. Maximum VS for testing purposes
is 26 V for LM2904-Q1 and 32 V for LM2904AV-Q1/LM2904V-Q1.
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7.7 Typical Characteristics
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
20
18
16
14
12
10
8
30
27
24
21
18
15
12
9
6
4
6
2
3
0
0
-1800
-1200
-600
0
600
1200
1800
DC11
0
0.25 0.5 0.75
1
1.25 1.5 1.75
2
2.25 2.5 2.75
DC12
Offset Voltage (µV)
Offset Voltage Drift (µV/°C)
Figure 7-1. Offset Voltage Production Distribution
Figure 7-2. Offset Voltage Drift Distribution
750
500
300
450
150
100
-150
-450
-750
-100
-300
-500
-40
-20
0
20
40
Temperature (°C)
60
80
100
120
-18
-12
-6
Common-Mode Voltage (V)
0
6
12
17
DC10
DC10
Figure 7-3. Offset Voltage vs Temperature
Figure 7-4. Offset Voltage vs Common-Mode Voltage
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
70
G = 1
G = 10
G = 100
G = 1000
G = –1
60
50
40
30
20
10
0
-10
-20
-30
Gain (dB)
Phase (°)
-10
-20
-10
1k
10k
100k
1M
1k
10k
100k
1M
Frequency (Hz)
Frequency (Hz)
D012
D017
Figure 7-5. Open-Loop Gain and Phase vs Frequency
Figure 7-6. Closed-Loop Gain vs Frequency
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7.7 Typical Characteristics (continued)
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
-5
-7.5
-10
120
100
80
IB+
IB–
60
40
20
-12.5
-15
0
-20
-40
-20
-15
-10
-5
0
5
10
15
20
-20
-15
-10
-5
0
5
10
15
20
Common-Mode Voltage (V)
Common-Mode Voltage (V)
DC3I
DC3I
Figure 7-7. Input Bias Current vs Common-Mode Voltage
Figure 7-8. Input Offset Current vs Common-Mode Voltage
-6
0.06
-7
-8
0.045
0.03
-9
0.015
0
IB+
IB–
-10
-11
-12
-0.015
-0.03
-40
-10
20
50
80
110 130
-40
-10
20
50
80
110
130
Temperature (°C)
Temperature (°C)
DCIO
DCIB
Figure 7-9. Input Bias Current vs Temperature
Figure 7-10. Input Offset Current vs Temperature
(V–) + 18 V
V+
–40ꢀC
25ꢀC
125ꢀC
(V–) + 15 V
(V–) + 12 V
(V–) + 9 V
(V–) + 6 V
(V–) + 3 V
V–
(V+) – 3 V
(V+) – 6 V
(V+) – 9 V
(V+) – 12 V
–40ꢀC
25ꢀC
125ꢀC
0
5
10
15
20
25
30
35
40
0
10
20
30
40
50
Output Current (mA)
Output Current (mA)
DC1-
DC13
Figure 7-12. Output Voltage Swing vs Output Current (Sinking)
Figure 7-11. Output Voltage Swing vs Output Current (Sourcing)
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7.7 Typical Characteristics (continued)
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
100
90
80
70
60
50
40
30
20
10
0
120
115
110
105
100
95
PSRR+
PSRR-
CMRR
90
VS = 36V
VS = 5V
85
-40
-10
20
50
80
110
130
1k
10k 100k
Frequency (Hz)
1M
Temperature (°C)
DC2_
D001
Figure 7-13. CMRR and PSRR vs Frequency
Figure 7-14. Common-Mode Rejection Ratio vs
Temperature (dB)
-118
-119
-120
-121
-122
-123
1.6
1.2
0.8
0.4
0
-0.4
-0.8
-1.2
-1.6
-2
-40
-20
0
20
40
60
80
100 120 140
0
1
2
3
4
5
6
7
8
9
10
Temperature (°C)
Time (s)
DC8_
D011
VS = 5 V to 36 V
Figure 7-16. 0.1-Hz to 10-Hz Noise
Figure 7-15. Power Supply Rejection Ratio vs Temperature (dB)
-32
-40
100
90
80
70
60
50
40
30
20
10
0
10 kꢀ
2 kꢀ
-48
-56
-64
-72
-80
-88
-96
-104
-112
100
1k
10k
Frequency (Hz)
10
100
1k
Frequency (Hz)
10k
100k
D013
D010
G = 1, f = 1 kHz, BW = 80 kHz,
VOUT = 10 VPP, RL connected to V–
Figure 7-17. Input Voltage Noise Spectral Density vs Frequency
Figure 7-18. THD+N Ratio vs Frequency, G = 1
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7.7 Typical Characteristics (continued)
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
-32
-40
-48
-56
-64
-72
-80
-88
-96
-104
-30
-40
10 kꢀ
2 kꢀ
-50
-60
-70
-80
-90
-100
-110
-120
10 kꢀ
2 kꢀ
100
1k
10k
0.001
0.01
0.1
1
10 20
Frequency (Hz)
Amplitude (VPP)
D014
D015
G = –1, f = 1 kHz, BW = 80 kHz,
VOUT = 10 VPP, RL connected to V–
See Figure 8-3
G = 1, f = 1 kHz, BW = 80 kHz,
RL connected to V–
Figure 7-19. THD+N Ratio vs Frequency, G = –1
Figure 7-20. THD+N vs Output Amplitude, G = 1
-20
460
-35
-50
430
400
370
340
310
280
-65
-80
-95
10 kꢀ
2 kꢀ
-110
0.001
0.01
0.1
1
10 20
3
9
15
21
27
33 36
Amplitude (VPP
)
Supply Voltage (V)
D016
DC_S
G = –1, f = 1 kHz, BW = 80 kHz,
RL connected to V–
See Figure 8-3
Figure 7-21. THD+N vs Output Amplitude, G = –1
Figure 7-22. Quiescent Current vs Supply Voltage
600
500
VS = 36V
VS = 5V
540
400
300
200
100
480
420
360
300
240
-40
-20
0
20
40
60
80
100
120
1k
10k
100k
1M
Temperature (°C)
Frequency (Hz)
DC4_
D006
Figure 7-24. Open-Loop Output Impedance vs Frequency
Figure 7-23. Quiescent Current vs Temperature
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7.7 Typical Characteristics (continued)
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
44
40
36
32
28
24
20
16
12
8
18
16
14
12
10
8
Overshoot (+)
Overshoot (-)
Overshoot (+)
Overshoot (–)
6
4
2
0
0
40
80
120 160 200 240 280 320 360
Capacitance load (pF)
40
80
120
160
200
240
280
320
360
Capacitance load (pF)
D019
D020
G = 1, 100-mV output step, RL = open
G = –1, 100-mV output step, RL = open
Figure 7-25. Small-Signal Overshoot vs Capacitive Load
Figure 7-26. Small-Signal Overshoot vs Capacitive Load
60
57
54
51
48
45
42
39
36
33
30
20
Input
Output
10
0
-10
-20
0
200
400
Time (ꢀs)
600
800
1000
0
40
80
120 160 200 240 280 320 360
Capacitance Load (pF)
D021
D018
G = –10
Figure 7-28. Overload Recovery
Figure 7-27. Phase Margin vs Capacitive Load
10
7.5
5
10
7.5
5
2.5
0
2.5
0
-2.5
-5
-2.5
-5
-7.5
-10
-7.5
-10
Input
Output
Input
Output
0
20
40
60
80
100
0
20
40
60
80
100
Time (ꢀs)
Time (ꢀs)
D022
D023
G = 1, RL = open
G = –1, RL = open, RFB = 10K
See Figure 8-3
Figure 7-29. Small-Signal Step Response, G = 1
Figure 7-30. Small-Signal Step Response, G = –1
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7.7 Typical Characteristics (continued)
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
20
16
12
8
40
32
24
16
8
4
0
0
-4
-8
-8
-16
-24
-32
-40
-12
-16
-20
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Time (ꢀs)
Time (ꢀs)
D003
D004
G = 1, RL = open
G = 1, RL = open
Figure 7-31. Large-Signal Step Response (Rising)
Figure 7-32. Large-Signal Step Response (Falling)
2.5
0.675
Positive
Negative
Output
Input
2
1.5
1
0.625
0.575
0.525
0.475
0.425
0.5
0
-0.5
-1
-1.5
-2
-2.5
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temp(ꢀC)
0
20
40
60
80
100
D009
Time (µs)
AC_S
G = 1, RL = open
Figure 7-33. Large-Signal Step Response
Figure 7-34. Slew Rate vs Temperature
15
14
13
12
11
10
9
60
40
20
0
Sinking
Sourcing
8
7
6
-20
-40
-60
5
4
3
2
1
0
1k
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
10k
100k
Frequency (Hz)
1M
DC7_
D005
VS = 15 V
Figure 7-36. Maximum Output Voltage vs Frequency
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Figure 7-35. Short-Circuit Current vs Temperature
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7.7 Typical Characteristics (continued)
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
-75
90
84
78
72
66
60
54
48
42
36
30
24
-85
-95
-105
-115
-125
-135
1k
10k
100k
Frequency (Hz)
1M
1M
10M
100M
Frequency (Hz)
1G
D008
D007
Figure 7-37. Channel Separation vs Frequency
Figure 7-38. EMIRR (Electromagnetic Interference Rejection
Ratio) vs Frequency
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8 Parameter Measurement Information
900 Ω
V
CC+
V
CC+
−
100 Ω
RS
V
O
−
+
V = 0 V
I
+
V
I
V
O
C
L
V
CC−
R
L
V
CC−
Figure 8-2. Noise-Test Circuit
Figure 8-1. Unity-Gain Amplifier
10 k
+18V
–
VIN
+
-18V
GND
GND
Figure 8-3. Test Circuit, G = –1, for THD+N and Small-Signal Step Response
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9 Detailed Description
9.1 Overview
The LM2904-Q1 and LM2904B-Q1 devices consist of two independent, high-gain frequency-compensated
operational amplifiers designed to operate from a single supply over a wide range of voltages. Operation from
split supplies also is possible if the difference between the two supplies is within the supply voltage range
specified in Section 7.3, and VS is at least 1.5 V more positive than the input common-mode voltage. The low
supply-current drain is independent of the magnitude of the supply voltage.
Applications include transducer amplifiers, DC amplification blocks, and all the conventional operational amplifier
circuits that now can be implemented more easily in single-supply-voltage systems. For example, these devices
can be operated directly from the standard 5-V supply used in digital systems and easily can provide the
required interface electronics without additional ±5-V supplies.
9.2 Functional Block Diagram
VCC+
~6 µA
Current
Regulator
~6 µA
Current
Regulator
~100 µA
Current
Regulator
IN-
OUT
IN+
~120 µA
Current
Regulator
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9.3 Feature Description
9.3.1 Unity-Gain Bandwidth
The unity-gain bandwidth is the frequency up to which an amplifier with a unity gain may be operated without
greatly distorting the signal. These devices have a 1.2-MHz unity-gain bandwidth (LM2904B-Q1).
9.3.2 Slew Rate
The slew rate is the rate at which an operational amplifier can change its output when there is a change on the
input. These devices have a 0.5-V/µs slew rate (LM2904B-Q1).
9.3.3 Input Common Mode Range
The valid common mode range is from device ground to VS – 1.5 V (VS – 2 V across temperature). Inputs may
exceed VS up to the maximum VS without device damage. At least one input must be in the valid input common-
mode range for the output to be the correct phase. If both inputs exceed the valid range, then the output phase
is undefined. If either input more than 0.3 V below V– then input current should be limited to 1 mA and the output
phase is undefined.
9.4 Device Functional Modes
The LM2904-Q1 and LM2904B-Q1 devices are powered on when the supply is connected. This device can be
operated as a single-supply operational amplifier or dual-supply amplifier, depending on the application.
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10 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
10.1 Application Information
The LM2904-Q1 and LM2904B-Q1 operational amplifiers are useful in a wide range of signal conditioning
applications. Inputs can be powered before VS for flexibility in multiple supply circuits. For full application design
guidelines related to this family of devices, please refer to the application report Application design guidelines for
LM324/LM358 devices.
10.2 Typical Application
A typical application for an operational amplifier is an inverting amplifier. This amplifier takes a positive voltage
on the input, and makes it a negative voltage of the same magnitude. In the same manner, it also makes
negative voltages positive.
RF
Vsup+
RI
VOUT
+
VIN
Vsup-
Figure 10-1. Application Schematic
10.2.1 Design Requirements
The supply voltage must be chosen such that it is larger than the input voltage range and output range. For
instance, this application scales a signal of ±0.5 V to ±1.8 V. Setting the supply at ±12 V is sufficient to
accommodate this application.
10.2.2 Detailed Design Procedure
Determine the gain required by the inverting amplifier using Equation 1 and Equation 2:
VOUT
A V
=
VIN
(1)
(2)
1.8
A V
=
= - 3.6
-0.5
Once the desired gain is determined, choose a value for RI or RF. Choosing a value in the kilohm range is
desirable because the amplifier circuit uses currents in the milliampere range. This ensures the part does not
draw too much current. This example uses 10 kΩ for RI which means 36 kΩ is used for RF. This was determined
by Equation 3.
RF
A V = -
RI
(3)
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10.2.3 Application Curve
2
1.5
1
VIN
VOUT
0.5
0
-0.5
-1
-1.5
-2
0
0.5
1
Time (ms)
1.5
2
Figure 10-2. Input and Output Voltages of the Inverting Amplifier
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11 Power Supply Recommendations
CAUTION
Supply voltages larger than specified in the recommended operating region can permanently
damage the device (see Section 7.1).
Place 0.1-µF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high-
impedance power supplies. For more detailed information on bypass capacitor placement, see Section 12.
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12 Layout
12.1 Layout Guidelines
For best operational performance of the device, use good PCB layout practices, including:
•
Noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the
operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low-impedance
power sources local to the analog circuitry.
– Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as
close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single-
supply applications.
•
•
Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective
methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.
A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital
and analog grounds, paying attention to the flow of the ground current.
To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If it
is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as opposed
to in parallel with the noisy trace.
•
•
•
Place the external components as close to the device as possible. Keeping RF and RG close to the inverting
input minimizes parasitic capacitance, as shown in Section 12.2.
Keep the length of input traces as short as possible. Always remember that the input traces are the most
sensitive part of the circuit.
Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce
leakage currents from nearby traces that are at different potentials.
12.2 Layout Examples
Place components close to
device and to each other to
reduce parasitic errors
Run the input traces as far
away from the supply lines
as possible
VS+
RF
OUT1
V+
RG
GND
OUT2
IN1Þ
GND
VIN
IN1+
IN2Þ
RIN
IN2+
VÞ
Use low-ESR, ceramic
bypass capacitor
Only needed for
dual-supply
operation
VSÞ
(or GND for single supply)
GND
Ground (GND) plane on another layer
Figure 12-1. Operational Amplifier Board Layout for Noninverting Configuration
RIN
VIN
+
VOUT
RG
RF
Figure 12-2. Operational Amplifier Schematic for Noninverting Configuration
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13 Device and Documentation Support
13.1 Documentation Support
13.1.1 Related Documentation
For related documentation see the following:
Texas Instruments, Application Design Guidelines for LM324/LM358 Devices application report
13.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to order now.
Table 13-1. Related Links
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
PARTS
PRODUCT FOLDER
ORDER NOW
LM2904-Q1
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
LM2904B-Q1
13.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
13.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
13.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
13.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
13.7 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
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14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most-
current data available for the designated devices. This data is subject to change without notice and without
revision of this document. For browser based versions of this data sheet, see the left-hand navigation pane.
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PACKAGE OPTION ADDENDUM
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5-Nov-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM2904AVQDRG4Q1
LM2904AVQDRQ1
LM2904AVQPWRG4Q1
LM2904AVQPWRQ1
LM2904BQDGKRQ1
LM2904BQDRQ1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
2500 RoHS & Green
2500 RoHS & Green
2000 RoHS & Green
2000 RoHS & Green
2500 RoHS & Green
2500 RoHS & Green
2000 RoHS & Green
2500 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
2500 RoHS & Green
2500 RoHS & Green
2000 RoHS & Green
2000 RoHS & Green
2500 RoHS & Green
2500 RoHS & Green
2000 RoHS & Green
2000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
2904AVQ
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
2904AVQ
2904AVQ
2904AVQ
27ZB
TSSOP
TSSOP
VSSOP
SOIC
PW
PW
DGK
D
2904BQ
2904BQ
4BTQ
LM2904BQPWRQ1
LM2904BTQDGKRQ1
LM2904BTQDRQ1
LM2904BTQPWRQ1
LM2904QDRG4Q1
LM2904QDRQ1
TSSOP
VSSOP
SOIC
PW
DGK
D
2904TQ
2904BT
2904Q1
2904Q1
2904Q1
2904Q1
2904VQ
2904VQ1
2904VQ
2904VQ
TSSOP
SOIC
PW
D
SOIC
D
LM2904QPWRG4Q1
LM2904QPWRQ1
TSSOP
TSSOP
SOIC
PW
PW
D
LM2904VQDRG4Q1
LM2904VQDRQ1
SOIC
D
LM2904VQPWRG4Q1
LM2904VQPWRQ1
TSSOP
TSSOP
PW
PW
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
5-Nov-2021
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM2904-Q1, LM2904B-Q1 :
Catalog : LM2904, LM2904B
•
Enhanced Product : LM2904-EP
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
5-Nov-2021
Enhanced Product - Supports Defense, Aerospace and Medical Applications
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Nov-2021
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM2904AVQDRG4Q1
LM2904AVQDRQ1
SOIC
SOIC
D
D
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
2500
2500
2000
2000
2500
2500
2000
2500
3000
3000
2500
2500
2000
2000
2500
2500
2000
2000
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
12.5
12.5
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.5
12.5
12.4
12.4
12.5
12.5
12.4
12.4
6.4
6.4
7.0
7.0
5.3
6.4
7.0
5.3
6.4
7.0
6.4
6.4
7.0
7.0
6.4
6.4
7.0
7.0
5.2
5.2
3.6
3.6
3.4
5.2
3.6
3.4
5.2
3.6
5.2
5.2
3.6
3.6
5.2
5.2
3.6
3.6
2.1
2.1
1.6
1.6
1.4
2.1
1.6
1.4
2.1
1.6
2.1
2.1
1.6
1.6
2.1
2.1
1.6
1.6
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
LM2904AVQPWRG4Q1 TSSOP
PW
PW
DGK
D
LM2904AVQPWRQ1
LM2904BQDGKRQ1
LM2904BQDRQ1
TSSOP
VSSOP
SOIC
LM2904BQPWRQ1
LM2904BTQDGKRQ1
LM2904BTQDRQ1
LM2904BTQPWRQ1
LM2904QDRG4Q1
LM2904QDRQ1
TSSOP
VSSOP
SOIC
PW
DGK
D
TSSOP
SOIC
PW
D
SOIC
D
LM2904QPWRG4Q1
LM2904QPWRQ1
LM2904VQDRG4Q1
LM2904VQDRQ1
TSSOP
TSSOP
SOIC
PW
PW
D
SOIC
D
LM2904VQPWRG4Q1
LM2904VQPWRQ1
TSSOP
TSSOP
PW
PW
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Nov-2021
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM2904AVQDRG4Q1
LM2904AVQDRQ1
LM2904AVQPWRG4Q1
LM2904AVQPWRQ1
LM2904BQDGKRQ1
LM2904BQDRQ1
SOIC
SOIC
D
D
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
2500
2500
2000
2000
2500
2500
2000
2500
3000
3000
2500
2500
2000
2000
2500
2500
2000
2000
340.5
340.5
367.0
853.0
366.0
340.5
853.0
366.0
340.5
853.0
340.5
340.5
853.0
853.0
340.5
340.5
367.0
853.0
336.1
336.1
367.0
449.0
364.0
336.1
449.0
364.0
338.1
449.0
336.1
336.1
449.0
449.0
336.1
336.1
367.0
449.0
25.0
25.0
35.0
35.0
50.0
25.0
35.0
50.0
20.6
35.0
25.0
25.0
35.0
35.0
25.0
25.0
35.0
35.0
TSSOP
TSSOP
VSSOP
SOIC
PW
PW
DGK
D
LM2904BQPWRQ1
LM2904BTQDGKRQ1
LM2904BTQDRQ1
LM2904BTQPWRQ1
LM2904QDRG4Q1
LM2904QDRQ1
TSSOP
VSSOP
SOIC
PW
DGK
D
TSSOP
SOIC
PW
D
SOIC
D
LM2904QPWRG4Q1
LM2904QPWRQ1
TSSOP
TSSOP
SOIC
PW
PW
D
LM2904VQDRG4Q1
LM2904VQDRQ1
SOIC
D
LM2904VQPWRG4Q1
LM2904VQPWRQ1
TSSOP
TSSOP
PW
PW
Pack Materials-Page 2
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.189-.197
[4.81-5.00]
NOTE 3
.150
[3.81]
4X (0 -15 )
4
5
8X .012-.020
[0.31-0.51]
B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.010 [0.25]
C A B
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 - 8
.016-.050
[0.41-1.27]
DETAIL A
TYPICAL
(.041)
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED
METAL
EXPOSED
METAL
.0028 MAX
[0.07]
.0028 MIN
[0.07]
ALL AROUND
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
PW0008A
TSSOP - 1.2 mm max height
S
C
A
L
E
2
.
8
0
0
SMALL OUTLINE PACKAGE
C
6.6
6.2
SEATING PLANE
TYP
PIN 1 ID
AREA
A
0.1 C
6X 0.65
8
5
1
3.1
2.9
NOTE 3
2X
1.95
4
0.30
0.19
8X
4.5
4.3
1.2 MAX
B
0.1
C A
B
NOTE 4
(0.15) TYP
SEE DETAIL A
0.25
GAGE PLANE
0.15
0.05
0.75
0.50
0 - 8
DETAIL A
TYPICAL
4221848/A 02/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
SYMM
8X (0.45)
(R0.05)
1
4
TYP
8
SYMM
6X (0.65)
5
(5.8)
LAND PATTERN EXAMPLE
SCALE:10X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4221848/A 02/2015
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
SYMM
(R0.05) TYP
8X (0.45)
1
4
8
SYMM
6X (0.65)
5
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
4221848/A 02/2015
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2021, Texas Instruments Incorporated
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