LM2940QML-SP [TI]
耐辐射 QMLV、6V 至 26V、1A、5V 输出线性稳压器;
| 型号： | LM2940QML-SP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 耐辐射 QMLV、6V 至 26V、1A、5V 输出线性稳压器 电源电路 线性稳压器IC |
| 文件： | 总16页 (文件大小：362K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM2940QML
LM2940QML 1A Low Dropout Regulator
Literature Number: SNVS389A
October 12, 2011
LM2940QML
1A Low Dropout Regulator
General Description
tomatically shut down to protect both the internal circuits and
the load. The LM2940 cannot be harmed by temporary mirror-
image insertion. Familiar regulator features such as short
circuit and thermal overload protection are also provided.
The LM2940 positive voltage regulator features the ability to
source 1A of output current with a dropout voltage of typically
0.5V and a maximum of 1V over the entire temperature range.
Furthermore, a quiescent current reduction circuit has been
included which reduces the ground current when the differ-
ential between the input voltage and the output voltage ex-
ceeds approximately 3V. The quiescent current with 1A of
output current and an input-output differential of 5V is there-
fore only 30 mA. Higher quiescent currents only exist when
the regulator is in the dropout mode (VIN − VOUT ≤ 3V).
Designed also for vehicular applications, the LM2940 and all
regulated circuitry are protected from reverse battery instal-
lations or 2-battery jumps. During line transients, such as load
dump when the input voltage can momentarily exceed the
specified maximum operating voltage, the regulator will au-
Features
Available with radiation guarantee
■
ELDRS Free
100 krad(Si)
—
Dropout voltage typically 0.5V @IO = 1A
■
■
■
■
■
■
Output current in excess of 1A
Output voltage trimmed before assembly
Reverse battery protection
Internal short circuit current limit
Mirror image insertion protection
Ordering Information
NS Part Number
SMD Part Number
NS Package Number
Package Description
LM2940WG-5.0/883
5962-8958701XA
WG16A
16LD Ceramic SOIC
16LD Ceramic SOIC
16LD Ceramic SOIC
16LD Ceramic SOIC
LM2940WG5.0RLQV
ELDRS FREE (Note 7)
5962R8958702VXA
100 krad(Si)
WG16A
WG16A
WG16A
LM2940GW-5.0/883
5962-8958703XA
LM2940GW5.0RLQV
ELDRS FREE (Note 7)
5962R8958704VXA
100 krad(Si)
LM2940–5.0 MDE
ELDRS FREE (Note 7)
5962R8958702V9A
100 krad(Si)
(Note 1)
BARE DIE
Note 1: FOR ADDITIONAL DIE INFORMATION, PLEASE VISIT THE HI REL WEB SITE AT: www.national.com/analog/space/level_die
© 2011 National Semiconductor Corporation
201584
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Connection Diagrams
16-Lead Ceramic Surface-Mount Package (WG)
20158444
Top View
See NS Package Number WG16A
Equivalent Schematic Diagram
20158401
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2
Absolute Maximum Ratings (Note 2)
60V
Input Voltage (Survival Voltage ≤ 100mS)
Internal Power Dissipation with no heat sink (TA = +25°C)(Note 3)
Maximum Junction Temperature
1W
150°C
Storage Temperature Range
−65°C ≤ TA ≤ +150°C
300°C
Lead Temperature (Soldering 10 seconds)
Thermal Resistance
ꢀθJA
16LD Ceramic SOIC (Still Air) 'WG'
16LD Ceramic SOIC (Still Air) 'GW'
16LD Ceramic SOIC (500LF/Min Air flow) 'WG'
16LD Ceramic SOIC (500LF/Min Air flow) 'GW'
ꢀθJC
122°C/W
136°C/W
77°C/W
87°C/W
16LD Ceramic SOIC 'WG'(Note 4)
16LD Ceramic SOIC 'GW'
Package Weight 'WG'
Package Weight 'GW'
ESD Susceptibility (Note 5)
5°C/W
13°C/W
360 mg
410 mg
4KV
Recommended Operating Conditions (Note 2)
Input Voltage
26V
Temperature Range
−55°C ≤ TA ≤ 125°C
Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup
Description
Static tests at
Temp °C
1
2
+25
+125
-55
Static tests at
3
Static tests at
4
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
Settling time at
Settling time at
Settling time at
+25
+125
-55
5
6
7
+25
+125
-55
8A
8B
9
+25
+125
-55
10
11
12
13
14
+25
+125
-55
3
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LM2940-5.0 Electrical Characteristics SMD: 5962R8958701
DC Parameters
The following conditions apply, unless otherwise specified.
DC:
VI = 10V, IO = 1A, CO = 22µF
Sub-
groups
Symbol
Parameter
Conditions
Notes
Min Max
Unit
VO
Output Voltage
VIN = 10V, IOUT = 5mA
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
-15
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
1
2, 3
1
VIN = 6V, IOUT = 5mA
VIN = 7V, IOUT = 5mA
VIN = 26V, IOUT = 5mA
VIN = 10V, IOUT = 1A
VIN = 6V, IOUT = 1A
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
VIN = 6V, IOUT = 50mA
VIN = 10V, IOUT = 50mA
2, 3
1
2, 3
1, 2, 3
Reverse Polarity Input Voltage
DC
(Note 6)
RO = 100Ω
IQ
Quiescent Current
VIN = 10V, IOUT = 5mA
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
-40
-50
-50
15
20
15
20
15
20
50
100
40
50
50
mA
mA
mA
mA
mA
mA
mA
mA
mV
mV
mV
mV
V
1
2, 3
1
VIN = 7V, IOUT = 5mA
VIN = 26V, IOUT = 5mA
VIN = 10V, IOUT = 1A
2, 3
1
2, 3
1
2, 3
1
VRLine
VRLoad
VDO
Line Regulation
Load Regulation
Dropout Voltage
7V ≤ VIN ≤ 26V, IOUT = 5mA
2, 3
1
VIN = 10V, 50mA ≤ IOUT ≤ 1A
-100 100
2, 3
1
IOUT = 1A
0.0
0.0
0.0
0.0
1.5
1.3
0.7
1.0
V
2, 3
1
IOUT = 100mA
VIN = 10V
200
300
mV
mV
A
2, 3
1
ISC
Short Circuit Current
A
2, 3
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4
AC Parameters SMD: 5962R8958701
The following conditions apply, unless otherwise specified.
AC:
VI = 10V, IO = 1A, CO = 22µF
Sub-
groups
Symbol
Parameter
Conditions
Notes
Min Max
Unit
Max Line Transient
(Note 6)
(Note 6)
40
V
V
1, 2, 3
1, 2, 3
VO ≤ 6V, RO = 100Ω, t = 20mS
t = 20mS, RO = 100Ω
Reverse Polarity Input Voltage
Transient
-45
RR
Ripple Rejection
VIN = 10V, 1VRMS, ƒ = 1KHz,
IOUT = 5mA
(Note 6)
(Note 6)
(Note 6)
60
50
dB
dB
4
5, 6
NO
ZO
Output Noise Voltage
Output Impedance
VIN = 10V, IOUT = 5mA,
10Hz - 100KHz
0.0
700
1.0
µVRMS
1, 2, 3
VIN = 10V, ƒO = 120Hz
IOUT = 100mA DC and 20mA AC
(Note 6)
1, 2, 3
Ω
5
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LM2940-5.0 Electrical Characteristics SMD: 5962R8958702
DC Parameters
The following conditions apply, unless otherwise specified.
DC:
VI = 10V, IO = 1A, CO = 22µF
Sub-
groups
Symbol
Parameter
Conditions
Notes
Min Max
Unit
VO
Output Voltage
VIN = 10V, IOUT = 5mA
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
4.85 5.15
4.75 5.25
-15
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
1
2, 3
1
VIN = 6V, IOUT = 5mA
VIN = 7V, IOUT = 5mA
VIN = 26V, IOUT = 5mA
VIN = 10V, IOUT = 1A
VIN = 6V, IOUT = 1A
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
VIN = 6V, IOUT = 50mA
VIN = 10V, IOUT = 50mA
2, 3
1
2, 3
1, 2, 3
Reverse Polarity Input Voltage
DC
(Note 6)
RO = 100Ω
IQ
Quiescent Current
VIN = 10V, IOUT = 5mA
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
-40
-50
-50
15
20
15
20
15
20
50
100
40
50
50
mA
mA
mA
mA
mA
mA
mA
mA
mV
mV
mV
mV
V
1
2, 3
1
VIN = 7V, IOUT = 5mA
VIN = 26V, IOUT = 5mA
VIN = 10V, IOUT = 1A
2, 3
1
2, 3
1
2, 3
1
VRLine
VRLoad
VDO
Line Regulation
Load Regulation
Dropout Voltage
7V ≤ VIN ≤ 26V, IOUT = 5mA
2, 3
1
VIN = 10V, 50mA ≤ IOUT ≤ 1A
-100 100
2, 3
1
IOUT = 1A
0.0
0.0
0.0
0.0
1.5
1.3
0.7
1.0
V
2, 3
1
IOUT = 100mA
VIN = 10V
200
300
mV
mV
A
2, 3
1
ISC
Short Circuit Current
A
2, 3
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6
AC Parameters SMD: 5962R8958702
The following conditions apply, unless otherwise specified.
AC:
VI = 10V, IO = 1A, CO = 22µF
Sub-
groups
Symbol
Parameter
Conditions
Notes
Min Max
Unit
Max Line Transient
(Note 6)
(Note 6)
40
V
V
1, 2, 3
1, 2, 3
VO ≤ 6V, RO = 100Ω, t = 20mS
t = 20mS, RO = 100Ω
Reverse Polarity Input Voltage
Transient
-45
RR
Ripple Rejection
VIN = 10V, 1VRMS, ƒ = 1KHz,
IOUT = 5mA
(Note 6)
(Note 6)
(Note 6)
60
50
dB
dB
4
5, 6
NO
ZO
Output Noise Voltage
Output Impedance
VIN = 10V, IOUT = 5mA,
10Hz - 100KHz
0.0
700
1.0
µVRMS
1, 2, 3
VIN = 10V, ƒO = 120Hz
IOUT = 100mA DC and 20mA AC
(Note 6)
1, 2, 3
Ω
DC Drift Parameters
The following conditions apply, unless otherwise specified.
DC:
VI = 10V, IO = 1A, CO = 22µF, “Delta calculations performed on QMLV devices at group B, subgroup 5 only”
Sub-
groups
Symbol
Parameter
Output Voltage
Conditions
Notes
Min Max
Unit
VO
VIN = 10V, IOUT = 5mA
VIN = 6V, IOUT = 5mA
VIN = 7V, IOUT = 5mA
VIN = 26V, IOUT = 5mA
VIN = 10V, IOUT = 1A
VIN = 6V, IOUT = 1A
-30
-30
-30
-30
-30
-30
-30
-30
-20
30
30
30
30
30
30
30
30
20
mV
mV
mV
mV
mV
mV
mV
mV
mV
1
1
1
1
1
1
1
1
1
VIN = 6V, IOUT = 50mA
VIN = 10V, IOUT = 50mA
VRLOAD
Load Regulation
VIN = 10V, 50mA ≤ IOUT ≤ 1A
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package
junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/
θ
JA or the number given in the Absolute Maximum Ratings, whichever is lower. With heat sinking, the maximum power is 5 Watts, but then this will depend upon
the temperature of the heat sink, the efficiency of the heat sink, and the efficiency of the heat flow between the package body and the heat sink. We can not
predict these values.
Note 4: The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full advantage of this
improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either metal traces on, or thermal vias through,
the printed circuit board. Without this additional heat sinking, device power dissipation must be calculated using θJA, rather than θJC, thermal resistance. It must
not be assumed that the device leads will provide substantial heat transfer out of the package, since the thermal resistance of the lead frame material is very
poor, relative to the material of the package base. The stated θJC thermal resistance is for the package material only, and does not account for the additional
thermal resistance between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance and must
combine this with the stated value for the package, to calculate the total allowed power dissipation for the device.
Note 5: Human body model, 1.5 kΩ in series with 100 pF.
Note 6: Functional test only.
Note 7: These parts are tested on a wafer by wafer basis at high and low dose rates according to MIL-STD-883 Test Method 1019 Conditions A and D with no
enhanced low dose rate sensitivity (ELDRS). Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics.
7
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Typical Performance Characteristics
Dropout Voltage
Dropout Voltage vs. Temperature
20158413
20158414
Output Voltage vs. Temperature
Quiescent Current vs. Temperature
20158415
20158416
Quiescent Current
Quiescent Current
20158417
20158418
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8
Line Transient Response
Load Transient Response
Low Voltage Behavior
Low Voltage Behavior
20158420
20158419
Ripple Rejection
20158425
20158421
Low Voltage Behavior
20158429
20158430
9
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Output at Voltage Extremes
Output at Voltage Extremes
Peak Output Current
Output at Voltage Extremes
Output Capacitor ESR
Output Impedance
20158431
20158435
20158436
20158406
20158422
20158408
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10
Typical Application
20158403
*Required if regulator is located far from power supply filter.
**COUT must be at least 22 μF to maintain stability. May be increased without bound to maintain regulation during transients. Locate as close as possible to the
regulator. This capacitor must be rated over the same operating temperature range as the regulator and the ESR is critical; see curve.
ics. A cost-effective approach sometimes used is to parallel
an aluminum electrolytic with a solid Tantalum, with the total
Application Hints
capacitance split about 75/25% with the Aluminum being the
larger value.
EXTERNAL CAPACITORS
The output capacitor is critical to maintaining regulator stabil-
If two capacitors are paralleled, the effective ESR is the par-
ity, and must meet the required conditions for both ESR
allel of the two individual values. The “flatter” ESR of the
(Equivalent Series Resistance) and minimum amount of ca-
Tantalum will keep the effective ESR from rising as quickly at
pacitance.
low temperatures.
MINIMUM CAPACITANCE:
HEATSINKING
The minimum output capacitance required to maintain stabil-
ity is 22 μF (this value may be increased without limit). Larger
values of output capacitance will give improved transient re-
sponse.
A heatsink may be required depending on the maximum pow-
er dissipation and maximum ambient temperature of the ap-
plication. Under all possible operating conditions, the junction
temperature must be within the range specified under Abso-
lute Maximum Ratings.
ESR LIMITS:
The ESR of the output capacitor will cause loop instability if it
is too high or too low. The acceptable range of ESR plotted
versus load current is shown in the graph below. It is essen-
tial that the output capacitor meet these requirements, or
oscillations can result.
To determine if a heatsink is required, the power dissipated
by the regulator, PD, must be calculated.
The figure below shows the voltages and currents which are
present in the circuit, as well as the formula for calculating the
power dissipated in the regulator:
Output Capacitor ESR
20158437
IIN = IL ÷ IG
PD = (VIN − VOUT) IL + (VIN) IG
FIGURE 2. Power Dissipation Diagram
The next parameter which must be calculated is the maximum
allowable temperature rise, TR (max). This is calculated by
using the formula:
20158406
FIGURE 1. ESR Limits
TR (max) = TJ(max) − TA (max)
where: TJ (max) is the maximum allowable junction temper-
ature.
It is important to note that for most capacitors, ESR is speci-
fied only at room temperature. However, the designer must
ensure that the ESR will stay inside the limits shown over the
entire operating temperature range for the design.
TA (max) is the maximum ambient temperature which
will be encountered in the application.
For aluminum electrolytic capacitors, ESR will increase by
about 30X as the temperature is reduced from 25°C to −40°
C. This type of capacitor is not well-suited for low temperature
operation.
Using the calculated values for TR(max) and PD, the maxi-
mum allowable value for the junction-to-ambient thermal re-
sistance, θ(JA), can now be found:
θ(JA) = TR (max)/PD
Solid tantalum capacitors have a more stable ESR over tem-
perature, but are more expensive than aluminum electrolyt-
11
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Revision History
Released
Revision
Section
Changes
05/10/2010
A
New Release, Corporate format
1 MDS data sheets converted into one Corp. data
sheet format added reference to New ELDRS device.
Change AC subgroups from 4, 5, 6, 7, 8A, 8B to 1,
2, 3 for parameters Max Line Transient, Reverse
Polarity Input Voltage Transient, Output Noise
Voltage, Output Impedance. To bring it into
agreement with the SMD. MNLM2940-5.0-X Rev
1A1 will be archived.
12–Oct-2010
B
Ordering Information, Absolute Max Ratings Ordering Information — Added LM2940GW5.0/883,
LM2940GW5.0RLQV. Absolute Max Ratings —
Added Theta JA and Theta JC along with Package
Weight for 'GW' devices. LM2940QML Rev A will be
archived.
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12
Physical Dimensions inches (millimeters) unless otherwise noted
16 Lead Surface Mount Package (WG)
See NS Package Number WG16A
13
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