LM2991J-QML [TI]
3 V-24V ADJUSTABLE NEGATIVE LDO REGULATOR, 1V DROPOUT, CDIP16, CERAMIC, DIP-16;
| 型号： | LM2991J-QML |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 3 V-24V ADJUSTABLE NEGATIVE LDO REGULATOR, 1V DROPOUT, CDIP16, CERAMIC, DIP-16 CD 输出元件 调节器 |
| 文件： | 总14页 (文件大小：387K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 5, 2011
LM2991QML
Negative Low Dropout Adjustable Regulator
General Description
Features
The LM2991 is a low dropout adjustable negative regulator
with a output voltage range between −2V to −25V. The
LM2991 provides up to 1A of load current and features a
On /Off pin for remote shutdown capability.
Output voltage adjustable from −2V to −25V
■
■
■
■
■
■
■
■
Output current in excess of 1A
Dropout voltage typically 0.6V at 1A load
Low quiescent current
The LM2991 uses new circuit design techniques to provide a
low dropout voltage, low quiescent current and low tempera-
ture coefficient precision reference. The dropout voltage at 1A
load current is typically 0.6V and a guaranteed worst-case
maximum of 1V over the entire operating temperature range.
The quiescent current is typically 1 mA with a 1A load current
and an input-output voltage differential greater than 3V. A
unique circuit design of the internal bias supply limits the qui-
escent current to only 9 mA (typical) when the regulator is in
the dropout mode (VO − VI ≤ 3V).
Internal short circuit current limit
Internal thermal shutdown with hysteresis
TTL, CMOS compatible ON/OFF switch
Functional complement to the LM2941 series
Applications
Post switcher regulator
■
■
■
Local, on-card, regulation
The LM2991 is short-circuit proof, and thermal shutdown in-
cludes hysteresis to enhance the reliability of the device when
inadvertently overloaded for extended periods.
Battery operated equipment
Ordering Information
NS Part Number
SMD Part Number
NS Package Number
Package Description
16LD Ceramic SOIC
LM2991GW-QML
5962-9650502QXA
WG16A
Connection Diagrams
16-Lead Ceramic Surface-Mount Package
20158730
Top View
See NS Package Number WG16A
© 2011 National Semiconductor Corporation
201587
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Equivalent Schematic
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2
Absolute Maximum Ratings (Note 1)
Input Voltage
Power Dissipation (Note 2)
Junction Temperature (TJmax
−26V to +0.3V
Internally limited
150°C
)
Storage Temperature Range
−65°C ≤ TA ≤ +150°C
Thermal Resistance
ꢀθJA
Ceramic SOIC (Still Air @ 0.5°C/W) "GW”
Ceramic SOIC (500LF/Min Air flow @ 0.5°C/W) “GW”
ꢀθJC
130°C/W
80°C/W
Ceramic SOIC “GW”
Package Weight “GW”
Lead Temperature (Soldering, 10 sec.)
ESD Susceptibility (Note 4)
6°C/W
410mg
260°C
1,500V
Recommended Operating Conditions (Note 1)
Operating Temperature Range (TA)
Maximum Input Voltage (Operational)
−55°C ≤ TA ≤ +125°C
−26V
Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup
Description
Static tests at
Temp °C
+25
1
2
Static tests at
+125
-55
3
Static tests at
4
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
Settling time at
Settling time at
Settling time at
+25
5
+125
-55
6
7
+25
8A
8B
9
+125
-55
+25
10
11
12
13
14
+125
-55
+25
+125
-55
3
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LM2991 Electrical Characteristics
DC Parameters
The following conditions apply, unless otherwise specified.
DC:
VI = −10V, VO = −3V, IO = 1A, CO = 47µF, RL = 2.7KΩ
Parameter Conditions
Reference Voltage
Sub-
groups
Symbol
Notes
Min Max
Units
VRef
-1.23 -1.18
V
1
5mA ≤ IO ≤ 1A
4
6
-1.27 -1.15
V
2, 3
5mA ≤ IO ≤ 1A,
VO - 1V ≥ VI ≥ -26V
VO
Output Voltage Range
-3.0
-24
V
V
1
1
VI = -26V
-25
V
2, 3
1, 2, 3
VRLine
VRLoad
Line Regulation
Load Regulation
-26
+26
mV
IO = 5mA, VO - 1V ≥ VI ≥ -26V
50mA ≤ IO ≤ 1A
-12
-15
+12
+15
0.2
0.3
0.8
1.0
5.0
mV
mV
V
1
2, 3
1
VDO
Dropout Voltage
IO = 0.1A, ΔVO ≤ 100mV
IO = 1A, ΔVO ≤ 100mV
IO ≤ 1A
V
2, 3
1
V
V
2, 3
1, 2, 3
IQ
Quiescent Current
Dropout Quiescent Current
Output Noise
mA
50
mA
1, 2, 3
VI = VO, IO ≤ 1A
10Hz - 100KHz, IO = 5mA
VON
450
500
0.6
µV
µV
V
1
2, 3
1, 2, 3
1, 2, 3
1
ON/OFF Input Voltage
ON/OFF Input Current
VO : ON
VO : OFF
2.4
V
VON/OFF = 0.6V (VO : ON)
10
25
µA
µA
µA
µA
µA
µA
A
2, 3
1
VON/OFF = 2.4V (VO : OFF)
100
150
250
300
2.5
4.0
2, 3
1
IL
Output Leakage Current
Current Limit
VI = -26V, VON/OFF = 2.4V,
VO = 0V
2, 3
1
ILimit
VO = 0V
1.5
1.0
A
2, 3
AC Parameters
The following conditions apply, unless otherwise specified.
AC:
VI = −10V, VO = −3V, IO = 1A, CO = 47µF, RL = 2.7KΩ
Parameter Conditions
Ripple Rejection
Sub-
groups
Symbol
Notes
Min Max
Units
RR
VRipple = 1VRMS, FRipple = 1KHz,
IO = 5mA
50
dB
1
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4
DC Drift Parameters
The following conditions apply, unless otherwise specified.
DC:
VI = −10V, VO = −3V, IO = 1A, CO = 47µF, RL = 2.7KΩ
Deltas not required on B−Level product. Deltas required for S−Level product ONLY.
Sub-
groups
Symbol
VRef
Parameter
Reference Voltage
Conditions
5mA ≤ IO ≤ 1A
Notes
Min Max
Units
±20
mV
1
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package
junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/
θ
JA or the number given in the Absolute Maximum Ratings, whichever is lower.
Note 3: The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full advantage of this
improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either metal traces on, or thermal vias through,
the printed circuit board. Without this additional heat sinking, device power dissipation must be calculated using θJA, rather than θJC, thermal resistance. It must
not be assumed that the device leads will provide substantial heat transfer out the package, since the thermal resistance of the leadframe material is very poor,
relative to the material of the package base. The stated θJC thermal resistance is for the package material only, and does not account for the additional thermal
resistance between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance and must combine
this with the stated value for the package, to calculate the total allowed power dissipation for the device. The user must determine the value of the additional
thermal resistance and must combine this with the stated value for the package, to calculate the total allowed power dissipation for the device.
Note 4: Human body model, 1.5 kΩ in series with 100 pF.
5
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Typical Performance Characteristics
Dropout Voltage
Normalized Output Voltage
20158713
20158714
20158716
20158718
Output Voltage
Output Noise Voltage
20158715
Quiescent Current
Maximum Output Current
20158717
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6
Line Transient Response
Load Transient Response
20158719
20158720
Maximum Output Current
Ripple Rejection
20158722
20158721
Output Impedance
ON /OFF Control Voltage
20158723
20158724
7
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Adjust Pin Current
Low Voltage Behavior
20158726
20158725
These capacitors should be avoided if possible, and kept as
far away from the LDO output as is practical.
Application Hints
EXTERNAL CAPACITORS
Output Capacitor ESR Range
Like any low-dropout regulator, external capacitors are re-
qired to stabilize the control loop. These capacitors must be
correctly selected for proper performance.
INPUT CAPACITOR
An input capacitor is required if the regulator is located more
than 6" from the input power supply filter capacitor (or if no
other input capacitor is present).
A solid Tantalum or ceramic capacitor whose value is at least
1 µF is recommended, but an aluminum electrolytic (≥ 10 µF)
may be used. However, aluminum electrolytics should not be
used in applications where the ambient temperature can drop
below 0°C because their internal impedance increases sig-
nificantly at cold temperatures.
OUTPUT CAPACITOR
20158705
The output capacitor must meet the ESR limits shown in the
graph, which means it must have an ESR between about 25
mΩ and 10Ω.
A solid Tantalum (value ≥ 1 µF) is the best choice for the
output capacitor. An aluminum electrolytic (≥ 10 µF) may be
used if the ESR is in the stable range.
MINIMUM LOAD
A minimum load current of 500 μA is required for proper op-
eration. The external resistor divider can provide the minimum
load, with the resistor from the adjust pin to ground set to 2.4
kΩ.
It should be noted that the ESR of a typical aluminum elec-
trolytic will increase by as much as 50X as the temperature is
reduced from 25°C down to −40°C, while a Tantalum will ex-
hibit an ESR increase of about 2X over the same range. For
this and other reasons, aluminum electrolytics should not be
used in applications where low operating temperatures occur.
SETTING THE OUTPUT VOLTAGE
The output voltage of the LM2991 is set externally by a re-
sistor divider using the following equation:
VOUT = VREF x (1 + R2/R1) − (IADJ x R2)
where VREF = −1.21V. The output voltage can be programmed
within the range of −3V to −24V, typically an even greater
range of −2V to −25V. The adjust pin current is about 60 nA,
causing a slight error in the output voltage. However, using
resistors lower than 100 kΩ makes the adjust pin current neg-
ligible. For example, neglecting the adjust pin current, and
setting R2 to 100 kΩ and VOUT to −5V, results in an output
voltage error of only 0.16%.
The lower stable ESR limit of 25 mΩ means that ceramic ca-
pacitors can not be used directly on the output of an LDO. A
ceramic (≥ 2.2 µF) can be used on the output if some external
resistance is placed in series with it (1Ω recommended). Di-
electric types X7R or X5R must be used if the temperature
range of the application varies more than ± 25°C from ambient
to assure the amount of capacitance is sufficient.
CERAMIC BYPASS CAPACITORS
ON/OFF PIN
Many designers place distributed ceramic capacitors whose
value is in the range of 1000 pF to 0.1 µF at the power input
pins of the IC's across a circuit board. These can cause re-
duced phase margin or oscillations in LDO regulators.
The LM2991 regulator can be turned off by applying a TTL or
CMOS level high signal to the ON/OFF pin (see Adjustable
Current Sink Application).
The advent of multi-layer boards with dedicated power and
ground planes has removed the trace inductance that (previ-
ously) provided the necessary "decoupling" to shield the out-
put of the LDO from the effects of bypass capacitors.
FORCING THE OUTPUT POSITIVE
Due to an internal clamp circuit, the LM2991 can withstand
positive voltages on its output. If the voltage source pulling
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8
the output positive is DC, the current must be limited to 1.5A.
A current over 1.5A fed back into the LM2991 could damage
the device. The LM2991 output can also withstand fast posi-
tive voltage transients up to 26V, without any current limiting
of the source. However, if the transients have a duration of
over 1 mS, the output should be clamped with a Schottky
diode to ground.
Typical Applications
20158701
VO = VRef (1 + R2/R1)
*Required if the regulator is located further than 6 inches from the power supply filter capacitors. A 1 μF solid tantalum or a 10 μF aluminum electrolytic capacitor
is recommended.
**Required for stability. Must be at least a 10 μF aluminum electrolytic or a 1 μF solid tantalum to maintain stability. May be increased without bound to maintain
regulation during transients. Locate the capacitor as close as possible to the regulator. The equivalent series resistance (ESR) is critical, and should be less than
10Ω over the same operating temperature range as the regulator.
Fully Isolated Post-Switcher Regulator
20158706
9
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Adjustable Current Sink
20158710
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10
Revision History
Released
Revision
Section
Changes
03/10/06
A
New Release, Corporate format
1 MDS data sheet converted into one Corp. data
sheet format. MNLM2991-X Rev 1A1 will be
archived.
05–Oct-2011
B
Ordering Information, Absolute Maximum
Ratings
Added new 'GW' NSID and —02 SMD part number.
Added Theta JA & Theta JC as well as the weight for
the 'GW' device. LM2991QML Rev A will be archived.
11
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Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Ceramic Surface-Mount Package
NS Package Number WG16A
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Notes
13
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