LM3432MHX/NOPB [TI]
6-Channel Current Regulator for LED Backlight Application 28-HTSSOP -40 to 125;
| 型号： | LM3432MHX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 6-Channel Current Regulator for LED Backlight Application 28-HTSSOP -40 to 125 驱动 光电二极管 接口集成电路 |
| 文件： | 总27页 (文件大小：1274K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM3432, LM3432B
www.ti.com
SNVS498D –APRIL 2007–REVISED MAY 2013
6-Channel Current Regulator for LED Backlight Application
Check for Samples: LM3432, LM3432B
1
FEATURES
•
Low profile, Thermally Enhanced WQFN-24
(5x4x0.8mm) and eHTSSOP-28
(9.7x6.4x1.1mm) Packages (The LM3432B is
available in the WQFN-24 only)
2
•
Dynamic Headroom Control (DHC) Output to
Maximize Efficiency when used in Conjunction
with Texas Instruments Semiconductor's
LM3430 Boost Controller for LED Backlighting
APPLICATIONS
•
•
•
Current Sinking Adjustable up to 40mA in
Each String
•
•
LCD Display Backlight Applications
General Lighting Solutions
Fast Current Switching Slew Rate, tr = 60ns
Typical
DESCRIPTION
The LM3432/LM3432B are 6-channel high voltage
current regulators which provide a simple solution for
LED
incorporate six individual current regulator channels
to give accurate driving current for each LED string.
The string-to-string tolerance is kept within ±2.0%.
Additionally, the Dynamic Headroom Control output
can communicate with a LM3430 boost regulator to
adjust the LED supply voltage to the lowest level
needed to keep the string current in regulation,
yielding optimal overall system efficiency.
Wide Dimming Ratio, up to 4000:1 with fDIM
500Hz
=
•
•
•
High LED Driving Voltage up to 80V
backlight
applications.
These
devices
±2.0% Current Matching Between Strings
Accepts Both Digital and Analog Dimming
Control
•
LED Open/Short Fault Indication (For
LM3432B, no open fault indication)
•
•
Over-Temperature Indication
Internal Thermal Shutdown with Hysteresis
TYPICAL APPLICATION CIRCUIT
( 80V max. )
V
LED
+
Adjust to the lowest possible
voltage level to maximize
efficiency
VIN
C
VIN
Connect to GND
for digital input/
Connect with
capacitor for
VIN
analog input
MODE
R
DHC
To LM3430
VDHC pin
VDHC
CDHC
C
DHC
C
VDHC
LM3432/LM3432B
VCC
IREF
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
OTMb
C
VCC
R
IREF
PWM for digital input/
DC voltage for analog input
DIM
EN
Fault logics
to MCU
FAULTb
AGND PGND
ON
OFF
GND
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2013, Texas Instruments Incorporated
LM3432, LM3432B
SNVS498D –APRIL 2007–REVISED MAY 2013
www.ti.com
DESCRIPTION CONTINUED
The 6-channel current sink can be adjusted from 15mA to 40mA by an external resistor. Their output drivers can
withstand up to 80V. Digital PWM or analog voltage signal can be used to control the duty cycle of all the
channels. With a fast current switching slew rate, tr = 60ns typical, accurate current control and wide dimming
ratio during PWM dimming are ensured.
The LM3432/LM3432B contain LED open/short circuit and over-temperature fault signaling to the system micro-
controller (the LM3432B does not include open circuit fault signaling). These devices are available in a low
profile, thermally enhanced 24 lead WQFN package. The LM3432 is also available in the 28 lead eHTSSOP.
Connection Diagram
VIN
NC
PGND
PGND
NC
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
NC
3
1
19
18
17
16
15
14
13
IOUT2
NC
VCC
IREF
NC
IOUT1
NC
4
VCC
2
3
5
IREF
AGND
CDHC
VDHC
EN
IOUT2
NC
6
IOUT3
NC
AGND
CDHC
VDHC
EN
7
4
5
IOUT3
NC
8
IOUT4
NC
9
IOUT4
NC
10
11
12
13
14
6
7
EP
MODE
DIM
EP
MODE
IOUT5
IOUT5
NC
FAULTb
OTMb
IOUT6
Figure 1. Top View
24 Lead Plastic WQFN-24
Figure 2. Top View
28 Lead Plastic eHTSSOP-28
Pin Descriptions
Pin Number
Name
Description
WQFN-24
eHTSSOP-28
1
2
3
4
5
6
7
8
VCC
IREF
Internal linear regulator output, needs 680nF minimum for stability.
IOUT current setting pin. An external resistor is used to program the string current.
Analog ground
AGND
CDHC
An external capacitor to ground programs the Dynamic Headroom Control (DHC)
response time constant.
5
9
VDHC
DHC voltage output. Connecting this output through a gain setting resistor to the DHC
pin of Texas Instruments Semiconductor's LM3430 enables the DHC function.
6
7
10
11
EN
Device Enable, active HIGH.
MODE
Dimming mode select pin. Short to ground for Digital PWM dimming or connect to an
external capacitor to ground for analog dimming.
8
9
12
13
14
DIM
Digital PWM or Analog voltage input for IOUT duty cycle.
Open drain active LOW output for output fault.
FAULTb
OTMb
10
Open drain active LOW over temperature warning output.
12, 13, 15,
17, 19, 20
15, 17, 19,
21, 23, 25
IOUT1-6
Constant current sink outputs, adjustable 15mA to 40mA, voltage across this pin can
be up to 80V max.
22
24
27, 28
1
PGND
VIN
Power Ground.
Supply voltage input, from 6V to 40V.
No connection and should be left open.
11, 14, 16,
18, 21, 23
2, 3, 4, 16, 18,
20, 22, 24, 26
NC
EP
EP
EP
Thermal connection pad, connect directly to GND.
2
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SNVS498D –APRIL 2007–REVISED MAY 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1) (2)
ABSOLUTE MAXIMUM RATINGS
If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for
availability and specifications.
VALUE / UNIT
VIN Voltage
-0.3V to 42V
-0.3V to 7V
-0.3V to 82V
-0.3V to 7V
-0.3V to 7V
-0.3V to 7V
-0.3V to 7V
-0.3V to 7V
-0.3V to 7V
-0.3V to 7V
2.0kV
IREF Voltage
IOUT1 through IOUT6 Voltage
VCC Voltage
EN Voltage
FAULTb, OTMb Voltage
MODE Voltage
PWM Voltage
VDHC Voltage
CDHC Voltage
(3)
ESD Susceptibility
Lead Temperature
Human Body Model
Vapor Phase (60 sec.)
Infra-red (15 sec.)
215°C
220°C
Maximum Junction Temperature
150°C
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. The Recommended Operating Limits define the
conditions within which the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
(2) Rating limits apply to both the LM3432 and LM3432B.
(3) The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin.
(1)
RECOMMENDED OPERATING CONDITIONS
VALUE / UNIT
Supply Voltage, VIN
6 to 40V
0 to 80V
IOUT1 through IOUT6 Voltage
Operating Junction Temp.
Storage Temperature
-40°C to +125°C
-65°C to +150°C
33.2°C/W
(2)
Thermal Resistance, θJA
WQFN-24
eHTSSOP-28
29°C/W
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. The Recommended Operating Limits define the
conditions within which the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
(2) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ_MAX, the junction-to-ambient thermal
resistance, θJA and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated
using: PD_MAX = (TJ_MAX - TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature.
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SNVS498D –APRIL 2007–REVISED MAY 2013
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ELECTRICAL CHARACTERISTICS
Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C
to +125°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. VIN = 18V, RIREF = 54.7
kΩ, VEN = 5V, VMODE = 0V, VDIM = 5V and VOUT1-6 = 1.2V unless otherwise indicated (1). Parameter limits apply to both the
LM3432 and LM3432B unless otherwise indicated.
Symbol
Input Characteristics
ISHDN Shutdown Input Supply Current
IQ
Parameter
Conditions
Min
Typ
Max
Units
EN = 0V, DIM = 0V
VEN rising
40
2.25
1.75
0.4
0.5
5
90
2.65
2
µA
mA
V
Quiescent Current from VIN
Enable Threshold Voltage
Enable Threshold Hysteresis
Enable pin Pull-up Current
VEN
1.48
VEN_HYST
IEN
V
EN = 0V
EN = 2V
µA
VCC Regulator
VCCreg
VCC Regulated Output
4.7
4.7
5
5
5.25
5.25
V
V
VCCreg_1
VCC Regulated Output at Max. VIN
VCC Regulated Output at Min. VIN
VCC Short-Circuit Current
VIN = 40V
VCCreg_2
VIN = 6V, IVCC = 2mA
VIN = 6V, VCC = 0V
VCC rising
4.8
9
V
IVCC_SC
mA
V
VCCUVLO
VCC UVLO Upper Threshold
3.9
4.15
0.375
4.4
VCCUVLO_HYST VCC UVLO Hysteresis
V
Analog PWM control
IMODE
MODE pin Output Current
MODE pin Peak Voltage
MODE pin Valley Voltage
MODE = 2V
34
3.1
1.0
µA
V
VMODE_PK
VMODE_VA
Digital PWM control
VPWM_HIGH PWM Voltage HIGH
VPWM_LOW PWM Voltage LOW
Dynamic Headroom Control Output
VDHC_MAX VDHC pin Max. Output Voltage
IVDHC_MAX
VDHC_REG_20
VDHC_REG_40
CMODE = 5.6nF
CMODE = 5.6nF
V
MODE = GND
MODE = GND
1.7
V
V
1
IVDHC = 2mA
2
5
2.5
9
V
mA
V
VDHC pin Max. Output Current
VDHC Regulation at 20mA
VDHC Regulation at 40mA
VDHC = 1.2V
RIREF = 54.7k, CDHC = 100nF
RIREF = 27.5k, CDHC = 100nF
0.625
1.25
V
Switching Characteristics
tpd_H IOUT Rising Edge Phase Delay
Tr
MODE = GND, Pulsing PWM 10µs
500
25
ns
ns
IOUT Rise Time
MODE = GND, rising edge from 10%
to 90% of IOUT
Output Current
VIREF
IREF pin Voltage
6V ≤ VIN ≤ 40V
1.215 1.245
1.27
V
IOUT20
Constant Current Sink of 20mA
RIREF = 54.7k, VIOUT1-6 = 1.1V
18.85
20
21.05
mA
18.5
21.4
IOUT40
Constant Current Sink of 40mA
Output Current Matching of IOUT20
RIREF = 27.5k, VIOUT1-6 = 1.6V
37.9
37.3
40
41.55
42.15
mA
%
(2)
IOUT20_match
6V ≤ VIN ≤ 40V
2.25
(1) All limits are specified at room temperature (standard type face) and at temperature extremes (bold type face). All room temperature
limits are 100% tested. All limits at temperature extremes are ensured via correlation using standard Statistical Quality Control (SQC)
methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Typical values represent the most likely parametric
norm at TJ = 25°C and are provided for reference purposes only.
(2) IOUT_match is the greatest percentage delta between output string currents with respect to the median.
Max(IOUTX) - Min(IOUTX
)
1
2
and
x 100%
IOUT_match
=
Median
Max(IOUTX) + Min(IOUTX
)
Median =
2
4
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SNVS498D –APRIL 2007–REVISED MAY 2013
ELECTRICAL CHARACTERISTICS (continued)
Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C
to +125°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. VIN = 18V, RIREF = 54.7
kΩ, VEN = 5V, VMODE = 0V, VDIM = 5V and VOUT1-6 = 1.2V unless otherwise indicated (1). Parameter limits apply to both the
LM3432 and LM3432B unless otherwise indicated.
Symbol
IOUT40_match
IOUT_max
Parameter
Conditions
Min
Typ
Max
2
Units
%
(2)
Output Current Matching of IOUT40
6V ≤ VIN ≤ 40V
Maximum Output Current, IREF shorted to
VIREF = 0V, VIOUT = 4.5V
50
80
110
mA
GND.
(3)
VDROP_IOUT20 Dropout Voltage of IOUT20
VDROP_IOUT40 Dropout Voltage of IOUT40
RIREF = 54.7k
0.3
0.6
0.525
1.125
3
V
V
(3)
RIREF = 27.5k
IOUT_OFF
Output Current when EN is LOW
EN = 0, VOUT = 80V
0.025
µA
Fault Detection
VSHORTFAULT
VIOUT Short Fault Threshold
FAULTb goes LOW during VIOUT
rising,
Other VIOUT = 1.0V
7.3
7.9
8.8
V
s
tD_SHORTFAULT Short Fault Delay
VIOUT set to 10V, FAULTb goes LOW,
Other VIOUT = 1.0V
150
50
µs
s
tD_OPENFAULT
VFAULT_LOW
ILEAK_FAULT
Open Fault Delay (LM3432 only)
VIOUTX set open, FAULTb goes LOW
5mA into FAULTb
µs
V
FAULTb and OTMb LOW
0.7
1
FAULTb and OTMb Open Leakage
VFAULTb = VOTMb = 5V
0.005
µA
Thermal Protection
OTM
OTMHYST
TSD
Over Temperature Monitor Threshold
125
20
°C
°C
°C
°C
Over Temperature Monitor Hysteresis
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
165
20
TSDHYST
(3) Dropout voltage is defined as the IOUT pin to GND voltage at which the output current sink drops 10% from the nominal value.
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TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified, the following conditions apply: VIN = 18V, RIREF = 54.7 kΩ, VEN = 5V, VMODE = 0V, VDIM = 5V and
VOUT1-6 = 1.2V. Typical performance characteristics are valid for both the LM3432 and LM3432B unless otherwise indicated.
Quiescent Current vs Supply Voltage
Shutdown Current vs Supply Voltage
10
100
8
6
4
2
0
80
60
40
20
0
125°C
-40°C
+25°C
-40°C
125°C
+25°C
30
(V)
0
10
20
40
50
0
10
20
30
(V)
40
50
V
V
IN
IN
Figure 3.
Figure 4.
VCC Regulator Output vs Supply Voltage
Current Setting Reference Voltage vs Supply Voltage
5.1
1.27
I
= 2mA
VCC
1.26
5.05
5
+25°C
125°C
1.25
-40°C
+25°C
1.24
-40°C
4.95
4.9
125°C
1.23
1.22
0
10
20
30
(V)
40
50
0
10
20
30
(V)
40
50
V
IN
V
IN
Figure 5.
Figure 6.
Average String Current vs Current Setting Resistance
Output Current Matching vs Temperature
3.0
50
V
= 18V
IN
40
30
2.0
R
= 73.3 kW
IREF
-40°C
R
= 54.7 kW
1.0
0.0
+25°C
IREF
20
R
IREF
= 27.5 kW
125°C
10
-50
0
50
(°C)
100
150
20
30
40
50
60
70
80
T
J
R
IREF
(kW)
Figure 7.
Figure 8.
6
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise specified, the following conditions apply: VIN = 18V, RIREF = 54.7 kΩ, VEN = 5V, VMODE = 0V, VDIM = 5V and
VOUT1-6 = 1.2V. Typical performance characteristics are valid for both the LM3432 and LM3432B unless otherwise indicated.
PWM Digital Dimming Operation
PWM Dimming Frequency vs CMODE
(Channel 1 Waveform)
60
50
40
30
20
10
0
100
1000
10000
(pF)
100000
C
MODE
Figure 9.
Figure 10.
PWM Dimming Characteristic, Rising Edge
(Channel 1 Waveform)
PWM Dimming Characteristic, Falling Edge
(Channel 1 Waveform)
Figure 11.
Figure 12.
Analog Dimming Operation
Figure 13.
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SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
VIN
VIN
EN
vcc
5V LINEAR
REGULATOR
VCC
VIN
vcc
THERMAL
SHUTDOWN
BANDGAP
VDHC
vcc
AGND
IREF
IOUT1
PGND
IREF
ON
vcc
FAULT
IREF
vcc
vcc
IOUT2
IREF
ON
VDHC
MODE
DIM
FAULT
FAULT
6
CONTROL
vcc
ON
6
IOUT3
IREF
ON
CDHC
FAULT
FAULTb
vcc
IOUT4
IOUT5
IOUT6
IREF
ON
FAULT
vcc
IREF
ON
vcc
OTMb
FAULT
OVER-TEMP
vcc
IREF
ON
FAULT
8
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FUNCTIONAL DESCRIPTION
OVERVIEW
The LM3432/LM3432B are 6-channel high voltage current regulators for LED backlight applications which
incorporates individual channel current regulators to give accurate current sinking for each LED string. String to
string tolerance is kept within ±2.0% at 40 mA and ±2.25% at 20 mA. The 6-channels current sinks can be
adjusted from 15 mA to 40 mA by an external resistor. Channel outputs can withstand up to 80V. Channel 5 or 6
output can be disabled by shorting the selected output pin to ground prior to power-up. Both the digital PWM
dimming signal and analog voltage signal can be used to control the duty cycle of all the six channels. The
LM3432/LM3432B also provide fault indications to the system MCU for an LED open (included in the LM3432
only) or short circuit or an over-temperature condition.
INTERNAL 5V LINEAR REGULATOR
An internal 5V linear regulator with an Under-Voltage Lock-Out (UVLO) function is integrated within the
LM3432/LM3432B. This regulated 5V is used for internal circuitry and can support a small amount of external
loading, not to exceed 2 mA when VIN = 6V. The supply input pin (VIN) can be connected directly to an input
voltage up to 40V, with transient capability up to 42V. The VCC output regulates at 5V and is current limited to 9
mA. To ensure stable operation, the external capacitor CVCC must be at least 680 nF with 1 µF recommended. If
the voltage at the VCC pin drops below the UVLO threshold of 3.8V, the device will shut down the output
channels and other functional blocks. Normal operation will be resumed once the VCC voltage is allowed to rise
above the UVLO rising threshold of 4.15V.
BANDGAP VOLTAGE REFERENCE
A precision reference voltage is required for accurate control of the output currents. The LM3432/LM3432B
contain a bandgap voltage reference block that provides a high precision reference voltage for internal operation.
The bandgap reference voltage is typically trimmed to 1.245V.
OUTPUT CURRENT REGULATOR (IOUT1 to IOUT6)
The LM3432/LM3432B contains six individual integrated current regulators to give accurate current sinking for
each LED string. String to string tolerance is kept within ±2.0% at 40 mA and ±2.25% at 20 mA. The sink current
level is adjusted by an external resistor, RIREF in the range of 15 mA to 40 mA. The IOUT pins can withstand up
to 80V. The ability to withstand high voltage enables the user to add more LEDs in a single string. The
calculation of IOUT with respect to RIREF is shown below.
1.094
x 106
=
IOUT
where IOUT is in mA
RIREF
(1)
Channels 5 and 6 are designed to be user disabled without activating the fault detection circuitry. With this
feature, the user can readily configure the device to a 4, 5 or 6 channel driver. In order to disable a channel, the
IOUT5 and/or IOUT6 pin(s) must be tied to ground before powering up the device. During power-up, channels 5
and 6 will be checked and any grounded channel(s) will be automatically disabled. The disabled status will
remain until either power is recycled or the enable (EN) pin is toggled.
ANALOG DIMMING OF LED STRINGS
Dimming of LED brightness is achieved by Pulse Width Modulation (PWM) control of the string currents. The
LM3432/LM3432B accepts both analog voltage and PWM digital dimming input signals for this feature. With a
capacitor (CMODE) connected across the MODE pin and ground, the device will monitor the voltage level at the
DIM pin and generate the required PWM control signal internally. The internal implementation of the
LM3432/LM3432B’s dimming function is illustrated in Figure 14.
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DIM
PWM
+
V
DIM
Comp2
-
1V to 3V
VCC
+
-
PWM
Modulator
34 mA
MODE
+
3V
1V
Comp1
-
3V
Ramp
-
Generator
C
MODE
1V
-
Figure 14. Analog Dimming of LEDs
An internal current source of 34 µA (typical) will charge the external capacitor (CMODE) linearly until it reaches 3V.
The comparator (Comp1) then forces CMODE to be discharged to 1V very quickly. By repeating the cycle, a saw-
tooth waveform as shown in Figure 14 is generated. Comparator (Comp2) compares this ramp waveform with
the external dc voltage at the DIM pin generating the desired PWM control signal.
When VDIM ≤ 1V, ON duty factor, DON = 0% and when VDIM ≥ 3V, DON = 100%. The frequency of the PWM
control signal can be calculated as shown below.
1.65 x 10-5
where fPWM is in Hz
fPWM
=
CMODE
(2)
(3)
Or
1.65 x 10-5
fPWM
where CMODE is in Farads
CMODE
=
PWM DIGITAL DIMMING of LED STRINGS
Alternatively, the dimming control can be implemented by direct application of a digital signal to the device. With
the MODE pin connected to ground, an externally applied PWM dimming signal is applied to the DIM pin. The
peak amplitude of the externally applied PWM signal should be greater than 1.5V to ensure clean PWM
switching.
During PWM dimming, channels are not switched simultaneously in an effort to minimize large surge currents
from being drawn from the LED supply rail. Each channel will have 0.5 µs phase delay with respect to the
preceding channel. As a consequence of the phase delay, for a control pulse width less than 0.5 µs, the duty
cycle will be rounded down to 0% and for a control pulse width less than 0.5 µs off time, the duty cycle will be
rounded up to 100%. Therefore, 0.5µs becomes the finest pulse width resolution that can be realized. The PWM
switching timing for all six channels is shown in Figure 15.
10
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SNVS498D –APRIL 2007–REVISED MAY 2013
T = T
+ T
OFF
ON
V
DIM
T
ON
T
OFF
I
OUT1
0.5 ms
I
I
OUT2
OUT3
1.0 ms
1.5 ms
I
OUT4
2.0 ms
I
OUT5
OUT6
2.5 ms
I
3.0 ms
Time
Figure 15. PWM Dimming Switching Timing
LED SHORT FAULT DETECT
With DHC
If the Dynamic Headroom Control (DHC) feature is used, the lowest voltage between the IOUT pins and ground
among the strings will be regulated to 0.625V typical (ILED = 20 mA) by lowering the LED supply rail voltage,
VLED. If an LED short fault condition occurs and causes the voltage between any of the IOUT pins and ground to
exceed the typical short fault threshold of 7.9V for more than 150 µs, the affected channel(s) will be latched off
and the FAULTb pin will be pulled to ground. The affected channel(s) will remain latched off until recycling power
or toggling the EN pin. All of the other channels that are not affected will continue to function normally.
Without DHC
In applications where the DHC function is not used, the IOUT pin voltage on each string will be the voltage
difference between the LED supply rail voltage, VLED, and the voltage drop across the entire LED string. If the
voltage between any of the IOUT pins and ground is less than 2V typical, the short fault detect feature will be
active for all channels. In the event an LED short fault condition occurs and causes the voltage between any of
the IOUT pin and ground to exceed the typical short fault threshold of 7.9V for more than 150 μs, the affected
channel(s) will be latched off and the FAULTb pin will be pulled to ground. The affected channel(s) will remain
latched off until recycling power or toggling the EN pin. All of the other channels that are not affected will
continue to function normally. If the voltages between all IOUT pins and ground are greater than 2V typical, the
Short Fault Detect feature will be disabled to prevent false triggering of the short fault detect function.
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LED OPEN FAULT DETECT (LM3432 ONLY)
For the LM3432, if an open fault should occur and the affected channel sinks no current for greater than 50 µs, it
will be latched off (until recycling power or toggling EN pin). The FAULTb pin’s output will be pulled to ground
while the other channels keep functioning normally. The open fault detection and FAULTb indication features are
inactive in the LM3432B.
IOUT
@
SHORT FAULT
6V
PEM
+
-
VCC
ShortFaultx
ON
VIREF
+
-
!V
FAULT
@
IOUTx Driver
VCC
0.3V
+
-
OpenFaultx
** OPEN FAULT
** Open fault protection and indication are not available in the LM3432B
Figure 16. Fault Detect Functional Block Diagram
OVER-TEMPERATURE MONITOR
If the LM3432/LM3432B junction temperature exceeds approximately 125°C, the OTMb pin will be pulled to
ground but the part will continue to function. Action must be taken to lower the temperature at this point. The
PWM duty factor may be lowered as an example to reduce the amount of heat generated, which will in turn lower
the die temperature. If the junction temperature is allowed to rise beyond approximately 165°C, the part will shut
down. When the device is cooled down to about 145°C, device operation will resume.
Note that this thermal shutdown protection is only intended as a fault mode protection feature. Device operation
above rated maximum operating junction temperature is neither recommended nor ensured.
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SNVS498D –APRIL 2007–REVISED MAY 2013
DYNAMIC HEADROOM CONTROL
To use the DHC function, connect a gain setting resistor from the VDHC pin of the LM3432/LM3432B to the
VDHC pin of the LM3430 (Texas Instruments Semiconductor’s Boost Controller for LED Backlighting) that is
supplying power to the LED rails. The LM3432/LM3432B’s DHC function will regulate the voltage between the
IOUT pins and ground to a minimum of 0.625V typical (IOUT = 20 mA) to optimize overall efficiency. A large
DHC time constant needs to be set in order not to interfere with the loop response of the DC-DC converter. This
can be implemented by connecting a capacitor from the LM3432/LM3432B’s CDHC pin to ground. If the DHC
function is not needed, leave the VDHC pin floating. When operated in this manner, if the lowest voltage between
any of the IOUT pins and ground is greater than 2V, the LED short fault detection function will be disabled. For
the LM3432B, if any open condition occurs on any channels, the DHC function will be inactive and the LED
supply rail voltage from the LM3430 will stay at its preset level. If the excess headroom voltage is greater than
the short fault detect threshold, 7.3V(min), the device may latch off the LED string(s) due to short fault protection.
In order to insure the proper operation of good LED strings, designers must design for sufficient excess
headroom voltage below the short fault detect threshold.
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APPLICATIONS INFORMATION
The LM3432/LM3432B provide a simple and handy solution for LED driving. With only a few external passive
components, an LED panel of up to about 120 white LEDs can be illuminated. A typical application configuration
driving six strings with twelve white LEDs per string is shown in Figure 17.
12 LEDs / String
V
LED
= 48V
VIN = 6V œ 40V
C
VIN
1 mF/50V
VIN
FAULTb
OTMb
Fault flags to MCU
VDHC
CDHC
MODE
V
LED
+
LM3432/LM3432B
I
I
I
I
I
I
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
VCC
IREF
IOUT1
C
VCC
R
IREF
IOUT2
IOUT3
1 mF/10V
54.7k
IOUT4
IOUT5
IOUT6
PWM digital dimming
control input
DIM
EN
> +1.5V
ON
AGND PGND
GND
OFF
Figure 17. Typical Application Schematic to Drive 72 White LEDs (@20 mA) (PWM Digital Dimming)
DETERMINATION OF EXTERNAL COMPONENTS
The typical application only requires three external components. The selection of those components is described
in detail below.
Programming of String Current, IOUT1 to IOUT6
The string current can be programmed by an external resistor, RIREF. The equation to calculate the resistance of
this resistor is shown below.
1.094
in kW
RIREF
=
IOUT
(4)
In order to ensure good current regulation over the full operating temperature range, a high quality resistor with
±1% tolerance and a low temperature coefficient is recommended.
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SNVS498D –APRIL 2007–REVISED MAY 2013
For the example shown in Figure 17, the string current is 20 mA. Applying to the equation:
1.094
= 54.7 kW
RIREF
=
20 mA
(5)
Selecting the VCC Output Capacitor, CVCC
For proper operation, a VCC output capacitor (CVCC) of at least 680 nF is required for stability reason. The
recommended CVCC capacitance is 1 µF.
Selecting the VIN Capacitor, CVIN
The purpose of this capacitor is to supply transient current to the device and suppress VIN noise in order to
ensure proper operation. A low ESR ceramic capacitor with good high frequency performance is recommended.
The capacitance can range from 0.1 µF to 1 µF.
Analog Dimming Control
If analog dimming control is required, a capacitor, CMODE should be connected from the MODE pin to ground
instead of shorting the MODE pin to ground. The relationship between the PWM dimming frequency and the
capacitance of CMODE is illustrated below.
1.65 x 10-5
where CMODE is in Farads and fPWM is in Hz
fPWM
=
CMODE
(6)
When VPWM ≤ 1V, DON = 0% and when VPWM ≥ 3V, DON = 100%
The LED dimming ratio is calculated from the ratio of minimum ON duty factor to the maximum ON duty factor.
With the LM3432/LM3432B, the LEDs can be fully turned on up to 100% ON duty factor and the minimum ON
duty factor is limited by the phase delay time, 0.5 µs. The dimming ratio can be estimated as below.
1
: 1
Dimming Ratio =
5 x 10-7 fPWM
(7)
(8)
As an example, if the PWM dimming frequency is set to 500 Hz, the best achievable dimming ratio is:
1
: 1 = 4000 : 1
Dimming Ratio (fPWM = 500 Hz) =
5 x 10-7 x 500
Driving High Current LEDs
The LM3432/LM3432B can support string currents from 15 mA to 40 mA. If the application needs to drive high
current LEDs that require more than 40 mA per string, the LM3432/LM3432B provides the alternative of
connecting several IOUT ports together to achieve higher output current per string. With this approach, there is
the obvious trade off between higher output current and number of strings driven. Two possible configurations
are illustrated in Figure 18.
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SNVS498D –APRIL 2007–REVISED MAY 2013
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V
LED
= 50V
V
LED
= 50V
VIN = 6V œ 40V
VIN = 6V œ 40V
C
VIN
C
VIN
1 mF/50V
1 mF/50V
VIN
VIN
LM3432/
LM3432B
LM3432/
LM3432B
V
+
LED
V +
LED
I
I
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
IOUT1
IOUT1
I
I
I
I
I
I
I
I
I
I
IOUT2
IOUT3
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT4
IOUT5
IOUT6
AGND PGND
GND
AGND PGND
GND
40 mA Per channel
40 mA Per channel
Two 120 mA Strings
Three 80 mA Strings
Figure 18. Achieving Higher LED String Current by Grouping IOUT Ports
Dynamic Headroom Control, DHC with LM3430
When the LM3432/LM3432B are powered with Texas Instruments Semiconductor's Boost Controller for LED
Backlighting, LM3430, the Dynamic Headroom Control (DHC) feature helps to provide the optimal system
efficiency. By connecting VDHC through a gain setting resistor to the DHC pin of the LM3430 that is supplying
the LED power rail, the LM3432/LM3432B’s DHC function will regulate the minimum of the ON voltage of the six
channels to 0.625V typical (IOUT = 20 mA). This is the minimum voltage headroom required at outputs to keep the
current regulator in its linear operating range. In order not to interfere with the feedback loop response of the
upstream DC-DC converter, the DHC response time constant must be set to a large enough value by adding a
capacitor from CDHC pin to ground.
Figure 19 is an application schematic of a LED panel driver using both the LM3430 and the LM3432/LM3432B
with the Dynamic Headroom Control function enabled. The LM3430 boosts a voltage from VIN to 50V nominal to
supply the LED strings. With the DHC function disabled, the LM3430 will keep the LED string supply regulated at
50V. When the DHC is enabled, this voltage will dynamically be regulated down to a voltage that can just keep
all LED string currents in regulation. That is about 40V in the application shown in Figure 19. The reduction in
this rail voltage can significantly improve the overall system efficiency.
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SNVS498D –APRIL 2007–REVISED MAY 2013
R
UV2
182k
VIN
8V~26V
VIN
FB
SS
C
47 nF
R
118k
COMP1
COMP
RT/SYNC
C
10 mF
50V
IN1
R
C
C
12 pF
T
SS
COMP2
CS
COMP
VDHC
VCC
16.5k
100 pF
UVLO
OUT
C
VCC
R
UV1
GND
1
100 nF
61.9k
R
DHC
V
LED
50V
9k
SD1
RB160M-60
L1 22 mH
R
S1
4.02k
R
R
Q1
Si2308
S2
FB2
C
OUT
300W
118k
2 x 10 mF
100V
C
SNS
R
SNS
0.2W
1W
1 nF
VIN
VCC
C
VCC2
VDHC
DIM
1 mF
R
FB1
3.01k
PWM
Dimming
Signal
C
1 mF
50V
IN2
CDHC
IOUT1
IOUT2
IOUT3
IOUT4
R
IREF
54.7k
LM3432/
LM3432B
*
IREF
*
MODE
C
CDHC
EN
100 nF
C
DHC
IOUT5
IOUT6
100 pF
OTMb
12 LEDs x 6 strings
WLED (20 mA)
FAULTb
PGND AGND
* By connecting the MODE pin to ground with an
external capacitor, the Analog Dimming function
will be enabled. The capacitance of the external
capacitor determines the PWM Dimming
frequency and the applied DC voltage to DIM pin
controls the duty ratio of LED current.
Fault logics to
MCU
Figure 19. LM3430 + LM3432/LM3432B Application Schematic with Dynamic Headroom Control Enabled
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SNVS498D –APRIL 2007–REVISED MAY 2013
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REVISION HISTORY
Changes from Revision C (May 2013) to Revision D
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 17
18
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PACKAGE OPTION ADDENDUM
www.ti.com
29-Aug-2015
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
LM3432BSQ/NOPB
LM3432BSQE/NOPB
ACTIVE
WQFN
WQFN
NHZ
24
24
TBD
Call TI
CU SN
Call TI
-40 to 125
-40 to 125
3432BSQ
ACTIVE
NHZ
250
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
3432BSQ
3432BSQ
LM3432BSQX/NOPB
LM3432MH/NOPB
ACTIVE
ACTIVE
WQFN
NHZ
24
28
TBD
Call TI
CU SN
Call TI
-40 to 125
-40 to 125
HTSSOP
PWP
48
Green (RoHS
& no Sb/Br)
Level-3-260C-168 HR
LM3432
MH
LM3432MHX/NOPB
LM3432SQ/NOPB
LM3432SQE/NOPB
LM3432SQX/NOPB
ACTIVE
ACTIVE
ACTIVE
ACTIVE
HTSSOP
WQFN
WQFN
WQFN
PWP
NHZ
NHZ
NHZ
28
24
24
24
2500
1000
250
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
CU SN
Level-3-260C-168 HR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
LM3432
MH
Green (RoHS
& no Sb/Br)
L3432SQ
L3432SQ
L3432SQ
Green (RoHS
& no Sb/Br)
4500
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
29-Aug-2015
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Sep-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM3432BSQE/NOPB
LM3432MHX/NOPB
LM3432SQ/NOPB
LM3432SQE/NOPB
LM3432SQX/NOPB
WQFN
NHZ
24
28
24
24
24
250
2500
1000
250
178.0
330.0
178.0
178.0
330.0
12.4
16.4
12.4
12.4
12.4
4.3
6.8
4.3
4.3
4.3
5.3
10.2
5.3
1.3
1.6
1.3
1.3
1.3
8.0
8.0
8.0
8.0
8.0
12.0
16.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
HTSSOP PWP
WQFN
WQFN
WQFN
NHZ
NHZ
NHZ
5.3
4500
5.3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Sep-2015
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM3432BSQE/NOPB
LM3432MHX/NOPB
LM3432SQ/NOPB
LM3432SQE/NOPB
LM3432SQX/NOPB
WQFN
HTSSOP
WQFN
NHZ
PWP
NHZ
NHZ
NHZ
24
28
24
24
24
250
2500
1000
250
210.0
367.0
210.0
210.0
367.0
185.0
367.0
185.0
185.0
367.0
35.0
38.0
35.0
35.0
35.0
WQFN
WQFN
4500
Pack Materials-Page 2
PACKAGE OUTLINE
PWP0028A
PowerPADTM - 1.1 mm max height
S
C
A
L
E
1
.
8
0
0
PLASTIC SMALL OUTLINE
C
6.6
6.2
TYP
SEATING PLANE
A
PIN 1 ID
AREA
0.1 C
26X 0.65
28
1
9.8
9.6
NOTE 3
2X
8.45
14
B
15
0.30
0.19
28X
1.1 MAX
4.5
4.3
0.1
C A
B
NOTE 4
0.20
0.09
TYP
SEE DETAIL A
3.15
2.75
0.25
GAGE PLANE
5.65
5.25
0.10
0.02
THERMAL
PAD
0 - 8
0.7
0.5
DETAIL A
(1)
TYPICAL
4214870/A 10/2014
PowerPAD is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm, per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side.
5. Reference JEDEC registration MO-153, variation AET.
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EXAMPLE BOARD LAYOUT
PWP0028A
PowerPADTM - 1.1 mm max height
PLASTIC SMALL OUTLINE
(3.4)
NOTE 9
(3)
SOLDER
MASK
OPENING
SOLDER MASK
DEFINED PAD
28X (1.5)
28X (1.3)
28X (0.45)
28X (0.45)
1
28
26X
(0.65)
SYMM
(5.5)
(9.7)
SOLDER
MASK
OPENING
(1.3) TYP
14
15
(
0.2) TYP
(1.3)
SEE DETAILS
(0.65) TYP
(0.9) TYP
(6.1)
VIA
SYMM
METAL COVERED
BY SOLDER MASK
HV / ISOLATION OPTION
0.9 CLEARANCE CREEPAGE
OTHER DIMENSIONS IDENTICAL TO IPC-7351
(5.8)
IPC-7351 NOMINAL
0.65 CLEARANCE CREEPAGE
LAND PATTERN EXAMPLE
SCALE:6X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL
METAL UNDER
SOLDER MASK
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214870/A 10/2014
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).
9. Size of metal pad may vary due to creepage requirement.
www.ti.com
EXAMPLE STENCIL DESIGN
PWP0028A
PowerPADTM - 1.1 mm max height
PLASTIC SMALL OUTLINE
(3)
BASED ON
0.127 THICK
STENCIL
METAL COVERED
BY SOLDER MASK
28X (1.5)
28X (1.3)
28X (0.45)
1
28
26X (0.65)
28X (0.45)
(5.5)
SYMM
BASED ON
0.127 THICK
STENCIL
14
15
SEE TABLE FOR
DIFFERENT OPENINGS
SYMM
(6.1)
FOR OTHER STENCIL
THICKNESSES
(5.8)
HV / ISOLATION OPTION
0.9 CLEARANCE CREEPAGE
OTHER DIMENSIONS IDENTICAL TO IPC-7351
IPC-7351 NOMINAL
0.65 CLEARANCE CREEPAGE
SOLDER PASTE EXAMPLE
EXPOSED PAD
100% PRINTED SOLDER COVERAGE AREA
SCALE:6X
STENCIL
THICKNESS
SOLDER STENCIL
OPENING
0.1
3.55 X 6.37
3.0 X 5.5 (SHOWN)
2.88 X 5.16
0.127
0.152
0.178
2.66 X 4.77
4214870/A 10/2014
NOTES: (continued)
10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
11. Board assembly site may have different recommendations for stencil design.
www.ti.com
MECHANICAL DATA
NHZ0024B
SQA24B (Rev A)
www.ti.com
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
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