LM3500 [TI]
LM3500 Synchronous Step-up DC/DC Converter for White LED Applications;
| 型号： | LM3500 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LM3500 Synchronous Step-up DC/DC Converter for White LED Applications |
| 文件： | 总24页 (文件大小：892K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM3500
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SNVS231G –AUGUST 2003–REVISED MAY 2013
LM3500 Synchronous Step-up DC/DC Converter for White LED Applications
Check for Samples: LM3500
1
FEATURES
APPLICATIONS
2
•
Synchronous Rectification, High Efficiency
and no External Schottky Diode Required
•
•
•
•
•
LCD Bias Supplies
White LED Backlighting
Handheld Devices
Digital Cameras
•
•
Uses Small Surface Mount Components
Can Drive 2-5 White LEDs in Series
–
(May Function With More Low-VF LEDs)
Portable Applications
•
•
2.7V to 7V Input Range
DESCRIPTION
Internal Output Over-Voltage Protection (OVP)
Circuitry, with no External Zener Diode
Required
The LM3500 is a fixed-frequency step-up DC/DC
converter that is ideal for driving white LEDs for
display backlighting and other lighting functions. With
fully intergrated synchronous switching (no external
schottky diode required) and a low feedback voltage
(500mV), power efficiency of the LM3500 circuit has
been optimized for lighting applications in wireless
phones and other portable products (single cell Li-Ion
or 3-cell NiMH battery supplies). The LM3500
operates with a fixed 1MHz switching frequency.
When used with ceramic input and output capacitors,
the LM3500 provides a small, low-noise, low-cost
solution.
–
LM3500-16: 15.5V OVP; LM3500-21: 20.5V
OVP.
•
•
•
True Shutdown Isolation
Input Undervoltage Lockout
Requires Only Small Ceramic Capacitors at the
Input and Output
•
•
•
Thermal Shutdown
0.1µA Shutdown Current
Small 8-Bump Thin DSBGA Package
Typical Application Circuit
L
VIN
2.7V - 5.5V
22 mH
B1
VIN
C2
VSW
A3
A2
COUT
CIN
NC
LM3500-16
C1
1mF
Ceramic
VOUT
1mF
Ceramic
>1.1V
<0.3V
B3
SHDN
FB
AGND GND
C3
A1
R2
24W
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2013, Texas Instruments Incorporated
LM3500
SNVS231G –AUGUST 2003–REVISED MAY 2013
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DESCRIPTION (CONTINUED)
Two LM3500 options are available with different output voltage capabilities. The LM3500-21 has a maximum
output voltage of 21V and is typically suited for driving 4 or 5 white LEDs in series. The LM3500-16 has a
maximum output voltage of 16V and is typically suited for driving 3 or 4 white LEDs in series (maximum number
of series LEDs dependent on LED forward voltage). If the primary white LED network should be disconnected,
the LM3500 uses internal protection circuitry on the output to prevent a destructive over-voltage event.
A single external resistor is used to set the maximum LED current in LED-drive applications. The LED current
can easily be adjusted using a pulse width modulated (PWM) signal on the shutdown pin. In shutdown, the
LM3500 completely disconnects the input from output, creating total isolation and preventing any leakage
currents from trickling into the LEDs.
Connection Diagram
A2
A1
A3
B3
C3
B1
C1
C2
Figure 1. 8-bump DSBGA
PIN FUNCTIONS
Pin
A1
B1
C1
C2
C3
B3
A3
A2
Name
AGND
VIN
Function
Analog ground.
Analog and Power supply input.
VOUT
VSW
PMOS source connection for synchronous rectification.
Switch pin. Drain connections of both NMOS and PMOS power devices.
Power Ground.
GND
FB
Output voltage feedback connection.
No internal connection made to this pin.
Shutdown control pin.
NC
SHDN
AGND(pin A1): Analog ground pin. The analog ground pin should tie directly to the GND pin.
VIN(pin B1): Analog and Power supply pin. Bypass this pin with a capacitor, as close to the device as possible,
connected between the VIN and GND pins.
VOUT(pin C1): Source connection of internal PMOS power device. Connect the output capacitor between the
VOUT and GND pins as close as possible to the device.
VSW(pin C2): Drain connection of internal NMOS and PMOS switch devices. Keep the inductor connection close
to this pin to minimize EMI radiation.
GND(pin C3): Power ground pin. Tie directly to ground plane.
FB(pin B3): Output voltage feedback connection. Set the primary White LED network current with a resistor from
the FB pin to GND. Keep the current setting resistor close to the device and connected between the FB and
GND pins.
NC(pin A3): No internal connection is made to this pin. The maximum allowable voltage that can be applied to
this pin is 7.5V.
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SHDN(pin A2): Shutdown control pin. Disable the device with a voltage less than 0.3V and enable the device
with a voltage greater than 1.1V. The white LED current can be controlled using a PWM signal at this pin. There
is an internal pull down on the SHDN pin, the device is in a normally off state.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
VIN
−0.3V to 7.5V
−0.3V to 16V
−0.3V to 21V
−0.3V to VOUT+0.3V
−0.3V to 7.5V
150°C
VOUT (LM3500-16)(3)
VOUT (LM3500-21)(3)
(3)
VSW
FB, SHDN, and NC Voltages
Maximum Junction Temperature
Lead Temperature(4)
300°C
ESD Ratings(5)
Human Body Model
Machine Model
2kV
200V
(1) Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the
device is intended to be functional, but device parameter specifications may not be specified. For specified specifications and test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) This condition applies if VIN < VOUT. If VIN > VOUT, a voltage greater than VIN + 0.3V should not be applied to the VOUT or VSW pins.
(4) For more detailed soldering information and specifications, please refer to Texas Instruments Application Note 1112: DSBGA Wafer
Level Chip Scale Package
(5) The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF
capacitor discharged directly into each pin.
Operating Conditions
Ambient Temperature(1)
Junction Temperature
Supply Voltage
−40°C to +85°C
−40°C to +125°C
2.7V to 7V
(1) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP
125ºC), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the
part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
=
Thermal Properties
Junction to Ambient Thermal Resistance (θJA
(1)
)
75°C/W
(1) Junction-to-ambient thermal resistance (θJA) is highly application and board-layout dependent. The 75ºC/W figure provided was
measured on a 4-layer test board conforming to JEDEC standards. In applications where high maximum power dissipation exists,
special care must be paid to thermal dissipation issues when designing the board layout.
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Electrical Characteristics
Specifications in standard type face are for TA = 25°C and those in boldface type apply over the Operating Temperature
Range of TA = −10°C to +85°C. Unless otherwise specified VIN =2.7V and specification apply to both LM3500-16 and
LM3500-21.
Symbol
Parameter
Conditions
Min(1)
Typ(2)
Max(1)
Units
IQ
Quiescent Current, Device Not
Switching
FB > 0.54V
0.95
1.2
mA
Quiescent Current, Device
Switching
FB = 0V
1.8
2.5
Shutdown
SHDN = 0V
0.1
0.5
2
µA
V
VFB
Feedback Voltage
VIN = 2.7V to 7V
VIN = 2.7V to 7V
0.47
0.53
ΔVFB
Feedback Voltage Line
Regulation
0.1
400
400
640
0.4
480
530
770
800
%/V
ICL
Switch Current Limit
(LM3500-16)
VIN = 2.7V,
Duty Cycle = 80%
275
255
420
450
VIN = 3.0V,
Duty Cycle = 70%
mA
Switch Current Limit
(LM3500-21)
VIN = 2.7V,
Duty Cycle = 70%
VIN = 3.0V,
Duty Cycle = 63%
FB = 0.5V(3)
670
45
IB
FB Pin Bias Current
Input Voltage Range
NMOS Switch RDSON
PMOS Switch RDSON
200
7.0
nA
V
VIN
2.7
RDSON
VIN = 2.7V, ISW = 300mA
VOUT = 6V, ISW = 300mA
0.43
2.3
Ω
1.1
87
DLimit
Duty Cycle Limit (LM3500-16) FB = 0V
Duty Cycle Limit (LM3500-21) FB = 0V
Switching Frequency
80
85
%
94
FSW
ISD
0.85
1.0
18
1.15
30
MHz
SHDN Pin Current(4)
SHDN = 5.5V
SHDN = 2.7V
SHDN = GND
VSW = 15V
9
16
µA
µA
0.1
0.01
IL
Switch Leakage Current
(LM3500-16)
0.5
2.0
Switch Leakage Current
(LM3500-21)
VSW = 20V
0.01
UVP
OVP
Input Undervoltage Lockout
ON Threshold
OFF Threshold
2.4
2.3
15
14
20
19
2.5
2.4
2.6
2.5
16
15
21
20
V
V
Output Overvoltage Protection ON Threshold
(LM3500-16)
15.5
14.6
20.5
19.5
OFF Threshold
Output Overvoltage Protection ON Threshold
(LM3500-21)
OFF Threshold
IVout
VOUT Bias Current
(LM3500-16)
VOUT = 15V, SHDN = VIN
260
300
400
460
3
µA
µA
VOUT Bias Current
(LM3500-21)
VOUT = 20V, SHDN = VIN
VOUT = 15V, VSW = 0V
VOUT = 20V, VSW = 0V
IVL
PMOS Switch Leakage
Current (LM3500-16)
0.01
0.01
PMOS Switch Leakage
Current (LM3500-21)
3
(1) All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are
production tested, specified through statistical analysis or specified by design. All limits at temperature extremes are specified via
correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level
(AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) Feedback current flows out of the pin.
(4) Current flows into the pin.
4
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Electrical Characteristics (continued)
Specifications in standard type face are for TA = 25°C and those in boldface type apply over the Operating Temperature
Range of TA = −10°C to +85°C. Unless otherwise specified VIN =2.7V and specification apply to both LM3500-16 and
LM3500-21.
Symbol
SHDN
Threshold
Parameter
SHDN Low
SHDN High
Conditions
Min(1)
Typ(2)
Max(1)
Units
0.65
0.3
V
1.1
0.65
Electrical Characteristics
Specifications in standard type face are for TJ = 25°C and those in boldface type apply over the full Operating Temperature
Range (TJ = −40°C to +125°C). Unless otherwise specified VIN =2.7V and specification apply to both LM3500-16 and
LM3500-21.
Min
Typ
Max
Symbol
Parameter
Conditions
FB > 0.54V
Units
(1)
(2)
(1)
IQ
Quiescent Current, Device Not
Switching
0.95
1.8
1.2
2.5
mA
Quiescent Current, Device
Switching
FB = 0V
Shutdown
SHDN = 0V
0.1
0.5
2
µA
V
VFB
Feedback Voltage
VIN = 2.7V to 7V
VIN = 2.7V to 7V
0.47
0.53
ΔVFB
Feedback Voltage Line
Regulation
0.1
0.4
%/V
ICL
Switch Current Limit
(LM3500-16)
VIN = 3.0V, Duty Cycle = 70%
VIN = 3.0V, Duty Cycle = 63%
400
mA
Switch Current Limit
(LM3500-21)
670
45
(3)
IB
FB Pin Bias Current
Input Voltage Range
NMOS Switch RDSON
PMOS Switch RDSON
FB = 0.5V
200
7.0
nA
V
VIN
2.7
0.8
RDSON
VIN = 2.7V, ISW = 300mA
VOUT = 6V, ISW = 300mA
0.43
2.3
Ω
1.1
87
DLimit
Duty Cycle Limit (LM3500-16) FB = 0V
Duty Cycle Limit (LM3500-21) FB = 0V
Switching Frequency
%
94
FSW
ISD
1.0
18
1.2
30
16
MHz
SHDN Pin Current(4)
SHDN = 5.5V
SHDN = 2.7V
SHDN = GND
VSW = 15V
9
µA
µA
0.1
0.01
IL
Switch Leakage Current
(LM3500-16)
0.5
2.0
Switch Leakage Current
(LM3500-21)
VSW = 20V
0.01
UVP
OVP
Input Undervoltage Lockout
ON Threshold
OFF Threshold
2.4
2.3
15
14
20
19
2.5
2.4
2.6
2.5
16
15
21
20
V
V
Output Overvoltage Protection ON Threshold
(LM3500-16)
15.5
14.6
20.5
19.5
OFF Threshold
Output Overvoltage Protection ON Threshold
(LM3500-21)
OFF Threshold
(1) All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are
production tested, specified through statistical analysis or specified by design. All limits at temperature extremes are specified via
correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level
(AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) Feedback current flows out of the pin.
(4) Current flows into the pin.
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Electrical Characteristics (continued)
Specifications in standard type face are for TJ = 25°C and those in boldface type apply over the full Operating Temperature
Range (TJ = −40°C to +125°C). Unless otherwise specified VIN =2.7V and specification apply to both LM3500-16 and
LM3500-21.
Min
Typ
Max
Symbol
IVout
Parameter
Conditions
Units
(1)
(2)
(1)
VOUT Bias Current
(LM3500-16)
VOUT = 15V, SHDN = VIN
260
300
400
460
3
µA
VOUT Bias Current
(LM3500-21)
VOUT = 20V, SHDN = VIN
VOUT = 15V, VSW = 0V
VOUT = 20V, VSW = 0V
IVL
PMOS Switch Leakage
Current (LM3500-16)
0.01
0.01
µA
V
PMOS Switch Leakage
Current (LM3500-21)
3
SHDN
Threshold
SHDN Low
SHDN High
0.65
0.65
0.3
1.1
6
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Typical Performance Characteristics
Switching Quiescent Current
Non-Switching Quiescent Current
vs
vs
VIN
VIN
Figure 2.
Figure 3.
2 LED Efficiency
vs
2 LED Efficiency
vs
LED Current
LED Current
L = Coilcraft DT1608C-223,
Efficiency = 100*(PIN/(2VLED*ILED))
L = TDK VLP4612T-220MR34,
Efficiency = 100*(PIN/(2VLED*ILED))
Figure 4.
Figure 5.
3 LED Efficiency
vs
3 LED Efficiency
vs
LED Current
LED Current
L = Coilcraft DT1608C-223,
Efficiency = 100*(PIN/(3VLED*ILED))
L = TDK VLP4612T-220MR34,
Efficiency = 100*(PIN/(3VLED*ILED))
Figure 6.
Figure 7.
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Typical Performance Characteristics (continued)
4 LED Efficiency
vs
4 LED Efficiency
vs
LED Current
LED Current
L = Coilcraft DT1608C-223,
Efficiency = 100*(PIN/(4VLED*ILED))
L = TDK VLP4612T-220MR34,
Efficiency = 100*(PIN/(4VLED*ILED))
Figure 8.
Figure 9.
2 LED Efficiency
3 LED Efficiency
vs
vs
VIN
VIN
L = Coilcraft DT1608C-223,
Efficiency = 100*(PIN/(2VLED*ILED))
L = Coilcraft DT1608C-223,
Efficiency = 100*(PIN/(3VLED*ILED))
Figure 10.
Figure 11.
4 LED Efficiency
vs
VIN
SHDN Pin Current
vs
SHDN Pin Voltage
L = Coilcraft DT1608C-223,
Efficiency = 100*(PIN/(4VLED*ILED))
Figure 12.
Figure 13.
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Typical Performance Characteristics (continued)
Output Power
vs
VIN: LM3500-16
(L = Coilcraft DT1608C-223)
Output Power
vs
Temperature: LM3500-16
(L = Coilcraft DT1608C-223)
Figure 14.
Figure 15.
Switch Current Limit
vs
Switch Current Limit
vs
Temperature
VIN: LM3500-16
LM3500-16, VOUT=8V
Figure 16.
Figure 17.
Switch Current Limit
vs
Switch Current Limit
vs
Temperature
LM3500-16, VOUT=12V
VIN: LM3500-21
1100
1000
900
800
700
600
500
400
300
200
V
= 8V
OUT
V
OUT
= 18V
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
INPUT VOLTAGE (V)
Figure 18.
Figure 19.
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Typical Performance Characteristics (continued)
Switch Current Limit
vs
Switch Current Limit
vs
Temperature
Temperature
LM3500-21, VOUT=12V
LM3500-21, VOUT=12V
850
800
750
700
650
600
550
500
450
1300
1200
1100
1000
900
= 5.5V
V
IN
= 5.5V
= 4.2V
V
IN
V
IN
= 4.2V
V
IN
800
700
= 3.0V
35
V
IN
600
= 3.0V
V
IN
500
-40
-40
-15
10
60
85
-15
10
35
60
85
TEMPERATURE (ºC)
TEMPERATURE (ºC)
Figure 20.
Figure 21.
Switch Current Limit
vs
Oscillator Frequency
Temperature
vs
LM3500-21, VOUT=18V
VIN
440
420
400
380
360
340
320
300
280
260
240
V
= 5.5V
IN
V
= 3.0V
IN
V
= 4.2V
IN
-40
-15
10
35
60
85
INPUT VOLTAGE (V)
Figure 22.
Figure 23.
VOUT DC Bias
vs
VOUT Voltage: LM3500-16
VOUT DC Bias
vs
VOUT Voltage: LM3500-21
400
350
300
250
200
150
100
50
T = -40èC
T = 125èC
T = 25èC
0
0
2
4
6
8
10 12 14 16 18 20 22
(V)
V
OUT
Figure 24.
Figure 25.
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Typical Performance Characteristics (continued)
FB Voltage
vs
Temperature
FB Voltage
vs
VIN
Figure 26.
Figure 27.
NMOS RDSON
vs
VIN
PMOS RDSON
vs
Temperature
(ISW = 300mA)
Figure 28.
Figure 29.
Typical VIN Ripple
Start-Up: LM3500-16
LM3500-16, 3 LEDs, RLED = 22Ω, VIN = 3.0V
1) SW, 10V/div, DC
3) IL, 100mA/div, DC
3 LEDs, RLED = 22Ω, VIN = 3.0V
1) SHDN, 1V/div, DC
2) IL, 100mA/div, DC
3) ILED, 20mA/div, DC
T = 100µs/div
4) VIN, 100mV/div, AC
T = 250ns/div
Figure 30.
Figure 31.
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Typical Performance Characteristics (continued)
Start-Up: LM3500-21
SHDN Pin Duty Cycle Control Waveforms
T
1
4
2
LM3500-16, 3 LEDs, RLED = 22Ω, VIN = 3.0V, SHDN frequency =
200Hz
1) SHDN, 1V/div, DC
2) IL, 100mA/div, DC
3) ILED, 20mA/div, DC
4) VOUT, 10V/div, DC
3 LEDs, RLED = 22Ω, VIN = 3.0V
1) SHDN, 1V/div, DC
4) IL, 100mA/div, DC
2) VOUT, 10/div, DC
T = 200µs/div
VCONT = 2.7V
T = 1ms/div
Figure 32.
Figure 33.
Typical VOUT Ripple, OVP Functioning: LM3500-16
Typical VOUT Ripple, OVP Functioning: LM3500-21
T
1
VOUT open circuit and equals approximately 15V DC, VIN = 3.0V
3) VOUT, 200mV/div, AC
T = 1ms/div
VOUT open circuit and equals approximately 20V DC, VIN = 3.0V
1) VOUT, 200mV/div, AC
T = 400µs/div
Figure 34.
Figure 35.
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Operation
L
VIN
VSW
B1 VIN
C2
UVP
COMP
VOUT
-
OVP
COMP
+
-
C1
UVP
REF
THERMAL
SHUTDOWN
+
LIGHT LOAD
COMP
OVP
REF
+
-
REF
CIN
FB
B3
COUT
Reset Reset Reset
Reset
-
DriveP
-
EAMP
+
LOGIC
PWM
Reset
DriveN
COMP
+
SET Reset Reset
Body Diode
Control
FB
0.5V
Current
Sense
osc
R
LED
NC
A3
Duty Limit
Comp
SHUTDOWN
COMP
+
-
Dlimit
A1
A2
C3
SHDN
GND
AGND
Figure 36. LM3500 Block Diagram
The LM3500 utilizes a synchronous Current Mode PWM control scheme to regulate the feedback voltage over
almost all load conditions. The DC/DC controller acts as a controlled current source ideal for white LED
applications. The LM3500 is internally compensated thus eliminating the need for any external compensation
components providing a compact overall solution. The operation can best be understood referring to the block
diagram in Figure 36. At the start of each cycle, the oscillator sets the driver logic and turns on the NMOS power
device conducting current through the inductor and turns off the PMOS power device isolating the output from
the VSW pin. The LED current is supplied by the output capacitor when the NMOS power device is active. During
this cycle, the output voltage of the EAMP controls the current through the inductor. This voltage will increase for
larger loads and decrease for smaller loads limiting the peak current in the inductor minimizing EMI radiation.
The EAMP voltage is compared with a voltage ramp and the sensed switch voltage. Once this voltage reaches
the EAMP output voltage, the PWM COMP will then reset the logic turning off the NMOS power device and
turning on the PMOS power device. The inductor current then flows through the PMOS power device to the white
LED load and output capacitor. The inductor current recharges the output capacitor and supplies the current for
the white LED branches. The oscillator then sets the driver logic again repeating the process. The Duty Limit
Comp is always operational preventing the NMOS power switch from being on more than one cycle and
conducting large amounts of current.
The LM3500 has dedicated protection circuitry active during normal operation to protect the IC and the external
components. The Thermal Shutdown circuitry turns off both the NMOS and PMOS power devices when the die
temperature reaches excessive levels. The LM3500 has a UVP Comp that disables both the NMOS and PMOS
power devices when battery voltages are too low preventing an on state of the power devices which could
conduct large amounts of current. The OVP Comp prevents the output voltage from increasing beyond
15.5V(LM3500-16) and 20.5V(LM3500-21) when the primary white LED network is removed or if there is an LED
failure, allowing the use of small (16V for LM3500-16 and 25V for LM3500-21) ceramic capacitors at the output.
This comparator has hysteresis that will regulate the output voltage between 15.5V and 14.6V typically for the
LM3500-16, and between 20.5V and 19.5V for the LM3500-21. The LM3500 features a shutdown mode that
reduces the supply current to 0.1uA and isolates the input and output of the converter.
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APPLICATION INFORMATION
ADJUSTING LED CURRENT
The White LED current is set using the following equation:
ILED
=
VFB/RLED
(1)
The LED current can be controlled using a PWM signal on the SHDN pin with frequencies in the range of 100Hz
(greater than visible frequency spectrum) to 1kHz. For controlling LED currents down to the µA levels, it is best
to use a PWM signal frequency between 200-500Hz. The LM3500 LED current can be controlled with PWM
signal frequencies above 1kHz but the controllable current decreases with higher frequency. The maximum LED
current would be achieved using the equation above with 100% duty cycle, ie. the SHDN pin always high.
LED-DRIVE CAPABILITY
The maximum number of LEDs that can be driven by the LM3500 is limited by the output voltage capability of the
LM3500. When using the LM3500 in the typical application configuration, with LEDs stacked in series between
the VOUT and FB pins, the maximum number of LEDs that can be placed in series (NMAX) is dependent on the
maximum LED forward voltage (VF-MAX), the voltage of the LM3500 feedback pin (VFB-MAX = 0.53V), and the
minimum output over-voltage protection level of the chosen LM3500 option (LM3500-16: OVPMIN = 15V;
LM3500-21: OVPMIN = 20V). For the circuit to function properly, the following inequality must be met:
(NMAX × VF-MAX) + 0.53V ≤ OVPMIN
(2)
When inserting a value for maximim LED VF, LED forward voltage variation over the operating temperature range
should be considered. The table below provides maximum LED voltage numbers for the LM3500-16 and
LM3500-21 in the typical application circuit configuration (with 3, 4, 5, 6, or 7 LEDs placed in series between the
VOUT and FB pins).
Maximum LED VF
# of LEDs
(in series)
LM3500-16
4.82V
3.61V
2.89V
X
LM3500-21
6.49V
3
4
5
6
7
4.86V
3.89V
3.24V
X
2.78V
For the LM3500 to operate properly, the output voltage must be kept above the input voltage during operation.
For most applications, this requires a minimum of 2 LEDs (total of 6V or more) between the FB and VOUT pins.
OUTPUT OVERVOLTAGE PROTECTION
The LM3500 contains dedicated circuitry for monitoring the output voltage. In the event that the primary LED
network is disconnected from the LM3500-16, the output voltage will increase and be limited to 15.5V (typ.).
There is a 900mV hysteresis associated with this circuitry which will cause the output to fluctuate between 15.5V
and 14.6V (typ.) if the primary network is disconnected. In the event that the network is reconnected regulation
will begin at the appropriate output voltage. The 15.5V limit allows the use of 16V 1µF ceramic output capacitors
creating an overall small solution for white LED applications.
In the event that the primary LED network is disconnected from the LM3500-21, the output voltage will increase
and be limited to 20.5V (typ.). There is a 1V hysteresis associated with this circuitry which will cause the output
to fluctuate between 20.5V and 19.5V (typ.) if the primary network is disconnected. In the event that the network
is reconnected regulation will begin at the appropriate output voltage. The 20.5V limit allows the use of 25V 1µF
ceramic output capacitors.
RELIABILITY AND THERMAL SHUTDOWN
The maximum continuous pin current for the 8 pin thin DSBGA package is 535mA. When driving the device near
its power output limits the VSW pin can see a higher DC current than 535mA (see INDUCTOR SELECTION
section for average switch current). To preserve the long term reliability of the device the average switch current
should not exceed 535mA.
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The LM3500 has an internal thermal shutdown function to protect the die from excessive temperatures. The
thermal shutdown trip point is typically 150°C. There is a hysteresis of typically 35°C so the die temperature must
decrease to approximately 115°C before the LM3500 will return to normal operation.
INDUCTOR SELECTION
The inductor used with the LM3500 must have a saturation current greater than the cycle by cycle peak inductor
current (see Table 1 table below). Choosing inductors with low DCR decreases power losses and increases
efficiency.
The minimum inductor value required for the LM3500-16 can be calculated using the following equation:
(
VIN RDSON
0.29
D
-1
L >
D'
(3)
The minimum inductor value required for the LM3500-21 can be calculated using the following equation:
(
VIN RDSON
0.58
D
-1
L >
D'
(4)
For both equations above, L is in µH, VIN is the input supply of the chip in Volts, RDSON is the ON resistance of
the NMOS power switch found in the Typical Performance Characteristics section in ohms and D is the duty
cycle of the switching regulator. The above equation is only valid for D greater than or equal to 0.5. For
applications where the minimum duty cycle is less than 0.5, a 22µH inductor is the typical recommendation for
use with most applications. Bench-level verification of circuit performance is required in these special cases,
however. The duty cycle, D, is given by the following equation:
VIN
D' =
=1-D
VOUT
(5)
where VOUT is the voltage at pin C1.
Table 1. Typical Peak Inductor Currents (mA)
# LEDs
(in
series)
LED Current
VIN
(V)
15
mA
20
mA
30
mA
40
mA
50
mA
60
mA
2.7
3.3
4.2
2
3
4
5
2
3
4
5
2
3
4
5
82
100
138
174
232
90
134
190
244
319
116
168
212
288
96
160
244
322
413
136
210
270
365
116
180
232
324
204
294
X
234
352
X
118
142
191
76
X
X
172
250
320
446
142
210
272
388
198
290
X
110
132
183
64
126
158
216
76
X
162
246
318
456
102
122
179
116
146
206
148
186
263
The typical cycle-by-cycle peak inductor current can be calculated from the following equation:
ö I
+
VIND
OUT
IPK
hD' 2LFSW
(6)
where IOUT is the total load current, FSW is the switching frequency, L is the inductance and η is the converter
efficiency of the total driven load. A good typical number to use for η is 0.8. The value of η can vary with load and
duty cycle. The average inductor current, which is also the average VSW pin current, is given by the following
equation:
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IL(AVE) ö I
OUT
hD'
(7)
The maximum output current capability of the LM3500 can be estimated with the following equation:
VIND
-
ICL
IOUT
ö hD'
2LFSW
(8)
where ICL is the current limit. Some recommended inductors include but are not limited to:
Coilcraft DT1608C series
Coilcraft DO1608C series
TDK VLP4612 series
TDK VLP5610 series
TDK VLF4012A series
CAPACITOR SELECTION
Choose low ESR ceramic capacitors for the output to minimize output voltage ripple. Multilayer X7R or X5R type
ceramic capacitors are the best choice. For most applications, a 1µF ceramic output capacitor is sufficient.
Local bypassing for the input is needed on the LM3500. Multilayer X7R or X5R ceramic capacitors with low ESR
are a good choice for this as well. A 1µF ceramic capacitor is sufficient for most applications. However, for some
applications at least a 4.7µF ceramic capacitor may be required for proper startup of the LM3500. Using
capacitors with low ESR decreases input voltage ripple. For additional bypassing, a 100nF ceramic capacitor can
be used to shunt high frequency ripple on the input. Some recommended capacitors include but are not limited
to:
TDK C2012X7R1C105K
Taiyo-Yuden EMK212BJ105 G
LAYOUT CONSIDERATIONS
The input bypass capacitor CIN, as shown in Figure 36, must be placed close to the device and connect between
the VIN and GND pins. This will reduce copper trace resistance which effects the input voltage ripple of the IC.
For additional input voltage filtering, a 100nF bypass capacitor can be placed in parallel with CIN to shunt any
high frequency noise to ground. The output capacitor, COUT, should also be placed close to the LM3500 and
connected directly between the VOUT and GND pins. Any copper trace connections for the COUT capacitor can
increase the series resistance, which directly effects output voltage ripple and efficiency. The current setting
resistor, RLED, should be kept close to the FB pin to minimize copper trace connections that can inject noise into
the system. The ground connection for the current setting resistor should connect directly to the GND pin. The
AGND pin should connect directly to the GND pin. Not connecting the AGND pin directly, as close to the chip as
possible, may affect the performance of the LM3500 and limit its current driving capability. Trace connections
made to the inductor should be minimized to reduce power dissipation, EMI radiation and increase overall
efficiency. It is good practice to keep the VSW routing away from sensitive pins such as the FB pin. Failure to do
so may inject noise into the FB pin and affect the regulation of the device. See Figure 37 and Figure 38 for an
example of a good layout as used for the LM3500 evaluation board.
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Figure 37. Evaluation Board Layout (2X Magnification)
Top Layer
Figure 38. Evaluation Board Layout (2X Magnification)
Bottom Layer (as viewed from the top)
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L
VIN
2.7V - 5.5V
22 mH
B1
VIN
C2
VSW
A3
A2
COUT
CIN
NC
LM3500-16
C1
B3
1mF
Ceramic
VOUT
1mF
Ceramic
>1.1V
<0.3V
SHDN
FB
AGND GND
C3
A1
R2
24W
Figure 39. 2 White LED Application
L
VIN
2.7V - 5.5V
22 mH
B1
VIN
C2
VSW
A3
A2
COUT
CIN
NC
C1
B3
1mF
Ceramic
VOUT
1mF
LM3500-16
Ceramic
>1.1V
<0.3V
SHDN
FB
Control with DC
AGND GND
C3
voltage, NMOS
FET switch, or tie
directly to ground.
R2
A1
R1
24W
Figure 40. Multiple 2 LED String Application
L
VIN
2.7V - 5.5V
22 mH
B1
VIN
C2
VSW
A3
A2
COUT
CIN
NC
C1
B3
1mF
Ceramic
VOUT
1mF
LM3500-16
Ceramic
>1.1V
<0.3V
SHDN
FB
AGND GND
C3
A1
R1
24W
R2
24W
Figure 41. Multiple 3 LED String Application
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L
VIN
2.7V - 5.5V
22 mH
B1
VIN
C2
VSW
A3
A2
COUT
CIN
NC
LM3500-21
C1
B3
1mF
Ceramic
VOUT
1mF
Ceramic
>1.1V
<0.3V
SHDN
FB
AGND GND
A1
C3
R2
24W
Figure 42. LM3500-21 5 LED Application
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REVISION HISTORY
Changes from Revision F (May 2013) to Revision G
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 19
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PACKAGE OPTION ADDENDUM
www.ti.com
1-Oct-2016
PACKAGING INFORMATION
Orderable Device
LM3500TL-16/NOPB
LM3500TL-21/NOPB
LM3500TLX-16/NOPB
LM3500TLX-21/NOPB
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
OBSOLETE
DSBGA
DSBGA
DSBGA
DSBGA
YZR
8
8
8
8
TBD
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
S
18
OBSOLETE
OBSOLETE
OBSOLETE
YZR
YZR
YZR
-40 to 85
S
23
-40 to 85
S
18
-40 to 85
S
23
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
1-Oct-2016
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
YZR0008xxx
D
0.600±0.075
E
TLA08XXX (Rev C)
4215045/A
12/12
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
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相关型号：
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