LM3532TME-40A/NOPB [TI]

LM3532 High Efficiency White LED Driver with Programmable Ambient Light Sensing Capability and I2C-Compatible Interface; LM3532高效率白光LED驱动器,具有可编程环境光感应功能和I2C兼容接口
LM3532TME-40A/NOPB
型号: LM3532TME-40A/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

LM3532 High Efficiency White LED Driver with Programmable Ambient Light Sensing Capability and I2C-Compatible Interface
LM3532高效率白光LED驱动器,具有可编程环境光感应功能和I2C兼容接口

驱动器
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LM3532  
www.ti.com  
SNVS653D JULY 2011REVISED JUNE 2013  
LM3532 High Efficiency White LED Driver with Programmable Ambient Light Sensing  
Capability and I2C-Compatible Interface  
Check for Samples: LM3532  
1
FEATURES  
APPLICATIONS  
2
Drives up to 3 Parallel High-Voltage LED  
Strings at 40V Each with up to 90% Efficiency  
Power Source for White LED Backlit LCD  
Displays  
0.4% Typical Current Matching Between  
Strings  
Programmable Keypad Backlight  
DESCRIPTION  
The LM3532 is  
256 Level Logarithmic and Linear Brightness  
Control with 14-Bit Equivalent Dimming  
I2C-compatible Interface  
a
500 kHz fixed frequency  
asynchronous boost converter which provides the  
power for 3 high-voltage, low-side current sinks. The  
device is programmable over an I2C-compatible  
interface and has independent current control for all  
three channels. The adaptive current regulation  
method allows for different LED currents in each  
current sink thus allowing for a wide variety of  
backlight + keypad applications.  
Direct Read Back of Ambient Light Sensor via  
8-bit ADC  
Programmable Dual Ambient Light Sensor  
Inputs with Internal Sensor Gain Selection  
Dual External PWM Inputs for LED Brightness  
Adjustment  
The main features of the LM3532 include dual  
ambient light sensor inputs each with 32 internal  
voltage setting resistors, 8-bit logarithmic and linear  
brightness control, dual external PWM brightness  
control inputs, and up to 1000:1 dimming ratio with  
programmable fade in and fade out settings.  
Independent Current String Brightness Control  
Programmable LED Current Ramp Rates  
40V Over-Voltage Protection  
1A Typical Current Limit  
The LM3532 is available in a 16-bump, 0.4mm pitch  
thin DSBGA (1.745 mm x 1.845 mm x 0.6 mm). The  
device operates over a 2.7V to 5.5V input voltage  
range and the 40°C to +85°C temperature range.  
Typical Application Circuit  
L
D1  
VOUT up to 40V  
VIN  
CIN  
COUT  
IN  
SW  
OVP  
VALS  
Ambient Light  
Sensor 2  
Ambient Light  
Sensor 1  
ALS1  
ALS2  
VIN  
LM3532  
SDA  
SCL  
ILED1  
ILED2  
ILED3  
PWM1  
HWEN  
INT  
PWM2  
T0  
PGND  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2011–2013, Texas Instruments Incorporated  
LM3532  
SNVS653D JULY 2011REVISED JUNE 2013  
www.ti.com  
Application Circuit Component List  
Current/Voltage  
Rating (Resistance)  
Component  
Manufacturer's Part Number  
Value  
Size (mm)  
White LED  
Driver  
LM3532  
1.745 mm x 1.845 mm x 0.6 mm  
L
COILCRAFT  
LPS4018-103ML  
10 µH  
1µF  
3.9 mm x 3.9 mm x 1.7 mm  
1A (RDC = 0.2)  
COUT  
CIN  
Murata  
GRM21BR71H105KA12L  
0805  
0603  
50V  
10V  
Murata  
2.2 µF  
GRM188R71A225KE15D  
Connection Diagram  
Top View  
A1  
B1  
A2  
B2  
A3  
A4  
B4  
B3  
C2  
D2  
C3  
D3  
C4  
D4  
C1  
D1  
Figure 1. 16-Bump (1.745 mm × 1.845 mm × 0.6 mm)  
DSBGA Package YFQ0016  
PIN DESCRIPTIONS  
Pin  
Name  
Description  
Output Voltage Sense Connection for Over Voltage Sensing. Connect OVP to the positive  
terminal of the output capacitor.  
A1  
OVP  
Input Terminal to High Voltage Current Sink #3 (40V max). The boost converter regulates the  
minimum of ILED1, ILED2, or ILED3 to 0.4V.  
A2  
A3  
A4  
ILED3  
ILED2  
ILED1  
Input Terminal to High Voltage Current Sink #2 (40V max). The boost converter regulates the  
minimum of ILED1, ILED2, or ILED3 to 0.4V.  
Input Terminal to High Voltage Current Sink #1 (40V max). The boost converter regulates the  
minimum of ILED1, ILED2, or ILED3 to 0.4V.  
B1  
B2  
ALS1  
ALS2  
Ambient Light Sensor Input 1.  
Ambient Light Sensor Input 2.  
Active High Hardware Enable. Pull this pin high to enable the LM3532. HWEN is a high  
impedance input.  
B3  
HWEN  
B4  
C1  
C2  
IN  
Input Voltage Connection. Bypass IN to GND with a minimum 2.2 µF ceramic capacitor.  
External PWM Brightness Control Input 2.  
PWM2  
PWM1  
External PWM Brightness Control Input 1.  
Programmable Interrupt Pin. INT is an open drain output that pulls low when the ALS changes  
zones.  
C3  
INT  
C4  
D1  
D2  
D3  
D4  
GND  
SDA  
SCL  
T0  
Ground  
Serial Data Connection for I2C-Compatible Interface  
Serial Clock Connection for I2C-Compatible Interface  
Unused test input. This pin must be tied externally to GND for proper operation.  
Drain Connection for boost converters internal NFET  
SW  
2
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Product Folder Links: LM3532  
LM3532  
www.ti.com  
SNVS653D JULY 2011REVISED JUNE 2013  
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with  
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more  
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.  
(1)(2)(3)  
ABSOLUTE MAXIMUM RATINGS  
VIN to GND  
0.3V to +6V  
0.3V to +45V  
0.3V to +6V  
Internally Limited  
+150°C  
VSW, VOVP, VILED1, VILED2, VILED3 to GND  
VSCL, VSDA, VALS1, VALS2, VPWM1, VPWM2, VINT, VHWEN, VT0 to GND  
Continuous Power Dissipation  
Junction Temperature (TJ-MAX  
Storage Temperature Range  
)
65°C to +150°C  
+300°C  
(4)  
Maximum Lead Temperature (Soldering, 10s)  
ESD Rating  
Human Body Model  
(5)  
2.0 kV  
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the  
device is intended to be functional, but device parameter specifications may not be verified. For verified specifications and test  
conditions, see the Electrical Characteristics table.  
(2) All voltages are with respect to the potential at the GND pin.  
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and  
specifications  
(4) For detailed soldering specifications and information, please refer to Application Note AN-1112: DSBGA Wafer Level Chip Scale  
Package (SNVA009).  
(5) The human body model is a 100 pF capacitor discharged through 1.5 kresistor into each pin. (MIL-STD-883 3015.7).  
(1)(2)  
OPERATING RATINGS  
VIN to GND  
2.7V to 5.5V  
0 to +40V  
VSW, VOVP, VILED1, VILED2, VILED3 to GND  
Junction Temperature Range (TJ)(3) (4)  
40°C to +125°C  
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the  
device is intended to be functional, but device parameter specifications may not be verified. For verified specifications and test  
conditions, see the Electrical Characteristics table.  
(2) All voltages are with respect to the potential at the GND pin.  
(3) Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=+140°C (typ.) and  
disengages at TJ=+125°C (typ.).  
(4) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may  
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP  
=
+125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the  
part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).  
THERMAL PROPERTIES  
Thermal Resistance Junction to Ambient (TJA  
(1)  
)
61.3°C/W  
(1) Junction-to-ambient thermal resistance (θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set  
forth in the JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm with a 2 x 1 array  
of thermal vias. The ground plane on the board is 50 mm x 50 mm. Thickness of copper layers are 36 µm/18 µm/18 µm/36 µm (1.5  
oz/1oz/1oz/1.5 oz). Ambient temperature in simulation is 22°C in still air. Power dissipation is 1W. The value of θJA of this product in the  
DSBGA package could fall in a range as wide as 60°C/W to 110°C/W (if not wider), depending on PCB material, layout, and  
environmental conditions. In applications where high maximum power dissipation exists special care must be paid to thermal dissipation  
issues.  
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SNVS653D JULY 2011REVISED JUNE 2013  
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(1)(2)  
ELECTRICAL CHARACTERISTICS  
Limits in standard type face are for TA = +25°C and those in boldface type apply over the full operating ambient temperature  
range (30°C TA +85°C). Unless otherwise specified VIN = 3.6V.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
2.7V VIN 5.5V, ControlX Full-Scale  
Current Register = 0xF3, Brightness  
Code = 0xFF  
Output Current Regulation Accuracy  
(ILED1, ILED2 or ILED3)  
ILED(1/2/3)  
18.68  
20.2  
21.8  
mA  
2.7V VIN 5.5V, IFULL_SCALE  
20.2mA, Brightness Code = 0xFF  
=
(3) (4)  
IMATCH  
VREG_CS  
VHR  
,
ILED2 to ILED3 Current Matching  
2  
0.3  
400  
200  
2
%
Regulated Current Sink Headroom  
Voltage  
mV  
mV  
Current Sink Minimum Headroom  
Voltage  
ILED = 95% of nominal, ILED = 20.2  
mA  
240  
RDSON  
ICL  
NMOS Switch On Resistance  
NMOS Switch Current Limit  
ISW = 100 mA  
0.25  
1000  
41  
2.7V VIN 5.5V  
ON Threshold, 2.7V VIN 5.5V  
Hysteresis  
880  
40  
1120  
42  
mA  
VOVP  
Output Over-Voltage Protection  
V
1
fSW  
Switching Frequency  
Maximum Duty Cycle  
Minimum Duty Cycle  
2.7V VIN 5.5V  
450  
500  
94  
550  
kHz  
%
DMAX  
DMIN  
10  
%
Quiescent Current into IN, Device  
Not Switching  
ILED1 = ILED2 = ILED3 = 20.2 mA,  
feedback disabled.  
IQ  
490  
µA  
ILED1 = ILED2 = ILED3 = 20.2 mA, VOUT  
= 32V  
IQ_SW  
ISHDN  
ILED_MIN  
Switching Supply Current  
Shutdown Current  
1.35  
1
mA  
µA  
2.7V VIN 5.5V, HWEN = GND  
2
Full-Scale Current =20.2 mA  
Brightness code = 0x01, Mapping =  
Exponential  
Minimum LED Current in ILED1,  
ILED2 or ILED3  
9.5  
µA  
°C  
Thermal Shutdown  
Hysteresis  
+140  
15  
TSD  
LOGIC INPUTS/OUTPUTS (PWM1, PWM2, HWEN, SCL, SDA, INT)  
VIL  
Input Logic Low  
2.7V VIN 5.5V  
0
0.4  
VIN  
0.4  
V
VIH  
VOL  
Input Logic High  
2.7V VIN 5.5V  
1.2  
Output Logic Low (SCL, INT)  
2.7V VIN 5.5V, ILOAD = 3mA  
V
PWM Input Internal Pulldown  
Resistance (PWM1, PWM2)  
RPWM  
100  
kΩ  
I2C-COMPATIBLE TIMING SPECIFICATIONS (SCL, SDA, )(5)  
t1  
t2  
t3  
SCL (Clock Period)  
2.5  
100  
0
µs  
ns  
ns  
Data In Setup Time to SCL High  
Data Out Stable After SCL Low  
SDA Low Setup Time to SCL Low  
(Start)  
100  
100  
ns  
ns  
4
t
SDA High Hold Time After SCL High  
(Stop)  
t5  
AMBIENT LIGHT SENSOR INPUTS (ALS1, ALS2)  
ALS1, ALS2 Resistor Select Register  
RALS1, RALS2  
ALS Pin Internal Pulldown Resistors = 0x0F,  
2.29  
2.44  
2.59  
kΩ  
2.7V VIN 5.5V  
(1) All voltages are with respect to the potential at the GND pin.  
(2) Min and Max limits are verified by design, test, or statistical analysis. Typical numbers are not verified, but do represent the most likely  
norm. Unless otherwise specified, conditions for typical specifications are: VIN = 3.6V and TA = +25°C.  
(3) All Current sinks for the matching spec are assigned to the same Control Bank.  
(4) LED current sink matching between ILED2 and ILED3 is given by taking the difference between either (ILED2 or ILED3) and the  
average current between the two, and dividing by the average current between the two (ILED2/3 – ILED(AVE))/ILED(AVE). This  
simplifies to (ILED2 – ILED3)/(ILED2 + ILED3). In this test, both ILED2 and ILED3 are assigned to Bank A.  
(5) SCL and SDA must be glitch-free in order for proper brightness control to be realized.  
4
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Product Folder Links: LM3532  
 
LM3532  
www.ti.com  
SNVS653D JULY 2011REVISED JUNE 2013  
ELECTRICAL CHARACTERISTICS (1)(2) (continued)  
Limits in standard type face are for TA = +25°C and those in boldface type apply over the full operating ambient temperature  
range (30°C TA +85°C). Unless otherwise specified VIN = 3.6V.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
Ambient Light Sensor Reference  
Voltage  
VALS_REF  
2.7V VIN 5.5V  
1.94  
2
2.06  
V
ALS Input Offset Voltage  
(Code 0 to 1 transition - VLSB  
VOS  
2.7V VIN 5.5V  
2.7V VIN 5.5V  
0.8  
2.5  
4.2  
mV  
)
tCONV  
LSB  
Conversion Time  
154  
µs  
ADC Resolution  
7.84  
mV  
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TYPICAL PERFORMANCE CHARACTERISTICS  
VIN = 3.6V, LEDs (VF = 3.2V@20 mA, TA = 25°C), COUT = 1µF, CIN = 2.2 µF, L = Coilcraft LPS4018 (10 µH or 22 µH), TA =  
+25°C unless otherwise specified.  
Efficiency vs VIN  
Single String, ILED = 20.2mA  
L = LPS4018-103ML (10µH)  
Efficiency vs VIN  
Single String, ILED = 20.2mA  
L = LPS4018-103ML (10µH)  
94  
92  
90  
88  
86  
84  
82  
80  
78  
76  
74  
72  
92  
90  
88  
86  
84  
82  
80  
78  
76  
74  
3 LEDs  
4 LEDs  
8 LEDs  
10 LEDs  
9 LEDs  
7 LEDs  
5 LEDs  
6 LEDs  
3.5  
2.5  
3.0  
4.0  
4.5  
5.0  
5.5  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
VIN (V)  
VIN (V)  
Figure 2.  
Figure 3.  
Efficiency vs VIN  
Dual String, ILED = 20.2mA per string  
L = LPS4018-103ML (10µH)  
Efficiency vs VIN  
Dual String, ILED = 20.2mA per string  
L = LPS4018-103ML (10µH)  
92  
93  
91  
90  
3 LEDs  
4 LEDs  
89  
87  
85  
83  
81  
79  
77  
75  
73  
71  
69  
67  
65  
88  
86  
84  
82  
10 LEDs  
8 LEDs  
9 LEDs  
7 LEDs  
6 LEDs  
80  
78  
5 LEDs  
76  
74  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
2.5  
3.0  
3.5  
4.0  
VIN (V)  
4.5  
5.0  
5.5  
VIN (V)  
Figure 4.  
Figure 5.  
Efficiency vs VIN  
Triple String, ILED = 20.2mA per string  
L = LPS4018-103ML (10µH)  
Efficiency vs VIN  
Triple String, ILED = 20.2mA per string  
L = LPS4018-103ML (10µH)  
92  
94  
3 LEDs  
90  
88  
86  
84  
82  
80  
78  
76  
74  
72  
92  
90  
4 LEDs  
88  
86  
84  
9 LEDs  
7 LEDs  
82  
10 LEDs  
80  
8 LEDs  
6 LEDs  
78  
5 LEDs  
76  
74  
72  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
VIN (V)  
VIN (V)  
Figure 6.  
Figure 7.  
6
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LM3532  
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SNVS653D JULY 2011REVISED JUNE 2013  
TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
VIN = 3.6V, LEDs (VF = 3.2V@20 mA, TA = 25°C), COUT = 1µF, CIN = 2.2 µF, L = Coilcraft LPS4018 (10 µH or 22 µH), TA =  
+25°C unless otherwise specified.  
Efficiency vs VIN  
Single String, ILED = 20.2mA per string  
L = LPS4018-223ML (22µH)  
Efficiency vs VIN  
Single String, ILED = 20.2mA per string  
L = LPS4018-223ML (22µH)  
92  
92  
90  
90  
3 LEDs  
4 LEDs  
88  
86  
84  
82  
88  
86  
84  
8 LEDs  
82  
9 LEDs  
7 LEDs  
6 LEDs  
10 LEDs  
80  
78  
76  
74  
5 LEDs  
80  
78  
76  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
VIN (V)  
VIN (V)  
Figure 8.  
Figure 9.  
Efficiency vs VIN  
Dual String, ILED = 20.2mA per string  
L = LPS4018-223ML (22µH)  
Efficiency vs VIN  
Dual String, ILED = 20.2mA per string  
L = LPS4018-223ML (22µH)  
94  
94  
92  
90  
88  
86  
84  
82  
80  
78  
76  
74  
72  
70  
68  
66  
4 LEDs  
92  
3 LEDs  
90  
88  
9 LEDs  
86  
8 LEDs  
84  
10 LEDs  
7 LEDs  
82  
6 LEDs  
80  
78  
76  
74  
72  
5 LEDs  
2.5  
3.0  
3.5  
4.0  
VIN (V)  
4.5  
5.0  
5.5  
2.5  
3.0  
3.5  
4.0  
VIN (V)  
4.5  
5.0  
5.5  
Figure 10.  
Figure 11.  
Efficiency vs VIN  
Triple String, ILED = 20.2mA per string  
L = LPS4018-223ML (22µH)  
Efficiency vs VIN  
Triple String, ILED = 20.2mA per string  
L = LPS4018-223ML (22µH)  
94  
94  
92  
92  
90  
88  
86  
84  
82  
80  
78  
76  
74  
72  
70  
4 LEDs  
3 LEDs  
90  
88  
86  
84  
9 LEDs  
7 LEDs  
10 LEDs  
8 LEDs  
82  
80  
78  
76  
74  
72  
5 LEDs  
6 LEDs  
2.3  
2.9  
3.6  
4.2  
4.9  
5.5  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
VIN (V)  
VIN (V)  
Figure 12.  
Figure 13.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
VIN = 3.6V, LEDs (VF = 3.2V@20 mA, TA = 25°C), COUT = 1µF, CIN = 2.2 µF, L = Coilcraft LPS4018 (10 µH or 22 µH), TA =  
+25°C unless otherwise specified.  
Efficiency vs ILED  
Efficiency vs ILED Triple String, VIN = 3.6V  
L = LPS4018-103ML (10µH)  
Triple String, VIN = 3.6V  
L = LPS4018-103ML (10µH)  
91  
90  
89  
88  
87  
86  
85  
84  
83  
82  
81  
80  
79  
91  
90  
89  
88  
87  
86  
85  
84  
83  
82  
81  
80  
79  
3 LEDs  
4 LEDs  
5 LEDs  
6 LEDs  
8 LEDs  
7 LEDs  
9 LEDs  
10 LEDs  
0
6 12 18 24 30 36 42 48 54 60 66 72 78 84 90  
ILED (mA)  
0
6 12 18 24 30 36 42 48 54 60 66 72 78 84 90  
ILED (mA)  
Figure 14.  
Figure 15.  
Efficiency vs ILED  
Triple String, VIN = 3.6V  
L = LPS4018-223ML (22µH)  
Efficiency vs ILED  
Triple String, VIN = 3.6V  
L = LPS4018-223ML (22µH)  
91  
91  
90  
89  
88  
87  
86  
85  
84  
83  
82  
81  
80  
79  
3 LEDs  
5 LEDs  
90  
89  
88  
87  
86  
85  
84  
83  
82  
81  
80  
79  
4 LEDs  
6 LEDs  
7 LEDs  
9 LEDs  
8 LEDs  
10 LEDs  
0
9
18 27 36 45 54 63 72 81 90  
ILED (mA)  
0
9
18 27 36 45 54 63 72 81 90  
ILED (mA)  
Figure 16.  
Figure 17.  
Shutdown Current vs VIN  
HWEN = GND  
Current Sink Matching vs VIN  
ILED2 to ILED3  
240.0  
220.0  
200.0  
1.6  
1.4  
1.2  
0.9  
0.7  
0.5  
-40°C  
180.0  
85C  
160.0  
140.0  
-40C  
25C  
120.0  
100.0  
80.0  
25°C  
85°C  
60.0  
40.0  
20.0  
0.0  
2.5  
3.1  
3.7  
4.3  
4.9  
5.5  
2.5  
3.1  
3.7  
4.3  
4.9  
5.5  
VIN (V)  
VIN (V)  
Figure 18.  
Figure 19.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
VIN = 3.6V, LEDs (VF = 3.2V@20 mA, TA = 25°C), COUT = 1µF, CIN = 2.2 µF, L = Coilcraft LPS4018 (10 µH or 22 µH), TA =  
+25°C unless otherwise specified.  
Current Sink Matching vs VIN  
ILED1 to ILED2 to ILED3  
ALS Resistance vs VIN  
RALS1, (2.44ksetting)  
(ΔILED is worst case difference between all three strings)  
500  
450  
400  
350  
300  
250  
200  
150  
100  
50  
TA = -40°C  
TA = +85°C  
2.450k  
2.448k  
2.446k  
2.444k  
2.442k  
2.440k  
2.438k  
2.436k  
85°C  
25°C  
TA = +25°C  
-40°C  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
2.5  
3.1  
3.7  
4.3  
4.9  
5.5  
VIN (V)  
VIN (V)  
Figure 20.  
Figure 21.  
ALS Resistor Matching vs VIN  
Integral Non Linearity vs Code  
(Endpoint Method)  
(2.44ksetting)  
10.000  
8.000  
1.00  
0.75  
0.50  
0.25  
0.00  
-0.25  
-0.50  
-0.75  
-1.00  
6.000  
4.000  
85°C  
25°C  
2.000  
0.000  
-2.000  
-4.000  
-6.000  
-8.000  
-10.000  
-40°C  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
0
32 64 96 128 160 192 224 256  
Code (D)  
VIN (V)  
Figure 22.  
Figure 23.  
Differential Non Linearity vs Code  
Peak to Peak LED Current Ripple vs fPWM  
1.00  
0.90  
0.80  
0.70  
0.60  
0.50  
0.40  
0.30  
0.20  
0.10  
0.00  
-0.10  
22.0  
20.0  
18.0  
16.0  
14.0  
12.0  
10.0  
8.0  
6.0  
4.0  
2.0  
0.0  
0.01  
0
32 64 96 128 160 192 224 256  
Code (D)  
0.1  
1
10  
100  
fPWM (kHz)  
Figure 24.  
Figure 25.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
VIN = 3.6V, LEDs (VF = 3.2V@20 mA, TA = 25°C), COUT = 1µF, CIN = 2.2 µF, L = Coilcraft LPS4018 (10 µH or 22 µH), TA =  
+25°C unless otherwise specified.  
LED Current vs Headroom Voltage  
31  
30  
29  
-40°C  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
25°C  
85°C  
0.10 0.15 0.20 0.25 0.30 0.35 0.40  
VHR (V)  
Figure 26.  
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OPERATIONAL DESCRIPTION  
40V Boost Converter  
The LM3532 contains a 40V maximum output voltage, asynchronous boost converter with an integrated 250 mΩ  
switch and three low-side current sinks. Each low-side current sink is independently programmable from 0 to 30  
mA.  
Hardware Enable Input  
HWEN is the LM3532's global hardware enable input. This pin must be driven high to enable the device. HWEN  
is a high-impedance input so cannot be left floating. Typically HWEN would be connected through a pullup  
resistor to the logic supply voltage or driven high from a micro controller. Driving HWEN low will place the  
LM3532 into a low-current shutdown state and force all the internal registers to their power on reset (POR)  
states.  
Feedback Enable  
Each current sink can be set for feedback enable or feedback disable. When feedback is enabled, the boost  
converter maintains at least 400 mV across each active current sink. This causes the boost output voltage  
(VOUT) to raise up or down depending on how many LEDs are placed in series in the highest voltage string.  
This ensures there is a minimum headroom voltage across each current sink. The potential drawback is that for  
large differentials in LED counts between strings, the LED voltage can be drastically different causing the excess  
voltage in the lower LED string to be dropped across its current sink. In situations where there are other voltage  
sources available, or where the LED count is low enough to use VIN as the power source, the feedback can be  
disabled on the specific current sink. This allows for the current sink to be active, but eliminates its control over  
the boost output voltage (see Figure 27). In this situation care must be taken to ensure there is always at least  
400 mV of headroom voltage across each active current sink to avoid the current from going out of regulation.  
Control over the feedback enable/disable is programmable via the Feedback Enable Register (see Table 13).  
V
IN  
SW  
C
OUT  
OVP  
Error Amplifier  
400 mV  
IN  
+
-
Boost  
Controller  
C
250 mW  
IN  
ILED1  
ILED2  
ILED3  
V
HR  
Min  
Feedback  
Enable  
GND  
Figure 27. LM3532 Feedback Enable/Disable  
LM3532 Current Sink Configuration  
Control of the LM3532’s three current sinks is done by configuring the three internal control banks (Control A,  
Control B, and Control C) (see Figure 28). Any of the current sinks (ILED1, ILED2, or ILED3) can be mapped to  
any of the three control banks. Configuration of the control banks is done via the Output Configuration register.  
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Environmental  
Stimulus  
Controls  
(Masters: Output configuration)  
(Ramp rates, brightness management)  
(ALS processor select, enable)  
Outputs  
(Slaves)  
ALS  
Processor  
ALS1  
ALS2  
ALSP_1  
Bank_A  
Bank_B  
Bank_C  
ILED1  
ILED2  
ILED3  
PWM  
Filters  
CABC1  
PWM_0  
PWM_1  
CABC2  
Figure 28. LM3532 Functional Control Diagram  
PWM Inputs  
The LM3532 provides two PWM inputs (PWM1 and PWM2) which can be mapped to any of the three Control  
Banks. PWM input mapping is done through the Control A PWM Configuration register, the Control B PWM  
Configuration register, and the Control C PWM Configuration register.  
Both PWM inputs (PWM1 and PWM2) feed into internal level shifters and lowpass filters. This allows the PWM  
inputs to accept logic level signals and convert them to analog control signals which can control the assigned  
Control Banks LED current. The internal lowpass filter at each PWM input has a typical corner frequency of 540  
Hz with a Q of 0.5. This gives a low end useful PWM frequency of around 2kHz. Frequencies lower then this will  
cause the LED current to show larger ripple and result in non-linear behavior vs. duty cycle due to the response  
time of the boost circuit. The upper boundary of the PWM frequency is greater than 100 kHz. Frequencies above  
200 kHz will begin to show non linear behavior due to propagation delays through the PWM input circuitry.  
Full-Scale LED Current  
There are 32 programmable full-scale current settings for each of the three control banks (Control A, Control B,  
and Control C). Each control bank has its own independent full-scale current setting (ILED_FULL_SCALE). Full-scale  
current for the respective Control Bank is set via the Control A Full-Scale Current Register, the Control B Full-  
Scale Current Register, and the Control C Full-Scale Current Register (see Table 12).  
LED Current Ramping  
The LM3532 provides 4 methods to control the rate of rise or fall of the LED current during these events:  
1. Startup from 0 to the initial target  
2. Shutdown  
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3. Ramp up from one brightness level to the next  
4. Ramp down from one brightness level to the next  
See Table 4 and Table 5.  
Startup and Shutdown Current Ramping  
The startup and shutdown ramp rates are independently programmable in the startup/Shutdown Ramp Rate  
Register (see Table 4). There are 8 different startup and 8 different shutdown ramp rates. The startup ramp rates  
are independently programmable from the shutdown ramp rates, but not independently programmable for each  
Control Bank. For example, programming a startup or shutdown ramp rate, programs the same ramp rate for  
each Control Bank.  
Run Time Ramp Rates  
Current ramping from one brightness level to the next is programmed via the Run Time Ramp Rate Register (see  
Table 5). There are 8 different ramp-up and 8 different ramp-down rates. The ramp-up rate is independently  
programmable from the ramp-down rate, but not independently programmable for each Control Bank. For  
example, programming a ramp-up or a ramp-down rate programs the same rate for each Control Bank.  
LED Current Mapping Modes  
All LED current brightness codes are 8 bits (256 different levels), where each bit represents a percentage of the  
programmed full-scale current setting for that particular Control Bank. The percentage of the full-scale current is  
different depending on which mapping mode is selected. The mapping mode can be either exponential or linear.  
Mapping mode is selected via bit [1] of the Control A, B, or C Brightness Configuration Registers.  
Exponential Current Mapping Mode  
In exponential mapping mode, the backlight code to LED current approximates the following equation:  
1
’ÿ  
+
»
Code  
ILED = ILED_ FULLSCALE x 0.8540-  
x DPWM  
«
÷
Ÿ
6.4  
(1)  
where Code is the 8-bit code in the programmed brightness register and DPWM is the duty cycle of the PWM input  
that is assigned to the particular control bank. For the exponential mapped mode (Figure 29) shows the typical  
response of % full-scale current setting vs 8-bit brightness code.  
100  
10  
1
0.1  
0
16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 256  
BRIGHTNESS CODE (D)  
Figure 29. Exponential Mapping Response  
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Linear Current Mapping  
In linear mapping mode the backlight code to LED current approximates the following equation:  
1
255  
ILED = ILED_FULLSCALE  
x
x Code x DPWM  
(2)  
where Code is the 8-bit code in the programmed brightness register and DPWM is the duty cycle of the PWM  
input that is assigned to the particular control bank. For the linear mapped mode (Figure 30) shows the typical  
response of % full-scale current setting vs 8-bit brightness code.  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
0
16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 256  
BRIGHTNESS CODE (D)  
Figure 30. Linear Mapping Response  
LED Current Control  
Once the Full-Scale Current is set, control of the LM3532’s LED current can be done via 2 methods:  
1. I2C Current Control  
2. Ambient Light Sensor Current Control  
I2C current control allows for the direct control of the LED current by writing directly to the specific brightness  
register. In ambient light sensor current control the LED current is automatically set by the ambient light sensor  
interface.  
I2C Current Control  
I2C Current Control is accomplished by using one of the Zone Target Registers (for the respective Control Bank)  
as the brightness register. This is done via bits[4:2] of the Control (A, B, or C) Brightness Registers (see Table 9,  
Table 10, and Table 11). For example, programming bits[4:2] of the Control A Brightness Register with (000)  
makes the brightness register for Bank A (in I2C Current Control) the Control A Zone Target 0 Register.  
I2C Current Control with PWM  
I2C Current Control can also incorporate the PWM duty cycle at one of the PWM inputs (PWM1 or PWM2). In  
this situation the LED current is then a function of both the code in the programmed brightness register and the  
duty cycle input into the assigned PWM inputs (PWM1 or PWM2).  
Assigning and Enabling a PWM Input  
To make the backlight current a function of the PWM input duty cycle, one of the PWM inputs must first be  
assigned to a particular Control Bank. This is done via bit [0] of the Control A, B, or C PWM Registers (see  
Table 6, Table 7, or Table 8). After assigning a PWM input to a Control Bank, the PWM input is then enabled via  
bits [6:2] of the Control A/B/C PWM Enable Registers. Each enable bit is associated with a specific Zone Target  
Register in I2C Current Control. For example, if Control A Zone Target 0 Register is configured as the brightness  
register, then to enable PWM for that brightness register, Control A PWM bit [2] would be set to 1.  
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Enabling a Current Sink  
Once the brightness register and PWM inputs are configured in I2C Current Control, the current sinks assigned to  
the specific control bank are enabled via the Control Enable Register (see Table 14). Table 1 below shows the  
possible configurations for Control Bank A in I2C Current Control. This table would also apply to Control Bank B  
and Control Bank C.  
Table 1. I2C Current Control + PWM Bit Settings (For Control Bank A)  
Current Sink  
Assignment  
Brightness Register  
PWM Select  
PWM Enable  
Current Sink Enable  
Output Configuration  
Register  
Control A Brightness  
Configuration Register Register Bit[0]  
Control A PWM  
Control A PWM Register  
Bit[2] is PWM enable when Control Register Bit [0]  
Control Enable  
Bits[1:0] = 00, assigns  
Bits [4:2]  
0 selects PWM1  
1 selects PWM2  
A Zone Target 0 is configured as  
the brightness register  
Bit[3] is PWM enable when Control  
A Zone Target 1 is configured as  
the brightness register  
0 = Bank A Disabled  
1 = Bank A Enabled  
ILED1 to Control Bank A 000 selects Control A  
Bits[3:2] = 00 assigns Zone Target 0 as  
ILED2 to Control Bank A brightness register  
Bits[5:4] = 00, assigns 001 selects Control A  
ILED3 to Control Bank A Zone Target 1  
brightness register  
010 selects Control A  
Zone Target 2  
Bit[4] is PWM enable when Control  
A Zone Target 2 is configured as  
the brightness register  
Bit[5] is PWM enable when Control  
A Zone Target 3 is configured as  
the brightness register  
Bit[6] is PWM enable when Control  
A Zone Target 4 is configured as  
the brightness register  
brightness register  
011 selects Control A  
Zone Target 3  
brightness register  
1XX selects Control A  
Zone Target 4  
brightness register  
Ambient Light Sensor Current Control  
In Ambient Light Sensor (ALS) Current Control the LM3532’s backlight current is automatically set based upon  
the voltage at the ambient light sensor inputs (ALS1 and/or ALS2). These inputs are designed to connect to the  
outputs of analog ambient light sensors. Each ALS input has an active input voltage range of 0 to 2V.  
ALS Light Sensor Resistors  
The LM3532 offers 32 separate programmable internal resistors at the ALS1 and ALS2 inputs. These resistors  
take the ambient light sensor's output current and convert it into a voltage. The value of the resistor selected is  
typically chosen such that the ambient light sensors output voltage swing goes from 0 to 2V across the intended  
measured ambient light (LUX) range. The ALS resistor values are programmed via the ALS1 and ALS2 Resistor  
select registers (see Table 15). The code to resistor selection (assuming a 2V full-scale voltage range) is shown  
in the following equation:  
2V  
ì Code  
RALS_  
=
54 mA  
(3)  
Each higher code in the specific ALS Resistor Select Register increases the allowed ALS sensor current by 54  
µA ( for a 2V full-scale). When the ALS is disabled (ALS Configuration Register bit [3] = 0) the ALS inputs are set  
to a high impedance mode no matter what the ALS resistor selection is. Alternatively, ALS Resistor Select  
Register Code 00000 will set the specific ALS input to high impedance.  
Ambient Light Zone Boundaries  
The LM3532 provides 5 ambient light brightness zones which are defined by 4 Zone Boundary Registers. The  
LM3532 has one set of zone boundary registers that is shared globally by all Control Banks. As the voltage at  
the ALS input changes in response to the ambient light sensors received light, the ALS voltage transitions  
through the 5 defined brightness zones. Each brightness zone can be assigned a brightness target via the 5  
Zone Target registers. Each Control Bank has its own set of Zone Target registers. Therefore, in response to  
changes in a Brightness Zone at the ALS input, the LED current can transition to a new brightness level. This  
allows for backlit LCD displays to reduce the LED Current when the ambient light is dim or increase the LED  
current when the ambient light increases. Each Zone Boundary register is 8 bits with a full-scale voltage of 2V.  
This gives a 2V/255 = 7.8 mV per bit. Figure 31 describes the ambient light to brightness mapping.  
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Full  
Scale  
V
= 2V  
Zone  
ALS_REF  
Zone 4  
Boundary 3_  
Zone 3  
Zone  
Boundary 2_  
Zone  
Boundary 1_  
Zone 2  
Zone  
Boundary 0_  
Zone 1  
Zone 0  
Zone  
Target 0 Target 1  
Zone  
Zone  
Target 2  
Zone  
Target 4  
Zone  
Target 3  
Ambient Light (lux)  
LED Driver Input Code (0x00 - 0xFF)  
Figure 31. Ambient Light Input to Backlight Mapping  
Ambient Light Zone Hysteresis  
For each Zone Boundary there are two Zone Boundary Registers: a Zone Boundary High Register and a Zone  
Boundary Low Register. The difference between the Zone Boundary High and Zone Boundary Low Register set  
points (for a specific zone) creates the hysteresis that is required to transition between two adjacent zones. This  
hysteresis prevents the backlight current from oscillating between zones when the ALS voltage is close to a Zone  
Boundary Threshold. Figure 32 describes this Zone Boundary Hysteresis. The arrows indicate the direction of the  
ALS input voltage. The black dots indicate the threshold used when transitioning to a new zone.  
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Zone 4  
Zone 3  
Zone 2  
Zone 4  
Zone Boundary 3 High  
Zone Boundary 3 Low  
Zone 3  
Zone 3  
Zone Boundary 2 High  
Zone Boundary 2 Low  
Zone 2  
Zone 2  
Zone 2  
Zone Boundary 1 High  
Zone Boundary 1 Low  
Zone 1  
Zone 1  
Zone 1  
Zone Boundary 0 High  
Zone Boundary 0 Low  
Zone 0  
Figure 32. ALS Zone Boundaries + Hysteresis  
PWM Enabled for a Particular Zone  
The active PWM input for a specified Control Bank can be enabled/disabled for each ALS Brightness Zone. This  
is done via bits[6:2] of the corresponding Control A, B, or C PWM Registers (see Table 6, Table 7, and Table 8).  
For example, assuming Control Bank A is being used, then to make the PWM input active in Zones 0, 2, and 4,  
but not active in Zones 1, and 3, bits[6:2] of the Control A PWM Register would be set to (1, 0, 1, 0, 1).  
ALS Operation  
Figure 33 shows a functional block diagram of the LM3532's ambient light sensor interface.  
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Read Back UP  
Only Register  
ADC Average  
Register  
ADC Register  
Up Only Control  
(Up Delay = 3 x t  
)
Read Back  
Brightness Zone  
Register  
AVE  
Read Back  
Ambient Light  
Zone Register  
ALS1  
Direct ALS Control  
(Up and Down Delay  
Averager  
Output  
ADC  
(7.142ksps)  
ALS Brightness  
Control Target  
Averager  
= 3 x t  
AVE  
)
ALS2  
Down Delay Control  
(Down Delay =  
ALS Input Select  
(ALS Configuration  
Register Bits[7:6])  
ALS Average Time  
(ALS Configuration  
Register Bits [2:0])  
4 x t  
to 35 x t  
)
AVE  
AVE  
ALS Configuration  
Register Bits [5:4]  
Up Delay = 3 x t  
AVE  
Figure 33. ALS Functional Block Diagram  
ALS Input Select and ALS ADC Input  
The internal 8-bit ADC digitizes the active ambient light sensor inputs (ALS1 or ALS2). The active ALS input is  
determined by the bit settings of the ALS input select bits, bits [7:6] in the ALS Configuration register. The active  
ALS input can be the average of ALS1 and ALS2, the maximum of ALS1 and ALS2, ALS1 only, or ALS2 only.  
Once the ALS input select stage selects the active ALS input, the result is sent to the internal 8-bit ADC. For  
example, if the active ALS input select is set to be the average of ALS1 and ALS2, then the voltage at ALS1 and  
ALS2 is first averaged, then applied to the ADC. The output of the ADC (ADC Register) will be the digitized  
average value of ALS1 and ALS2.  
The LM3532's internal ADC samples at 7.143 ksps. ADC timing is shown in Figure 34. When the ALS is Enabled  
(ALS Configuration Register bit [3] = 1) the ADC begins sampling and converting the active ALS input. Each  
conversion takes 140 µs. After each conversion the ADC register is updated with new data.  
t
AVERAGE  
(set via bits [2:0] of the ALS  
Configuration Register)  
t
= 140 ms  
CONV  
Con-  
Con-  
Con-  
Con-  
Con-  
version version version  
version version  
I2C Write  
ALS Enabled  
1
2
3
n
n + 1  
V
ALS  
(active input is sampled)  
ADC Register  
(Read Only, Updated every t  
Sample Sample Sample  
Sample  
n
1
2
3
)
CONV  
Average Period #2  
Average Period #1  
0x00  
ADC Average Register  
(Read Only, Updated every t  
Sample 1 + Sample 2 + Sample 3 + … Sample n  
=
)
n
AVERAGE  
Figure 34. ADC Timing  
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ALS ADC Readback  
The digitized value of the LM3532's ADC is read back from the ADC Readback Register. Once the ALS is  
enabled the ADC begins converting the active ALS input and updating the ALS Readback Register every 140 µs.  
The ADC Readback register contains the updated data after each conversion.  
ALS Averaging  
ALS averaging is used to filter out any fast changes in the ambient light sensor inputs. This prevents the  
backlight current from constantly changing due to rapid fluctuations in the ambient light. There are 8 separate  
averaging periods available for the ALS inputs (see Table 17). During an average period the ADC continually  
samples at 7.143 ksps. Therefore, during an average period, the ALS Averager output will be the average of  
7143/tAVE  
.
ALS ADC Average Readback  
The output of the LM3532's averager is read back via the Average ADC Register. This data is the ADC register  
data, averaged over the programmed ALS average time.  
Initializing the ALS  
On initial startup of the ALS Block, the Ambient Light Zone will default to Zone 0. This allows the ALS to start off  
in a predictable state. The drawback is that Zone 0 is often not representative of the true ALS Brightness Zone  
since the ALS inputs can get to their ambient light representative voltage much faster then the backlight is  
allowed to change. In order to avoid a multiple average time wait for the backlight current to get to its correct  
state, the LM3532 switches over to a fast average period (1.1 ms) on ALS startup. This will quickly bring the ALS  
Brightness Zone (and the backlight current) to its correct setting (see Figure 35).  
ALS Start-Up Fast  
Normal ALS  
Average Period  
Average Period  
(1.1 ms)  
ALS Enable  
I2C  
V
ALS_Y  
V
ALS_X  
Zone 0 Zone 0 Zone 0  
Zone 0  
Zone Y  
Zone X  
Zone X  
Zone X  
ALS Zone  
Zone Target y  
Zone Target x  
Run Time  
Ramp Rate  
I
LED_  
Start-Up  
Ramp Rate  
Figure 35. ALS Startup Sequence  
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ALS Operation  
The LM3532's Ambient Light Sensor Interface has 3 different algorithms that can be used to control the ambient  
light to backlight current response.  
ALS Algorithms  
1. Direct ALS Control  
2. Down Delay  
For each algorithm, the ALS follows these basic rules:  
ALS Rules  
1. For the ALS Interface to force a change in the backlight current (to a higher zone target), the averager output  
must have shown an increase for 3 consecutive average periods, or an increase and a remain at the new  
zone for 3 consecutive average periods.  
2. For the ALS Interface to force a change in the backlight current (to a lower zone target), the averager output  
must have shown a decrease for 3 consecutive average periods, or a decrease and remain at the new zone  
for 3 consecutive average periods.  
3. If condition #1 or #2 is satisfied, and during the next average period, the averager output changes again in  
the same direction as the last change, the LED current will immediately change at the beginning of the next  
average period.  
4. If condition #1 or #2 is satisfied and the next average period shows no change in the average zone, or shows  
a change in the opposite direction, then the criteria in step #1 or #2 must be satisfied again before the ALS  
interface can force a change in the backlight current.  
5. The Averager Output (see Figure 33) contains the zone that is determined from the most recent full average  
period.  
6. The ALS Interface only forces a change in the backlight current at the beginning of an average period.  
7. When the ALS forces a change in the backlight current the change will be to the brightness target pointed to  
by the zone in the Averager Output.  
Direct ALS Control  
In direct ALS control the LM3532’s ALS Interface can force the backlight current to either a higher zone target or  
a lower zone target using the rules described in the ALS Rules Section.  
In the example of Figure 36 the plot shows the ALS voltage, the current average zone which is the zone  
determined by averaging the ALS voltage in the current average period, the Averager Output which is the zone  
determined from the previous full average period, and the target backlight current that is controlled by the ALS  
Interface. The following steps detail the Direct ALS algorithm:  
1. When the ALS is enabled the ALS fast startup (1.1ms average period) quickly brings the Averager Output to  
the correct zone. This takes 3 fast average periods or approximately 3.3ms.  
2. The 1st average period the ALS voltage averages to Zone 4.  
3. The 2nd average period the ALS voltage averages to Zone 3.  
4. The 3rd average period the ALS voltage averages to Zone 3 and the Averager Output shows a change from  
Zone 4 to Zone 3.  
5. The 4th average period the ALS voltage averages to Zone 2 and the Averager Output remains at its changed  
state of Zone 3.  
6. The 5th average period the ALS voltage averages to Zone 1. The Averager Output shows a change from  
Zone 3 to Zone 2. Since this is the 3rd average period that the Averager Output has shown a change in the  
decreasing direction from the initial Zone 4, the backlight current is forced to change to the current Averager  
Output (Zone 2's) target current.  
7. The 6th average period the ALS voltage averages to Zone 2. The Averager Output changes from Zone 2 to  
Zone 1. Since this is in the same direction as the previous change, the backlight current is forced to change  
to the current Averager Output (Zone 1's) target current.  
8. The 7th average period the ALS voltage averages to Zone 3. The Averager Output changes from Zone 1 to  
Zone 2. Since this change is in the opposite direction from the previous change, the backlight current  
remains at Zone 1's target.  
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9. The 8th average period the ALS voltage averages to Zone 3. The Averager Output changes from Zone 2 to  
Zone 3.  
10. The 9th average period the ALS voltage averages to Zone 3. The Averager Output remains at Zone 3. Since  
this is the 3rd average period that the Averager Output has shown a change in the increasing direction from  
the initial Zone 1, the backlight current is forced to change to the current Averager Output (Zone 3's) target  
current.  
11. The 10th average period the ALS voltage averages to Zone 4. The Averager Output remains at Zone 3.  
12. The 11th average period the ALS voltage averages to Zone 4. The Averager Output changes to Zone 4.  
13. The 12th average period the ALS voltage averages to Zone 4. The Averager Output remains at Zone 4.  
14. The 13th average period the ALS voltage averages to Zone 4. The Averager Output remains at Zone 4.  
Since this is the 3rd average period that the Averager Output has shown a change in the increasing direction  
from the initial Zone 3, the backlight current is forced to change to the current Averager Output (Zone 4's)  
target current.  
Enable ALS  
Average  
Period #  
1
2
3
4
5
6
7
8
9
12  
13  
10  
11  
2V  
Zone 4  
Zone 3  
Zone 2  
Zone 1  
Zone 0  
VALS_  
4
4
3
3
2
1
2
3
3
3
4
4
4
4
4
4
Current Average Zone  
Averager Ouput  
0
4
4
3
3
2
1
2
3
3
3
4
*Note:it takes a full  
average period to  
generate an averager  
output value  
Zone 4 Brightness Target  
Zone 4 Brightness Target  
LED Current Run Time  
Ramp Down  
Zone 3 Brightness Target  
ILED  
LED Current Run  
Time Ramp Up  
Zone 2 Brightness Target  
Zone 1 Brightness Target  
ALS Fast Start-Up  
Figure 36. Direct ALS Control  
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Down Delay  
The Down-Delay algorithm uses all the same rules from the ALS Rules section, except it provides for adding  
additional average period delays required for decreasing transitions of the Averager Output, before the LED  
current is programmed to a lower zone target current. The additional average period delays are programmed via  
the ALS Down Delay register. The register provides 32 settings for increasing the down delay from 3 extra (code  
00000) up to 34 extra (code 11111). For example, if the down delay algorithm is enabled, and the ALS Down  
Delay register were programmed with 0x00 (3 extra delays), then the Averager Output would need to see 6  
consecutive changes in decreasing Zones (or 6 consecutive average periods that changed and remained lower),  
before the backlight current was programmed to the lower zones target current. Referring to Figure 37, assume  
that Down Delay is enabled and the ALS Down Delay register is programmed with 0x02 (5 extra delays, 8  
average period total delay for downward changes in the backlight target current):  
1. When the ALS is enabled the ALS fast startup (1.1 ms average period) quickly brings the Averager Output to  
the correct zone. This takes 3 fast average periods or approximately 3.3 ms.  
2. The first average period the ALS averages to Zone 3.  
3. The second average period the ALS averages to Zone 2. The Averager Output remains at Zone 3.  
4. The 3rd through 7th average period the ALS input averages to Zone 2, and the Averager Output stays at  
Zone 2.  
5. The 8th average period the ALS input averages to Zone 4. The Averager Output remains at Zone 2.  
6. The 9th and 10th average periods the ALS input averages to Zone 4. The Averager Output is at Zone 4.  
Since the Averager Output increased from Zone 2 to Zone 4 and the required Down Delay time was not met  
(8 average periods), the backlight current was never changed to the Zone 2's target current.  
7. The 11th average period the ALS input averages to Zone 2. The Averager Output remains at Zone 4. Since  
this is the 3rd consecutive average period where the Averager Output has shown a change since the change  
from Zone 2, the backlight current transitions to Zone 4's target current.  
8. The 12th through 26th average periods the ALS input averages to Zone 2. The Averager Output remains at  
Zone 2. At the start of average period #20 the Down Delay algorithm has shown the required 8 average  
period delay from the initial change from Zone 4 to Zone 2. As a result the backlight current is programmed  
to Zone 2's target current.  
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Enable ALS  
Average  
Period #  
1
2
3
4
5
6
7
8
9
12  
13 14  
15 16 17  
18 19 20  
21  
22  
25  
26  
10 11  
23 24  
2V  
Zone 4  
Zone 3  
Zone 2  
Zone 1  
Zone 0  
VALS_  
Current Average  
Zone  
0
3
2
2
2
2
2
2
2
2
2
4
4
4
2
4
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Averager Ouput  
4
2
2
2
2
2
0
3
3
2
2
2
4
2
2
2
2
2
*Note:it takes a  
full average  
period to  
generate an  
averager  
output value  
Zone 4 Brightness Target  
Zone 3 Brightness Target  
ILED  
Zone 2 Brightness Target  
ALS Fast  
Start-Up  
Figure 37. ALS Down-Delay Control  
Interrupt Output  
INT is an open drain output that pulls low when the ALS is enabled and when one of the ALS inputs transitions  
into a new zone. At the same time, the ALS Zone Information register is updated with the current ALS zone, and  
the software flag (bit 3 of the ALS Zone Information register) is written high. A readback of the Zone Information  
Register will clear the software interrupt flag and reset the INT output to the open drain state. The active  
pulldown at INT is typically 125.  
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Protection Features  
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Overvoltage Protection  
The LM3532’s boost converter provides open-load protection, by monitoring the OVP pin. The OVP pin is  
designed to connect as close as possible to the positive terminal of the output capacitor. In the event of a  
disconnected load (LED current string with feedback enabled), the output voltage will rise in order to try and  
maintain the correct headroom across the feedback enabled current sinks (see Table 13). Once VOUT climbs to  
the OVP threshold (VOVP) the boost converter is turned off, and switching will stop until VOUT falls below the  
OVP hysteresis (VOVP – 1V). Once the OVP hysteresis is crossed the LM3532’s boost converter begins switching  
again. In open load conditions this would result in a pulsed on/off operation.  
Current Limit  
The LM3532’s peak current limit in the NFET is set at typically 1A (880 mA min.). During the positive portion of  
the switching cycle, if the NFET's current rises up to the current limit threshold, the NFET turns off for the rest of  
the switching cycle. At the start of the next switching cycle the NFET turns on again. For loads that cause the  
LM3532 to hit current limit each switching cycle, the output power can become clamped since the headroom  
across the feedback enabled current sinks is no longer being regulated when the device is in current limit. See  
Maximum Output Power below for guidelines on how peak current affects the LM3532's maximum output power.  
Maximum Output Power  
The LM3532's maximum output power is governed by two factors: the peak current limit (ICL = 880 mA min.), and  
the maximum output voltage (VOVP = 40V min.). When the application causes either of these limits to be reached  
it is possible that the proper current regulation and matching between LED current strings will not be met.  
Peak Current Limited  
In the case of a peak current limited situation, when the peak of the inductor current hits the LM3532's current  
limit the NFET switch turns off for the remainder of the switching period. If this happens, each switching cycle the  
LM3532 begins to regulate the peak of the inductor current instead of the headroom across the current sinks.  
This can result in the dropout of the feedback-enabled current sinks and the current dropping below its  
programmed level.  
The peak current in a boost converter is dependent on the value of the inductor, total LED current (IOUT), the  
output voltage (VOUT) (which is the highest voltage LED string + 0.4V regulated headroom voltage), the input  
voltage VIN, and the efficiency (Output Power/Input Power). Additionally, the peak current is different depending  
on whether the inductor current is continuous during the entire switching period (CCM) or discontinuous (DCM)  
where it goes to 0 before the switching period ends.  
For Continuous Conduction Mode the peak inductor current is given by:  
efficiency  
VIN x  
IOUT x VOUT  
VIN  
x 1 -  
+
IPEAK =  
VIN x efficiency  
2 x fsw x L  
VOUT  
(4)  
For Discontinuous Conduction Mode the peak inductor current is given by:  
2 x  
IOUT  
x
VOUT - VIN x efficiency  
IPEAK =  
fsw x L x  
efficiency  
(5)  
To determine which mode the circuit is operating in (CCM or DCM) it is necessary to perform a calculation to test  
whether the inductor current ripple is less than the anticipated input current (IIN). If ΔIL is < then IIN then the  
device will be operating in CCM. If ΔIL is > IIN then the device is operating in DCM.  
efficiency  
VIN x  
IOUT x VOUT  
VIN  
1 -  
x
>
VIN x efficiency fsw x L  
VOUT  
(6)  
Typically at currents high enough to reach the LM3532's peak current limit, the device will be operating in CCM.  
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The following figures show the output current and voltage derating for a 10 µH and a 22 µH inductor. These plots  
take Equation 4 and Equation 5 from above and plot VOUT and IOUT with varying VIN, a constant peak current  
of 880 mA (ICL min), and a constant efficiency of 85%. Using these curves can give a good design guideline on  
selecting the correct inductor for a given output power requirement. A 10 µH will typically be a smaller device  
with lower on resistance, but the peak currents will be higher. A 22 µH provides for lower peak currents, but to  
match the DC resistance of a 10 µH requires a larger sized device.  
0.1  
0.095  
0.09  
44  
42  
40  
38  
36  
34  
32  
30  
28  
26  
24  
22  
20  
0.085  
0.08  
0.075  
0.07  
0.065  
0.06  
0.055  
0.05  
VOUT = 22V  
VOUT = 24V  
VOUT = 26V  
VOUT = 30V  
VOUT = 34V  
VOUT = 38V  
IOUT = 45 mA  
IOUT = 50 mA  
IOUT = 60 mA  
IOUT = 70 mA  
IOUT = 80 mA  
0.045  
0.04  
2.5 2.8 3.1 3.4 3.7  
4
4.3 4.6 4.9 5.2 5.5  
2.5 2.8 3.1 3.4 3.7  
4
4.3 4.6 4.9 5.2 5.5  
VIN (V)  
VIN (V)  
Figure 38. Maximum Output Power (22 µH)  
Figure 39. Maximum Output Power (22 µH)  
44  
42  
40  
38  
36  
34  
32  
30  
28  
26  
0.1  
VOUT = 22V  
VOUT = 24V  
VOUT = 26V  
VOUT = 30V  
VOUT = 34V  
VOUT = 38V  
0.095  
0.09  
0.085  
0.08  
0.075  
0.07  
0.065  
0.06  
0.055  
0.05  
24  
IOUT = 40 mA  
IOUT = 50 mA  
22  
0.045  
0.04  
IOUT = 60 mA  
IOUT = 70 mA  
20  
IOUT = 80 mA  
IOUT = 45 mA  
18  
0.035  
16  
0.03  
2.5 2.8 3.1 3.4 3.7  
4
4.3 4.6 4.9 5.2 5.5  
2.5 2.75  
3
3.25 3.5 3.75  
4 4.25 4.5 4.75 5 5.25 5.5  
VIN (V)  
VIN (V)  
Figure 40. Maximum Output Power (10 µH)  
Figure 41. Maximum Output Power (10 µH)  
Output Voltage Limited  
When the LM3532's output voltage (highest voltage LED string + 400 mV headroom voltage) reaches 40V, the  
OVP threshold is hit, and the NFET turns off and remains off until the output voltage drops 1V below the OVP  
threshold. Once VOUT falls below this hysteresis, the boost converter will turn on again. In high output voltage  
situations the LM3532 will begin to regulate the output voltage to the VOVP level instead of the current sink  
headroom voltage. This can result in a loss of headroom voltage across the feedback enabled current sinks  
resulting in the LED current dropping below its programmed level.  
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I2C-Compatible Interface  
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START AND STOP Conditions  
The LM3532 is controlled via an I2C-compatible interface. START and STOP conditions classify the beginning  
and the end of the I2C session. A START condition is defined as SDA transitioning from HIGH-to-LOW while SCL  
is HIGH. A STOP condition is defined as SDA transitioning from LOW-to-HIGH while SCL is HIGH. The I2C  
master always generates the START and STOP conditions. The I2C bus is considered busy after a START  
condition and free after a STOP condition. During data transmission, the I2C master can generate repeated  
START conditions. A START and a repeated START conditions are equivalent function-wise. The data on SDA  
must be stable during the HIGH period of the clock signal (SCL). In other words, the state of SDA can only be  
changed when SCL is LOW.  
t
1
SCL  
t
t
5
4
SDIO  
Data In  
t
2
SDIO  
Data Out  
t
3
Figure 42. Start and Stop Sequences  
I2C-Compatible Address  
The 7-bit chip address for the LM3532 is (0x38) . After the START condition, the I2C master sends the 7-bit chip  
address followed by an eighth bit (LSB) read or write (R/W). R/W = 0 indicates a WRITE and R/W = 1 indicates a  
READ. The second byte following the chip address selects the register address to which the data will be written.  
The third byte contains the data for the selected register.  
I2C Compatible Address  
MSB  
LSB  
0
Bit 2  
0
Bit 7  
1
Bit 6  
1
Bit 5  
0
Bit 3  
0
Bit 1  
R/W  
Bit 0  
1
Bit 4  
Figure 43. I2C-Compatible Chip Address (0x38)  
Transferring Data  
Every byte on the SDA line must be eight bits long, with the most significant bit (MSB) transferred first. Each byte  
of data must be followed by an acknowledge bit (ACK). The acknowledge related clock pulse (9th clock pulse) is  
generated by the master. The master then releases SDA (HIGH) during the 9th clock pulse. The LM3532 pulls  
down SDA during the 9th clock pulse, signifying an acknowledge. An acknowledge is generated after each byte  
has been received.  
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LM3532 Register Descriptions  
Table 2. LM3532 Register Descriptions  
Name  
I2C Address  
Address  
Power On Reset  
0x38 (7 bit), 0x70 for Write and 0x71 for Read  
Output Configuration  
Startup/Shutdown Ramp Rate  
Run Time Ramp Rate  
Control A PWM  
0x10  
0x11  
0x12  
0x13  
0x14  
0x15  
0x16  
0x17  
0x18  
0x19  
0x1A  
0x1B  
0x1C  
0x1D  
0x20  
0x21  
0x22  
0x23  
0x24  
0x25  
0x27  
0x28  
0x60  
0x61  
0x62  
0x63  
0x64  
0x65  
0x66  
0x67  
0x70  
0x71  
0x72  
0x73  
0x74  
0x75  
0x76  
0x77  
0x78  
0x79  
0x7A  
0x7B  
0x7C  
0x7D  
0x7E  
0xE4  
0xC0  
0xC0  
0x82  
0x82  
0x82  
0xF1  
0xF3  
0xF1  
0xF3  
0xF1  
0xF3  
0xFF  
0xF8  
0xE0  
0xE0  
0xE0  
0x44  
0xF0  
0xF8  
0x00  
0x00  
0x35  
0x33  
0x6A  
0x66  
0xA1  
0x99  
0xDC  
0xCC  
0x33  
0x66  
0x99  
0xCC  
0xFF  
0x33  
0x66  
0x99  
0xCC  
0xFF  
0x33  
0x66  
0x99  
0xCC  
0xFF  
Control B PWM  
Control C PWM  
Control A Brightness  
Control A Full-Scale Current  
Control B Brightness  
Control B Full-Scale Current  
Control C Brightness  
Control C Full-Scale Current  
Feedback Enable  
Control Enable  
ALS1 Resistor Select  
ALS2 Resistor Select  
ALS Down Delay  
ALS Configuration  
ALS Zone Information  
ALS Brightness Zone  
ADC  
ADC Average  
ALS Zone Boundary 0 High  
ALS Zone Boundary 0 Low  
ALS Zone Boundary 1 High  
ALS Zone Boundary 1 Low  
ALS Zone Boundary 2 High  
ALS Zone Boundary 2 Low  
ALS Zone Boundary 3 High  
ALS Zone Boundary 3 Low  
Control A Zone Target 0  
Control A Zone Target 1  
Control A Zone Target 2  
Control A Zone Target 3  
Control A Zone Target 4  
Control B Zone Target 0  
Control B Zone Target 1  
Control B Zone Target 2  
Control B Zone Target 3  
Control B Zone Target 4  
Control C Zone Target 0  
Control C Zone Target 1  
Control C Zone Target 2  
Control C Zone Target 3  
Control C Zone Target 4  
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Output Configuration  
This register configures how the three control banks are routed to the current sinks (ILED1, ILED2, ILED3)  
Table 3. Output Configuration Register Description (Address 0x10)  
Bits [5:4]  
ILED3 Control  
Bits [3:2]  
ILED2 Control  
Bits [1:0]  
ILED1 Control  
Bit [7:6]  
Not Used  
00 = ILED3 is controlled by Control A 00 = ILED2 is controlled by Control A  
00 = ILED1 is controlled by Control A  
PWM and Control A Brightness  
Registers  
PWM and Control A Brightness Registers PWM and Control A Brightness  
01 = ILED2 is controlled by Control B Registers (default)  
01 = ILED3 is controlled by Control B PWM and Control B Brightness Registers 01 = ILED1 is controlled by Control B  
PWM and Control B Brightness  
Registers  
(default)  
PWM and Control B Brightness  
Registers  
1X = ILED2 is controlled by Control C  
1X = ILED3 is controlled by Control C PWM and Control C Brightness Registers 1X = ILED1 is controlled by Control C  
PWM and Control C Brightness  
Registers (default)  
PWM and Control C Brightness  
Registers  
Startup/Shutdown Ramp Rate  
This register controls the ramping of the LED current in current sinks ILED1, ILED2, and ILED3 during startup  
and shutdown. The startup ramp rates/step are from when the device is enabled via I2C to when the target  
current is reached. The Shutdown ramp rates/step are from when the device is shut down via I2C until the LED  
current is 0. To start up and shut down the current sinks via I2C, see Equation 5.  
Table 4. Startup/Shutdown Ramp Rate Register Description (Address 0x11)  
Bits [7:6]  
Bits [5:3]  
Bits [2:0]  
Shutdown Ramp  
Startup Ramp  
Not Used  
000 = 8µs/step (2.048ms from Full-Scale to 0) (default)  
001 = 1.024 ms/step (261 ms)  
000 = 8µs/step (2.048ms from Full-Scale to 0) (default)  
001 = 1.024 ms/step (261ms)  
010 = 2.048 ms/step (522 ms)  
010 = 2.048 ms/step (522ms)  
011 = 4.096 ms/step (1.044s)  
011 = 4.096 ms/step (1.044s)  
100 = 8.192 ms/step (2.088s)  
100 = 8.192 ms/step (2.088s)  
101 = 16.384 ms/step (4.178s)  
110 = 32.768 ms/step (8.356s)  
111 = 65.536 ms/step (16.711s)  
101 = 16.384 ms/step (4.178s)  
110 = 32.768 ms/step (8.356s)  
111 = 65.536 ms/step (16.711s)  
Run Time Ramp Rate  
This register controls the ramping of the current in current sinks ILED1, ILED2, and ILED3. The Run Time ramp  
rates/step are from one current set-point to another after the device has reached its initial target set point from  
turn-on.  
Table 5. Run Time Ramp Rate Register Description (Address 0x12)  
Bits [7:6]  
Bits [5:3]  
Ramp Down  
Bits [2:0]  
Ramp Up  
Not Used  
000 = 8µs/step (default)  
000 = 8µs/step (default)  
001 = 1.024 ms/step  
010 = 2.048 ms/step  
011 = 4.096 ms/step  
100 = 8.192 ms/step  
101 = 16.384 ms/step  
110 = 32.768 ms/step  
111 = 65.536 ms/step  
001 = 1.024 ms/step  
010 = 2.048 ms/step  
011 = 4.096 ms/step  
100 = 8.192 ms/step  
101 = 16.384 ms/step  
110 = 32.768 ms/step  
111 = 65.536 ms/step  
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Control A PWM  
This register configures which PWM input (PWM1 or PWM2) is mapped to Control Bank A and which zones the  
selected PWM input is active in.  
Table 6. Control A PWM Register Description (Address 0x13)  
Bit 7  
N/A  
Bit 6  
Zone 4 PWM  
Enable  
Bit 5  
Zone 3 PWM  
Enable  
Bit 2  
Bit 2  
Bit 2  
Zone 0 PWM  
Enable  
Bit 1  
PWM Input  
Polarity  
Bit 0  
PWM Select  
Zone 2 PWM Zone 1 PWM  
Enable  
Enable  
0 = Active PWM 0 = Active PWM  
0 = Active  
0 = Active PWM 0 = Active PWM 0 = active low 0 = PWM1 input  
input is disabled input is disabled in PWM input is  
input is disabled input is disabled polarity  
is mapped to  
Control Bank A  
(default)  
in Zone 4  
Zone 3 (default)  
disabled in  
Zone 2  
in Zone 1  
in Zone 0  
(default)  
(default)  
(default)  
(default)  
Not Used  
1 = Active PWM 1 = Active PWM  
1 = Active  
1 = Active PWM 1 = Active PWM 1 = active high 1 = PWM2 is  
input is enabled input is enabled in PWM input is  
input is enabled input is enabled polarity  
in Zone 1 in Zone 0 (default)  
mapped to  
Control Bank A  
in Zone 4  
Zone 3  
enabled in  
Zone 2  
Control B PWM  
This register configures which PWM input (PWM1 or PWM2) is mapped to Control Bank B and which zones the  
selected PWM input is active in.  
Table 7. Control B PWM Register Description (Address 0x14)  
Bit 7  
N/A  
Bit 6  
Zone 4 PWM  
Enable  
Bit 5  
Zone 3 PWM  
Enable  
Bit 2  
Zone 2 PWM  
Enable  
Bit 2  
Zone 1 PWM  
Enable  
Bit 2  
Zone 0 PWM  
Enable  
Bit 1  
PWM Input  
Polarity  
Bit 0  
PWM Select  
0 = Active PWM 0 = Active PWM  
input is disabled input is disabled  
0 = Active  
PWM input is  
disabled in  
Zone 2  
0 = Active PWM 0 = Active PWM 0 = active low 0 = PWM1  
input is disabled input is disabled polarity  
input is  
in Zone 4  
in Zone 3  
in Zone 1  
(default)  
in Zone 0  
(default)  
mapped to  
Control Bank B  
(default)  
(default)  
(default)  
(default)  
Not Used  
1 = Active PWM 1 = Active PWM  
1 = Active  
1 = Active PWM 1 = Active PWM 1 = active high 1 = PWM2 is  
input is enabled input is enabled in PWM input is  
input is enabled input is enabled polarity  
in Zone 1 in Zone 0 (default)  
mapped to  
Control Bank B  
in Zone 4  
Zone 3  
enabled in  
Zone 2  
Control C PWM  
This register configures which PWM input (PWM1 or PWM2) is mapped to Control Bank C and which zones the  
selected PWM input is active in.  
Table 8. Control C PWM Register Description (Address 0x15)  
Bit 7  
N/A  
Bit 6  
Zone 4 PWM  
Enable  
Bit 5  
Zone 3 PWM  
Enable  
Bit 2  
Zone 2 PWM  
Enable  
Bit 2  
Zone 1 PWM  
Enable  
Bit 2  
Zone 0 PWM  
Enable  
Bit 1  
PWM Input  
Polarity  
Bit 0  
PWM Select  
0 = Active PWM 0 = Active PWM  
input is disabled input is disabled  
0 = Active  
PWM input is  
disabled in  
Zone 2  
0 = Active PWM 0 = Active PWM 0 = active low 0 = PWM1  
input is disabled input is disabled polarity  
input is  
in Zone 4  
in Zone 3  
in Zone 1  
(default)  
in Zone 0  
(default)  
mapped to  
Control Bank C  
(default)  
(default)  
(default)  
(default)  
Not Used  
1 = Active PWM 1 = Active PWM  
1 = Active  
1 = Active PWM 1 = Active PWM 1 = active high 1 = PWM2 is  
input is enabled input is enabled in PWM input is  
input is enabled input is enabled polarity  
in Zone 1 in Zone 0 (default)  
mapped to  
Control Bank C  
in Zone 4  
Zone 3  
enabled in  
Zone 2  
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Control A Brightness Configuration  
The Control A Brightness Configuration Register has 3 functions:  
1. Selects how the LED current sink which is mapped to Control Bank A is controlled (either directly through the  
I2C or via the ALS interface)  
2. Programs the LED current mapping mode for Control Bank A (Linear or Exponential)  
3. Programs which Control A Zone Target Register is the Brightness Register for Bank A in I2C Current Control  
Table 9. Control A Brightness Configuration Register Description (Address 0x16)  
Bits [7:5]  
Not Used  
Bits [4:2]  
Bit 1  
Bit 0  
Control A Brightness Pointer (I2C  
Current Control Only)  
LED Current Mapping Mode  
Bank A Current Control  
N/A  
000 = Control A Zone Target 0  
001 = Control A Zone Target 1  
010 = Control A Zone Target 2  
011 = Control A Zone Target 3  
1XX = Control A Zone Target 4 (default)  
0 = Exponential Mapping (default)  
1 = Linear Mapping  
0 = ALS Current Control  
1 = I2C Current Control (default)  
Control B Brightness Configuration  
The Control B Brightness Configuration Register has 3 functions:  
1. Selects how the LED current sink which is mapped to Control Bank B is controlled (either directly through the  
I2C or via the ALS interface)  
2. Programs the LED current mapping mode for Control Bank B (Linear or Exponential)  
3. Programs which Control B Zone Target Register is the Brightness Register for Bank B in I2C Current Control  
Table 10. Control B Brightness Configuration Register Description (Address 0x18)  
Bits [7:5]  
Not Used  
Bits [4:2]  
Bit 1  
Bit 0  
Control A Brightness Pointer (I2C  
Current Control Only)  
LED Current Mapping Mode  
Bank B Current Control  
N/A  
000 = Control B Zone Target 0  
001 = Control B Zone Target 1  
010 = Control B Zone Target 2  
011 = Control B Zone Target 3  
1XX = Control B Zone Target 4 (default)  
0 = Exponential Mapping (default)  
1 = Linear Mapping  
0 = ALS Current Control  
1 = I2C Current Control (default)  
Control C Brightness Configuration  
The Control C Brightness Configuration Register has 3 functions:  
1. Selects how the LED current sink which is mapped to Control Bank C is controlled (either directly through the  
I2C or via the ALS interface)  
2. Programs the LED current mapping mode for Control Bank C (Linear or Exponential)  
3. Programs which Control C Zone Target Register is the Brightness Register for Bank C in I2C Current Control  
Table 11. Control C Brightness Configuration Register Description (Address 0x1A)  
Bits [7:5]  
Not Used  
Bits [4:2]  
Bit 1  
Bit 0  
Control C Brightness Pointer (I2C  
Current Control Only)  
LED Current Mapping Mode  
Bank C Current Control  
N/A  
000 = Control C Zone Target 0  
001 = Control C Zone Target 1  
010 = Control C Zone Target 2  
011 = Control C Zone Target 3  
1XX = Control C Zone Target 4 (default)  
0 = Exponential Mapping (default)  
1 = Linear Mapping  
0 = ALS Current Control  
1 = I2C Current Control (default)  
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Control A/B/C Full-Scale Current  
These registers program the full-scale current setting for the current sink(s) assigned to Control Bank A/B/C.  
Each Control Bank has its own full-scale current setting (Control Bank A, Address 0x17), (Control Bank B,  
address 0x19), (Control Bank C, address 0x1B).  
Table 12. Control A/B/C Full-Scale Current Registers Descriptions (Address 0x17, 0x19, 0x1B)  
Bits [7:5]  
Not Used  
Bits [4:0]  
Control A/B/C Full-Scale Current Select Bits  
00000 = 5 mA  
00001 = 5.8 mA  
00010 = 6.6 mA  
00011 = 7.4 mA  
00100 = 8.2 mA  
00101 = 9 mA  
00110 = 9.8 mA  
00111 = 10.6 mA  
01000 = 11.4 mA  
01001 = 12.2 mA  
01010 = 13 mA  
01011 = 13.8 mA  
01100 = 14.6 mA  
01101 = 15.4 mA  
01110 = 16.2 mA  
01111 = 17 mA  
10000 = 17.8 mA  
10001 = 18.6mA  
10010 = 19.4 mA  
10011 = 20.2 mA (default)  
10100 = 21 mA  
10101 = 21.8 mA  
10110 = 22.6 mA  
10111 = 23.4 ma  
11000 = 24.2 mA  
11001 = 25 mA  
11010 = 25.8 mA  
11011 = 26.6 mA  
11100 = 27.4 mA  
11101 = 28.2 mA  
11110 = 29 mA  
11111 = 29.8 mA  
N/A  
Feedback Enable  
The Feedback Enable Register configures which current sinks are or are not part of the boost control loop.  
Table 13. Feedback Enable Register Description (Address 0x1C)  
Bits [7:3]  
Not Used  
Bit 2  
Bit 1  
Bit 0  
ILED3 Feedback Enable  
ILED2 Feedback Enable  
ILED1 Feedback Enable  
N/A  
0 = ILED3 is not part of the  
boost control loop  
0 = ILED2 is not part of the  
boost control loop  
0 = ILED1 is not part of the  
boost control loop  
1 = ILED3 is part of the boost  
control loop (default)  
1 = ILED2 is part of the  
boost control loop (default)  
1 = ILED1 is part of the  
boost control loop (default)  
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Control Enable  
The Control Enable register contains the bits to turn on/off the individual Control Banks (A, B, or C). Once one of  
these bits is programmed high, the current sink(s) assigned to the selected control banks are enabled.  
Table 14. Control Enable Register Description (Address 0x1D)  
Bits (7:3)  
Bit 2  
Bit 1  
Bit 0  
(Not Used)  
Control C Enable  
Control B Enable  
Control A Enable  
N/A  
0 = Control C is  
disabled (default)  
1 = Control C is  
enabled  
0 = Control B is  
disabled (default)  
1 = Control B is  
enabled  
0 = Control A is  
disabled (default)  
1 = Control A is  
enabled  
ALS1 & 2 Resistor Select  
The ALS Resistor Select Registers program the internal pulldown resistor at the ALS1/ALS2 input. Each ALS  
input has its own resistor select register (ALS1 Resistor Select Register, Address 0x20) and (ALS2 Resistor  
Select Register, Address 0x21). Each ALS input can be set independent of the other. There are 32 available  
resistors including a high impedance setting. The full-scale input voltage range at either ALS input is 2V.  
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Table 15. ALS Resistor Select Register Description (Address 0x20, Address 0x21)  
Bit [7:5]  
Not Used  
Bit [4:0]  
ALS1/ALS2 Resistor Select Bits  
00000 = High Impedance (default)  
00001 = 37 kΩ  
00010 = 18.5 kΩ  
00011 = 12.33 kΩ  
00100 = 9.25 kΩ  
00101 = 7.4 kΩ  
00110 = 6.17 kΩ  
00111 = 5.29 kΩ  
01000 = 4.63 kΩ  
01001 = 4.11 kΩ  
01010 = 3.7 kΩ  
01011 = 3.36 kΩ  
01100 = 3.08 kΩ  
01101 = 2.85 kΩ  
01110 = 2.64 kΩ  
01111 = 2.44 kΩ  
10000 = 2.31 kΩ  
10001 = 2.18 kΩ  
10010 = 2.06 kΩ  
10011 = 1.95 kΩ  
10100 = 1.85 kΩ  
10101 = 1.76 kΩ  
10110 = 1.68 kΩ  
10111 = 1.61 kΩ  
11000 = 1.54 kΩ  
11001 = 1.48 kΩ  
11010 = 1.42 kΩ  
11011 = 1.37 kΩ  
11100 = 1.32 kΩ  
11101 = 1.28 kΩ  
11110 = 1.23 kΩ  
11111 = 1.19 kΩ  
N/A  
ALS Down Delay  
The ALS Down Delay Register adds additional average time delays for ALS changes in the backlight current  
during falling ALS input voltages. Code 00000 adds 3 extra average period delays on top of the 3 default delays  
(6 total). Code 11111 adds 34 extra average period delays.  
Table 16. ALS Down Delay Register Description (Address 0x22)  
Bits [7:6]  
Not Used  
Bit [5]  
Bits [4:0]  
Down Delay  
ALS Fast startup Enable  
00000 = 6 total Average Period delay for Down Delay  
Control (default)  
:
:
:
0 = ALS Fast startup is Disabled  
1 = ALS Fast startup is Enabled (default)  
N/A  
11111 = 34 total Average Periods of Delay for Down  
Delay Control  
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ALS Configuration  
The ALS Configuration register controls the ALS average times, the ALS enable bit, and the ALS input select.  
Table 17. ALS Configuration Register Description (Address 0x23)  
Bits [7:6]  
Bit [5:4]  
Bit 3  
Bits [2:0]  
ALS Input Select  
ALS Control  
ALS Enable  
ALS Average Time  
00 = Average of ALS1 and  
ALS2 is used to determine  
backlight current  
00 = Direct ALS Control. ALS inputs 0 = ALS is disabled (default) 000 = 17.92 ms  
respond to up and down transitions 1 = ALS is enabled  
(default)  
001 = 35.84 ms  
010 = 71.68 ms  
01 = Only the ALS1 input is  
used to determine backlight  
current (default)  
10 = Only the ALS2 input is  
used to determine the  
backlight current  
11 = The maximum of ALS1  
and ALS2 is used to  
determine the backlight  
current  
01 = This setting is for a future  
mode.  
011 = 143.36 ms  
100 = 286.72 ms (default)  
101 = 573.44 ms  
110 = 1146.88 ms  
111 = 2293.76 ms  
1X = Down Delay Control. Extra  
delays of 3 x tAVE to 34 x tAVE are  
added for down transitions, before  
the new backlight target is  
programmed. (see Down Delay  
section).  
ALS Zone Readback / Information  
The ALS Zone Readback and ALS Zone Information Readback registers each contain information on the current  
ambient light brightness zone. The ALS Zone Readback register contains the ALS Zone after the averager and  
discriminator block and reflects both up and down changes in the ambient light brightness zone. The ALS Zone  
Information register reflects the contents of either the ALS Zone Readback register (with up and down transition).  
This register also includes a Zone Change bit (bit 3) which is written with a 1 each time the ALS zone changes.  
This bit is cleared upon read back of the ALS Zone Information register.  
Table 18. ALS Zone Information Register Description (Address 0x24)  
Bits [7:4]  
Not Used  
Bit 3  
Zone Change Bit  
Bits [2:0]  
Brightness Zone  
N/A  
0 = No change in ALS Zone (default)  
000 = Zone 0 (default)  
1 = There was a change in the ALS Zone  
001 = Zone 1  
since the last read of this register. This bit is 010 = Zone 2  
cleared on read back.  
011 = Zone 3  
1XX = Zone 4  
Table 19. ALS Zone Readback Register Description (Address 0x25)  
Bits [7:3]  
Not Used  
Bits [2:0]  
Brightness Zone  
N/A  
000 = Zone 0 (default)  
001 = Zone 1  
010 = Zone 2  
011 = Zone 3  
1XX = Zone 4  
ALS Zone Boundaries  
There are 4 ALS Zone Boundary registers which form the boundaries for the 5 Ambient Light Zones. Each Zone  
Boundary register is 8 bits with a maximum voltage of 2V. This gives a step size for each Zone Boundary  
Register bit of:  
2V  
255  
7.8 mV  
=
ZoneBoundaryLSB =  
(7)  
ALS Zone Boundary 0 High (Address 0x60), default = 0x35 (415.7 mV)  
ALS Zone Boundary 0 Low (Address 0x61), default = 0x33 (400 mV)  
Line-Break  
ALS Zone Boundary 1 High (Address 0x62), default = 0x6A (831.4 mV)  
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ALS Zone Boundary 1 Low (Address 0x63), default = 0x66 (800 mV)  
Line-Break  
ALS Zone Boundary 2 High (Address 0x64), default = 0xA1 (1262.7 mV)  
ALS Zone Boundary 2 Low (Address 0x65), default = 0x99 (1200 mV)  
Line-Break  
ALS Zone Boundary 3 High (Address 0x66), default = 0xDC (1725.5 mV)  
ALS Zone Boundary 3 Low (Address 0x67), default = 0xCC (1600 mV)  
Zone Target Registers  
There are 3 groups of Zone Target Registers (Control A, Control B, and Control C). The Zone Target registers  
have 2 functions. In Ambient Light Current control, they map directly to the corresponding ALS Zone. When the  
active ALS input lands within the programmed Zone, the backlight current is programmed to the corresponding  
zone target registers set point (see below).  
Control A Zone Target Register 0 maps directly to Zone 0 (Address 0x70)  
Control A Zone Target Register 1 maps directly to Zone 1 (Address 0x71)  
Control A Zone Target Register 2 maps directly to Zone 2 (Address 0x72)  
Control A Zone Target Register 3 maps directly to Zone 3 (Address 0x73)  
Control A Zone Target Register 4 maps directly to Zone 4 (Address 0x74)  
Line-Break  
Control B Zone Target Register 0 maps directly to Zone 0 (Address 0x75)  
Control B Zone Target Register 1 maps directly to Zone 1 (Address 0x76)  
Control B Zone Target Register 2 maps directly to Zone 2 (Address 0x77)  
Control B Zone Target Register 3 maps directly to Zone 3 (Address 0x78)  
Control B Zone Target Register 4 maps directly to Zone 4 (Address 0x79)  
Control C Zone Target Register 0 maps directly to Zone 0 (Address 0x7A)  
Control C Zone Target Register 1 maps directly to Zone 1 (Address 0x7B)  
Control C Zone Target Register 2 maps directly to Zone 2 (Address 0x7C)  
Control C Zone Target Register 3 maps directly to Zone 3 (Address 0x7D)  
Control C Zone Target Register 4 maps directly to Zone 4 (Address 0x7E)  
In I2C Current Control, any of the 5 Zone Target Registers for the particular Control Bank can be the LED  
brightness registers. This is set according to Control A, B, or C Brightness Configuration Registers (Bits [4:2]).  
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APPLICATIONS INFORMATION  
Inductor Selection  
The LM3532 is designed to work with a 10 µH to 22 µH inductor. When selecting the inductor, ensure that the  
saturation rating is high enough to accommodate the applications peak inductor current . The inductance value  
must also be large enough so that the peak inductor current is kept below the LM3532's switch current limit. See  
the Maximum Output Power Section for more details. Table 20 lists various inductors that can be used with the  
LM3532. The inductors with higher saturation currents are more suitable for applications with higher output  
currents or voltages (multiple strings). The smaller devices are geared toward single string applications with  
lower series LED counts.  
Table 20. Inductors  
Manufacturer  
Part Number  
Value  
Size  
Current Rating  
DC Resistance  
TDK  
VLS252010T-100M  
10 µH  
2.5 mm × 2  
mm × 1 mm  
590 mA  
0.712Ω  
TDK  
TDK  
VLS2012ET-100M  
VLF301512MT-100M  
VLF4010ST-100MR80  
VLS252012T-100M  
VLF3014ST-100MR82  
VLF4014ST-100M1R0  
XPL2010-103ML  
10 µH  
10 µH  
10 µH  
10 µH  
10 µH  
10 µH  
10 µH  
10 µH  
2 mm × 2 mm  
× 1.2 mm  
695 mA  
690 mA  
800 mA  
810 mA  
820 mA  
1000 mA  
610 mA  
550 mA  
0.47Ω  
0.25Ω  
0.25Ω  
0.63Ω  
0.25Ω  
0.22Ω  
0.56Ω  
0.54Ω  
3.0 mm × 2.5  
mm × 1.2mm  
TDK  
2.8 mm × 3  
mm × 1 mm  
TDK  
2.5 mm × 2  
mm × 1.2mm  
TDK  
2.8 mm × 3  
mm × 1.4mm  
TDK  
3.8 mm × 3.6  
mm × 1.4 mm  
Coilcraft  
Coilcraft  
1.9 mm × 2  
mm × 1 mm  
LPS3010-103ML  
2.95 mm ×  
2.95 mm × 0.9  
mm  
Coilcraft  
LPS4012-103ML  
10 µH  
3.9mm ×  
3.9mm ×  
1.1mm  
1000 mA  
0.35Ω  
Coilcraft  
Coilcraft  
Coilcraft  
LPS4012-223ML  
LPS4018-103ML  
LPS4018-223ML  
22 µH  
10 µH  
22 µH  
3.9 mm × 3.9  
mm × 1.1 mm  
780 mA  
1100 mA  
700 mA  
0.6Ω  
0.2Ω  
3.9 mm × 3.9  
mm × 1.7 mm  
3.9 mm × 3.9  
mm × 1.7 mm  
0.36Ω  
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Capacitor Selection  
The LM3532’s output capacitor has two functions: filtering of the boost converter's switching ripple, and to ensure  
feedback loop stability. As a filter, the output capacitor supplies the LED current during the boost converter's on  
time and absorbs the inductor's energy during the switch's off time. This causes a sag in the output voltage  
during the on time and a rise in the output voltage during the off time. Because of this, the output capacitor must  
be sized large enough to filter the inductor current ripple that could cause the output voltage ripple to become  
excessive. As a feedback loop component, the output capacitor must be at least 1µF and have low ESR;  
otherwise, the LM3532's boost converter can become unstable. This requires the use of ceramic output  
capacitors. Table 21 lists part numbers and voltage ratings for different output capacitors that can be used with  
the LM3532.  
Table 21. Input/Output Capacitors  
Manufacturer  
Murata  
Part Number  
Value  
1 µF  
Size  
0805  
0805  
0603  
Rating  
50V  
Description  
COUT  
CIN  
GRM21BR71H105KA12  
GRM188B31A225KE33  
C1608X5R0J225  
Murata  
2.2 µF  
2.2 µF  
10V  
TDK  
6.3V  
CIN  
Diode Selection  
The diode connected between SW and OUT must be a Schottky diode and have a reverse breakdown voltage  
high enough to handle the maximum output voltage in the application. Table 22 lists various diodes that can be  
used with the LM3532.  
Table 22. Diodes  
Manufacturer  
Diodes Inc.  
Diodes Inc.  
Part Number  
B0540WS  
Value  
Size  
Rating  
Schottky  
Schottky  
SOD-323  
40V/500 mA  
40V/200 mA  
SDM20U40  
SOD-523 (1.2 mm × 0.8  
mm × 0.6 mm)  
On Semiconductor  
On Semiconductor  
NSR0340V2T1G  
NSR0240V2T1G  
Schottky  
Schottky  
SOD-523 (1.2 mm × 0.8  
mm × 0.6 mm)  
40V/250 mA  
40V/250 mA  
SOD-523 (1.2 mm × 0.8  
mm × 0.6 mm)  
Layout Guidelines  
The LM3532 contains an inductive boost converter which sees a high switched voltage (up to 40V) at the SW  
pin, and a step current (up to 1A) through the Schottky diode and output capacitor each switching cycle. The high  
switching voltage can create interference into nearby nodes due to electric field coupling (I = CdV/dt). The large  
step current through the diode, and the output capacitor can cause a large voltage spike at the SW pin and the  
OVP pin due to parasitic inductance in the step current conducting path (V = LdI/dt). Board layout guidelines are  
geared towards minimizing this electric field coupling and conducted noise. Figure 44 highlights these two noise  
generating components.  
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Voltage Spike  
VOUT + VF Schottky  
Pulsed voltage at SW  
Current through  
I
Schottky Diode and COUT  
PEAK  
I
= I  
IN  
AVE  
Paracitic  
Current through  
inductor  
Circuit Board  
Inductances  
Affected Node  
due to capacitive  
coupling  
Cp1  
L
Lp1  
Lp2  
D1  
Up to 40V  
COUT  
2.7V to 5.5V  
SW  
VLOGIC  
IN  
Lp3  
10 kW  
10 kW  
SCL  
SDA  
OVP  
LM3532  
LCD Display  
ILED1  
ILED2  
ILED3  
GND  
Figure 44. LM3532's Boost Converter Showing Pulsed Voltage at SW (High dV/dt) and  
Current Through Schottky and COUT (High dI/dt)  
The following lists the main (layout sensitive) areas of the LM3532 in order of decreasing importance:  
Output Capacitor  
Schottky Cathode to COUT+  
COUTto GND  
Schottky Diode  
SW Pin to Schottky Anode  
Schottky Cathode to COUT+  
Inductor  
SW Node PCB capacitance to other traces  
Input Capacitor  
CIN+ to IN pin  
CINto GND  
38  
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Output Capacitor Placement  
The output capacitor is in the path of the inductor current discharge current. As a result, COUT sees a high current  
step from 0 to IPEAK each time the switch turns off and the Schottky diode turns on. Typical turn-off/turn-on times  
are around 5ns. Any inductance along this series path from the cathode of the diode through COUT and back into  
the LM3532's GND pin will contribute to voltage spikes (VSPIKE = LPX × dI/dt) at SW and OUT which can  
potentially over-voltage the SW pin, or feed through to GND. To avoid this, COUT+ must be connected as close as  
possible to the Cathode of the Schottky diode and COUTmust be connected as close as possible to the  
LM3532's GND bump. The best placement for COUT is on the same layer as the LM3532 so as to avoid any vias  
that will add extra series inductance (see Example Layouts).  
Schottky Diode Placement  
The Schottky diode is in the path of the inductor current discharge. As a result the Schottky diode sees a high  
current step from 0 to IPEAK each time the switch turns off and the diode turns on. Any inductance in series with  
the diode will cause a voltage spike (VSPIKE = LPX × dI/dt) at SW and OUT which can potentially over-voltage the  
SW pin, or feed through to VOUT and through the output capacitor and into GND. Connecting the anode of the  
diode as close as possible to the SW pin and the cathode of the diode as close as possible to COUT+ will  
reduce the inductance (LPX) and minimize these voltage spikes (See Example Layouts).  
Inductor Placement  
The node where the inductor connects to the LM3532’s SW bump has 2 issues. First, a large switched voltage (0  
to VOUT + VF_SCHOTTKY) appears on this node every switching cycle. This switched voltage can be capacitively  
coupled into nearby nodes. Second, there is a relatively large current (input current) on the traces connecting the  
input supply to the inductor and connecting the inductor to the SW bump. Any resistance in this path can cause  
large voltage drops that will negatively affect efficiency.  
To reduce the capacitively coupled signal from SW into nearby traces, the SW bump to inductor connection must  
be minimized in area. This limits the PCB capacitance from SW to other traces. Additionally, other nodes need to  
be routed away from SW and not directly beneath. This is especially true for high impedance nodes that are  
more susceptible to capacitive coupling such as (SCL, SDA, HWEN, PWM, and possibly ASL1 and ALS2). A  
GND plane placed directly below SW will help isolate SW and dramatically reduce the capacitance from SW into  
nearby traces.  
To limit the trace resistance of the VBATT to inductor connection and from the inductor to SW connection, use  
short, wide traces (see Example Layouts).  
Input Capacitor Selection and Placement  
The input bypass capacitor filters the inductor current ripple, and the internal MOSFET driver currents during turn  
on of the power switch.  
The driver current requirement can be a few hundred mA's with 5ns rise and fall times. This will appear as high  
dI/dt current pulses coming from the input capacitor each time the switch turns on. Close placement of the input  
capacitor to the IN pin and to the GND pin is critical since any series inductance between IN and CIN+ or CIN−  
and GND can create voltage spikes that could appear on the VIN supply line and in the GND plane.  
Close placement of the input bypass capacitor at the input side of the inductor is also critical. The source  
impedance (inductance and resistance) from the input supply, along with the input capacitor of the LM3532, form  
a series RLC circuit. If the output resistance from the source (RS) is low enough the circuit will be underdamped  
and will have a resonant frequency (typically the case). Depending on the size of LS the resonant frequency  
could occur below, close to, or above the LM3532's switching frequency. This can cause the supply current ripple  
to be:  
Approximately equal to the inductor current ripple when the resonant frequency occurs well above the  
LM3532's switching frequency;  
Greater then the inductor current ripple when the resonant frequency occurs near the switching frequency; or  
Less then the inductor current ripple when the resonant frequency occurs well below the switching frequency.  
Figure 45 shows this series RLC circuit formed from the output impedance of the supply and the input capacitor.  
The circuit is re-drawn for the AC case where the VIN supply is replaced with a short to GND and the LM3532 +  
Inductor is replaced with a current source (ΔIL).  
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Equation 1 is the criteria for an underdamped response. Equation 2 is the resonant frequency. Equation 3 is the  
approximated supply current ripple as a function of LS, RS, and CIN.  
As an example, consider a 3.6V supply with 0.1of series resistance connected to CIN through 50 nH of  
connecting traces. This results in an underdamped input filter circuit with a resonant frequency of 712 kHz. Since  
the switching frequency lies near to the resonant frequency of the input RLC network, the supply current is  
probably larger then the inductor current ripple. In this case, using equation 3 from Figure 45, the supply current  
ripple can be approximated as 1.68 times the inductor current ripple. Increasing the series inductance (LS) to 500  
nH causes the resonant frequency to move to around 225 kHz and the supply current ripple to be approximately  
0.25 times the inductor current ripple.  
I
SUPPLY  
DI  
L
L
R
S
L
S
SW  
IN  
V
IN  
LM3532  
Supply  
C
IN  
I
SUPPLY  
R
S
L
S
C
DI  
IN  
L
2
RS  
4 x LS2  
1
>
1.  
LS x CIN  
1
2.  
3.  
fRESONANT  
=
2p LS x CIN  
1
2p x 500 kHz x CIN  
D
L x  
ISUPPLYRIPPLE ö I  
2
÷
÷
1
2
RS + 2p x 500kHz x LS -  
x
x
2p 500 kHz CIN  
«
Figure 45. Input RLC Network  
40  
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LM3532  
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SNVS653D JULY 2011REVISED JUNE 2013  
Example Layouts  
The following figures show example layouts which apply the required (proper) layout guidelines. These figures  
should be used as guides for laying out the LM3532's boost circuit.  
CIN  
IN  
LM3532  
GND  
L
Schottky  
SW  
Diode  
OUT  
COUT  
Figure 46. Layout Example #1  
Schottky  
Diode  
CIN  
GND  
IN  
COUT  
OUT  
LM3532  
L
SW  
Figure 47. Layout Example #2  
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SNVS653D JULY 2011REVISED JUNE 2013  
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REVISION HISTORY  
Changes from Revision B (July 2012) to Revision C  
Page  
added "IFULL_SCALE = 20.2mA, Brightness Code = 0xFF" to 2.7V VIN 5.5V in conditions for Imatch ............................... 4  
Changed layout of National Data Sheet to TI format .......................................................................................................... 41  
Changes from Revision C (March 2013) to Revision D  
Page  
Updated Output Configuration Register defaults: in col. 2 from "00" to "1X"; in col. 3 from "00" to "01". .......................... 28  
42  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
3-Jun-2013  
PACKAGING INFORMATION  
Orderable Device  
LM3532TME-40A/NOPB  
LM3532TMX-40A/NOPB  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
ACTIVE  
DSBGA  
DSBGA  
YFQ  
16  
16  
250  
Green (RoHS  
& no Sb/Br)  
SNAGCU  
SNAGCU  
Level-1-260C-UNLIM  
D34  
D34  
ACTIVE  
YFQ  
3000  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
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provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
3-Jun-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LM3532TME-40A/NOPB DSBGA  
LM3532TMX-40A/NOPB DSBGA  
YFQ  
YFQ  
16  
16  
250  
178.0  
178.0  
8.4  
8.4  
1.85  
1.85  
2.01  
2.01  
0.76  
0.76  
4.0  
4.0  
8.0  
8.0  
Q1  
Q1  
3000  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
3-Jun-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LM3532TME-40A/NOPB  
LM3532TMX-40A/NOPB  
DSBGA  
DSBGA  
YFQ  
YFQ  
16  
16  
250  
210.0  
210.0  
185.0  
185.0  
35.0  
35.0  
3000  
Pack Materials-Page 2  
MECHANICAL DATA  
YFQ0016x
D
0.600±0.075  
E
TMD16XXX (Rev A)  
D: Max = 1.87 mm, Min = 1.81 mm  
E: Max = 1.77 mm, Min = 1.71 mm  
4215081/A  
12/12  
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.  
B. This drawing is subject to change without notice.  
NOTES:  
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