LM3559 [TI]

LM3559 Synchronous Boost Flash Driver with Dual 900 mA High Side Current Sources (1.8A Total Flash Current); 与双900毫安高压侧电流源( 1.8A总闪光灯电流) LM3559同步升压型闪光灯驱动器
LM3559
型号: LM3559
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

LM3559 Synchronous Boost Flash Driver with Dual 900 mA High Side Current Sources (1.8A Total Flash Current)
与双900毫安高压侧电流源( 1.8A总闪光灯电流) LM3559同步升压型闪光灯驱动器

驱动器 闪光灯 高压
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LM3559  
LM3559 Synchronous Boost Flash Driver with Dual 900 mA High Side Current  
Sources (1.8A Total Flash Current)  
Literature Number: SNVS624  
June 9, 2011  
LM3559  
Synchronous Boost Flash Driver with Dual 900 mA High  
Side Current Sources (1.8A Total Flash Current)  
General Description  
Features  
The LM3559 is a 2MHz fixed-frequency synchronous boost  
converter with two 900 mA constant current drivers for high-  
current white LEDs. The dual high-side current sources allow  
for grounded cathode LED operation and can be tied together  
for providing flash currents of up to 1.8A. An adaptive regu-  
lation method ensures the current for each LED remains in  
regulation and maximizes efficiency.  
Dual High-Side Current Sources Allow for Grounded  
Cathode LED Operation  
Accurate and Programmable LED Current from 28.125mA  
to 1.8A  
Optimized Flash Current During Low Battery Conditions  
Independent LED Current Source Programmability  
>90% Efficiency  
Ultra-Small (Total) Solution Size: < 26mm2  
The LM3559 is controlled via an I2C-compatible interface.  
Features include: an internal 4-bit ADC to monitor the LED  
voltage, independent LED current control, a hardware flash  
enable allowing a logic input to trigger the flash pulse, dual  
TX inputs which force the flash pulse into a low-current torch  
mode allowing for synchronization to RF power amplifier  
events or other high-current conditions, an integrated com-  
parator designed to monitor an NTC thermistor and provide  
an interrupt to the LED current, an input voltage monitor to  
monitor low battery conditions, and a flash current scale-back  
feature that actively monitors the battery voltage and opti-  
mizes the flash current during low battery voltage conditions.  
Additionally, an active high HWEN input provides a hardware  
shutdown during system software failures.  
Four Operating Modes: Torch, Flash, Privacy Indicate,  
and Message Indicator  
4-bit ADC for VLED Monitoring  
Battery Voltage Sensing and Current Scale-Back  
LED Thermal Sensing and Current Scale-Back  
Hardware Flash and Torch Enable  
Dual Synchronization Inputs for RF Power Amplifier Pulse  
Events  
LED and Output Disconnect During Shutdown  
Open and Short LED Detection  
400 kHz I2C-Compatible Interface  
The 2MHz switching frequency, over-voltage protection and  
adjustable current limit allow for the use of tiny, low profile (1  
µH or 2.2 µH) inductors and (10 µF) ceramic capacitors. The  
device is available in a ultra-small 16-bump (1.97mm x  
1.97mm x 0.6mm) micro SMD package and operates over the  
-40°C to +85°C temperature range.  
Active Low Hardware Reset  
16-Bump (1.97mm x 1.97mm x 0.6mm) micro SMD  
Applications  
Camera Phone LED Flash  
White LED Biasing  
Typical Application Circuit  
30102801  
© 2011 National Semiconductor Corporation  
301028  
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Application Circuit Component List  
Component  
L
Manufacturer  
Toko  
Value  
1µH  
Part Number  
FDSD0312-1R0  
GRM188R60J106M  
PWF-4  
Size (mm)  
3 x 3 x 1.2  
Rating  
3.3A  
CIN/COUT  
LEDs  
Murata  
10 µF  
1.6 × 0.8 × 0.8 (0603)  
6.3V  
Lumiled  
VF = 3.6@ 1A  
Connection Diagram  
30102802  
16-Bump 1.97 mm x 1.97 mm x 0.6 mm micro SMD Package TLA16  
XY (Date Code), TT (Die Traceability)  
Ordering Information  
Order Number  
LM3559TLE  
LM3559TLX  
Package  
micro SMD  
micro SMD  
Supplied As  
No-Lead  
250 units, Tape-and-Reel  
3000 units, Tape-and-Reel  
YES (NOPB)  
YES (NOPB)  
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2
Pin Descriptions  
Pin  
A1  
Name  
LED1  
OUT  
Function  
High Side Current Source Output for Flash LED1.  
A2, B2  
A3, B3  
A4, B4  
B1  
Step-Up DC/DC Converter Output. Connect a 10 µF ceramic capacitor between this pin and GND.  
Drain Connection for Internal NMOS and Synchronous PMOS Switches.  
Ground  
SW  
GND  
LED2  
LEDI/NTC  
High-Side Current Source Output for Flash LED2.  
Configureable as a High-Side Current Source Output for Indicator LED or Comparator Input for  
LED Temperature Sensing.  
C1  
Configureable as a Dual-Polarity RF Power Amplifier Synchronization Input, a hardware Torch  
mode enable, or as a General Purpose Logic I/O. This pin has an internal 300 kpulldown to  
GND.  
TX1/TORCH/  
GPIO1  
C2  
C3  
C4  
D1  
STROBE  
IN  
Active High Hardware Flash Enable. Drive STROBE high to turn on the Flash current pulse. This  
pin has an internal 300 kpulldown to GND.  
Input Voltage Connection. Connect IN to the input supply, and bypass to GND with a minimum 10  
µF or larger ceramic capacitor.  
TX2/INT/GPIO2 Configurable as a Dual-Polarity Power Amplifier Synchronization Input, an Interrupt Output, or as  
a General Purpose Logic I/O. This pin has an internal 300 kpulldown to GND.  
D2  
D3  
SDA  
SCL  
Serial Data Input/Output. High impedance in shutdown or in power down.  
Serial Clock Input. High impedance in shutdown or in power down.  
Logic High Hardware Enable. HWEN is a high impedance input and is normally connected with  
an external pull up resistor to a logic high voltage.  
D4  
HWEN  
3
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Absolute Maximum Ratings (Note 1, Note  
2)  
Operating Ratings (Note 1, Note 2)  
VIN  
2.5V to 5.5V  
-40°C to +125°C  
-40°C to +85°C  
Junction Temperature (TJ)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
Ambient Temperature (TA)  
(Note 5)  
VIN  
-0.3V to 6V  
Thermal Properties  
VSCL, VSDA, VHWEN, VSTROBE, VTX1  
VTX2, VLED1, VLED2, VLEDI/NTC  
,
-0.3V to the  
lesser of (VIN  
+0.3V) w/ 6.0V  
max  
Thermal Junction-to-Ambient  
Resistance (θJA  
(Note 6)  
)
50.4°C/W  
VSW, VOUT  
-0.3V to +6V  
ESD Caution Note:  
Continuous Power Dissipation  
National Semiconductor recommends that all integrated cir-  
cuits be handled with appropriate ESD precautions. Failure to  
observe proper ESD handling techniques can result in dam-  
age to the device.  
(Note 3)  
Junction Temperature (TJ-MAX  
Internally Limited  
+150°C  
)
Storage Temperature Range  
Maximum Lead Temperature  
(Soldering)  
-65°C to +150°C  
(Note 4)  
ESD Rating  
2kV  
(Human Body Model)  
Electrical Characteristics (Note 2, Note 7)  
Limits in standard typeface are for TA = +25°C. Limits in boldface type apply over the full operating ambient temperature range  
(-40°C TA +85ºC). Unless otherwise specified, VIN = 3.6V, VHWEN = VIN.  
Symbol  
Parameter  
Conditions  
Min  
-7%  
-4%  
Typ  
Max  
+7%  
+4%  
Units  
Current Source Specifications  
900 mA  
Flash  
Current  
Setting, per  
current  
source  
-40°C TA  
+85°C  
1800  
TA = +25°C  
ILED1+ILED2,  
Current Source  
Accuracy  
ILED  
mA  
3.0V VIN 4.2V,  
VOUT = 4.5V  
28.125 mA  
Torch  
Current ,  
per current  
source  
-40°C TA  
+85°C  
-10%  
4.925  
56.2  
270  
+10%  
5.075  
Current Source  
Regulation  
Voltage  
ILED = 1.8A (ILED1 + ILED2  
)
VOUT - VLED1/2  
mV  
V
VOUT = 4.5V  
Output Over-  
Voltage Protection  
Trip Point(Note 9)  
ON Threshold  
OFF Threshold  
5
VOVP  
4.88  
Step-Up DC/DC Converter Specifications  
PMOS Switch On-  
Resistance  
RPMOS  
RNMOS  
IPMOS = 1A  
80  
80  
mΩ  
mΩ  
NMOS Switch On-  
Resistance  
INMOS = 1A  
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4
Symbol  
Parameter  
Conditions  
Min  
1.2  
Typ  
Max  
1.6  
Units  
Flash  
Duration  
Register  
Bits [6:5] =  
00  
1.4  
Flash  
Duration  
Register  
Bits [6:5] =  
01  
1.8  
2.4  
2.9  
2.1  
2.7  
3.2  
2.3  
3
Switch Current  
Limit (Note 8)  
ICL  
A
3.0V VIN 4.2V  
Flash  
Duration  
Register  
Bits [6:5] =  
10  
Flash  
Duration  
Register  
Bits [6:5] =  
11  
3.5  
Output Short-  
Circuit Current  
Limit  
IOUT_SC  
VOUT < 2.3V  
350  
18  
mA  
mA  
Register 0x12, bits[2:0] = 111, 2.7V ≤  
VIN 4.2V, VLEDI/NTC = 2V  
ILEDI/NTC  
Indicator Current  
16  
20  
Configuration Register 1, bit [4] = 1,  
Comparator Trip  
Threshold  
VTRIP  
fSW  
0.97  
1.8  
1
2
1.03  
2.2  
V
3.0V VIN 4.2V  
Switching  
Frequency  
MHz  
2.7V VIN 5.5V  
Device Not Switching, VOUT = 3V  
Device Switching, VOUT = 4.5V  
650  
µA  
Quiescent Supply  
Current  
1.55  
mA  
IQ  
Indicate Mode, Indicator Register Bits  
[2:0] = 111,VLEDI/NTC = 2V  
590  
750  
1
µA  
µA  
Shutdown Supply  
Current  
HWEN =  
GND  
ISHDN  
2.7V VIN 5.5V  
HWEN =  
VIN, Enable  
Standby Supply  
Current  
ISTBY  
1.25  
2.4  
µA  
2.7V VIN 5.5V  
Register  
Bits [1:0] =  
00  
VIN Monitor  
Threshold  
VIN_TH  
VIN Monitor Register = 0x01  
VIN Monitor Register = 0x08  
TX_ Low to High,  
2.85  
2.85  
2.9  
2.9  
2.95  
2.95  
V
V
VIN Flash Monitor  
Threshold  
VIN_FLASH_TH  
Flash-to-Torch  
LED Current  
Settling Time  
tTX  
20  
16  
µs  
ILED1 + ILED2 = 1.8A to 112.5mA  
Time from when  
ILED hits target until  
VLED data is  
available  
ADC Delay Register Bit [5] = 1  
tD  
µs  
V
ADC Delay Register Bit [5] = 0  
ADC Delay Register Bits [4:0] = 0000  
250  
4.6  
VF_ADC  
ADC Threshold  
VLED Monitor Register Bits [3:0] = 1111  
4.4  
4.8  
5
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Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
HWEN, STROBE, TX1/TORCH/GPIO1, TX2/INT/GPIO2 Voltage Specifications  
VIL  
VIH  
Input Logic Low  
Input Logic High  
0
0.4  
VIN  
V
V
2.7V VIN 5.5V  
2.7V VIN 5.5V  
1.2  
Internal Pulldown  
Resistance on  
TX1, TX2,  
RPD  
300  
kΩ  
STROBE  
I2C-Compatible Voltage Specifications (SCL, SDA)  
VIL  
VIH  
Input Logic Low  
Input Logic High  
0
0.4  
VIN  
V
V
2.7V VIN 5.5V  
1.3  
2.7V VIN 5.5V  
ILOAD = 3mA,  
Output Logic Low  
(SDA)  
VOL  
0.4  
V
2.7V VIN 5.5V  
I2C-Compatible Timing Specifications (SCL, SDA) (Note 10)  
SCL(Clock  
Frequency)  
1/t1  
400  
kHz  
ns  
Data In Setup  
Time to SCL High  
t2  
100  
0
Data Out Stable  
After SCL Low  
t3  
ns  
SDA Low Setup  
t4  
Time to SCL Low  
(Start)  
100  
100  
ns  
ns  
SDA High Hold  
Time After SCL  
High (Stop)  
t5  
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of  
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see  
the Electrical Characteristics table.  
Note 2: All voltages are with respect to the potential at the GND pin.  
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=+150°C (typ.) and disengages at  
TJ=+135°C (typ.). Thermal shutdown is guaranteed by design.  
Note 4: For detailed soldering specifications and information, please refer to National Semiconductor Application Note 1112: Micro SMD Wafer Level chip Scale  
Package (AN-1112)  
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be  
derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = +125ºC), the maximum power  
dissipation of the device in the application (PD-MAX), and the junction-to-ambient thermal resistance of the part/package in the application (θJA), as given by the  
following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).  
Note 6: Junction-to-ambient thermal resistance (θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the  
JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm with a 2x1 array of thermal vias. The ground plane  
on the board is 50 mm x 50 mm. Thickness of copper layers are 36 µm/18 µm/18 µm/36 µm (1.5 oz/1oz/1oz/1.5 oz). Ambient temperature in simulation is 22°C,  
still air. Power dissipation is 1W.  
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical (Typ) numbers are not guaranteed, but do represent the most likely  
norm. Unless otherwise specified, conditions for typical specifications are: VIN = 3.6V and TA = +25ºC.  
Note 8: The typical curve for Current Limit is measured in closed loop using the typical application circuit, and increasing IOUT until the peak inductor current stops  
increasing. The value given in the Electrical Table is measured open loop and is found by forcing current into SW until the current limit comparator threshold is  
reached. Closed loop data appears higher due to the delay between the comparator trip point and the NFET turning off. This delay allows the closed loop inductor  
current to ramp higher after the trip point by approximately 20 ns × VIN/L  
Note 9: The typical curve for Over-Voltage Protection (OVP) is measured in closed loop using the typical application circuit . The OVP value is found by forcing  
an open circuit in the LED1 and LED2 path and recording the peak value of VOUT. The value given in the Electrical Table is found in an open loop configuration  
by ramping the voltage at OUT until the OVP comparator trips. The closed loop data can appear higher due to the stored energy in the inductor being dumped  
into the output capacitor after the OVP comparator trips. At worst case is an open circuit condition where the output voltage can continue to rise after the OVP  
comparator trips by approximately IIN×sqrt(L/COUT  
)
Note 10: Guaranteed by design, not production tested.  
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Typical Performance Characteristics VIN = 3.6V, COUT = 10µF, CIN = 10µF, L = 1µH (TOKO  
FDSD0312-1R0, RL = 43 m), Typical Application Circuit, unless otherwise noted.  
LED Efficiency vs VIN  
Dual LED's (Flash Brightness Codes 0xBB - 0xFF)  
LED Efficiency vs VIN  
Dual LED's (Flash Brightness Codes 0x88 - 0xAA)  
30102848  
30102849  
LED Efficiency vs VIN  
Dual LED's (Torch Brightness Codes 0x0F - 0xCF)  
LED Efficiency vs VIN  
Dual LED's (Torch Brightness Codes 0x00 - 0x04)  
30102853  
30102852  
Closed loop Current Limit vs VIN  
Closed loop Current Limit vs VIN  
Flash Duration Register bits [6:5]=00 (Note 8)  
Flash Duration Register bits [6:5]=01 (Note 8)  
30102885  
30102886  
7
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Closed loop Current Limit vs VIN  
Closed loop Current Limit vs VIN  
Flash Duration Register bits [6:5]=10 (Note 8)  
Flash Duration Register bits [6:5]=11 (Note 8)  
30102887  
30102888  
Standby Current vs VIN  
VHWEN=VIN, Enable Register = 0x18  
Shutdown Current vs VIN  
VHWEN= 0V  
30102898  
30102897  
Non-Switching Current vs VIN  
OVP Thresholds vs VIN (Note 9)  
30102861  
30102862  
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8
Switching Frequency vs VIN  
Indicator Currents vs VIN  
Indicator Register Bits [2:0] = 0x00  
30102863  
30102867  
Indicator Current vs VIN  
Indicator Register Bits [2:0] = 0x02  
Indicator Current vs VIN  
Indicator Register Bits [2:0] = 0x07  
30102868  
30102876  
ILED (Flash Mode) vs VIN  
ILED (Flash Mode) vs VIN  
LED1 and LED2 Connected Together  
LED1 and LED2 Connected Together  
(Upper 5 Flash Brightness Codes)  
(Middle 5 Flash Brightness Codes)  
30102872  
30102873  
9
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ILED (Torch Mode) vs VIN  
ILED (Torch Mode) vs VIN  
LED1 and LED2 Connected Together  
LED1 and LED2 Connected Together  
(Upper 4 Torch Brightness Codes)  
(Lower 4 Torch Brightness Codes)  
30102875  
30102874  
STROBE High to Flash LED Current  
VIN Monitor Operation  
30102882  
30102877  
VIN Flash Monitor Operation  
NTC Mode Operation  
30102883  
30102884  
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10  
AET Mode Operation  
HWEN Operation  
Device Enabled in Flash Mode  
30102878  
30102879  
TX1 Interrupt (Force Torch)  
TX2 Interrupt (Force Shutdown)  
TX2 Active High  
30102880  
30102881  
11  
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Block Diagram  
30102805  
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12  
programming for the LED currents in either LED1 or LED2.  
(See TORCH BRIGHTNESS REGISTER and FLASH  
BRIGHTNESS REGISTER Descriptions.)  
Overview  
The LM3559 is a high-power white LED flash driver capable  
of delivering up to 1.8A of LED current into a single LED, or  
up to 900 mA into two parallel LEDs. The device incorporates  
a 2MHz constant frequency, synchronous boost converter,  
and two high side current sources to regulate the LED current  
over the 2.5V to 5.5V input voltage range.  
PASS MODE  
At turn-on when the output voltage charges up to (VIN – 150  
mV), the LM3559 will decide if the part operates in Pass Mode  
or Boost mode. If the voltage difference between VOUT and  
VLED is less than 270 mV, the device operates in Boost Mode.  
If the difference between VOUT and VLED is greater than 270  
mV, the device operates in Pass Mode. In Pass Mode the  
boost converter stops switching, and the synchronous PFET  
During operation when the output voltage is greater than VIN  
– 150mV the boost converter switches and maintains at least  
270 mV across both current sources (LED1 and LED2). This  
minimum headroom voltage ensures that the current sinks  
remain in regulation. When the input voltage rises above the  
LED voltage + current source headroom voltage, the device  
stops switching and turns the PFET on continuously (Pass  
turns fully on bringing VOUT up to VIN – IIN x RPMOS (RPMOS  
=
80 m). In Pass Mode the inductor current is not limited by  
the peak current limit. In this situation the output current must  
be limited to 3A.  
mode). In Pass mode the difference between (VIN - ILED  
x
RON_P), and the voltage across the LEDs is dropped across  
the current sources.  
OVER-VOLTAGE PROTECTION  
The output voltage is limited to typically 5V (5.075V max). In  
situations such as the current source open, the LM3559 will  
raise the output voltage in order to try to keep the LED current  
at its target value. When VOUT reaches 5V the over-voltage  
comparator will trip and turn off both the internal NFET and  
PFET switches. When VOUT falls below 4.88V (typical), the  
LM3559 will begin switching again.  
Four hardware control pins provide control of the LM3559.  
These include a hardware Flash Enable (STROBE), Dual  
Flash Interrupt inputs (TX1 and TX2) designed to interrupt the  
flash pulse during high-battery current conditions, and a logic  
high hardware enable (HWEN) that can be pulled low to rapid-  
ly place the device into shutdown. Additional features of the  
LM3559 include an internal 4-bit ADC for LED voltage moni-  
toring, an internal comparator for LED thermal sensing via an  
external NTC thermistor, a battery voltage monitor during  
flash current turn-on which monitors VIN and optimizes the  
flash current during low-battery voltage conditions, an input  
voltage monitor that can force Torch mode or LED shutdown  
of the Flash current during input under voltage conditions, a  
low-power Indicator current source with programmable pat-  
terns, and a mode for utilizing the flash LEDs as a privacy  
indicator.  
Control of the LM3559 is done via an I2C-compatible inter-  
face. This includes adjustment of the Flash and Torch current  
levels, adjustment of the indicator LED currents and indicator  
pattern, changing the Flash Timeout Duration, changing the  
switch current limit, and reading back the ADC results. Addi-  
tionally, there are 8 flag bits that indicate flash current timeout,  
LED over-temperature, LED failure (by sensing LED short or  
output OVP condition during Flash, Torch, or Privacy mode),  
device thermal shutdown, VIN under-voltage condition, trip-  
ping of the VIN Flash Monitor, and the occurrence of a TX  
interrupt (both TX1 and TX2).  
CURRENT LIMIT  
The LM3559 features 4 selectable current limits: 1.4A, 2.1A,  
2.7A, and 3.2A. These are programmable through the I2C-  
compatible interface via bits [6:5] of the Flash Duration Reg-  
ister. When the current limit is reached, the LM3559 stops  
switching for the remainder of the switching cycle.  
Since the current limit is sensed in the NMOS switch there is  
no mechanism to limit the current when the device operates  
in Pass Mode. In situations where there could potentially be  
large load currents at OUT and the LM3559 is operating in  
Pass mode, the load current must be limited to 3A. In Boost  
mode or Pass mode, if VOUT falls below approximately 2.3V  
the part stops switching, and the PFET operates as a current  
source, limiting the current to typically 350 mA. This prevents  
damage to the LM3559, and excessive current draw from the  
battery during output short-circuit conditions.  
FLASH MODE  
In Flash mode the LED current sources (LED1 and LED2)  
each provide 16 different current levels from typically 56.25  
mA (total) to 1.8A (total) in steps of 56.25 mA. The Flash cur-  
rents are adjusted via the Flash Brightness Register. Flash  
mode is activated by writing a (1, 1) to bits [1:0] of the Enable  
Register or by enabling the hardware flash input (STROBE)  
via bit [2] of Configuration Register 1 and then pulling the  
STROBE pin high (high polarity). Once the Flash sequence  
is activated both current sinks (LED1 and LED2) will ramp up  
to their programmed Flash current level by stepping through  
all Torch and Flash levels (32 µs/step) until the programmed  
current is reached.  
STARTUP (ENABLING THE DEVICE)  
Turn-on of the LM3559 is done through bits [1:0] of the Enable  
Register. Bits [1:0] enable the device in Torch mode, Flash  
mode, or Privacy Indicate mode. Additionally, bit 6 enables  
the message indicator at the LEDI/NTC pin. On startup, when  
VOUT is less than VIN, the internal synchronous PFET turns on  
as a current source and delivers 350 mA to the output capac-  
itor. During this time both current sources (LED1, and LED2)  
are off. When the voltage across the output capacitor reaches  
2.2V the active current sources can turn on. At turn-on the  
current sources step through each FLASH and TORCH level  
until their target LED current is reached (32 µs/step). This  
gives the device a controlled turn-on and limits inrush current  
from the VIN supply.  
Bit [5] of the Enable Register (STROBE Level/Edge bit) de-  
termines how the Flash pulse terminates. With the Level/  
Edge bit = 1 the Flash current will only terminate when it  
reaches the end of the Flash timeout period. With the Level/  
Edge bit = 0, Flash mode can be terminated by pulling  
STROBE low, programming bits [1:0] of the Enable Register  
with (0,0), or by allowing the Flash timeout period to elapse.  
If the Level/Edge bit = 0 and STROBE is toggled before the  
end of the Flash timeout period the timeout period will reset.  
Figure 1 and Figure 2 detail the Flash pulse termination for  
the different Level/Edge bit settings.  
INDEPENDENT LED CONTROL  
Bits [4:3] of the Enable register provide for independent turn-  
on and turn-off of the LED1 or LED2 current sources. The LED  
current is adjusted by writing to the Torch Brightness or Flash  
Brightness Registers. Both the Torch Brightness and the  
Flash Brightness Register provide for independent current  
13  
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30102803  
FIGURE 1. LED Current for STROBE (Level Triggered, Enable Register Bit [5] = 0)  
STROBE Goes Low Before the End of the Programmed Timeout Duration  
30102804  
FIGURE 2. LED Current for STROBE (Edge Triggered, Enable Register Bit [5] = 1)  
After the Flash pulse terminates; either by a flash timeout,  
pulling STROBE low or disabling it via the I2C-compatible in-  
terface, LED1 and LED2 turn completely off. This happens  
even when Torch is enabled via the I2C-compatible interface,  
and the Flash pulse is turned on by toggling STROBE. After  
a Flash event ends, the EN1, EN0 bits (bits [1:0] of the Enable  
Register) are automatically reset with (0, 0). The exception  
occurs when the Privacy Terminate Bit is low (bit [3]) in the  
Privacy Register. In this case, the specific current source that  
is enabled for privacy mode will turn back on after the flash  
pulse if Privacy mode had been enabled before the flash  
pulse.  
durations in steps of 32 ms giving a Flash timeout range of 32  
ms to 1024 ms (see Table 5).  
TORCH MODE  
In Torch mode the current sources LED1 and LED2 each  
provide 8 different current levels (Table 3). Torch mode is ac-  
tivated by setting Enable Register bits [1:0] to (1, 0). Once  
Torch mode is enabled, the current sources will ramp up to  
the programmed Torch current level by stepping through all  
of the Torch currents at (32 µs/step) until the programmed  
Torch current level is reached.  
PRIVACY INDICATOR MODE  
FLASH TIMEOUT  
The current sources (LED1 and/or LED2) can also be used  
as a privacy indicator before and after flash mode. Privacy  
indicate mode is enabled by setting the Enable Register bit  
[1:0] to (0,1). Additionally, the Privacy Register contains the  
bits to select which current source to use as the privacy indi-  
cator (either LED1, LED2, or both), whether or not the privacy  
The Flash Timeout period sets the amount of time that the  
Flash Current is being sourced from current sources LED1  
and LED2. Bits [4:0] of the Flash Duration Register set the  
Flash Timeout period. There are 32 different Flash Timeout  
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indicate mode turns off at the end of the flash pulse, and con-  
tains the 8 intensity levels for the privacy indicator.  
[2:0] of the Privacy Register allow for 8 different duty cycles  
of 10%, 20%, 30%, 40%, 50%, 60%, 70%, and 80%. See  
Table 14 for Privacy Register Bit settings. Figure 3 details the  
timing for the Privacy Indicate Mode on ILED1 or ILED2.  
The intensity of the LEDs in privacy indicate mode is set by  
PWM’ing the lowest Torch current level (28.125 mA). Bits  
30102806  
FIGURE 3. Privacy Indicate Timing  
POWER AMPLIFIER SYNCHRONIZATION (TX1)  
pulled low before the Flash pulse terminates, the LED current  
will return to the previous Flash current level. At the end of the  
Flash timeout, whether the TX1/TORCH pin is high or low, the  
current sources will turn off.  
The TX1/TORCH/GPIO1 pin has a triple function. With Con-  
figuration Register 1 Bit [7] = 0 (default) TX1/TORCH/GPIO1  
is a Power Amplifier Synchronization input. This mode is de-  
signed to reduce the flash LED current when TX1 is pulled  
high (active high polarity) or low (active low polarity). When  
the LM3559 is engaged in a Flash event and the TX1/TORCH  
pin is pulled high, both LED1 and LED2 are forced into Torch  
mode at the programmed Torch current setting. If TX1 is then  
The polarity of the TX1 input can be changed from active high  
to active low by writing a '0' to bit [5] of Configuration Register  
1. With this bit set to ‘0’ the LM3559 will be forced into Torch  
mode when TX1/TORCH is pulled low. Figure 4 details the  
functionality of the TX1 Interrupt.  
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30102807  
FIGURE 4. TX1 or TX2 Interrupt Event  
30102822  
FIGURE 5. Hardware Torch Mode  
TX2/INT/GPIO2  
HARDWARE TORCH  
With Configuration Register 1 Bit [7] = 1, TX1/TORCH is con-  
figured as a hardware Torch mode enable. In this mode  
(TORCH mode), a high at TX1/TORCH turns on the LED cur-  
rent at the programmed Torch current setting. The STROBE  
input and I2C Enabled flash takes precedence over TORCH  
mode. In hardware torch mode, both LED1 and LED2 current  
sources will turn off after a flash event and Configuration  
Register 1 Bit [7] will be reset to 0. In this situation, to re-enter  
torch mode via hardware torch, the hardware torch enable bit  
(Configuration Register 1 Bit [7]) must be reset to 1. Figure  
5 details the functionality of the TX1/TORCH/GPIO1 input.  
The TX2/INT/GPIO2 pin has a triple function. In TX2 mode  
(Default) the TX2/INT/GPIO2 pin is an active high Flash in-  
terrupt. With GPIO Register bit [3] = 1 the TX2/INT/GPIO2 pin  
is configured as general purpose logic I/O. With GPIO Reg-  
ister bit [6] = 1, and with the TX2/INT/GPIO2 pin configured  
as a GPIO2 output, the TX2/INT/GPIO2 pin is an interrupt  
output.  
TX2 MODE  
In TX2 mode, when Configuration Register 1, bit [6] = 0, the  
TX2/INT/GPIO2 pin has active low polarity. Under this condi-  
tion when the LM3559 is engaged in a Flash event and TX2  
is pulled low, both LED1 and LED2 are forced into Torch  
mode. In TX2 mode with Configuration Register 1, bit [6] = 1  
the TX2/INT/GPIO2 input has active high polarity. Under this  
condition when the LM3559 is engaged in a Flash event and  
the TX2/INT/GPIO2 pin is driven high, both LED1 and LED2  
are forced into Torch mode. During a flash interrupt event if  
the TX2/INT/GPIO2 input is disengaged the LED current will  
GPIO1 MODE  
With Bit [0] of the GPIO Register set to 1, the TX1/TORCH/  
GPIO1 pin is configured as a logic I/O. In this mode the TX1/  
TORCH/GPIO1 pin is readable and writable as a logic input/  
output via bits [2:1] of the GPIO Register. See Table 9.  
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return to the previous Flash current level. During a flash event,  
if TX2 is active, the LED current sources will still turn off after  
the Flash timeout. Figure 4 details the functionality of the TX2  
Interrupt.  
INTERRUPT OUTPUT (INT MODE)  
The TX2/INT/GPIO2 pin can be reconfigured as an active low  
interrupt output by setting bit [6] in the GPIO Register to ‘1’  
and configuring TX2/INT/GPIO2 as a GPIO2 output. In this  
mode, TX2/INT/GPIO2 will pull low when any of these condi-  
tions exist.  
TX2 Shutdown  
TX2 also has the capability to force shutdown. Bit [0] of Con-  
figuration Register 2 set to a '1' changes the TX2 mode from  
a force Torch when active to a force shutdown when active.  
For example, if TX2/INT/GPIO2 is configured for TX2 mode  
with active high polarity, and bit [0] of Configuration Register  
2 is set to '1' then when TX2 is driven high, the active current  
sources (LED1 and/or LED2) will be forced into shutdown.  
Once the active current sources are forced into shutdown by  
activating TX2, the current sources can only be re-enabled if  
TX2 is deactivated and the Flags Register is read back.  
1. The LM3559 is configured for NTC mode (Configuration  
Register 1 bit [4] = 1) and the voltage at LEDI/NTC has  
fallen below VTRIP (1V typical).  
2. The LM3559 is configured for VIN Monitor mode (VIN  
Monitor Register bit [0] = 1) and VIN is below the  
programmed VIN Monitor Threshold.  
3. The LM3559 is configured for VIN Flash Monitor mode  
(VIN Monitor Register bit [3] = 1) and VIN falls below the  
programmed VIN Flash Monitor Threshold. Figure 6  
details the functionality of the TX2/INT/GPIO2 input.  
GPIO2 MODE  
Once INT is pulled low due to any of the above conditions  
having been met, INT will only go back high again if any of the  
conditions are no longer true and the Flags Register is read.  
With Bit [3] of the GPIO Register set to 1, the TX2/INT/GPIO2  
pin is configured as a logic I/O. In this mode the TX2/INT/  
GPIO2 pin is readable and writeable as a logic input/output  
via bits [5:4] of the GPIO Register. See Table 9.  
30102808  
FIGURE 6. TX2 As an Interrupt Output (During an NTC Event)  
INDICATOR LED/THERMISTOR (LEDI/NTC)  
The Indicator Blinking Register controls the following (see  
Table 17):  
The LEDI/NTC pin serves a dual function, either as a pro-  
grammable LED message indicator driver, or as a comparator  
input for negative temperature coefficient (NTC) thermistors.  
1. Number of blank periods (BLANK #). This has 16  
settings. tBLANK = tACTIVE × BLANK# , where tACTIVE  
tPERIOD × PERIOD#  
=
MESSAGE INDICATOR CURRENT SOURCE (LEDI/NTC)  
2. Pulse width (tPULSE) has 16 settings between 0 and 480  
ms in steps of 32 ms. The pulse width is the duration  
which the indicator current is at its programmed set point  
at the end of the ramp-up time.  
LEDI/NTC is configured as a message indicator current  
source by setting Configuration Register 1 bit [4] = 0. The in-  
dicator current source is enabled/disabled via Enable Regis-  
ter bit [6]. Enable Register bit [7] programs the Message  
Indictor for blinking mode. When the message indicator is set  
for blinking mode the pattern programmed into the Indicator  
Register and Indicator Blinking Register is sent to the Mes-  
sage Indicator current source.  
The Indicator Register controls the following (see Table 16):  
1. Indicator current level (IIND). There are 8 message  
indicator current levels from 2.25 mA to 18 mA in steps  
of 2.25 mA.  
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2. Number of periods (PERIOD #). This has 8 steps. A  
period (tPERIOD) is found by (tPERIOD = tR + tF + 2 x  
tPULSE). (See Figure 7 for indicator timing).  
ms, 156 ms, 312 ms, and 624 ms are available. The ramp  
times apply for both ramp-up and ramp-down and are not  
independently changeable.  
3. Ramp times (tR or tF) for turn-on and turn-off of the  
indicator current source. Four programmable times of 78  
30102812  
FIGURE 7. Message Indicator Timing Diagram  
Message Indicator Example 1 (Single Pulse with Dead  
Time):  
lows. tR = tF = 312 ms, tWIDTH = 192 ms (tPERIOD = 312 ms x 2  
+ 192 ms x 2 = 1016 ms). BLANK# setting will be: 5s/1016  
ms x 1 (PERIOD# = 1). Giving a BLANK# setting of 5. The  
resulting waveform will appear as:  
As an example, to set up the message indicator for a 312 ms  
ramp-up and ramp-down, 192 ms pulse width, and 1 pulse  
followed by a 5s delay. The indicator settings will be as fol-  
30102813  
FIGURE 8. Message Indicator Example 1  
Message Indicator Example 2 (Multiple Pulses with Dead  
Time):  
tACTIVE time is tPERIOD × 3 = 1016 ms × 3 = 3048 ms. This  
results in a blank time of tBLANK = tACTIVE × BLANK# = 3.048s  
× 5 = 15.24s  
Another example has the same tR, tF, tPULSE, and tBLANK times  
as before, but this time the PERIOD# is set to 3. Now the  
30102814  
FIGURE 9. Message Indicator Example 2  
Updating the Message Indicator  
NTC MODE  
The best way to update the message indicator is to disable  
the Message Indicator output via the Enable Register bit [7],  
write the new sequence to the Indicator Register and/or Indi-  
cator Blinking Register, and then re-enable the Message  
Indicator. Updating the Indicator Registers on the fly can lead  
to long delays between pattern changes. This is especially  
true if the PERIOD#, or BLANK# setting is changed from a  
high setting to a lower setting.  
Writing a (1) to Configuration Register 1 bit [4] configures the  
LEDI/NTC pin for NTC mode. In this mode the indicator cur-  
rent source is disabled and LEDI/NTC becomes the positive  
input to the NTC comparator. NTC mode operates as a LED  
current interrupt that is triggered when the voltage at LEDI/  
NTC goes below 1V.  
Two actions can be taken when the NTC comparator is  
tripped. With Configuration Register 2 bit [1] set to ‘0’ the NTC  
interrupt will force the LED current from Flash mode into Torch  
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mode. With Configuration Register 2 bit [1] set to ‘1’ the NTC  
interrupt will force the LED current into shutdown.  
mode only during a Flash event. For example, if TX1/TORCH  
goes high while the LED current is in Flash mode, the LEDs  
will be forced into Torch mode only for the duration of the  
timeout counter. At the end of the timeout counter the LEDs  
will turn off.  
Whether in NTC force torch or NTC shutdown, in order to re-  
enter flash mode or torch mode after an NTC event, two things  
must occur. First, the NTC input must be above the 1V thresh-  
old. Secondly, the Flags Register must be read.  
With Configuration Register 2 bit [2] set to (1) the LM3559 is  
configured for AET mode and the operation of TX1/TORCH  
becomes dependent on its occurrence relative to the  
STROBE input. In this mode, if TX1/TORCH goes high first,  
then STROBE goes high next, the LEDs are forced into Torch  
mode with no timeout. In this mode, if TX1/TORCH goes high  
after STROBE has gone high, then the TX1/TORCH pin op-  
erates as a normal LED current interrupt and the LEDs will  
turn off at the end of the timeout duration (see Figure 10 for  
a detailed operation of this mode).  
To avoid noise from falsely triggering the NTC Comparator,  
this mode incorporates a 250 µs deglitch timer. With NTC  
mode active, VLEDI/NTC must go below the trip point (VTRIP) and  
remain below it, for 250 µs before the LEDs are forced into  
Torch mode (or shutdown) and the NTC Flag is written.  
ALTERNATE EXTERNAL TORCH (AET MODE)  
Configuration Register 2 bit [2] programs the LM3559 for Al-  
ternative External Torch mode. With this bit set to (0) (default)  
TX1/TORCH is a flash current interrupt that forces Torch  
30102810  
FIGURE 10. AET Mode Timing  
VIN MONITOR  
or LED2) will either turn off or be forced into the Torch current  
setting. To reset the LED current to its previous level, VIN must  
go above the VIN Monitor threshold and the Flags register  
must be read back. See Figure 11 for the VIN Monitor Timing  
Waveform.  
The LM3559 has an internal comparator at IN that monitors  
the input voltage and can force the LED current into Torch  
mode or into shutdown, if VIN falls below the programmable  
VIN Monitor Threshold. Bit 0 in the VIN Monitor Register en-  
ables or disables this feature. Bits [2:1] of the VIN Monitor  
Register program the 4 adjustable thresholds of 2.9V, 3.0V,  
3.1V, and 3.2V. Bit 3 in Configuration Register 2 selects  
whether an undervoltage event forces Torch mode or forces  
the LEDs off. See Table 13 for additional information. When  
the VIN Monitor is active and VIN falls below the programmed  
VIN Monitor threshold, the active current sources (LED1 and/  
To avoid noise from falsely triggering the VIN Monitor, this  
mode incorporates a 250 µs deglitch timer. With the VIN Mon-  
itor active, VIN must go below the VIN Monitor Threshold  
(VIN_TH) and remain below it for 250 µs before the LEDs are  
forced into Torch mode (or shutdown) and the VIN Monitor  
Flag is written.  
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30102809  
FIGURE 11. VIN Monitor Waveform  
VIN FLASH MONITOR (FLASH CURRENT RISING)  
below the VIN Flash Monitor Threshold (VIN_FLASH) and re-  
main below it for 8 µs before the flash current ramp is halted  
and the VIN Flash Monitor Flag is written.  
A second comparator at IN is available to monitor the input  
voltage during the flash current turn-on. Bit [3] of the VIN  
Monitor Register enables/disables this feature. With this bit  
set to ‘1’ the VIN Flash Monitor is active. Bits [5:4] of the VIN  
Monitor Register program the 4 selectable thresholds of  
(2.9V, 3.0V, 3.1V, and 3.2V). The feature operates as follows:  
during flash current turn-on the active current sources (LED1  
and/or LED2) will transition through each of the lower flash  
and torch current levels until the target flash current is  
reached. With the VIN Flash Monitor active, if during the flash  
current turn-on, the input voltage falls below the VIN Flash  
Monitor threshold, the flash current is set to the level that the  
current ramp had risen to at the time of the undervoltage  
event. The Input Voltage Flash Monitor only operates during  
the ramping up of the flash LED current.  
LAST FLASH REGISTER  
Once the VIN Flash Monitor is tripped, the flash code that  
corresponded to the LED current at which the flash current  
ramp was halted is written to the Last Flash Register. The Last  
Flash Register is a read-only register; the lower 4 bits are  
available to latch the code for LED1 and the upper 4 bits to  
latch the code for LED2.  
For example, suppose that the LM3559 is set up for a single  
LED with a target flash current of 1125 mA. The VIN Flash  
Monitor is enabled with the VIN Flash Monitor threshold set  
to 3.0V (VIN Monitor Register bits [5:4] = 0, 1). When the  
STROBE input is brought high, the LED current begins ramp-  
ing up through the torch and flash codes at 32 µs/code. As  
the input current increases, the input voltage at the LM3559’s  
IN pin begins to fall due to the source impedance of the bat-  
tery. By the time the LED current has reached 900 mA (code  
0x77 or 450 mA per current source), VIN falls below 3.0V. The  
VIN Flash Monitor will then stop the flash current ramp and  
the LM3559 will continue to proceed with the flash pulse, but  
at 900 mA instead of 1125 mA. Figure 12 details this se-  
quence.  
The VIN Flash Monitor ignores the first 2 flash codes during  
the flash pulse turn on. As a result, if the VIN Flash Monitor is  
enabled and VIN were to fall below the VIN Flash Threshold  
as the LED current ramps up through either of the first two  
levels, then the flash pulse would not be halted until code #3  
(168.75 mA per current source).  
To avoid noise from falsely triggering the VIN Flash Monitor,  
this mode incorporates an 8 µs deglitch timer as well as an  
internal analog filter at the input of the VIN Flash Monitors  
Comparator. With the VIN Flash Monitor active, VIN must go  
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30102815  
FIGURE 12. VIN Flash Monitor Example  
LED VOLTAGE MONITOR  
this bit is set high the EOC bit (bit [6]) goes low and a con-  
version is performed. When the conversion is complete, the  
EOC bit goes high again. Subsequent conversions are per-  
formed in manual mode by reading back the VLED Monitor  
register, which resets the EOC bit and starts another conver-  
sion (see Figure 14).  
The LM3559 includes a 4-bit ADC which monitors the LED  
forward voltage (VLED) and stores the digitized value in bits  
[3:0] of the VLED Monitor Register. The highest voltage of  
VLED1 or VLED2 is automatically sensed and that becomes  
the sample point for the ADC. Bit 5, the ADC shutdown bit,  
enables/disables the ADC with the default state set to enable  
(bit [5] = 0).  
ADC DELAY  
The ADC Delay register provides for a programmable delay  
from 250 µs to 8 ms, in steps of 250 µs. This delay is the delay  
from when the EOC bit goes low to when the VLED Monitor  
samples the LED voltage. In Automatic Mode the EOC bit  
goes low when the Flash LED current hits its target. In Manual  
mode the EOC bit goes low at the end of a readback of the  
VLED Monitor Register (or when the manual mode bit (bit 4)  
is re-written with a 1). Figure 13 and Figure 14 detail the timing  
of the VLED Monitor for both Automatic mode and Manual  
mode.  
AUTOMATIC CONVERSION MODE  
With the ADC enabled, a conversion is performed each time  
a flash pulse is started. When a flash pulse is started bit [6] of  
the VLED Monitor Register (End of Conversion bit) is auto-  
matically written with a ‘0’. At the end of the conversion, bit [6]  
will go high signaling that the VLED data is valid. A read back  
of the VLED Monitor register will clear the EOC bit. Figure  
13 details the VLED Monitor Automatic Conversion.  
MANUAL CONVERSION MODE  
The VLED Monitor can be set up for manual conversion mode  
by setting bit [4] of the VLED Monitor Register to '1'. When  
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30102821  
FIGURE 13. VLED Monitor Automatic Mode  
30102823  
FIGURE 14. VLED Monitor Manual Mode  
FLAGS REGISTER AND FAULT INDICATORS  
THERMAL SHUTDOWN  
Eight fault flags are available in the LM3559. These include:  
a Flash Timeout, a Thermal Shutdown, an LED Failure Flag  
(LEDF), an LED Thermal Flag (NTC), a VIN Monitor Flag, and  
a VIN Flash Monitor Flag. Additionally, two LED interrupt flag  
bits (TX1 interrupt and TX2 interrupt) are set when the corre-  
sponding interrupt is activated. Reading back a "1" indicates  
the flagged event has happened. A read of the Flags Register  
resets these bits.  
When the LM3559’s die temperature reaches +150°C, the  
boost converter shuts down, and the NFET and PFET turn off.  
Additionally, the active current source (LED1 and/or LED2)  
turn off. When the thermal shutdown threshold is tripped a (1)  
gets written to bit [1] of the Flags Register (Thermal Shutdown  
bit). The LM3559 will not start up again until the die temper-  
ature falls to below +135°C and the Flags Register is read  
back, or when the device is shut down and started up again.  
FLASH TIMEOUT  
LED FAULT  
The Timeout or (TO flag), (bit [0] of the Flags Register), reads  
back a (1) if the LM3559 is active in Flash mode and the  
Timeout period expires before the Flash pulse is terminated.  
The flash pulse can be terminated before the Timeout period  
expires by pulling the STROBE pin low (with Enable Register  
bit [5] = 0), or by writing a (0,0) to bits [1:0] of the Enable  
Register. The TO flag is reset to (0) by pulling HWEN low,  
removing power to the LM3559, reading the Flags Register,  
or when the next Flash pulse is triggered.  
The LED Fault flag (bit 2 of the Flags Register) reads back a  
(1) if the part is active in Flash or Torch mode and either LED1  
or LED2 experience an open or short condition. An LED open  
condition is signaled if the OVP threshold is crossed at the  
OUT pin while the device is in Flash or Torch mode. An LED  
short condition is signaled if the voltage at LED1 or LED2 goes  
below 500 mV while the device is in Torch or Flash mode. In  
an LED open condition there is a 2 µs deglitch time from when  
the output voltage crosses the OVP threshold to when the  
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LED Fault Flag is triggered. In an LED short condition there  
is a 250 µs deglitch time before the LED Fault Flag is set. The  
LED Fault Flag can only be reset to (0) by pulling HWEN low,  
doing a power on reset of the LM3559, or by removing the  
fault condition and reading back the Flags Register.  
VTRIP (1V typical). When this has happened and the LM3559  
has been forced into Torch mode or LED shutdown (depend-  
ing on the state of Configuration Register 2 bit [1), the Flags  
Register must be read, and the voltage at NTC must go above  
1V in order to place the device back in normal operation. (See  
NTC MODE section for more details).  
TX1 AND TX2 INTERRUPT FLAGS  
INPUT VOLTAGE FLASH MONITOR FAULT  
The TX1 and TX2 interrupt flags (bits [3] and [4]) indicate an  
interrupt event has occurred on the respective TX inputs. Bit  
3 will read back a (1) if TX1 is in TX mode and there has been  
a TX1 event since the last read of the Flags Register. Bit 4  
will read back a (1) if TX2 is in TX mode and there has been  
a TX2 event since the last read of the Flags Register. A read  
of the Flags Register automatically resets these bits. A TX  
event on TX1 or TX2, can be a high-to-low transition or a low-  
to-high transition depending on the setting of the TX1 and TX2  
polarity bits (see Configuration Register 1 Bits [6:5]).  
The VIN Flash Monitor Flag (bit [6] of the Flags Register) reads  
back a '1' when the Input Voltage Flash Monitor is enabled  
and VIN falls below the programmed VIN Flash Monitor  
threshold. This flag must be read back in order to resume  
normal operation after the LED current has been forced to the  
lower flash current setting.  
INPUT VOLTAGE MONITOR FAULT  
The VIN Monitor Flag (bit [7] of the Flags Register) reads back  
a '1' when the Input Voltage Monitor is enabled and VIN falls  
below the programmed VIN Monitor threshold. This flag must  
be read back and VIN must go above the VIN Monitor thresh-  
old in order to resume normal operation.  
LED THERMAL FAULT (NTC Flag)  
The NTC flag (bit [5] of the Flags Register) reads back a '1' if  
the LM3559 is active in Flash or Torch mode, the device is in  
NTC mode, and the voltage at LEDI/NTC has fallen below  
I2C-Compatible Interface  
START AND STOP CONDITIONS  
The LM3559 is controlled via an I2C-compatible interface.  
START and STOP conditions classify the beginning and end  
of the I2C session. A START condition is defined as SDA  
transitioning from HIGH to LOW while SCL is HIGH. A STOP  
condition is defined as SDA transitioning from LOW to HIGH  
while SCL is HIGH. The I2C master always generates the  
START and STOP conditions.  
30102818  
FIGURE 15. Start and Stop Sequences  
The I2C bus is considered busy after a START condition and  
free after a STOP condition. During data transmission the  
I2C master can generate repeated START conditions. A  
START and a repeated START condition are equivalent func-  
tion-wise. The data on SDA must be stable during the HIGH  
period of the clock signal (SCL). In other words, the state of  
SDA can only be changed when SCL is LOW. Figure 16  
shows the SDA and SCL signal timing for the I2C-Compatible  
Bus. See the Electrical Characteristics Tables for timing  
values.  
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30102819  
FIGURE 16. I2C-Compatible Timing  
I2C-COMPATIBLE CHIP ADDRESS  
The device address for the LM3559 is 1010011 (0xA7 for read  
and 0xA6 for write)). After the START condition, the I2C mas-  
ter sends the 7-bit address followed by an eighth read or write  
bit (R/W). R/W = 0 indicates a WRITE and R/W = 1 indicates  
a READ. The second byte following the device address se-  
lects the register address to which the data will be written. The  
third byte contains the data for the selected register.  
30102820  
FIGURE 17. Device Address  
TRANSFERRING DATA  
Every byte on the SDA line must be eight bits long, with the  
most significant bit (MSB) transferred first. Each byte of data  
must be followed by an acknowledge bit (ACK). The acknowl-  
edge related clock pulse (9th clock pulse) is generated by the  
master. The master releases SDA (HIGH) during the 9th clock  
pulse (write mode). The LM3559 pulls down SDA during the  
9th clock pulse, signifying an acknowledge. An acknowledge  
is generated after each byte has been received.  
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24  
 
Register Descriptions  
TABLE 1. LM3559 Internal Registers  
Register Name  
Enable  
Internal Hex Address  
Power On/RESET Value  
0x10  
0x11  
0x12  
0x13  
0x14  
0x20  
0x30  
0x31  
0x80  
0x81  
0xA0  
0xB0  
0xC0  
0xD0  
0xE0  
0xF0  
0x18  
0x58  
0x00  
0x00  
0xF0  
0x80  
0x80  
0xC0  
0xC0  
0x00  
0x52  
0xDD  
0x6F  
0x00  
0x68  
0xF0  
Privacy  
Indicator  
Indicator Blinking  
Privacy PWM  
GPIO  
VLED Monitor (ADC)  
ADC Delay  
VIN Monitor  
Last Flash  
Torch Brightness  
Flash Brightness  
Flash Duration  
Flags  
Configuration 1  
Configuration 2  
ENABLE REGISTER  
Bit [5] sets the level or edge control for the STROBE input.  
Bits 7 and 6 control the Indicator current source (see Table  
2).  
Bits [1:0] of the Enable Register controls the on/off state of  
Torch mode, Flash mode, and Privacy Indicate mode. Bits  
[4:3] turn on/off the main current sources (LED1 and LED2).  
TABLE 2. Enable Register Descriptions  
Bit 7  
Bit 6  
Bit 5  
Bit 4 Bit 3  
Bit 2  
Bit 1  
Bit 0  
(EN Blink)  
(EN  
Message  
Indicator)  
(STROBE  
Level/Edge)  
(LED2 (LED1  
Enable) Enable)  
(Not Used) (EN1)  
(EN0)  
0 = Message 0 = Message 0 = (Level Sensitive) 0 = LED2 off 0 = LED1 off N/A  
Enable Bits  
Indicator  
Blinking  
Function is  
Indicator is  
disabled  
(default)  
When STROBE goes 1 = LED2 on 1 = LED1 on  
00 = Current Sources are  
Shutdown (default)  
01 = Privacy Indicator Mode  
10 = Torch Mode  
high, the flash current (default)  
(default)  
will turn on and remain  
disabled (See 1= Message on for the duration the  
Note below). Indicator is  
STROBE pin is held  
high or until the Flash  
Timeout occurs,  
whichever comes first.  
(default)  
11 = Flash Mode (bits reset  
at timeout)  
(default)  
1 = Message  
Indicator  
Blinking  
enabled.  
Function is  
enabled. The  
message  
indicator  
blinks the  
pattern  
1 = (Edge Triggered)  
When STROBE goes  
high , the flash current  
will turn on and remain  
on for the duration of  
the Flash timeout.  
programmed  
in the  
Indicator  
Register and  
Indicator  
Blinking  
Register  
Note: Bit 7 Enables/Disables the Message Indicator Blinking Function. With this bit set to 0 and Bit 6 set to 1, the Message Indicator turns on constantly at the  
programmed current as set in the Indicator Register, bits [2:0].  
25  
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TORCH BRIGHTNESS REGISTER  
Bits [2:0] of the Torch Brightness Register set the Torch cur-  
rent for LED1. Bits [5:3] set the Torch current for LED2. (see  
Table 3).  
TABLE 3. Torch Brightness Register Descriptions  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
(N/A)  
(N/A)  
(TC2A)  
(TC2B)  
(TC2C)  
(TC1A)  
(TC1B)  
(TC1C)  
(Not Used)  
LED2 Torch Current Select Bits  
000 = 28.125 mA (56.25 mA total)  
001 = 56.25 mA (112.5 mA total)  
LED1 Torch Current Select Bits  
000 = 28.125 mA (56.25 mA total)  
001 = 56.25 mA (112.5 mA total)  
010 = 84.375 mA (168.75 mA total) default 010 = 84.375 mA (168.75 mA total) default  
011 = 112.5 mA (225 mA total)  
100 = 140.625 mA (281.25 mA total)  
101 = 168.75 mA (337.5 mA total)  
110 = 196.875 mA (393.75 mA total)  
111 = 225 mA (450 mA total)  
011 = 112.5 mA (225 mA total)  
100 = 140.625 mA (281.25 mA total)  
101 = 168.75 mA (337.5 mA total)  
110 = 196.875 mA (393.75 mA total)  
111 = 225 mA (450 mA total)  
FLASH BRIGHTNESS REGISTER  
Bits [3:0] of the Flash Brightness Register set the Flash cur-  
rent for LED1. Bits [7:4] set the Flash current for LED2. (see  
Table 4).  
TABLE 4. Flash Brightness Register Descriptions  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
(FC2A)  
(FC2B)  
(FC2C )  
(FC2D)  
(FC1A )  
(FC1B)  
(FC1C)  
(FC1D)  
LED2 Flash Current Select Bits  
0000 = 56.25 mA (112.5 mA total)  
0001 = 112.5 mA (225 mA total)  
0010 = 168.75 mA (337.5 mA total)  
0011 = 225 mA (450 mA total)  
LED1 Flash Current Select Bits  
0000 = 56.25 mA (112.5 mA total)  
0001 = 112.5 mA (225 mA total)  
0010 = 168.75 mA (337.5 mA total)  
0011 = 225 mA (450 mA total)  
0100 = 281.25 mA (562.5 mA total)  
0101 = 337.5 mA (675 mA total)  
0110 = 393.75 mA (787.5 mA total)  
0111 = 450 mA (900 mA total)  
0100 = 281.25 mA (562.5 mA total)  
0101 = 337.5 mA (675 mA total)  
0110 = 393.75 mA (787.5 mA total)  
0111 = 450 mA (900 mA total)  
1000 = 506.25 mA (1012.5 mA total)  
1001 = 562.5 mA (1125 mA total)  
1010 = 618.75 mA (1237.5 mA total)  
1011 = 675 mA (1350 mA total)  
1100 = 731.25 mA (1562.5 mA total)  
1101 = 787.5 mA (1575 mA total) Default  
1110 = 843.75 mA (1687.5 mA total)  
1111 = 900 mA (1800 mA total)  
1000 = 506.25 mA (1012.5 mA total)  
1001 = 562.5 mA (1125 mA total)  
1010 = 618.75 mA (1237.5 mA total)  
1011 = 675 mA (1350 mA total)  
1100 = 731.25 mA (1562.5 mA total)  
1101 = 787.5 mA (1575 mA total) Default  
1110 = 843.75 mA (1687.5 mA total)  
1111 = 900 mA (1800 mA total)  
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26  
 
 
 
 
FLASH DURATION REGISTER  
Bits [4:0] of the Flash Duration Register set the Flash Timeout  
duration. Bits [6:5] set the switch current limit. (see Table 5).  
TABLE 5. Flash Duration Register Descriptions  
Bit 7  
(Not used)  
Bit 6  
(CL1)  
Bit 5  
(CL0)  
Bit 4  
(T4)  
Bit 3  
(T3)  
Bit 2  
(T2)  
Bit 1  
(T1)  
Bit 0  
(T0)  
N/A  
Current Limit Select Bits  
Flash timeout Select Bits  
00 = 1.4A Peak Current Limit 00000 = 32 ms timeout  
01 = 2.1A Peak Current Limit 00001 = 64 ms timeout  
10 = 2.7A Peak Current Limit 00010 = 96 ms timeout  
11 = 3.2A Peak Current Limit 00011 = 128 ms timeout  
(default)  
00100 = 160 ms timeout  
00101 = 192 ms timeout  
00110 = 224 ms timeout  
00111 = 256 ms timeout  
01000 = 288 ms timeout  
01001 = 320 ms timeout  
01010 = 352 ms timeout  
01011 = 384 ms timeout  
01100 = 416 ms timeout  
01101 = 448 ms timeout  
01110 = 480 ms timeout  
01111 = 512 ms timeout (default)  
10000 = 544 ms timeout  
10001 = 576 ms timeout  
10010 = 608 ms timeout  
10011 = 640 ms timeout  
10100 = 672 ms timeout  
10101 = 704 ms timeout  
10110 = 736 ms timeout  
10111 = 768 ms timeout  
11000 = 800 ms timeout  
11001 = 832 ms timeout  
11010 = 864 ms timeout  
11011 = 896 ms timeout  
11100 = 928 ms timeout  
11101 = 960 ms timeout  
11110 = 992 ms timeout  
11111 = 1024 ms timeout  
27  
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FLAGS REGISTER  
The Flags Register holds the flag bits indicating: Flash Time-  
out, Thermal Shutdown, LED Fault (Open or Short), TX In-  
terrupts (TX1 and TX2), LED Thermal Fault (NTC), VIN  
Monitor Trip, and VIN Flash Monitor Trip. All Flags are cleared  
on read back of the Flags Register. (see Table 6).  
TABLE 6. Flags Register Descriptions  
Bit 7  
(VIN Monitor)  
Bit 6  
(VIN Flash  
Monitor)  
Bit 5  
(NTC Fault)  
Bit 4 Bit 3  
(TX2  
Interrupt)  
Bit 2  
(TX1 Interrupt ) (LED Fault)  
Bit 1  
(Thermal  
Shutdown)  
Bit 0  
(Flash  
timeout)  
0 = VIN is  
VIN did not fall 0 = LEDI/NTC 0 = TX2 has  
0 = TX1 has not 0 = Proper  
0 = Die  
0 = Flash  
below the VIN pin is above  
Flash Monitor 1V(default)  
threshold  
during the  
flash pulse  
turn-on or VIN  
Flash Monitor  
is disabled  
not changed  
state (default) (default)  
changed state  
LED  
Operation  
(default)  
Temperature timeout did not  
above the VIN  
Monitor  
Threshold or  
VIN Monitor  
Threshold is  
Disabled  
below  
expire  
Thermal  
(default)  
Shutdown  
Limit (default)  
(default)  
(default)  
1 = VIN  
Monitor is  
enabled and  
1 = VIN Flash 1 = NTC mode 1 = TX2 has  
Monitor is  
enabled and  
1 = TX1 has  
is enabled and changed state changed state  
LEDI/NTC has (TX2 mode (TX1 mode only) or Short)  
only)  
1 = LED  
1 = Die  
1 = Flash  
Failed (Open Temperature timeout  
has crossed  
the Thermal  
Shutdown  
Expired  
VIN has fallen VIN fell below fallen below  
1V  
below the  
the  
Threshold  
programmed programmed  
threshold  
VIN Flash  
Monitor  
threshold  
during the  
flash pulse  
turn-on  
CONFIGURATION REGISTER 1  
Configuration Register 1 holds the STROBE Input Enable bit,  
lection bits for TX1 and TX2, and the Hardware Torch Enable  
the STROBE polarity bit, the NTC Enable bit, the polarity se-  
bit (see Table 7).  
TABLE 7. Configuration Register 1 Descriptions  
Bit 7  
Bit 6  
Bit 5 Bit 4 Bit 3 Bit 2  
Bit 1  
Bit 0  
(Hardware (TX2 Polarity) (TX1 Polarity) (NTC Mode  
(STROBE  
Polarity)  
(STROBE  
Input Enable)  
(Not Used)  
(Not Used)  
Torch Mode  
Enable)  
Enable)  
0 = TX1/  
TORCH is a  
TX input  
0 = TX2 is  
configured for configured for pin is  
active low  
polarity  
0 = TX1 is  
0 = LEDI/NTC 0 = STROBE 0 = STROBE N/A  
Input Enable is Pin disabled  
configured as active low. (default)  
N/A  
active low  
polarity  
(default)  
an indicator  
output  
Pulling  
STROBE low  
will turn on  
Flash current  
(default)  
1 = TX1/  
1 =TX2 pin is 1 = TX1 is  
1 = LEDI/NTC 1 = STROBE 1 = STROBE  
TORCH pin is configured for configured for is configured Input is active Input enabled  
a hardware  
TORCH  
enable. This  
bit is reset to 0  
after a flash  
event.  
active high  
polarity  
(default)  
active high  
polarity  
(default)  
as a  
high. Pulling  
STROBE high  
will turn on  
Flash current  
(default)  
comparator  
input for an  
NTC  
thermistor  
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28  
 
 
CONFIGURATION REGISTER 2  
mode enable bit, and the VIN Monitor Shutdown bit (see Table  
8).  
Configuration Register 2 holds the TX2 shutdown select bit,  
the NTC shutdown select bit, the Alternate External Torch  
TABLE 8. Configuration Register 2 Bit Descriptions  
Bit 7  
(Not used)  
Bit 6  
(Not used)  
Bit 5 Bit 4 Bit 3 Bit 2  
Bit 1  
(NTC  
Shutdown)  
Bit 0  
(TX2  
Shutdown)  
(Not used) (Not used) (VIN Monitor (AET mode)  
Shutdown)  
0 = VIN falling 0 = AET  
N/A  
N/A  
N/A  
N/A  
0 = Voltage at  
LEDI/NTC  
falling below  
0 = TX2 event  
will force the  
LED current to  
Mode  
below the  
Disabled  
(default)  
programmed  
VIN Monitor  
Threshold will  
force the LED  
current into the  
programmed  
torch current  
(default)  
VTRIP will force the  
programmed  
torch current  
(default)  
the active  
current source  
(LED1 and/or  
LED2) to the  
programmed  
torch current.  
(default)  
1 = VIN falling 1 = AET  
1 = Voltage at  
LEDI/NTC  
falling below  
VTRIP will force into shutdown.  
the active  
current source  
1 = TX2 event  
will force the  
LED current  
Mode  
below the  
Enabled  
programmed  
VIN Monitor  
Threshold will  
force the LED  
current into  
shutdown.  
(either LED1  
and/or LED2)  
into shutdown.  
29  
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GPIO REGISTER  
The GPIO register contains the control bits which change the  
state of the TX1/TORCH/GPIO1 pin and the TX2/INT/GPIO2  
pins to general purpose I/O’s (GPIO’s). Additionally, bit 6 of  
this register contains the interrupt configuration bit. Table 9  
describes the bit description and functionality of the GPIO  
register. To configure the TX1 or TX2 pins as GPIO outputs  
an initial double write is required to register 0x20. For exam-  
ple, to configure TX2 to output a logic high, an initial write of  
0xB8 would need to occur twice, to force GPIO2 low. Subse-  
quent writes to GPIO2 after the initial set-up only requires a  
single write. To read back the GPIO inputs, a write, then a  
read, of register 0x20 must occur each time the data is read.  
For example, if GPIO2 is set up as a GPIO input and the  
GPIO2 input has then changed state, first a write to 0x20 must  
occur, then the following readback of register 0x20 will show  
the updated data. When configuring TX2 as an interrupt out-  
put, the TX2/GPIO2/INT pin must first be configured as a  
GPIO output (double write). For example, to configure TX2/  
GPIO2/INT for INT mode, a write of 0xF8 to register 0x20  
must be done twice.  
TABLE 9. GPIO Register  
Bit 7  
(Not  
Used)  
Bit 6  
Bit 5  
Bit 4  
(TX2/INT/  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
(TX2/INT/GPIO2 (TX2/INT/  
Interrupt  
Enable)  
(TX2/INT/  
GPIO2  
Control)  
(TX1/TORCH/ (TX1/TORCH/ (TX1/TORCH/  
GPIO1 data)  
GPIO2 data) GPIO2 data  
direction)  
GPIO1 data  
direction)  
GPIO1  
Control)  
N/A  
0 = TX2/INT/  
GPIO2 is  
configured  
according to bit 3 GPIO2 pin in (default)  
of this register  
This bit is the 0 = TX2/INT/  
read or write GPIO2 is a  
0 = TX2/INT/  
GPIO is a TX2 read or write  
interrupt  
(default)  
This bit is the 0 = TX1/  
0 = TX1/  
TORCH/GPIO1 TORCH/  
is a GPIO input GPIO1 pin is  
data for the  
GPIO Input  
data for the  
GPIO1 pin in  
GPIO mode  
(default)  
configured  
GPIO mode  
according to  
Configuration  
Register 1 bit  
[7] (default)  
(default)  
1 = with bits [4:3]  
= 11, TX2/INT/  
GPIO2 is an  
interrupt output.  
See Interrupt  
section.  
1 = TX2/INT/  
GPIO2 is a  
GPIO Output  
1 = TX2/INT/  
GPIO2 is  
configured as a  
GPIO  
1 TX1/  
1 = TX1/  
TORCHGPIO1 TORCH/  
is an output GPIO1 pin is  
configured as a  
GPIO  
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30  
 
LAST FLASH REGISTER  
The Last Flash Register is updated at the same time that the  
corresponding Flag bit is written to the Flags Register. This  
results in a delay of 250 µs from when VLEDI/NTC (NTC mode)  
crosses VTRIP, or VIN (VIN Monitor enabled) crosses the  
VIN_TH. During VIN Flash Monitor there is a 8 µs deglitch time  
so the VIN Flash Monitor Flag is written (and the Last Flash  
The Last Flash Register is a read only register which is loaded  
with the flash code corresponding to the flash level that the  
LM3559 was at if any of the following events happens:  
1. Voltage at LEDI/NTC falling below VTRIP with the device  
in NTC mode (Configuration Register 1 bit [4] = 1)  
Register is updated) 8 µs after VIN falls below VIN_FLASH  
.
2. Input voltage falling below the programmed VIN Monitor  
Threshold with device in VIN Monitor mode (VIN Monitor  
Register bit [0] = 1)  
3. Input voltage falling below the programmed VIN Flash  
Monitor Threshold with the device in VIN Flash Monitor  
mode (VIN Monitor Register bit [3] = 1).  
TABLE 10. Last Flash Register Descriptions  
Bit 7  
(LF2A)  
Bit 6  
(LF2B)  
Bit 5 Bit 4 Bit 3 Bit 2  
(LF2C) (LF2D) (LF1A) (LF1B)  
Bit 1  
(LF1C)  
Bit 0  
(LF1D)  
These bits are read only and represent the Flash Current  
These bits are read only and represent the Flash Current Code for  
Code for LED2 that the LM3559 was at during the interrupt. LED1 that the LM3559 was at during the interrupt.  
0000 = 56.25 mA (112.5 mA total)  
0001 = 112.5 mA (225 mA total)  
0010 = 168.75 mA (337.5 mA total)  
0011 = 225 mA (450 mA total)  
0000 = 56.25 mA (112.5 mA total)  
0001 = 112.5 mA (225 mA total)  
0010 = 168.75 mA (337.5 mA total)  
0011 = 225 mA (450 mA total)  
0100 = 281.25mA (562.5 mA total)  
0101 = 337.5 mA (675 mA total)  
0110 = 393.75 mA (787.5 mA total)  
0111 = 450 mA (900 mA total)  
0100 = 281.25mA (562.5 mA total)  
0101 = 337.5 mA (675 mA total)  
0110 = 393.75 mA (787.5 mA total)  
0111 = 450 mA (900 mA total)  
1000 = 506.25 mA (1012.5 mA total)  
1001 = 562.5 mA (1125 mA total)  
1010 = 618.75 mA (1237.5 mA total)  
1011 = 675 mA (1350 mA total)  
1100 = 731.25 mA (1562.5 mA total)  
1101 = 787. 5mA (1575 mA total)  
1110 = 843.75 mA (1687.5 mA total)  
1111 = 900 mA (1800 mA total)  
1000 = 506.25 mA (1012.5 mA total)  
1001 = 562.5 mA (1125 mA total)  
1010 = 618.75 mA (1237.5 mA total)  
1011 = 675 mA (1350 mA total)  
1100 = 731.25 mA (1562.5 mA total)  
1101 = 787. 5mA (1575 mA total)  
1110 = 843.75 mA (1687.5 mA total)  
1111 = 900 mA (1800 mA total)  
31  
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VLED MONITOR REGISTER  
sion is still performed. In automatic conversion mode a  
conversion is performed each time a flash pulse is initiated.  
Bit [5] is the ADC shutdown bit. Bit [6] signals the end of con-  
version. This is a read-only bit that goes high when a conver-  
sion is complete and data is ready. A read of the VLED  
Monitor Register clears the End of Conversion bit (see ).  
The VLED Monitor Register controls the internal 4-bit analog  
to digital converter. Bits [3:0] of this register contain the 4-bit  
data of the LED voltage. This data is the digitized voltage of  
the highest of either VLED1 to GND or VLED2 to GND. Bit [4]  
is the Manual Mode enable which provides for a manual con-  
version of the ADC. In Manual Mode the Automatic Conver-  
TABLE 11. VLED Monitor Register Descriptions  
Bit 7  
(Not  
Bit 6  
(End of  
Bit 5  
(Shutdown)  
Bit 4 Bit 3 Bit 2  
(Manual Mode (ADC3) (ADC2)  
Bit 1  
(ADC1)  
Bit 0  
(ADC0)  
Used) Conversion)  
N/A 0 = Conversion in  
progress(default)  
Enable)  
0 = ADC is  
enabled  
(default)  
0 = Manual  
Mode Disabled  
(default)  
0000 = (VLED < 3.2V) (default)  
0001 = (3.2V VLED < 3.3V)  
0010 = (3.3V VLED < 3.4V)  
0011 = (3.4V VLED < 3.5V)  
0100 = (3.5V VLED < 3.6V)  
0101 = (3.6V VLED < 3.7V)  
0110 = (3.7V VLED < 3.8V)  
0111 = (3.8V VLED < 3.9V)  
1000 = (3.9V VLED < 4.0V)  
1001 = (4.0V VLED < 4.1V)  
1010 = (4.1V VLED < 4.2V)  
1011 = (4.2V VLED < 4.3V)  
1100 = (4.3V VLED < 4.4V)  
1101 = (4.4V VLED < 4.5V)  
1110 = (4.5V VLED < 4.6V)  
1111 = (4.6V VLED)  
1 = Conversion done 1 = ADC is  
shutdown, no  
1 = Manual  
Mode is Enabled  
conversion is  
performed  
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32  
ADC DELAY REGISTER  
applies to both Manual Mode and Automatic Mode. Bit 5 is  
the No-Delay bit and can set the delay to effectively 0. (See  
Table 12, Figure 13, and Figure 14.)  
The ADC Delay Register programs the delay from when the  
EOC bit goes low to when a conversion is initiated. This delay  
TABLE 12. ADC Delay Register  
Bit 4 (D1) Bit 3 (D2)  
Bit 7  
(Not  
Bit 6  
(Not used)  
Bit 5 (No Delay)  
Bit 2 (D3) Bit 1 (D4)  
Bit 0 (D5)  
Used)  
0 = Delay is set by bits [4:0]  
Bits [4:0] programs the delay from when the EOC bit goes low to when  
(default)  
a conversion is started (250 µs/step).  
00000 = 250 µs (default)  
:
:
1 = no delay from when the EOC  
goes low to when the conversion is  
started.  
N/A  
:
:
11111 = 8ms  
INPUT VOLTAGE MONITOR REGISTER  
bit for the VIN Flash Monitor, and the threshold select for the  
VIN Flash Monitor (see Table 13).  
The VIN Monitor Register contains the Enable bit for the VIN  
Monitor, the threshold select for the VIN Monitor, the enable  
TABLE 13. VIN Monitor Register  
Bit 7  
Bit 6  
Bit 5  
Bit 4 Bit 3  
Bit 2  
Bit 1  
Bit 0  
(Not used)  
(Not used)  
(VIN Flash  
Monitor  
Threhold 1) Threhold 0)  
(VIN Flash (VIN Flash  
Monitor  
(VIN Monitor (VIN Monitor  
Threshold 1) Threshold 0)  
(VIN Monitor  
Enable)  
Monitor  
Enable)  
N/A  
00= 2.9V (default)  
01 = 3.0V  
10 = 3.1V  
0 = VIN Flash 00 = 2.9V (default)  
0 = VIN Monitor  
disabled (default)  
Monitor is  
disabled  
(default)  
01= 3.0V  
10 = 3.1V  
11 = 3.2V  
11 = 3.2V  
1 = VIN Flash  
Monitor is  
enabled  
1 = VIN Monitor  
enabled  
PRIVACY REGISTER  
after the flash pulse terminates, and the duty cycle settings  
(between 10% and 80%) for setting the privacy LED current  
(see Table 14).  
The Privacy Register contains the bits to control which current  
source is used for the privacy indicator (LED1 or LED2 or  
both), whether the privacy indicator turns off or remains on  
TABLE 14. Privacy Register  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2 (PD2)  
Bit 1 (PD1)  
Bit 0 (PD0)  
(Blink 2)  
(Blink 1)  
(LED2  
Privacy)  
(LED1  
Privacy)  
(Privacy  
Terminate)  
00 = No Blinking  
01 = 128 ms Blink Period  
(default)  
0 = LED2 is off 0 = LED1 is off 0 = Privacy  
Privacy mode current levels (% of minimum  
torch current)  
for privacy  
mode  
for privacy  
mode  
mode turns  
back on at the 000 = 10% (default)  
10 = 256 ms Blink Period  
11 = 512 ms Blink Period  
(default)  
1 = LED2 is on for privacy  
for privacy  
mode  
1 = LED1 is on end of the  
001 = 20%  
010 = 30%  
011 = 40%  
flash pulse  
1 = Privacy  
mode  
(default)  
mode turns off 100 = 50%  
at the end of 101 = 60%  
the flash pulse 110 = 70%  
(default) 111 = 80%  
33  
www.national.com  
 
 
 
PRIVACY PWM PERIOD REGISTER  
The Privacy PWM Register contains the bits to control the  
PWM period for the privacy indicate mode (see Table 15).  
TABLE 15. Privacy PWM Period Register  
Bits 7-3  
(Not Used)  
Bit 2  
(P3)  
Bit 1  
(P2)  
Bit 0  
(P1)  
000 = 5.12 ms  
001 = 2.56 ms  
010 = 1.28 ms  
011 = 640 µs  
1XX = 320 µs  
INDICATOR REGISTER  
2. Pulse width  
The Message Indicator Register contain the bits which control  
the following:  
3. Ramp times for turn-on and turn-off of the indicator  
current source (see Figure 18 for the message indicator  
timing diagram).  
1. Indicator current level  
TABLE 16. Indicator Register  
Bit 4 (P2) Bit 3 (P1)  
Bit 7 (R2)  
(tRAMP  
Bit 6 (R1)  
Bit 5 (P3)  
Bit 2 (I3)  
(IIND  
Bit 1 (I2)  
Bit 0 (I1)  
)
(PERIOD#)  
000 = 0 (default)  
001 = 1  
)
00 = 78 ms (default)  
01 = 156 ms  
000 = 2.25 mA (default)  
001 = 4.5 mA  
010 = 2  
011 = 3  
10 = 312 ms  
11 = 624 ms  
010 = 6.75 mA  
011 = 9 mA  
100 = 4  
101 = 5  
110 = 6  
111 = 7  
100 = 11.25 mA  
101 = 13.5 mA  
110 = 15.75 mA  
111 = 18 mA  
www.national.com  
34  
 
 
INDICATOR BLINKING REGISTER  
2. Active Time (tACTIVE = tPERIOD × PERIOD# )  
The Indicator Blinking Register contain the bits which control  
the following:  
3. Blank Time (tBLANK = tACTIVE × BLANK#)  
(see Figure 18)  
1. Number of periods (tPERIOD = tRAMP × 2 + tPULSE × 2)  
TABLE 17. Indicator Blinking Register  
Bit 7 (M4)  
Bit 6 (M3)  
Bit 5 (M2) Bit 4 (M1) Bit 3 (PW4) Bit 2 (PW3)  
Bit 1 (PW2)  
Bit 0 (PW1)  
BLANK#  
0000 = 0 (default)  
0001 = 1  
Pulse Time (tPULSE  
0000 = 0 (default)  
0001 = 32 ms  
)
0010 = 2  
0010 = 64 ms  
0011 = 3  
0011 = 92 ms  
0100 = 4  
0101 = 5  
0110 = 6  
0111 = 7  
1000 = 8  
1001 = 9  
1010 = 10  
1011 = 11  
1100 = 12  
1101 = 13  
1110 = 14  
1111 = 15  
0100 = 128 ms  
0101 = 160 ms  
0110 = 196 ms  
0111 = 224 ms  
1000 = 256 ms  
1001 = 288 ms  
1010 = 320 ms  
1011 = 352 ms  
1100 = 384 ms  
1101 = 416 ms  
1110 = 448 ms  
1111 = 480 ms  
30102812  
FIGURE 18. Message Indicator Timing Diagram  
35  
www.national.com  
 
 
Applications Information  
OUTPUT CAPACITOR SELECTION  
The LM3559 is designed to operate with at least a 10 µF ce-  
ramic output capacitor. When the boost converter is running  
the output capacitor supplies the load current during the boost  
converters on-time. When the NMOS switch turns off the in-  
ductor energy is discharged through the internal PMOS  
switch, supplying power to the load and restoring charge to  
the output capacitor. This causes a sag in the output voltage  
during the on-time and a rise in the output voltage during the  
off-time. The output capacitor is therefore chosen to limit the  
output ripple to an acceptable level depending on load current  
and input/output voltage differentials and also to ensure the  
converter remains stable.  
In ceramic capacitors the ESR is very low so a close approx-  
imation is to assume that 80% of the output voltage ripple is  
due to capacitor discharge and 20% from ESR. Table 18 lists  
different manufacturers for various output capacitors and their  
case sizes suitable for use with the LM3559.  
INPUT CAPACITOR SELECTION  
Choosing the correct size and type of input capacitor helps  
minimize the voltage ripple caused by the switching of the  
LM3559’s boost converter, and reduces noise on the boost  
converter's input terminal that can feed through and disrupt  
internal analog signals. In the Typical Application Circuit a 10  
µF ceramic input capacitor works well. It is important to place  
the input capacitor as close as possible to the LM3559’s input  
(IN) terminal. This reduces the series resistance and induc-  
tance that can inject noise into the device due to the input  
switching currents. Table 18 lists various input capacitors that  
or recommended for use with the LM3559.  
For proper operation the output capacitor must be at least a  
10 µF ceramic. Larger capacitors such as a 22 µF or capaci-  
tors in parallel can be used if lower output voltage ripple is  
desired. To estimate the output voltage ripple considering the  
ripple due to capacitor discharge (ΔVQ) and the ripple due to  
the capacitors ESR (ΔVESR) use the following equations:  
For continuous conduction mode, the output voltage ripple  
due to the capacitor discharge is:  
The output voltage ripple due to the output capacitors ESR is  
found by:  
TABLE 18. Recommended Input/Output Capacitors (X5R Dielectric)  
Manufacturer  
TDK Corporation  
TDK Corporation  
TDK Corporation  
Murata  
Part Number  
C1608JB0J106M  
Value  
10 µF  
10 µF  
22 µF  
10 µF  
10 µF  
22 µF  
Case Size  
Voltage Rating  
0603 (1.6mm×0.8mm×0.8mm)  
0805 (2mm×1.25mm×1.25mm)  
0805 (2mm×1.25mm×1.25mm)  
0603 (1.6mmx0.8mmx0.8mm)  
0805 (2mm×1.25mm×1.25mm)  
0805 (2mm×1.25mm×1.25mm)  
6.3V  
10V  
C2012JB1A106M  
C2012JB0J226M  
6.3V  
6.3V  
10V  
GRM188R60J06M  
GRM21BR61A106KE19  
GRM21BR60J226ME39L  
Murata  
Murata  
6.3V  
INDUCTOR SELECTION  
of the inductor and further efficiency loss. For proper inductor  
operation and circuit performance ensure that the inductor  
saturation and the peak current limit setting of the LM3559 is  
greater than IPEAK in the following calculation:  
The LM3559 is designed to use a 1 µH or 2.2 µH inductor.  
Table 19 lists various inductors and their manufactures that  
can work well with the LM3559. When the device is boosting  
(VOUT > VIN) the inductor will typically be the largest area of  
efficiency loss in the circuit. Therefore choosing an inductor  
with the lowest possible series resistance is important. Addi-  
tionally, the saturation rating of the inductor should be greater  
than the maximum operating peak current of the LM3559.  
This prevents excess efficiency loss that can occur with in-  
ductors that operate in saturation and prevents over heating  
ƒSW = 2MHz, and efficiency can be found in the Typical Per-  
formance Characteristics plots.  
TABLE 19. Recommended Inductors  
ISAT  
2.3A  
3.4A  
2.8A  
2.3A  
3.4A  
RDC  
Manufacturer  
TOKO  
L
Part Number Dimensions (L×W×H)  
2.2 µH  
1µH  
FDSD0312-H-2R2M  
FDSD0312-H-1R0M  
FDSD0312-H-1R5M  
FDSD0312-2R2M  
FDSD0312-1R0M  
3mm×3.2mm×1.2mm  
3mm×3.2mm×1.2mm  
3mm×3.2mm×1.2mm  
3mm x 3mm x 1.2mm  
3mm x 3mm x 1.2mm  
105 mΩ  
43 mΩ  
71 mΩ  
145 mΩ  
70mΩ  
TOKO  
TOKO  
1.5µH  
2.2µH  
1µH  
TOKO  
TOKO  
www.national.com  
36  
 
 
ISAT  
2.8A  
1.5A  
RDC  
Manufacturer  
TDK  
L
Part Number  
VLS4012ET-1R0N  
VLS252012T-2R2M1R3  
Dimensions (L×W×H)  
4mm x 4mm x 1.2mm  
2mm×2.5mm×1.2mm  
1µH  
50mΩ  
TBD  
TDK  
2.2 µH  
NTC THERMISTOR SELECTION  
Programming bit [4] of Configuration Register 1 with a (1) se-  
lects NTC mode and makes the LEDI/NTC pin a comparator  
input for flash LED thermal sensing. Figure 19 shows the  
LM3559 using the NTC thermistor circuit. The thermal sensor  
resistor divider is composed of R3 and R(T), where R(T) is  
the Negative Temperature Coefficient Thermistor, VBIAS is the  
bias voltage for the resistive divider, and R3 is used to lin-  
earize the NTC's response around the NTC comparators trip  
point. CBYP is used to filter noise at the NTC input.  
30102830  
FIGURE 19. LM3559 Typical Application Circuit with Thermistor  
In designing the NTC circuit, we must choose values for  
VBIAS, R(T) and R3. To begin with, NTC thermistors have a  
non-linear relationship between temperature and resistance:  
where R(T)TRIP is the thermistors value at the temperature trip  
point and VTRIP = 1V (typical). As an example, with VBIAS  
=
2.5V and a thermistor whose nominal value at +25°C is 100  
kand a β = 4500K, the trip point is chosen to be +93°C. The  
value of R(T) at 93°C is:  
where β is given in the thermistor datasheet and R25C is the  
thermistors value at +25°C. R3 is chosen so that the temper-  
ature-to-resistance relationship becomes more linear and can  
be found by solving for R3 in the R(T) and R3 resistive divider:  
Figure 20 shows the linearity of the thermistor resistive divider  
of the previous example.  
37  
www.national.com  
 
30102834  
FIGURE 20. Thermistor Resistive Divider Response vs Temperature  
4. Avoid routing logic traces near the SW node so as to  
Layout Recommendations  
avoid any capacitively coupled voltages from SW onto  
any high impedance logic lines such as TX1/TORCH/  
GPIO1, TX2/INT/GPIO2, HWEN, LEDI/NTC (NTC  
mode), SDA, and SCL. A good approach is to insert an  
inner layer GND plane underneath the SW node and  
between any nearby routed traces. This creates a shield  
from the electric field generated at SW.  
The high switching frequency and large switching currents of  
the LM3559 make the choice of layout important. The follow-  
ing steps should be used as a reference to ensure the device  
is stable and maintains proper LED current regulation across  
its intended operating voltage and current range.  
1. Place CIN on the top layer (same layer as the LM3559)  
and as close to the device as possible. The input  
5. Terminate the Flash LED cathodes directly to the GND  
pin of the LM3559. If possible, route the LED returns with  
a dedicated path so as to keep the high amplitude LED  
currents out of the GND plane. For Flash LEDs that are  
routed relatively far away from the LM3559, a good  
approach is to sandwich the forward and return current  
paths over the top of each other on two layers. This will  
help in reducing the inductance of the LED current paths.  
capacitor conducts the driver currents during the low side  
MOSFET turn-on and turn-off and can see current spikes  
over 1A in amplitude. Connecting the input capacitor  
through short wide traces to both the IN and GND  
terminals will reduce the inductive voltage spikes that  
occur during switching and which can corrupt the VIN line.  
2. Place COUT on the top layer (same layer as the LM3559)  
and as close as possible to the OUT and GND terminal.  
The returns for both CIN and COUT should come together  
at one point, and as close to the GND pin as possible.  
Connecting COUT through short wide traces will reduce  
the series inductance on the OUT and GND terminals  
that can corrupt the VOUT and GND line and cause  
excessive noise in the device and surrounding circuitry.  
6. The NTC Thermistor is intended to have its return path  
connected to the LEDs cathode. This allows the  
thermistor resistive divider voltage (VNTC) to trip the  
comparators threshold as VNTC is falling. Additionally, the  
thermistor to LED cathode junction should be connected  
as close as possible in order to reduce the thermal  
impedance between the LED and the thermistor. The  
draw back is that the thermistor's return will see the  
switching currents from the LM3559's boost converter.  
Because of this, it is necessary to have a filter capacitor  
at the NTC pin which terminates close to the GND of the  
LM3559 (see CBYP in ).  
3. Connect the inductor on the top layer close to the SW pin.  
There should be a low-impedance connection from the  
inductor to SW due to the large DC inductor current, and  
at the same time the area occupied by the SW node  
should be small so as to reduce the capacitive coupling  
of the high dV/dt present at SW that can couple into  
nearby traces.  
www.national.com  
38  
 
Physical Dimensions inches (millimeters) unless otherwise noted  
TLA1611A: 16-Bump micro SMD  
X1 = 1.97 mm (±0.03mm)  
X2 = 1.97 mm (±0.03mm)  
,X3 = 0.6 mm (±0.075 mm)  
39  
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Notes  
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