LM3560TLE-20/NOPB [TI]
具有双路 1A 高侧电流源的同步升压双 1A 闪光灯驱动器(总闪光电流为 2A) | YZR | 16 | -40 to 85;型号: | LM3560TLE-20/NOPB |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有双路 1A 高侧电流源的同步升压双 1A 闪光灯驱动器(总闪光电流为 2A) | YZR | 16 | -40 to 85 驱动 闪光灯 接口集成电路 光电 显示驱动器 驱动程序和接口 |
文件: | 总42页 (文件大小:3081K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LM3560
LM3560 Synchronous Boost Flash Driver w/ Dual 1A High-Side Current Sources
(2A Total Flash Current)
Literature Number: SNOSB43
September 29, 2011
LM3560
Synchronous Boost Flash Driver w/ Dual 1A High-Side
Current Sources (2A Total Flash Current)
General Description
Features
The LM3560 is a 2MHz fixed frequency synchronous boost
converter with two 1000 mA constant current drivers for high-
current white LEDs. The dual high-side current sources allow
for grounded cathode LED operation and can be tied together
for providing flash currents at up to 2A through a single LED.
An adaptive regulation method ensures the current for each
LED remains in regulation and maximizes efficiency.
Dual High-Side Current Sources Allow for Grounded
■
Cathode LED Operation
Accurate and Programmable LED Current from 31.25 mA
to 2A
■
Independent LED Current Source Programmability
■
■
■
■
Up to 90% Efficient
Ultra-Small Solution Size: < 26 mm2
The LM3560 is controlled via an I2C-compatible interface.
Features include: an internal 4-bit ADC to monitor the LED
voltage, independent LED current control, a hardware flash
enable allowing a logic input to trigger the flash pulse, dual
TX inputs which force the flash pulse into a low-current torch
mode allowing for synchronization to RF power amplifier
events or other high-current conditions, and an integrated
comparator designed to monitor an NTC thermistor and pro-
vide an interrupt to the LED current. Additionally, an active
high HWEN input provides a hardware shutdown during sys-
tem software failures.
Four Operating Modes: Torch, Flash, Privacy Indicate,
and Message Indicator
4-bit ADC for VLED Monitoring
■
■
■
■
LED Thermal Sensing and Current Scale-Back
Hardware Flash and Torch Enable
Dual Synchronization Inputs for RF Power Amplifier Pulse
Events
LED and Output Disconnect During Shutdown
■
■
■
■
Open and Short LED Detection
400 kHz I2C-Compatible Interface
The 2MHz switching frequency, over-voltage protection and
adjustable current limit allow for the use of tiny, low-profile (1
µH and 2.2 µH) inductors and (10 µF) ceramic capacitors. The
device is available in a ultra-small 16-bump (1.97mm x
1.97mm x 0.6mm) micro SMD package and operates over the
−40°C to +85°C temperature range.
Active Low Hardware Reset
16-Bump (1.97mm x 1.97mm x 0.6mm) micro SMD
■
Applications
Camera Phone LED Flash
■
■
White LED Biasing
Typical Application Circuits
30113801
© 2011 National Semiconductor Corporation
301138
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Application Circuit Component List
Component
Manufacturer
Toko
Value
1µH
Part Number
FDSD0312-1R0
GRM188R60J106M
Size (mm)
Rating
3.3A
L
3 x 3 x 1.2
COUT
Murata
10 µF
1.6 × 0.8 × 0.8
(0603)
6.3V
CIN
Murata
10 µF
GRM188R60J106M
PWF-4
1.6 × 0.8 × 0.8
(0603)
6.3V
LEDs
Lumiled
Flash LED
VF = 3.6V @1A
Connection Diagram
30113802
16-Bump 1.97 mm x 1.97 mm x 0.6 mm micro SMD Package TLA16
Ordering Information
Order Number
LM3560TLE-20
Package
micro SMD
micro SMD
Supplied As
No-Lead
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
YES (NOPB)
YES (NOPB)
LM3560TLX-20
Pin Descriptions
Pin
A1
Name
LED1
OUT
Function
High Side Current Source Output for Flash LED.
A2, B2
A3, B3
A4, B4
B1
Step-Up DC/DC Converter Output. Connect a 10 µF ceramic capacitor between this pin and GND.
Drain Connection for Internal NMOS and Synchronous PMOS Switches.
Ground
SW
GND
LED2
LEDI/NTC
High-Side Current Source Output for Flash LED.
Configurable as a High-Side Current Source Output for Indicator LED or Comparator Input for LED
Temperature Sensing .
C1
Configurable as a Dual-Polarity RF Power Amplifier Synchronization Input, an Interrupt Output, or
as a General Purpose Logic I/O. This pin has an internal 300kΩ pull down to GND.
Active High Hardware Flash Enable. Drive STROBE high to turn on the Flash pulse. This pin has
an internal 300 kΩ pull down to GND.
TX1/TORCH/
GPIO1
C2
C3
STROBE
C4
D1
IN
Input Voltage Connection. Connect IN to the input supply, and bypass to GND with a minimum 10
µF ceramic capacitor.
TX2/INT/GPIO2 Configurable as a Dual-Polarity Power Amplifier Synchronization Input, an Interrupt Output, or as
a General Purpose Logic I/O. This pin has an internal 300 kΩ pull down to GND.
D2
D3
SDA
SCL
Serial Data Input/Output. High impedance in shutdown or in power down.
Serial Clock Input. High impedance in shutdown or in power down.
Logic High Hardware Enable. HWEN is a high impedance input and is normally connected with
an external pull up resistor to a logic high voltage.
D4
HWEN
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2
Absolute Maximum Ratings (Note 1, Note
2)
Operating Ratings (Note 1, Note 2)
VIN
2.5V to 5.5V
−40°C to +125°C
−40°C to +85°C
Junction Temperature (TJ)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Ambient Temperature (TA)
(Note 5)
VIN, VSW, VOUT
−0.3V to 6V
Thermal Properties
VSCL, VSDA, VHWEN, VSTROBE, VTX1
VTX2, VLED1, VLED2, VLED1/NTC
,
−0.3V to the
lesser of (VIN
+0.3V) or 6.0V
Thermal Junction-to-Ambient
Resistance (θJA
(Note 6)
)
50.4°C/W
Continuous Power Dissipation
(Note 3)
Junction Temperature (TJ-MAX
Internally Limited
+150°C
ESD Caution Note:
)
National Semiconductor recommends that all integrated cir-
cuits be handled with appropriate ESD precautions. Failure to
observe proper ESD handling techniques can result in dam-
age to the device.
Storage Temperature Range
Maximum Lead Temperature
(Soldering)
−65°C to +150°C
(Note 4)
Electrical Characteristics (Note 2, Note 7)
Limits in standard typeface are for TA = +25°C. Limits in boldface type apply over the full operating ambient temperature range
(−40°C ≤ TA ≤ +85°C). Unless otherwise specified, VIN = 3.6V, VHWEN = VIN.
Symbol
Parameter
Conditions
1000 mA −40°C
Min
-5%
Typ
Max
+5%
Units
Current Source Specifications
Flash
≤ TA ≤
Current
Setting,
per
+85°C
2000
TA =
−3.5%
+3.5%
current
source
+25°C
ILED1+I
Current Source
Accuracy
LED2, VOUT
=
ILED
mA
31.25mA
Torch
4.5V, 3.0V ≤ VIN ≤ 4.2V
−40°C
≤ TA ≤
+85°C
Current
Setting,
per
current
source
−10%
62.5
300
+10%
ILED = 2A, (ILED1 + ILED2
VOUT = 4.5V
)
Current Source
VOUT - VLED1/2
mV
V
Regulation Voltage
Output Over-Voltage
ON Threshold
OFF Threshold
4.925
5
5.075
VOVP
Protection Trip Point
4.8
(Note 9)
Step-Up DC/DC Converter Specifications
PMOS Switch On-
Resistance
RPMOS
RNMOS
IPMOS = 1A
INMOS = 1A
80
65
mΩ
mΩ
NMOS Switch On-
Resistance
1.44
2.02
2.64
3.17
1.6
2.3
3.0
3.6
1.76
2.58
3.36
4.03
CL bits = 00, 3.0V ≤ VIN ≤ 4.2V
CL bits = 01, 3.0V ≤ VIN ≤ 4.2V
CL bits = 10, 3.0V ≤ VIN ≤ 4.2V
CL bits = 11, 3.0V ≤ VIN ≤ 4.2V
Switch Current Limit
(Note 8)
ICL
A
Output Short Circuit
Current Limit
IOUT_SC
ILED/NTC
VOUT < 2.3V
300
18
mA
mA
Message Indicator Register, bits[2:0] =
Indicator Current
16
20
111, 3.0V ≤ VIN ≤ 4.2V, VLEDI/NTC = 2V
3
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Symbol
VTRIP
Parameter
Conditions
Configuration Register 1, bit4 = 1, 3.0V
≤ VIN ≤ 4.2V
Min
0.97
1.8
Typ
1
Max
1.03
2.2
Units
V
Comparator Trip
Threshold
fSW
Switching Frequency
2
MHz
ms
3.0V ≤ VIN ≤ 4.2V
Timeout Duration (Note
10), (Note 11)
tTIMEOUT
−10%
+10%
3.0V ≤ VIN ≤ 4.2V
Device Not Switching, VOUT = 3V
Device Switching, VOUT = 4.5V
900
µA
1.97
mA
Quiescent Supply
Current
IQ
Indicate Mode, Message Indicator
Register, bits[2:0] = 111, 3.0V ≤ VIN ≤
4.2V
590
µA
µA
Shutdown Supply
Current
ISHDN
0.02
1.25
VHWEN = GND, 3.0V ≤ VIN ≤ 4.2V
VHWEN = VIN , 3.0V ≤ VIN ≤ 4.2V
ISTBY
Standby Supply Current
1.25
2.9
2
VIN_TH
VIN Monitor Threshold VIN Monitor Register = 0x01
2.85
2.85
2.95
V
V
VIN Flash Monitor
VIN Monitor Register = 0x08
Threshold
VIN_FLASH_TH
2.9
2
2.95
TX_ Low to High,
ILED1 + ILED2 = 2A to 187.5 mA
Flash to Torch LED
Current Settling Time
tTX
µs
TX_ High to Low,
ILED1 + ILED2 = 187.5mA to 2A
Torch to Flash LED
Current Settling Time
160
16
ADC Delay Register Bit [5] = 1
Time from when ILED
hits target until VLED
data is available
tD
µs
V
ADC Delay Register Bit [5] = 0
ADC Delay Register Bits [4:0] = 0000
250
3.0V ≤ VIN ≤ 4.2V, VLED Monitor
Register Bits [3:0] = 1111
VF_ADC
ADC Threshold
4.05
4.2
4.35
HWEN, STROBE, TX1/TORCH/GPIO1, TX2/INT/GPIO2 Voltage Specifications
VIL
VIH
Input Logic Low
Input Logic High
0
0.4
VIN
V
V
2.7V ≤ VIN ≤ 4.2V
2.7V ≤ VIN ≤ 4.2V
1.2
Internal Pull Down
Resistance on TX1,
TX2, STROBE
RPD
300
kΩ
I2C-Compatible Voltage Specifications (SCL, SDA)
VIL
VIH
Input Logic Low
Input Logic High
0
0.4
VIN
V
V
2.7V ≤ VIN ≤ 4.2V
2.7V ≤ VIN ≤ 4.2V
1.2
Output Logic Low
(SDA)
VOL
400
mV
ILOAD = 3mA, 2.7V ≤ VIN ≤ 4.2V
I2C-Compatible Timing Specifications (SCL, SDA) (Note 10), see Figure 18
fSCL
SCL(Clock Frequency)
0
400
300
kHz
ns
20ns + 0.1 ×
CBUS
Rise Time of Both SDA
and SCL
tRISE
20ns + 0.1 ×
CBUS
Fall Time of Both SDA
and SCL
tFALL
tLOW
tHIGH
300
ns
µs
ns
Low Period of SCL
Clock
1.3
High Period of SCL
Clock
600
Hold Time for Start (or
Repeated Start)
Condition
tHD;STA
600
600
ns
ns
Set-up Time for a
Repeated Start
tSU;STA
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4
Symbol
tHD;DAT
Parameter
Data Hold Time
Data Setup Time
Conditions
Min
0
Typ
Max
Units
ns
tSU;DAT
tSU;STO
tVD;DAT
tVD;ACK
100
ns
Set-up Time for Stop
Condition
600
ns
ns
ns
Data Valid Time
900
900
Data Valid
Acknowledge Time
Bus Free Time Between
a Start and a Stop
Condition
tBUF
1.3
µs
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see
the Electrical Characteristics table.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=+150°C (typ.) and disengages at
TJ=+135°C (typ.). Thermal shutdown is guaranteed by design.
Note 4: For detailed soldering specifications and information, please refer to National Semiconductor Application Note 1112: Micro SMD Wafer Level chip Scale
Package (AN-1112)
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = +125°C), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to-ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
Note 6: Junction-to-ambient thermal resistance (θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the
JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm with a 2x1 array of thermal vias. The ground plane
on the board is 50 mm x 50 mm. Thickness of copper layers are 36 µm/18 µm/18 µm/36 µm (1.5 oz/1oz/1oz/1.5 oz). Ambient temperature in simulation is 22°C,
still air. Power dissipation is 1W.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical (Typ) numbers are not guaranteed, but do represent the most likely
norm. Unless otherwise specified, conditions for typical specifications are: VIN = 3.6V and TA = +25°C.
Note 8: The typical curve for Current Limit is measured in closed loop using the typical application circuit by increasing IOUT until the peak inductor current stops
increasing. The value given in the Electrical Table is measured open loop and is found by forcing current into SW until the current limit comparator threshold is
reached. Closed loop data appears higher due to the delay between the comparator trip point and the NFET turning off. This delay allows the closed loop inductor
current to ramp higher after the trip point by approximately 20ns × VIN/L
Note 9: The typical curve for Over-Voltage Protection (OVP) is measured in closed loop using the typical application circuit . The OVP value is found by forcing
an open circuit in the LED1 and LED2 path and recording the peak value of VOUT. The value given in the Electrical Table is found in an open loop configuration
by ramping the voltage at OUT until the OVP comparator trips. The closed loop data can appear higher due to the stored energy in the inductor being dumped
into the output capacitor after the OVP comparator trips. At worst case is an open circuit condition where the output voltage can continue to rise after the OVP
comparator trips by approximately IIN×sqrt(L/COUT).
Note 10: Guaranteed by design, not production tested.
Note 11: The timeout period is a divided down representation of the 2MHz clock and thus the accuracy spec is the same as the switching frequency.
Note 12: Min rise and fall times on SDA and SCL can typically be less than 20 ns.
5
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Typical Performance Characteristics (VIN = 3.6V, COUT = 10 µF, CIN = 10 µF, L = 1µH (TOKO
FDSD0312-1R0, RL = 43 mΩ), TA = 25°C, ILED = ILED1 + ILED2, unless otherwise noted).
LED Efficiency vs VIN
LED1 + LED2
Highest 4 Flash Brightness Codes
LED Efficiency vs VIN
LED1 + LED2
Upper Middle 4 Flash Brightness Codes
301138102
301138100
LED Efficiency vs VIN
LED1 + LED2
Lower Middle 4 Flash Brightness Codes
LED Efficiency vs VIN
LED1 + LED2
Lowest 4 Flash Brightness Codes
301138104
301138103
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6
ILED vs VIN
ILED1 + ILED2
Highest 4 Flash Brightness Codes
ILED vs VIN
ILED1 + ILED2
Upper Middle 4 Flash Brightness Codes
301138109
301138110
ILED vs VIN
ILED1 + ILED2
Lower Middle 4 Flash Brightness Codes
ILED vs VIN
ILED1 + ILED2
Lowest 4 Flash Brightness Codes
301138112
301138111
Indicator Current vs Headroom voltage
VLED = 2.5V
Indicator Currents vs Headroom voltage
VLED = 2.5V
Indicate codes 100 - 111
Indicate codes 000 - 011
301138115
301138113
7
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Closed Loop Current Limit vs VIN ( (Note 8))
Closed Loop Current Limit vs VIN ( (Note 8))
3.6A setting
3A setting
301138108
301138107
Closed Loop Current Limit vs VIN ( (Note 8))
Closed Loop Current Limit vs VIN ( (Note 8))
2.3A setting
1.6A setting
301138105
301138106
Switching Frequency vs VIN
Stand-by Supply Current vs VIN
HWEN = VIN
301138114
301138116
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8
Shutdown Supply Current vs VIN
HWEN = GND
STROBE to Flash LED Current Response
30113890
301138117
VIN Monitor Operation
VIN_TH = 3.2V
Vin Flash Monitor Operation
VIN_FLASH_TH = 3.2V
Force Torch Mode, TX2 set for Interrupt Ouput (INT)
TX2 set for Interrupt Ouput (INT)
Circuit of Figure 13 (Note B)
Circuit of Figure 13 (Note A)
30113892
30113891
NTC Operation
NTC set to force torch mode
AET Operation
TX2 set for Interrupt Output (INT)
Circuit of Figure 21, R3 = 1.3 kΩ, RNTC = 10 kΩ @+25°C, Beta
= 3380K
30113894
30113893
9
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HWEN Operation
Device Enabled in Flash Mode
TX1 Interrupt (Force Torch)
30113896
30113895
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10
Block Diagram
30113837
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SCRIPTIONS (Address 0xA0) and FLASH BRIGHTNESS
REGISTER (Address 0xB0).)
Overview
The LM3560 is a high-power white LED flash driver capable
of delivering up to 2A of LED current into a single LED, or up
to 1A into two parallel LEDs. The device incorporates a 2MHz
constant frequency, synchronous boost converter, and two
high-side current sources to regulate the LED current over the
2.5V to 5.5V input voltage range.
PASS MODE
On turn-on when the output voltage charges up to ( VIN – 150
mV), the LM3560 will decide if the part operates in Pass Mode
or Boost mode. If the voltage difference between VOUT and
VLED is less then 300 mV, the device operates in Boost Mode.
If the difference between VOUT and VLED is greater then 300
mV, the device operates in Pass Mode. In Pass Mode the
boost converter stops switching and the synchronous PFET
turns fully on bringing VOUT up to (VIN – IIN x RPMOS) whwer
RPMOS = 80 mΩ. In Pass Mode the inductor current is not lim-
ited by the peak current limit. In this situation the output
current must be limited to 3A.
During operation when the output voltage is greater than VIN
– 150 mV the boost converter switches and maintains at least
300 mV across both current sources (LED1 and LED2). This
minimum headroom voltage ensures that the current sources
remain in regulation. When the input voltage rises above the
LED voltage + current source headroom voltage, the device
stops switching and turns the PFET on continuously (Pass
mode). In Pass mode the difference between (VIN - ILED
RON_P) and the voltage across the LED's is dropped across
the current sources.
x
OVER-VOLTAGE PROTECTION
The output voltage is limited to typically 5V (5.075V max). In
situations such as the current source open, the LM3560 will
raise the output voltage to try to keep the LED current at its
target value. When VOUT reaches 5V the over-voltage com-
parator will trip and turn off both the internal NFET and PFET.
When VOUT falls below 4.8V (typical), the LM3560 will begin
switching again.
Four hardware control pins provide control of the LM3560.
These include a hardware Flash Enable (STROBE), Dual
Flash Interrupt inputs (TX1 and TX2) designed to interrupt the
flash pulse during high battery current conditions, and a logic
high hardware enable (HWEN) that can be pulled low to rapid-
ly place the device into shutdown. Additional features of the
LM3560 include an internal 4-bit ADC for LED voltage moni-
toring, an internal comparator for LED thermal sensing via an
external NTC thermistor, an input voltage monitor that can
reduce the Flash current during input undervoltage condi-
tions, a low-power message indicator LED current source,
and a mode for utilizing the flash LEDs as a privacy indicator.
CURRENT LIMIT
The LM3560 features 4 selectable current limits of 1.6A, 2.3A,
3.0A, and 3.6A. These are programmable through the I2C-
compatible interface via bits [6:5] of the Flash Duration Reg-
ister. When the current limit is reached, the LM3560 stops
switching for the remainder of the switching cycle.
Control of the LM3560 is done via an I2C-compatible inter-
face. This includes adjustment of the Flash and Torch current
levels, adjustment of the indicator LED currents, changing the
Flash Timeout Duration, changing the switch current limit, and
reading back the ADC results. Additionally, there are 8 flag
bits that indicate flash current time-out, LED over-tempera-
ture, LED failure (LED short or output OVP condition), device
thermal shutdown, VIN under voltage condition, VIN Flash
Monitor undervoltage condition, and the occurrence of a TX1
or TX2 interrupt.
Since the current limit is sensed in the NMOS switch there is
no mechanism to limit the current when the device operates
in Pass Mode. In situations where there could potentially be
large load currents at OUT, and the LM3560 is operating in
Pass mode, the load current must be limited to 3A. In Boost
mode or Pass mode if VOUT falls below approximately 2.3V,
the part stops switching and the PFET operates as a current
source, limiting the current to typically 350 mA. This prevents
damage to the LM3560 and excessive current draw from the
battery during output short-circuit conditions.
STARTUP (ENABLING THE DEVICE)
THERMAL SHUTDOWN
Turn-on of the LM3560 is done through bits [1:0] of the Enable
Register. These bits enable the device in Torch mode, Flash
mode, or Privacy Indicate mode. Additionally, bit 6 of the En-
able Register enables the message indicator at the LEDI/NTC
pin. On startup, when VOUT is less than VIN, the internal syn-
chronous PFET turns on as a current source and delivers 350
mA to the output capacitor. During this time both current
sources (LED1, and LED2) are off. When the voltage across
the output capacitor reaches 2.2V the current sources can
turn on. At turn-on the current sources step through each
FLASH and TORCH level until their target LED current is
reached (32 µs/step). This gives the device a controlled turn-
on and limits inrush current from the VIN supply.
The LM3560 features a thermal shutdown threshold of typi-
cally +150°C. When the devices die temperature reaches
+150°C the active current sources (LED1 and/or LED2) will
shut down, and the TSD flag in the Flags register is written
high. The device cannot be started up again until the Flags
register is read back. Once the Flags register is read back
either current source can be re-enabled into Privacy, Torch,
or Flash Mode. The thermal shutdown (TSD) circuitry has an
internal 250 µs de-glitch timer which helps prevent unwanted
noise from falsely triggering a TSD event. However, when the
LM3560 is in boost mode at higher flash currents, the de-glitch
timer can get reset by the high currents in the LM3560's GND.
As a result the thermal shutdown's internal de-glitch timer can
be reset before the TSD event can get latched in. This pre-
vents a TSD event from being triggered until the LM3560's
flash pulse reaches the end of the flash duration, when the
noisy currents have dropped to a lower level. However, once
the noise is lower, and a TSD event is triggered, the next flash
pulse is not allowed until the flags register is read back. In
pass mode the boost switcher is off and the lower noise en-
vironment allows the devices TSD circuitry to shut down
immediately when the die temperature reaches +150°C.
INDEPENDENT LED CONTROL
Bits [4:3] of the Enable register provide for independent turn-
on and turn-off of the LED1 or LED2 current sources. Once
enabled, the LED current is adjusted by writing to the Torch
Brightness or Flash Brightness Registers depending on
whether Flash or Torch mode is selected. Both the Torch
Brightness and the Flash Brightness Registers provide for in-
dependent current programming for the LED currents in either
LED1 or LED2. (See TORCH BRIGHTNESS REGISTER DE-
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12
FLASH MODE
Bit [5] of the Enable Register (STROBE Level/Edge bit) de-
termines how the Flash pulse terminates after STROBE goes
high. With the Level/Edge bit = 1, the Flash current will only
terminate when it reaches the end of the Flash Timeout peri-
od. With the Level/Edge bit = 0, Flash mode can be terminated
by pulling STROBE low, programming bits [1:0] of the Enable
Register with (0,0), or by allowing the Flash Timeout period
to elapse. If the Level/Edge bit = 0 and STROBE is toggled
before the end of the Flash Timeout period, the Timeout pe-
riod will reset. Figure 1 and Figure 2 detail the Flash pulse
termination for the different Level/Edge bit settings.
In Flash mode the LED current sources (LED1 and LED2)
each provide 16 different current levels from typically 62.5 mA
(total) to 2A (total) in steps of 62.5 mA. The Flash currents are
adjusted via the Flash Brightness Register. Flash mode is
activated by writing a (1, 1) to bits [1:0] of the Enable Register
or by enabling the hardware flash input (STROBE) via bit [2]
of Configuration Register 1, and then pulling the STROBE pin
high (high polarity). Once the Flash sequence is activated the
active current sources (LED1 and/or LED2) will ramp up to
their programmed Flash current level by stepping through all
Torch and Flash levels (32 µs/step) until the programmed
current is reached.
30113803
FIGURE 1. LED Current for STROBE (Level Triggered, Enable Register Bit 5 = 0)
30113804
FIGURE 2. LED Current for STROBE (Edge Triggered, Enable Register Bit 5 = 1)
After the Flash pulse terminates, either by a flash timeout,
pulling STROBE low, or disabling it via the I2C-compatible in-
terface, LED1 and LED2 turn completely off. This happens
even when Torch is enabled via the I2C-compatible interface
and the Flash pulse is turned on by toggling STROBE. After
a Flash event ends, bits [1:0] of the Enable Register are au-
tomatically reset with (0, 0). The exception occurs when the
Privacy Terminate Bit is low (bit [3]) in the Privacy Register.
In this case, the specific current source that is enabled for
privacy mode will turn back on after the flash pulse.
FLASH TIMEOUT
The Flash Timeout period sets the maximum amount of time
that the Flash Current will be sourced from current sources
LED1 and LED2. Bits [4:0] of the Flash Duration Register set
the Flash Timeout period. There are 32 different Flash Time-
out durations in steps of 32 ms giving a Flash Timeout range
of 32 ms to 1024 ms (see Table 15).
TORCH MODE
In Torch mode the current sources LED1 and LED2 each
provide 8 different current levels (Table 13). Torch mode is
activated by setting Enable Register bits [1:0] to (1, 0). Once
Torch mode is enabled, the current sources will ramp up to
13
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the programmed Torch current level by stepping through all
of the Torch currents at (32 µs/step) until the programmed
Torch current level is reached.
The intensity of the LEDs in privacy indicate mode is set by
PWM’ing either the lowest Torch current level (31.25 mA per
current source) or the highest Torch current level (250 mA per
current source). Bit [2] in the Enable register selects between
these two levels. Bits [2:0] in the Privacy Register select the
8 different duty cycles of 10%, 20%, 30%, 40%, 50%, 60%,
70%, and 80%. This enables privacy mode to have a PWM'd
torch current with a wide number of values (see Table 1 ). The
privacy blink options (tBLINK) are set via bit [7:6] of the Privacy
Register. Selectable options are 128 ms, 256 ms, 512 ms, or
always on. The blink pulse period is set to 2 x tBLINK. Figure
3 details the timing for the Privacy Indicate Mode timing on
ILED1 or ILED2.
PRIVACY INDICATOR MODE
The current sources (LED1 and/or LED2) can also be used
as a privacy indicator before and after flash mode. Privacy
indicate mode is enabled by setting the Enable Register bit
[1:0] to (0, 1). Privacy mode is configured via the Privacy
Register. This allows the selection of which current source to
use as the privacy indicator (either LED1, LED2, or both),
whether or not the privacy indicate mode turns off at the end
of the flash pulse, the 3 selectable privacy blink periods
(tBLINK), and the 8 duty cycle settings for the privacy indicator
average current.
30113806
FIGURE 3. Privacy Indicate Timing
TABLE 1. Privacy Indicate (PWM'd Torch) Possible Current Settings
(The listed current is with 1 current source active)
Privacy Current
Setting
Privacy Indicate Duty
Cycle
ILED1 or ILED2
(Single LED)
(Enable Register Bit Privacy Register Bits[2:0]
[2])
see (Table 4)
0 = 31.25mA peak
1 = 250mA peak
0
0
0
0
0
0
0
0
1
1
1
1
000
001
010
011
100
101
110
111
000
001
010
011
3.125 mA
6.25 mA
9.375 mA
12.5 mA
15.625 mA
18.75 mA
21.875 mA
25 mA
25 mA
50 mA
75 mA
100 mA
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14
Privacy Current
Setting
Privacy Indicate Duty
Cycle
ILED1 or ILED2
(Single LED)
(Enable Register Bit Privacy Register Bits[2:0]
[2])
see (Table 4)
0 = 31.25mA peak
1 = 250mA peak
1
1
1
1
100
101
110
111
125 mA
150 mA
175 mA
200 mA
TX1 Shutdown
POWER AMPLIFIER SYNCHRONIZATION (TX1)
TX1 also has the capability to force shutdown. Bit [4] of Con-
figuration Register 2 set to a '1', changes TX1 from a force
Torch when active to a force shutdown when active. For ex-
ample, if TX1/TORCH/GPIO1 is configured for TX1 mode with
active high polarity, and bit[4] of Configuration Register 2 is
set to '1' , then when TX1 is driven high, the active current
sources (LED1 and/or LED2) will be forced into shutdown.
Once the active current sources are forced into shutdown by
activating TX1, the current sources can only be re-enabled
into flash mode if TX1 is pulled low and the Flags Register is
read back. If only the Flags register is read back and TX1 is
kept high the device will be re-enabled into torch mode and
not shutdown. This occurs because the TX1 shutdown feature
is an edge-triggered event. With active high polarity the TX1
shutdown requires a rising edge at TX1 in order to force the
current source into shutdown. Once shut down, it takes a
readback of the flags Register and another rising edge at TX1
to force shutdown again. Figure 6 details the different re-
sponses of the TX1 shutdown mode.
The TX1/TORCH/GPIO1 pin has a triple function. With Con-
figuration Register 1 Bit [7] = 0 (default) TX1/TORCH/GPIO1
is a Power Amplifier Synchronization input (TX1 mode). This
mode is designed to reduce the flash LED current when TX1
is driven high (active high polarity) or driven low (active low
polarity). When the LM3560 is engaged in a Flash event and
TX1/TORCH is driven high, the active current sources (LED1
and/or LED2) are forced into Torch mode at the programmed
Torch current setting. If TX1 is then pulled low before the
Flash pulse terminates, the LED current will return to the pre-
vious Flash current level. At the end of the Flash timeout,
whether the TX1/TORCH pin is high or low, the LED current
will turn off.
The polarity of TX1 can be changed from active high to active
low by writing a 0 to bit [5] of Configuration Register 1. With
this bit set to ‘0’ the LM3560 will be forced into Torch mode
when TX1/TORCH is pulled low. Figure 4 details the func-
tionality of the TX1 Interrupt.
30113807
FIGURE 4. TX1 or TX2 Interrupt (Force Torch) Response
HARDWARE TORCH
ware torch mode, both LED1 and LED2 current sources will
turn off after a flash event and Configuration Register 1 Bit [7]
will be reset to 0. In this situation, to re-enter torch mode via
hardware torch, the hardware torch enable bit (Configuration
Register 1 Bit [7]) must be reset to 1. Figure 5 details the
functionality of hardware torch mode.
With Configuration Register 1 Bit [7] = 1, TX1/TORCH/GPIO1
is configured as a hardware Torch mode enable. In this mode,
a high at TX1/TORCH turns on the LED current at the pro-
grammed Torch current setting. The STROBE input and I2C
Enabled flash takes precedence over TORCH mode. In hard-
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30113835
FIGURE 5. Hardware Torch Mode
GPIO1 MODE
LED2) are forced into Torch mode. During a TX2 interrupt
event, if the TX2 input is disengaged, the LED current will
return to the previous flash current level. Figure 4 details the
functionality of the TX2 Interrupt.
With Bit [0] of the GPIO Register set to 1, the TX1/TORCH/
GPIO1 pin is configured as a logic I/O. In this mode the TX1/
TORCH/GPIO1 pin is readable and writable as a logic input/
output via bits [2:1] of the GPIO Register. See GPIO REGIS-
TER (Address 0x20) for programming the GPIO1 output.
TX2 Shutdown
TX2 also has the capability to force shutdown. When bit [0] of
Configuration Register 2 is set to a '1', TX2 will force shutdown
when active. For example, if TX2 is configured for TX2 mode
with active high polarity, and bit [0] of Configuration Register
2 is set to '1' then when TX2 is driven high, the active current
sources (LED1 and/or LED2) will be forced into shutdown.
Once the active current sources are forced into shutdown by
activating TX2, the current sources can only be re-enabled in
flash mode if TX2 is pulled low and the Flags register is read
back. If only the Flags register is read back and TX2 is kept
high, the device will be re-enabled into torch mode and not
shutdown. This occurs because the TX2 shutdown feature is
an edge-triggered event. With active high polarity the TX2
shutdown requires a rising edge at TX2 in order to force the
current sources into shutdown. Once shut down, it takes a
readback of the flags Register and another rising edge at TX2
to force shutdown again. Figure 6 details TX2 shutdown
mode.
TX2/INT/GPIO2
The TX2/INT/GPIO2 pin has a triple function. In TX2 mode
(Default) the TX2/INT/GPIO2 pin is an active high Flash in-
terrupt. With GPIO Register bit [3] = 1 the TX2/INT/GPIO2 pin
is configured as general purpose logic I/O (GPIO2). With
GPIO Register bit [6] = 1 and with GPIO2 set for GPIO output,
the TX2/INT/GPIO2 pin is an interrupt output
TX2 MODE
In TX2 mode, when Configuration Register 1, bit [6] = 0, TX2
is an active low flash interrupt. Under this condition when the
LM3560 is engaged in a Flash event and TX2 is pulled low,
the active current source (LED1 and/or LED2) are forced into
Torch mode. In TX2 mode with Configuration Register 1, bit
[6] = 1, TX2 is configured for active high polarity. Under this
condition, when the LM3560 is engaged in a Flash event and
TX2 is driven high, the active current source (LED1 and/or
30113898
FIGURE 6. TX1 or TX2 (Force Shutdown) Response
GPIO2 MODE
GPIO2 pin is readable and writable as a logic input/output via
bits [5:4] of the GPIO Register. See Table 8 for programming
the GPIO2 output.
With Bit [3] of the GPIO Register set to 1, the TX2/INT/GPIO2
pin is configured as a logic I/O. In this mode the TX2/INT/
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INTERRUPT OUTPUT (INT MODE)
2. The LM3560 is configured for VIN Monitor mode (VIN
Monitor Register bit [0] = 1), and VIN falls below the
programmed VIN Monitor Threshold.
The TX2/INT/GPIO2 pin can be reconfigured as an active low
interrupt output by setting bit [6] in the GPIO Register to ‘1’
and configuring TX2/INT/GPIO2 as a GPIO2 output (bits [4:3]
of GPIO Register = 11). In this mode, TX2/INT/GPIO2 will pull
low when any of these conditions exist.
3. The LM3560 is configured for VIN Flash Monitor mode
(VIN Monitor Register bit [3] = 1), and VIN falls below the
programmed VIN Flash Monitor Threshold.
1. The LM3560 is configured for NTC mode (Configuration
Register 1 bit [4] = 1), and the voltage at LEDI/NTC has
fallen below VTRIP (1V typical).
Once INT is pulled low due to any of the above conditions
having been met, INT will only go high again if any of the con-
ditions are no longer true and the Flags Register is read.
30113808
FIGURE 7. TX2 As an Interrupt Output (During an NTC Event)
INDICATOR LED/THERMISTOR (LED1/NTC)
2. Pulse width (tPULSE) has 16 settings between 0 and 480
ms in steps of 32 ms. The pulse width is the duration that
the indicator current is at its programmed set point at the
end of the ramp-up time.
The LEDI/NTC pin serves a dual function: either as a pro-
grammable LED message indicator driver, or as a comparator
input for negative temperature coefficient (NTC) thermistors.
The Indicator Register controls the following (see Table 5 ):
MESSAGE INDICATOR CURRENT SOURCE (LEDI/NTC)
1. Indicator current level (IIND). There are 8 indicator current
levels from 2.25 mA to 18 mA in steps of 2.25 mA.
LEDI/NTC is configured as a message indicator current
source by setting Configuration Register 1 bit [4] = (0) default.
The indicator current source is enabled/disabled via the En-
able Register bit [6] = (1). Bit [7] of the Enable Register
enables the Message Indicator in blink mode. If the message
indicator is set for blinking mode, the pattern programmed into
the Indicator Register, and Indicator Blinking Register is out-
put on the Indicator current source.
2. Number of periods (PERIOD #). This has 8 steps. A
period (tPERIOD) is found by (tPERIOD = tR + tF + 2 x
tPULSE). (see Figure 8 for indicator timing).
3. Ramp times (tR or tF) for turn-on and turn-off of the
indicator current source. Four programmable times of 78
ms, 156 ms, 312 ms, and 624 ms are available. The ramp
times apply for both ramp-up and ramp-down and are not
independently changeable.
The Indicator Blinking Register controls the following (see
Table 6 ):
1. Number of blank periods (BLANK #). This has 16
settings. tBLANK = tACTIVE × BLANK# , where tACTIVE
tPERIOD × PERIOD#
=
17
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30113812
FIGURE 8. Message Indicator Timing Diagram
MESSAGE INDICATOR EXAMPLE 1 (Single Pulse with
Dead Time):
lows. tR = tF = 312 ms, tWIDTH = 192 ms (tPERIOD = 312 ms x 2
+ 192 ms x 2 = 1016 ms). BLANK# setting will be: 5s/1016
ms x 1 (PERIOD# = 1). Giving a BLANK# setting of 5. The
resulting waveform will appear as:
As an example, to set up the message indicator for a 312 ms
ramp-up and ramp-down, 192 ms pulse width, and 1 pulse
followed by a 5s delay. The indicator settings will be as fol-
30113813
FIGURE 9. Message Indicator Example 1
MESSAGE INDICATOR EXAMPLE 2 (Multiple Pulses with
Dead Time):
tACTIVE time is tPERIOD × 3 = 1016 ms × 3 = 3048 ms. This
results in a blank time of tBLANK = tACTIVE × BLANK# = 3.048s
× 5 = 15.24s
Another example has the same tR, tF, tPULSE, and tBLANK times
as before, but this time the PERIOD# is set to 3. Now the
30113814
FIGURE 10. Message Indicator Example 2
UPDATING THE MESSAGE INDICATOR
input to the an internal comparator. NTC mode operates as a
LED current interrupt that is triggered when the voltage at
LEDI/NTC goes below 1V.
The best way to update the message indicator is to disable
the Message Indicator output via the Enable Register bit [6],
then write the new sequence to the Indicator Register and/or
Indicator Blinking Register, and then re-enable the Message
Indicator. Updating the Indicator Registers while it is active
can lead to long delays between pattern changes. This is es-
pecially true if the PERIOD#, or BLANK# setting is changed
from a high setting to a lower setting.
Two actions can be taken when the NTC comparator is
tripped. With Configuration Register 2 bit [1] set to ‘0’ the NTC
interrupt will force the LED current from Flash mode into Torch
mode. With Configuration Register 2 bit [1] set to ‘1’, the NTC
interrupt will force the LED current into shutdown.
Whether in NTC force torch or NTC shutdown, in order to re-
enter flash mode after an NTC event, two things must occur.
First, the NTC input must be above the 1V threshold. Sec-
ondly, the Flags Register must be read.
NTC MODE
Writing a (1) to Configuration Register 1 bit [4] configures the
LEDI/NTC pin for NTC mode. In this mode the indicator cur-
rent source is disabled, and LEDI/NTC becomes the positive
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To avoid noise from falsely triggering the NTC Comparator,
this mode incorporates a 250 µs de-glitch timer. With NTC
mode active, VLEDI/NTC must go below the trip point (VTRIP) and
remain below it for 250 µs before the LEDs are forced into
Torch mode (or shutdown) and the NTC Flag is written.
becomes dependent on its occurrence relative to the
STROBE input. In this mode, if TX1/TORCH goes high first,
then STROBE goes high, the LEDs are forced into Torch
mode with no timeout. In this mode, if TX1/TORCH goes high
after STROBE has gone high, then the TX1/TORCH pin op-
erates as a normal LED current interrupt (TX1), and the LEDs
will turn off at the end of the timeout duration (see Figure
11).
ALTERNATE EXTERNAL TORCH (AET MODE)
With Configuration Register 2 bit [2] set to '1', the LM3560 is
configured for AET mode, and the operation of TX1/TORCH
30113810
FIGURE 11. AET Mode Timing
INPUT VOLTAGE MONITOR
off or be forced into the Torch current setting. To reset the
LED current to its previous level, two things must occur. First,
VIN must go above the VIN Monitor threshold, and the Flags
register must be read back. See Figure 12 for the VIN Monitor
Timing Waveform.
The LM3560 has an internal comparator at IN which monitors
the input voltage and can force the LED current into Torch
mode or into shutdown if VIN falls below the programmable
VIN Monitor Threshold. Bit 0 in the VIN Monitor Register en-
ables or disables this feature. When enabled, Bits [2:1] pro-
gram the 4 adjustable thresholds of 2.9V, 3.0V, 3.1V, and
3.2V. Bit 3 in Configuration Register 2 selects whether a VIN
Monitor event forces Torch mode or forces LED1 and/or LED2
into shutdown. See Table 11 for additional information. When
the input voltage monitor is active, and VIN falls below the
programmed VIN Monitor threshold, the LEDs will either turn
To avoid noise from falsely triggering the VIN Monitor, this
mode incorporates a 250 µs de-glitch timer. With the VIN
Monitor active, VIN must go below the VIN Monitor Threshold
(VIN_TH), and remain below it, for 250 µs before the LEDs are
forced into Torch mode (or shutdown) and the VIN Monitor
Flag is written.
30113809
FIGURE 12. VIN Monitor Waveform
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30113899
FIGURE 13. VIN Monitor/VIN Flash Monitor Test Circuit
INPUT VOLTAGE FLASH MONITOR (FLASH CURRENT
RISING)
Comparator. With the VIN Flash Monitor active, VIN must go
below the VIN Flash Monitor Threshold (VIN_FLASH), and re-
main below it, for 8µs before the flash current ramp is halted
and the VIN Flash Monitor Flag is written.
A second comparator at the IN terminal is available to monitor
the input voltage during the flash current turn-on (Input Volt-
age Flash Monitor). Bit [3] of the VIN Monitor Register en-
ables/disables this feature. With this bit set to ‘1’, the VIN
Flash Monitor is active, and bits [5:4] of the VIN Monitor Reg-
ister program the 4 selectable thresholds of (2.9V, 3.0V, 3.1V,
and 3.2V). The VIN Flash Monitor operates as follows: during
flash current turn-on the current sources will transition
through each of the lower flash current levels until the target
flash current is reached. With the Input Voltage Flash Monitor
active, if during the flash current turn-on the input voltage falls
below the VIN Flash Monitor threshold, the flash current is
stopped at the level that the current ramp had risen to, at the
time of the VIN Flash Monitor event. The VIN Flash Monitor
only operates during the ramping up of the flash LED current.
LAST FLASH REGISTER
Once the VIN Flash Monitor is tripped, the flash code that
corresponded to the LED current at which the flash current
ramp was halted is written to the Last Flash Register. The Last
Flash Register is a read only register and has the lower 4 bits
available to latch the code for LED1 and the upper 4 bits to
latch the code for LED2.
For example, suppose that the LM3560 is set-up for a single
LED with a target flash current of 1250 mA and the VIN Flash
Monitor is enabled with the VIN Flash Monitor threshold set
to 3.0V (VIN Monitor Register bits [5:4] = 0, 1). When the
STROBE input is brought high, the LED current begins ramp-
ing up through the torch and flash current codes at 32 µs/
code. As the input current increases, the input voltage at the
LM3560’s IN pin begins to fall due to the source impedance
of the battery. By the time the LED current has reached 1000
mA (code 0x77 or 500 mA per current source), VIN falls below
3.0V. The VIN Flash Monitor will then stop the flash current
ramp and the LM3560 will continue to proceed with the flash
pulse, but at 1000 mA instead of 1250 mA. details this se-
quence.
The VIN Flash Monitor ignores the first 2 flash codes during
the flash current turn-on. As a result, if the VIN Flash Monitor
is enabled and VIN were to fall below the VIN Flash Threshold
as the LED current ramps up through either of the first two
levels, then the flash pulse would not be halted until code #3
(168.75mA per current source).
To avoid noise from falsely triggering the VIN Flash Monitor,
this mode incorporates an 8µs de-glitch timer as well as an
internal analog filter at the input of the VIN Flash Monitor
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30113815
FIGURE 14. VIN Flash Monitor Example
LED VOLTAGE MONITOR
this bit is set high the EOC bit (bit [6]) goes low, and a con-
version is performed. When the conversion is complete, the
EOC bit goes high again. Subsequent conversions are per-
formed in manual mode by reading back the VLED Monitor
register. This resets the EOC bit and starts another conver-
sion (see Figure 16).
The LM3560 includes a 4-bit ADC which monitors the LED
forward voltage (VLED) and stores the digitized value in bits
[3:0] of the VLED Monitor Register. The highest voltage of
VLED1 or VLED2 is automatically sensed, and that becomes
the sample point for the ADC. Bit 5, the ADC shutdown bit,
enables/disables the ADC with the default state set to enable
(bit [5] = 0).
ADC DELAY
The ADC Delay register provides for a programmable delay
from 250 µs to 8ms in steps of 250 µs. This delay is the delay
from when the EOC bit goes low to when the VLED Monitor
samples the LED voltage. In Automatic Mode the EOC bit
goes low when the Flash LED current hits its target. In Manual
mode the EOC bit goes low at the end of a readback of the
VLED Monitor Register (or when the manual mode bit (bit 4)
is re-written with a 1).
AUTOMATIC CONVERSION MODE
With the ADC enabled, a conversion is performed each time
a flash pulse is started. When a flash pulse is started bit [6] of
the VLED Monitor Register (End of Conversion bit) is auto-
matically written with a ‘0’. At the end of the conversion, bit [6]
will go high signaling that the VLED data is valid. A readback
of the VLED Monitor register will clear bit [6]. Figure 15 details
the VLED Monitor Automatic Conversion.
MANUAL CONVERSION MODE
The VLED Monitor can be set up for manual conversion mode
by setting bit [4] of the VLED Monitor Register to '1'. When
30113821
FIGURE 15. VLED Monitor Automatic Mode
21
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30113823
FIGURE 16. VLED Monitor Manual Mode
FLAGS REGISTER AND FAULT INDICATORS
HWEN low, cycling power, or by removing the fault condition
and reading back the Flags Register.
Eight fault flags are available in the LM3560. These include a
Flash Timeout, a Thermal Shutdown, an LED Failure Flag
(LED Shorted or Output going OVP indicating LED open), an
LED Thermal Flag (NTC threshold tripping), a VIN Monitor
Flag, and a VIN Flash Monitor Flag. Additionally, two LED in-
terrupt flag bits (TX1 interrupt and TX2 interrupt) are set when
the corresponding interrupt is activated. Reading back a '1'
indicates the flagged event has happened. A read of the Flags
Register resets these bits.
TX1 AND TX2 INTERRUPT FLAGS
The TX1 and TX2 interrupt flags (bits [3] and [4]) indicate an
interrupt event has occurred on the respective TX inputs. Bit
3 will read back a '1' if TX1 is in TX mode and there has been
a TX1 event since the last read of the Flags Register. Bit 4
will read back a '1' if TX2 is in TX mode and there has been
a TX2 event since the last read of the Flags Register. A read
of the Flags Register automatically resets these bits. A TX
event on TX1 or TX2, can be a high-to-low transition or a low-
to-high transition depending on the setting of the TX1 and TX2
polarity bits (see Configuration Register 1 Bits [6:5]).
FLASH TIMEOUT
The Timeout or (TO flag), (bit [0] of the Flags Register) reads
back a '1' if the LM3560 is active in Flash mode and the Time-
out period expires before the Flash pulse is terminated. The
flash pulse can be terminated before the Timeout period ex-
pires by pulling the STROBE pin low (with Enable Register bit
[5] = 0), or by writing a (0,0) to bit [1:0] of the Enable Register.
The TO flag is reset to '0' by pulling HWEN low, removing
power to the LM3560, or reading the Flags Register.
LED THERMAL FAULT (NTC Flag)
The NTC flag (bit [5] of the Flags Register) reads back a '1' if
the LM3560 is active in Flash or Torch mode, the device is in
NTC mode, and the voltage at LEDI/NTC has fallen below
VTRIP (1V typical). When this has happened, and the LM3560
has been forced into Torch mode or LED shutdown (depend-
ing on the state of Configuration Register 2 bit [1), the Flags
Register must be read, and VLEDI/NTC must go above 1V in
order to place the device back in normal operation. (see NTC
MODE section for more details).
THERMAL SHUTDOWN FLAG
When the thermal shutdown threshold is tripped a '1' gets
written to bit [1] of the Flags Register (Thermal Shutdown bit).
The LM3560's flash, torch, or privacy modes cannot be
restarted until the Flags Register has been read back, or when
the device is shut down and started up again.
VIN FLASH MONITOR FAULT
The VIN Flash Monitor Flag (bit [6] of the Flags Register)
reads back a '1' if the VIN Flash Monitor is enabled and VIN
falls below the programmed VIN Flash Monitor threshold. This
flag must be read back in order to resume normal operation
after the LED current has been forced to the lower flash cur-
rent setting.
LED FAULT
The LED Fault flag (bit 2 of the Flags Register) reads back a
'1' if the part is active in Flash or Torch mode and either LED1
or LED2 experience an open or short condition. An LED open
condition is signaled if the OVP threshold is crossed at the
OUT pin while the device is in Flash, Torch, or Privacy mode.
An LED short condition is signaled if the voltage at LED1 or
LED2 goes below 500 mV while the device is in Flash, Torch,
or Privacy mode. In an LED open condition there is a 2µs
deglitch time from when the output voltage crosses the OVP
threshold to when the LED Fault Flag is triggered. In an LED
short condition there is a 250µs deglitch time from when the
LED voltage falls below 500 mV until the LED Fault Flag is
set. The LED Fault Flag can only be reset to '0' by pulling
VIN MONITOR FAULT
The VIN Monitor Flag (bit [7] of the Flag Register) reads back
a '1' when the VIN Monitor is enabled and VIN falls below the
programmed VIN Monitor threshold. This flag must be read
back and VIN must go above the VIN Monitor Threshold in
order to resume normal operation after the LED current has
been forced to Torch mode or turned off due to a VIN Monitor
event.
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I2C-Compatible Interface
START AND STOP CONDITIONS
The LM3560 is controlled via an I2C-compatible interface.
START and STOP conditions classify the beginning and end
of the I2C session. A START condition is defined as SDA
transitioning from HIGH-to-LOW while SCL is HIGH. A STOP
condition is defined as SDA transitioning from LOW-to-HIGH
while SCL is HIGH. The I2C master always generates the
START and STOP conditions.
30113818
FIGURE 17. Start and Stop Sequences
The I2C bus is considered busy after a START condition and
free after a STOP condition. During data transmission the
I2C master can generate repeated START conditions. A
START and a repeated START condition are equivalent func-
tion-wise. The data on SDA must be stable during the HIGH
period of the clock signal (SCL). In other words, the state of
SDA can only be changed when SCL is LOW. Figure 18
shows the SDA and SCL signal timing for the I2C-Compatible
Bus. See the Electrical Table for timing values.
301138119
FIGURE 18. I2C-Compatible Timing
23
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I2C-COMPATIBLE CHIP ADDRESS
The device address for the LM3560 is 1010011 (0xA7 for read
and 0xA6 for write). After the START condition, the I2C master
sends the 7-bit address followed by an eighth read or write bit
(R/W). R/W = 0 indicates a WRITE and R/W = 1 indicates a
READ. The second byte following the device address selects
the register address to which the data will be written. The third
byte contains the data for the selected register.
30113820
FIGURE 19. Device Address
TRANSFERRING DATA
master. The master releases SDA (HIGH) during the 9th clock
pulse (write mode). The LM3560 pulls down SDA during the
9th clock pulse, signifying an acknowledge. An acknowledge
is generated after each byte has been received.
Every byte on the SDA line must be eight bits long, with the
most significant bit (MSB) transferred first. Each byte of data
must be followed by an acknowledge bit (ACK). The acknowl-
edge related clock pulse (9th clock pulse) is generated by the
Register Descriptions
TABLE 2. LM3560 Internal Registers
Internal Hex Address
Register Name
Power On/RESET Value
Enable
Privacy
Indicator
0x10
0x11
0x12
0x13
0x14
0x20
0x30
0x31
0x80
0x81
0xA0
0xB0
0xC0
0xD0
0xE0
0xF0
0x18
0x58
0x00
0x00
0xF8
0x80
0x80
0x90
0xC0
0x00
0x52
0xDD
0xEF
0x00
0x6B
0xE0
Indicator Blinking
Privacy PWM
GPIO
VLED Monitor (ADC)
ADC Delay
VIN Monitor
Last Flash
Torch Brightness
Flash Brightness
Flash Duration
Flags
Configuration 1
Configuration 2
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24
ENABLE REGISTER (Address 0x10)
(max or min torch current). Bits [4:3] turn on/off the main cur-
rent sources (LED1 and LED2). Bit [5] sets the level or edge
control for the STROBE input. Bits 7 and 6 control the Indi-
cator current source (see Table 3).
Bits [1:0] of the Enable Register controls the on/off state of
Torch mode, Flash mode, and Privacy Indicate mode. Bit 2
selects the peak current setting for Privacy Indicate mode
TABLE 3. Enable Register Descriptions
Bit 7
Bit 6
Bit 5
Bit 4 Bit 3
Bit 2
Bit 1
Bit 0
(EN Blink)
(EN
Message
Indicator)
(STROBE
Level/Edge)
(LED2 (LED1
ENABLE) Enable)
(Privacy
Mode Peak
Current
Setting)
(EN1)
(EN0)
0 = Message 0 = Message 0 = (Level Sensitive) 0 = LED2 off 0 = LED1 off 0 = 31.25mA Enable Bits
Indicator
Blinking
Function is
Indicator is
disabled
(Default)
When STROBE goes 1 = LED2 on 1 = LED1 on (default)
00 = Current Sources are
1 = 250 mA Shutdown (default)
01 = Privacy Indicator Mode
high, the Flash current (default)
(default)
will turn on and remain
disabled (See 1= Message on for the duration the
10 = Torch Mode
11 = Flash Mode (bits reset
at timeout)
Note below). Indicator is
STROBE pin is held
high or when the Flash
Timeout occurs,
(default)
1 = Message
Indicator
Blinking
enabled.
whichever comes first.
(default)
Function is
enabled. The
message
indicator
blinks the
pattern
1 = (Edge Triggered)
When STROBE goes
high, the Flash current
will turn on and remain
on for the duration of
the Flash Time-out.
programmed
in the
Indicator
Register and
Indicator
Blinking
Register
NOTE: Bit 7 Enables/Disables the Message Indicator Blinking Function. With this bit set to 0 and Bit 6 set to 1, the Message Indicator turns on constantly at the
programmed current as set in Indicator Register bits [2:0].
25
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PRIVACY REGISTER (Address 0x11)
after the flash pulse terminates, and the duty cycle settings
(between 10% and 80%) for setting the average privacy LED
current (see Table 4 ).
The Privacy Register contains the bits that control which cur-
rent source is used for the privacy indicator (LED1 or LED2
or both), whether the privacy indicator turns off or remains on
TABLE 4. Privacy Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2 (PD2)
Bit 1 (PD1)
Bit 0 (PD0)
(Blink 2)
(Blink 1)
(LED2
Privacy)
(LED1
Privacy)
(Privacy
Terminate)
tBLINK
0 = LED2 is off 0 = LED1 is off 0 = Privacy
Privacy mode current levels (% of minimum or
maximum torch current, depending on bit [2] of
for privacy
mode
for privacy
mode
mode turns
back on at the Enable Register)
00 = No Blinking
01 = 128 ms Blink Period
(Default)
10 = 256 ms Blink Period
11 = 512 ms Blink Period
(Default)
1 = LED1 is on end of the
000 = 10% (Default)
001 = 20%
010 = 30%
1 = LED2 is on for privacy
flash pulse
1 = Privacy
mode remains 011 = 40%
off at the end 100 = 50%
for privacy
mode
mode
(Default)
of the flash
pulse
(Default)
101 = 60%
110 = 70%
111 = 80%
INDICATOR REGISTER (Address 0x12)
2. Pulse width
The Indicator Register contains the bits which control the fol-
lowing:
3. Ramp times for turn-on and turn-off of the indicator
current source (see Figure 20 for the message indicator
timing diagram).
1. Indicator current level
TABLE 5. Indicator Register
Bit 4 (P2) Bit 3 (P1)
Bit 7 (R2)
Bit 6 (R1)
Bit 5 (P3)
Bit 2 (I3)
(IIND
Bit 1 (I2)
Bit 0 (I1)
(tR and tF)
(PERIOD#)
000 = 0 (default)
001 = 1
)
00 = 78 ms (default)
01 = 156 ms
000 = 2.25 mA (default)
001 = 4.5 mA
010 = 2
011 = 3
10 = 312 ms
11 = 624 ms
010 = 6.75 mA
011 = 9 mA
100 = 4
101 = 5
110 = 6
111 = 7
100 = 11.25 mA
101 = 13.5 mA
110 = 15.75 mA
111 = 18 mA
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26
INDICATOR BLINKING REGISTER (Address 0x13)
2. Active Time (tACTIVE = tPERIOD × PERIOD# )
The Indicator Blinking Register contains the bits which control
the following:
3. Blank Time (tBLANK = tACTIVE × BLANK#)
(see Figure 20)
1. Number of periods (tPERIOD = tR + tF + 2 x tPULSE
TABLE 6. Indicator Blinking Register
Bit 4 (M1) Bit 3 (PW4) Bit 2 (PW3)
)
Bit 7 (N/A)
Bit 6 (M3)
Bit 5 (M2)
Bit 1 (PW2)
Bit 0 (PW1)
Not used
BLANK#
0000 = 0 (default)
0001 = 1
Pulse Time (tPULSE
0000 = 0 (default)
0001 = 32 ms
)
0010 = 2
0010 = 64 ms
0011 = 3
0011 = 92 ms
0100 = 4
0101 = 5
0110 = 6
0111 = 7
1000 = 8
1001 = 9
1010 = 10
1011 = 11
1100 = 12
1101 = 13
1110 = 14
1111 = 15
0100 = 128 ms
0101 = 160 ms
0110 = 196 ms
0111 = 224 ms
1000 = 256 ms
1001 = 288 ms
1010 = 320 ms
1011 = 352 ms
1100 = 384 ms
1101 = 416 ms
1110 = 448 ms
1111 = 480 ms
30113812
FIGURE 20. Message Indicator Timing Diagram
PRIVACY PWM PERIOD REGISTER (Address 0x14)
The Privacy PWM Register contains the bits to control the
PWM period for the privacy indicate mode (see Table 7).
TABLE 7. Privacy PWM Period Register
Bits 7-3
(Not Used)
Bit 2
(P3)
Bit 1
(P2)
Bit 0
(P1)
000 = 5.12 ms (default)
001 = 2.56 ms
010 = 1.28 ms
011 = 640 µs
1XX = 320 µs
27
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GPIO REGISTER (Address 0x20)
The GPIO register contains the control bits which change the
state of the TX1/TORCH/GPIO1 pin and the TX2/INT/GPIO2
pins to general purpose I/O’s (GPIO’s). Additionally, bit 6 of
this register contains the interrupt configuration bit. describes
the bit description and functionality of the GPIO register. To
configure the TX1 or TX2 pins as GPIO outputs an initial dou-
ble write is required to register 0x20. For example, to config-
ure TX2 to output a logic high, an initial write of 0xB8 would
need to occur twice, to force GPIO2 low. Subsequent writes
to GPIO2 after the initial set-up, only requires a single write.
To read back the GPIO inputs, a write then a read of register
0x20 must occur each time the data is read. For example, if
GPIO2 is set-up as a GPIO input and the GPIO2 input has
then changed state, first a write to 0x20 must occur, then the
following readback of register 0x20 will show the updated da-
ta. When configuring TX2 as an interrupt output, the TX2/
GPIO2/INT pin must first be configured as a GPIO output
(double write). For example, to configure TX2/GPIO2/INT for
INT mode a write of 0xF8 to register 0x20 must be done twice.
TABLE 8. GPIO Register
Bit 7
(Not
Bit 6
Bit 5
Bit 4
(TX2/INT/
Bit 3
Bit 2
Bit 1
Bit 0
(TX2/INT/GPIO2 (TX2/INT/
(TX2/INT/GPIO2 (TX1/TORCH/ (TX1/TORCH/ (TX1/TORCH/
Used)
Interrupt
Enable)
GPIO2 data) GPIO2 data Control)
direction)
GPIO1 data)
GPIO1 data
direction)
GPIO1
Control)
N/A
0 = TX2/INT/
GPIO2 is
configured
according to bit 3 TX2/INT/
of this register
This bit is the 0 = TX2/INT/ 0 = TX2/INT/
This bit is the
read or write
0 = TX1/
TORCH/GPIO1 TORCH/
is a GPIO input GPIO1 pin is
(default)
0 = TX1/
read or write
data for the
GPIO2 is a
GPIO Input
(default)
GPIO is
configured as a data for the
TX interrupt
GPIO1 pin in
GPIO mode
configured as
TX interrupt
(default)
GPIO2 pin in
GPIO mode
(default)
(default)
1 = with bits [4:3]
= 11, TX2/INT/
GPIO2 is an
interrupt output.
See Interrupt
section.
1 = TX2/INT/ 1 = TX2/INT/
GPIO2 is a GPIO2 is
GPIO output configured as a
GPIO
1 TX1/
1 = TX1/
TORCHGPIO1 TORCH/
is an output GPIO1 pin is
configured as a
GPIO
LED FORWARD VOLTAGE ADC (VLED MONITOR
REGISTER, Address 0x30)
sion is still performed. In automatic conversion mode a
conversion is performed each time a flash pulse is initiated.
Bit [5] is the ADC shutdown bit. Bit [6] signals the end of con-
version. This is a read-only bit that goes high when a conver-
sion is complete and data is ready. A read of the VLED
Monitor Register clears the End of Conversion bit (see Table
9).
The VLED Monitor Register controls the internal 4 bit analog
to digital converter. Bits [3:0] of this register contain the 4-bit
data of the LED voltage. This data is the digitized voltage of
the highest of either VLED1 to GND or VLED2 to GND. Bit [4]
is the Manual Mode enable which provides for a manual con-
version of the ADC. In Manual Mode the Automatic Conver-
TABLE 9. VLED Monitor Register Descriptions
Bit 7
(Not
Bit 6
Bit 5
(ADC Shutdown)
Bit 4 Bit 3 Bit 2
Bit 1
(ADC1)
Bit 0
(ADC0)
(End of
(Manual Mode (ADC3) (ADC2)
Enable)
0 = Conversion 0 = ADC is enabled 0 = Manual
Used) Conversion)
N/A
0000 = (VLED < 2.8V) (default)
0001 = (2.8V ≤ VLED < 2.9V)
0010 = (2.9V ≤ VLED < 3.0V)
0011 = (3.0V ≤ VLED < 3.1V)
0100 = (3.1V ≤ VLED < 3.2V)
0101 = (3.2V ≤ VLED < 3.3V)
0110 = (3.3V ≤ VLED < 3.4V)
0111 = (3.4V ≤ VLED < 3.5V)
1000 = (3.5V ≤ VLED < 3.6V)
1001 = (3.6V ≤ VLED < 3.7V)
1010 = (3.7V ≤ VLED < 3.8V)
1011 = (3.8V ≤ VLED < 3.9V)
1100 = (3.9V ≤ VLED < 4.0V)
1101 = (4.0V ≤ VLED < 4.1V)
1110 = (4.1V ≤ VLED < 4.2V)
1111 = (4.2V ≤ VLED)
in progress
(default)
(default)
Mode Disabled
(default)
1 = Conversion 1 = ADC is shutdown, 1 = Manual
done
no conversion is
performed
Mode is Enabled
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28
ADC DELAY REGISTER (Address 0x31)
applies to both Manual Mode and Automatic Mode. Bit 5 is
the No Delay bit and can set the delay to effectively 0.
The ADC Delay Register programs the delay from when the
EOC bit goes low to when a conversion is initiated. This delay
TABLE 10. ADC Delay Register Descriptions
Bit 7
(Not
Bit 6
(Not used)
Bit 5 (No Delay)
Bit 4 (D1)
Bit 3 (D2)
Bit 2 (D3) Bit 1 (D4)
Bit 0 (D5)
Used)
0 = Delay is set by bits [4:0]
Bits [4:0] programs the delay from when the EOC bit goes low to when
(default)
a conversion is started (250 µs/step).
00000 = 250 µs
:
01111 = 4 ms (default)
1 = no delay from when the EOC
goes low to when the conversion is
started.
N/A
:
11111 = 8 ms
VIN MONITOR REGISTER (Address 0x80)
bit for the VIN Flash Monitor, and the threshold select for the
VIN Flash Monitor (see Table 11).
The VIN Monitor Register controls the Enable bit for the VIN
Monitor, the threshold select for the VIN Monitor, the enable
TABLE 11. VIN Monitor Register Descriptions
Bit 7
Bit 6
Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
(Not used)
(Not used)
(VIN Flash
Monitor
Threhold 1) Threhold 2)
(VIN Flash (VIN Flash
Monitor
(VIN Monitor (VIN Monitor
Threshold1) Threshold0)
(VIN Monitor
Enable)
Monitor
enable)
N/A
00= 2.9V (default)
01 = 3.0V
10 = 3.1V
0 = VIN Flash 00 = 2.9V Default
0 = VIN Monitor
disabled (default)
Monitor is
disabled
(default)
01= 3.0V
10 = 3.1V
11 = 3.2V
11 = 3.2V
1 = VIN Flash
Monitor is
enabled
1 = VIN Monitor is
enabled
29
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LAST FLASH REGISTER (Address 0x81)
The Last Flash Register is updated at the same time that the
corresponding Flag bit is written to the Flags Register. This
results in a delay of 250 µs from when VLEDI/NTC (NTC mode)
crosses VTRIP, or VIN (VIN Monitor enabled) crosses the
VIN_TH. During VIN Flash Monitor there is a 8us deglitch time
so the VIN Flash Monitor Flag is written (and the Last Flash
The Last Flash Register is a read-only register which is loaded
with the flash code corresponding to the flash level that the
LM3560 was at if any of the following events happen:
1. Voltage at LEDI/NTC falling below VTRIP with the device
in NTC mode (Configuration Register 1 bit[4] = 1);
Register is updated) 8 µs after VIN falls below VIN_FLASH
.
2. Input voltage falling below the programmed VIN Monitor
Threshold with device in VIN Monitor mode (VIN Monitor
Register bit [0] = 1); or
3. Input voltage falling below the programmed VIN Flash
Monitor Threshold with the device in VIN Flash Monitor
mode (VIN Monitor Register bit [3] = 1).
TABLE 12. Last Flash Register Descriptions
Bit 7
(LF2A)
Bit 6
(LF2B)
Bit 5 Bit 4 Bit 3 Bit 2
(LF2C) (LF2D) (LF1A) (LF1B)
Bit 1
(LF1C)
Bit 0
(LF1D)
These bits are read only and represent the Flash Current
These bits are read only and represent the Flash Current Code for
Code for LED2 that the LM3560 was at during the interrupt. LED1 that the LM3560 was at during the interrupt.
0000 = 62.5 mA
0001 = 125 mA
0010 = 187.5 mA
0011 = 250 mA
0100 = 312.5 mA
0101 = 375 mA
0110 = 437.5 mA
0111 = 500 mA
1000 = 562.5 mA
1001 = 625 mA
1010 = 687.5 mA
1011 = 750 mA
1100 = 812.5 mA
1101 = 875 mA
1110 = 937.5 mA
1111 = 1000 mA
0000 = 62.5 mA
0001 = 125 mA
0010 = 187.5 mA
0011 = 250 mA
0100 = 312.5 mA
0101 = 375 mA
0110 = 437.5 mA
0111 = 500 mA
1000 = 562.5 mA
1001 = 625 mA
1010 = 687.5 mA
1011 = 750 mA
1100 = 812.5 mA
1101 = 875 mA
1110 = 937.5 mA
1111 = 1000 mA
TORCH BRIGHTNESS REGISTER DESCRIPTIONS (Address 0xA0)
Bits [2:0] of the Torch Brightness Register set the Torch cur-
rent for LED1. Bits [5:3] set the Torch current for LED2 (see
Table 13).
TABLE 13. Torch Brightness Register Descriptions
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(N/A)
(N/A)
(TC2A)
(TC2B)
(TC2C)
(TC1A)
(TC1B)
(TC1C)
(Not Used)
LED2 Torch Current Select Bits
000 = 31.25 mA (62.5 mA total)
001 = 62.5 mA (125 mA total)
LED1 Torch Current Select Bits
000 = 31.25 mA (62.5 mA total)
001 = 62.5 mA (125 mA total)
010 =93.75 mA (187.5 mA total) default
011 = 125 mA (250 mA total)
010 =93.75 mA (187.5 mA total) default
011 = 125 mA (250 mA total)
100 = 156.25 mA (312.5 mA total)
101 = 187.5 mA (375 mA total)
110 = 218.75 mA (437.5 mA total)
111 = 250 mA (500 mA total)
100 = 156.25 mA (312.5 mA total)
101 = 187.5 mA (375 mA total)
110 = 218.75 mA (437.5 mA total)
111 = 250 mA (500 mA total)
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30
FLASH BRIGHTNESS REGISTER (Address 0xB0)
Bits [3:0] of the Flash Brightness Register set the Flash cur-
rent for LED1. Bits [7:4] set the Flash current for LED2 (see
Table 14).
TABLE 14. Flash Brightness Register Descriptions
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(FC2A)
(FC2B)
(FC2C )
(FC2D)
(FC1A )
(FC1B)
(FC1C)
(FC1D)
Flash Current Select Bits
0000 = 62.5 mA
0001 = 125 mA
Flash Current Select Bits
0000 = 62.5 mA
0001 = 125 mA
0010 = 187.5 mA
0011 = 250 mA
0010 = 187.5 mA
0011 = 250 mA
0100 = 312.5 mA
0101 = 375 mA
0100 = 312.5 mA
0101 = 375 mA
0110 = 437.5 mA
0111 = 500 mA
0110 = 437.5 mA
0111 = 500 mA
1000 = 562.5 mA
1001 = 625 mA
1000 = 562.5 mA
1001 = 625 mA
1010 = 687.5 mA
1011 = 750 mA
1010 = 687.5 mA
1011 = 750 mA
1100 = 812.5 mA
1101 = 875 mA (default)
1110 = 937.5 mA
1111 = 1000 mA
1100 = 812.5 mA
1101 = 875 mA (default)
1110 = 937.5 mA
1111 = 1000 mA
31
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FLASH DURATION REGISTER (Address 0xC0)
Bits [4:0] of the Flash Duration Register set the Flash Timeout
duration. Bits [6:5] set the switch current limit (see Table 15).
TABLE 15. Flash Duration Register Descriptions
Bit 7
(Not used)
Bit 6
(CL1)
Bit 5
(CL0)
Bit 4
(T4)
Bit 3
(T3)
Bit 2
(T2)
Bit 1
(T1)
Bit 0
(T0)
N/A
Current Limit Select Bits
Flash Time-out Select Bits
00 = 1.6A Peak Current Limit 00000 = 32 ms time-out
01 = 2.3A Peak Current Limit 00001 = 64 ms time-out
10 = 3.0A Peak Current Limit 00010 = 96 ms time-out
11 = 3.6A Peak Current Limit 00011 = 128 ms time-out
(default)
00100 = 160 ms time-out
00101 = 192 ms time-out
00110 = 224 ms time-out
00111 = 256 ms time-out
01000 = 288 ms time-out
01001 = 320 ms time-out
01010 = 352 ms time-out
01011 = 384 ms time-out
01100 = 416 ms time-out
01101 = 448 ms time-out
01110 = 480 ms time-out
01111 = 512 ms time-out (default)
10000 = 544 ms time-out
10001 = 576 ms time-out
10010 = 608 ms time-out
10011 = 640 ms time-out
10100 = 672 ms time-out
10101 = 704 ms time-out
10110 = 736 ms time-out
10111 = 768 ms time-out
11000 = 800 ms time-out
11001 = 832 ms time-out
11010 = 864 ms time-out
11011 = 896 ms time-out
11100 = 928 ms time-out
11101 = 960 ms time-out
11110 = 992 ms time-out
11111 = 1024 ms time-out
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32
FLAGS REGISTER (Address 0xD0)
The Flags Register holds the flag bits indicating Flash Time-
out, Thermal Shutdown, LED Fault (Open or Short), TX In-
terrupts (TX1 and TX2), LED Thermal Fault (NTC), VIN
Monitor Trip, and VIN Flash Monitor Trip. All Flags are cleared
on read back of the Flags Register. (See Table 16).
TABLE 16. Flags Register Descriptions
Bit 7
(VIN Monitor)
Bit 6
(VIN Flash
Monitor)
Bit 5
(NTC Fault)
Bit 4 Bit 3
(TX2
Interrupt)
Bit 2
(TX1 Interrupt ) (LED Fault)
Bit 1
(Thermal
Shutdown)
Bit 0
(Flash Time-
out)
0 = VIN is
VIN did not fall 0 = LEDI/NTC 0 = TX2 has
0 = TX1 has not 0 = Proper
0 = Die
0 = Flash
pin is above
not changed
changed state
LED
Temperature Time-Out did
above the VIN below the VIN
1V(default)
Flash Monitor
Threshold or threshold
state (default) (default)
Operation
(default)
below
Thermal
not expire
(default)
Monitor
Shutdown
Limit (default)
VIN Monitor
Threshold is
Disabled
during flash
pulse turn-on
or VIN Flash
Monitor is
disabled
(default)
(default)
1 = VIN
Monitor is
enabled and
1 = VIN Flash 1 = NTC mode 1 = TX2 has
Monitor is
enabled and
1 = TX1 has
is enabled and changed state changed state
LEDI/NTC has (TX2 mode (TX1 mode only) or Short)
only)
1 = LED
1 = Die
1 = Flash
Failed (Open Temperature Time-Out
has crossed
the Thermal
Shutdown
Expired
VIN has fallen VIN fell below fallen below
1V
below the
the
Threshold
programmed programmed
threshold
VIN Flash
Monitor
threshold
during flash
pulse turn-on
CONFIGURATION REGISTER 1 (Address 0xE0)
Configuration Register 1 holds the STROBE Enable bit, the
tion bit for TX1 and TX2, and the Hardware Torch Enable bit
STROBE polarity bit, the NTC Enable bit, the polarity selec-
(see Table 17).
TABLE 17. Configuration Register 1 Descriptions
Bit 7
Bit 6
Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
(Hardware (TX2 Polarity) (TX1 Polarity) (NTC Mode
(STROBE
Polarity)
(STROBE
Input Enable)
(Not Used)
(Not Used)
Torch Mode
Enable)
Enable)
0 = TX1/
TORCH is a
TX input
0 = TX2 is
configured for configured for pin is
active low
polarity
0 = TX1 is
0 = LEDI/NTC 0 = STROBE 0 = STROBE N/A
Input Enable is Input Disabled
configured as active low. (Default)
N/A
active low
polarity
(default)
an indicator
output
Pulling
STROBE low
will turn on
Flash current
(default)
1 = TX1/
1 =TX2 pin is 1 = TX1 is
1 = LEDI/NTC 1 = STROBE 1 = STROBE
TORCH pin is configured for configured for is configured Input is active Input Enabled
a hardware
TORCH
enable. This
bit is reset to 0
after a flash
pulse.
active high
polarity
(default)
active high
polarity
(default)
as a
high. Pulling
STROBE high
will turn on
Flash current
(default)
comparator
input for an
NTC
thermistor
33
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CONFIGURATION REGISTER 2 (Address 0xF0)
mode select bit, the VIN Monitor Shutdown bit, and the TX1
shutdown bit (see Table 18).
Configuration Register 2 holds the TX2 shutdown select bit,
the NTC shutdown select bit, the Alternate External Torch
TABLE 18. Configuration Register 2 Bit Descriptions
Bit 7
(Not used)
Bit 6
(Not used)
Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
(NTC
Shutdown)
Bit 0
(TX2
Shutdown)
(Not used) (TX1 (VIN Monitor (AET mode)
Shutdown)
Shutdown)
N/A
N/A
N/A
0 = TX1
0 = VIN falling 0 = AET Mode 0 = Voltage at 0 = TX2
interrupt will
force the LED
current to the
programmed
torch current
level (default)
Disabled
(default)
LEDI/NTC
falling below
VTRIP will force current to the
interrupt will
force the LED
below the
programmed
VIN Monitor
Threshold will
force the LED
current into the
programmed
torch current
level (default)
programmed
torch current
level (default)
the LED
current to the
programmed
torch current
level.(default)
1 = TX1
1 = VIN falling 1 = AET Mode 1 = Voltage at 1 = TX2
interrupt will
force the LED
current into
shutdown.
Enabled
LEDI/NTC
falling below
VTRIP will force current into
interrupt will
force the LED
below the
programmed
VIN Monitor
Threshold will
force the LED
current into
shutdown.
shutdown.
the LED
current into
shutdown.
www.national.com
34
Applications Information
OUTPUT CAPACITOR SELECTION
The LM3560 is designed to operate with at least a 10 µF ce-
ramic output capacitor. When the boost converter is running
the output capacitor supplies the load current during the boost
converters on-time. When the NMOS switch turns off the in-
ductor energy is discharged through the internal PMOS
switch, supplying power to the load and restoring charge to
the output capacitor. This causes a sag in the output voltage
during the NFET on-time and a rise in the output voltage dur-
ing the NFET off-time. The output capacitor is therefore cho-
sen to limit the output ripple to an acceptable level depending
on load current and input/output voltage differentials and also
to ensure the converter remains stable.
In ceramic capacitors the ESR is very low so a close approx-
imation is to assume that 80% of the output voltage ripple is
due to capacitor discharge and 20% from ESR. Table 19 lists
different manufacturers for various output capacitors and their
case sizes suitable for use with the LM3560.
INPUT CAPACITOR SELECTION
Choosing the correct size and type of input capacitor helps
minimize the input voltage ripple caused by the switching of
the LM3560’s boost converter, and reduces noise on the
boost converters input terminal that can feed through and
disrupt internal analog signals. In the Typical Application Cir-
cuit a 10 µF ceramic input capacitor works well. It is important
to place the input capacitor as close as possible to the
LM3560’s input (IN) terminals. This reduces the series resis-
tance and inductance that can inject noise into the device due
to the input switching currents. Table 19 lists various input
capacitors that are recommended for use with the LM3560.
For proper operation the output capacitor must be at least a
10 µF ceramic. Larger capacitors such as a 22 µF or multiple
capacitors in parallel can be used if lower output voltage ripple
is desired. To estimate the output voltage ripple considering
the ripple due to capacitor discharge (ΔVQ) and the ripple due
to the capacitors ESR (ΔVESR) use the following equations:
For continuous conduction mode, the output voltage ripple
due to the capacitor discharge is:
The output voltage ripple due to the output capacitors ESR is
found by:
TABLE 19. Recommended Input/Output Capacitors (X5R Dielectric)
Manufacturer
TDK Corporation
TDK Corporation
Murata
Part Number
C1608JB0J106M
Value
10 µF
10 µF
10 µF
Case Size
Voltage Rating
0603 (1.6mm×0.8mm×0.8mm)
0805 (2mm×1.25mm×1.25mm)
0805 (2mm×1.25mm×1.25mm)
6.3V
10V
10V
C2012JB1A106M
GRM21BR61A106KE19
INDUCTOR SELECTION
ation and circuit performance, ensure that the inductor
saturation and the peak current limit setting of the LM3560
are greater than IPEAK in the following calculation:
The LM3560 is designed to use a 1 µH or 2.2 µH inductor.
Table 20 lists various inductors and their manufacturers that
can work well with the LM3560. When the device is boosting
(VOUT > VIN) the inductor will typically be the largest area of
efficiency loss in the circuit. Therefore, choosing an inductor
with the lowest possible series resistance is important. Addi-
tionally, the saturation rating of the inductor should be greater
than the maximum operating peak current of the LM3560.
This prevents excess efficiency loss that can occur with in-
ductors that operate in saturation. For proper inductor oper-
where ƒSW = 2MHz, and efficiency can be found in the Typical
Performance Characteristics plots.
TABLE 20. Recommended Inductors
Manufacturer
TOKO
L
Part Number Dimensions
ISAT
2.3A
3.4A
2.45A
2.8A
RDC
(L×W×H)
2.2 µH
1 µH
1 µH
1 µH
FDSD0312-
H-2R02M
3 mm×3.2 mm×1.2
mm
105 mΩ
43 mΩ
73 mΩ
50 mΩ
TOKO
FDSD0312-
H-1R0M
3 mm×3.2 mm×1.2
mm
TDK
VLS252012T-1R0N 2 mm×2.5 mm×1.2
mm
TDK
VLS4012ET-1R0N 4 mm x 4 mm x 1.2
mm
35
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NTC THERMISTOR SELECTION
Programming bit [4] of Configuration Register 1 with a '1' se-
lects NTC mode and makes the LEDI/NTC pin a comparator
input for flash LED thermal sensing. Figure 21 shows the
LM3560 using the NTC thermistor circuit. The thermal sensor
resistor divider is composed of R3 and R(T), where R(T) is
the Negative Temperature Coefficient Thermistor, VBIAS is
the bias voltage for the resistive divider, and R3 is used to
linearize the NTC's response around the NTC comparators
trip point. CBYP is used to filter noise at the NTC input.
30113836
FIGURE 21. Typical Application Circuit with Thermistor
In designing the NTC circuit, we must choose values for
VBIAS, R(T) and R3. To begin with, NTC thermistors have a
non-linear relationship between temperature and resistance:
where R(T)TRIP is the thermistor's value at the temperature
trip point and VTRIP = 1V (typical). As an example, with VBIAS
= 2.5V and a thermistor whose nominal value at +25°C is 100
kΩ and a β = 4500K, the trip point is chosen to be +93°C. The
value of R(T) at 93°C is:
where β is given in the thermistor datasheet and R25C is the
thermistor's value at +25°C. R3 is chosen so that the temper-
ature to resistance relationship becomes more linear and can
be found by solving for R3 in the R(T) and R3 resistive divider:
Figure 22 shows the linearity of the thermistor resistive divider
of the previous example.
www.national.com
36
30113834
FIGURE 22. Thermistor Resistive Divider Response vs Temperature
37
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4. Avoid routing logic traces near the SW node so as to
avoid any capacitively coupled voltages from SW onto
any high-impedance logic lines such as TX1/TORCH/
GPIO1, TX2/INT/GPIO2, HWEN, LEDI/NTC (NTC
mode), SDA, and SCL. A good approach is to insert an
inner layer GND plane underneath the SW node and
between any nearby routed traces. This creates a shield
from the electric field generated at SW.
Layout Recommendations
The high switching frequency and large switching currents of
the LM3560 make the choice of layout important. The follow-
ing steps should be used as a reference to ensure the device
is stable and maintains proper LED current regulation across
its intended operating voltage and current range.
1. Place CIN on the top layer (same layer as the LM3560)
and as close to the device as possible. The input
5. Terminate the Flash LED cathodes directly to the GND
pin of the LM3560. If possible, route the LED returns with
a dedicated path so as to keep the high amplitude LED
currents out of the GND plane. For Flash LEDs that are
routed relatively far away from the LM3560, a good
approach is to sandwich the forward and return current
paths over the top of each other on two layers. This will
help in reducing the inductance of the LED current paths.
capacitor conducts the driver currents during the low side
MOSFET turn-on and turn-off and can see current spikes
over 1A in amplitude. Connecting the input capacitor
through short wide traces to both the IN and GND
terminals will reduce the inductive voltage spikes that
occur during switching and which can corrupt the VIN line.
2. Place COUT on the top layer (same layer as the LM3560)
and as close as possible to the OUT and GND terminal.
The returns for both CIN and COUT should come together
at one point, and as close to the GND pin as possible.
Connecting COUT through short wide traces will reduce
the series inductance on the OUT and GND terminals
that can corrupt the VOUT and GND line and cause
excessive noise in the device and surrounding circuitry.
6. The NTC Thermistor is intended to have its return path
connected to the LEDs cathode. This allows the
thermistor resistive divider voltage (VNTC) to trip the
comparators threshold as VNTC is falling. Additionally, the
thermistor-to-LED cathode junction should be connected
as close as possible in order to reduce the thermal
impedance between the LED and the thermistor. The
drawback is that the thermistor's return will see the
switching currents from the LM3560's boost converter.
Because of this, it is necessary to have a filter capacitor
at the NTC pin which terminates close to the GND of the
LM3560 (see CBYP in Figure 21).
3. Connect the inductor on the top layer close to the SW pin.
There should be a low-impedance connection from the
inductor to SW due to the large DC inductor current, and
at the same time the area occupied by the SW node
should be small so as to reduce the capacitive coupling
of the high dV/dt present at SW that can couple into
nearby traces.
www.national.com
38
Physical Dimensions inches (millimeters) unless otherwise noted
TLA1611A: 16-Bump micro SMD
X1 = 1.97 mm (±0.03 mm)
X2 = 1.97 mm (±0.03 mm)
X3 = 0.6 mm (±0.075 mm)
39
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