LM3671MFX-1.5 [TI]
LM3671, LM3671Q 2MHz, 600mA Step-Down DC-DC Converter;
| 型号： | LM3671MFX-1.5 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LM3671, LM3671Q 2MHz, 600mA Step-Down DC-DC Converter 开关 光电二极管 |
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LM3671
LM3671Q
www.ti.com
SNVS294Q –NOVEMBER 2004–REVISED NOVEMBER 2013
LM3671, LM3671Q 2MHz, 600mA Step-Down DC-DC Converter
Check for Samples: LM3671, LM3671Q
1
FEATURES
APPLICATIONS
2
•
•
•
•
•
16 µA Typical Quiescent Current
•
•
•
•
•
•
•
•
Mobile Phones
PDAs
600 mA Maximum Load Capability
2 MHz PWM Fixed Switching Frequency (typ.)
Automatic PFM/PWM Mode Switching
MP3 Players
W-LAN
Internal Synchronous Rectification for High
Efficiency
Portable Instruments
Digital Still Cameras
Portable Hard Disk Drives
Automotive
•
•
•
•
Internal Soft Start
0.01 µA Typical Shutdown Current
Operates from a Single Li-Ion Cell Battery
DESCRIPTION
Only Three Tiny Surface-Mount External
Components Required (One Inductor, Two
Ceramic Capacitors)
The LM3671 step-down DC-DC converter is
optimized for powering low voltage circuits from a
single Li-Ion cell battery and input voltage rails from
2.7V to 5.5V. It provides up to 600 mA load current,
over the entire input voltage range. There are several
different fixed voltage output options available as well
as an adjustable output voltage version range from
1.1V to 3.3V.
•
•
•
•
Current Overload and Thermal Shutdown
Protection
Available in Fixed Output Voltages and
Adjustable Version
LM3671Q is an Automotive Grade Product that
is AEC-Q100 Grade 1 Qualified
The device offers superior features and performance
for mobile phones and similar portable systems.
Automatic intelligent switching between PWM low-
noise and PFM low-current mode offers improved
system control. During PWM mode, the device
operates at a fixed-frequency of 2 MHz (typ.).
Hysteretic PFM mode extends the battery life by
reducing the quiescent current to 16 µA (typ.) during
light load and standby operation. Internal
synchronous rectification provides high efficiency
during PWM mode operation. In shutdown mode, the
device turns off and reduces battery consumption to
0.01 µA (typ.).
SOT-23, 5-Bump DSBGA and 6-Pin USON
Packages
TYPICAL APPLICATION CIRCUITS
V
IN
L1: 2.2 PH
2.7V to 5.5V
V
V
OUT
IN
SW
1
2
3
5
C
OUT
C
IN
LM3671
10 PF
GND
EN
4.7 PF
FB
4
Figure 1. Typical Application Circuit
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2013, Texas Instruments Incorporated
LM3671
LM3671Q
SNVS294Q –NOVEMBER 2004–REVISED NOVEMBER 2013
www.ti.com
DESCRIPTION (CONTINUED)
The LM3671 is available in SOT-23, tiny 5-bump DSBGA, and a 6-pin USON packages in leaded (PB) and lead-
free (NO PB) versions. A high-switching frequency of 2 MHz (typ.) allows use of tiny surface-mount components.
Only three external surface-mount components, an inductor and two ceramic capacitors, are required.
V
IN
L1: 2.2 PH
V
OUT
2.7V to 5.5V
V
IN
SW
1
5
C
OUT
C
LM3671-
ADJ
IN
R1
R2
C1
C2
10 PF
4.7 PF
GND
EN
2
FB
3
4
Figure 2. Typical Application Circuit for ADJ version
Connection Diagrams
SW
5
FB
4
VIN
1
GND
2
EN
3
Figure 3. Top View
SOT-23 Package
See Package Number DBV (2.92 mm x 2.84 mm x 1.2 mm)
GND
V
A1
A3
A1
V
IN
GND
IN
A3
C3
B2
SW
EN
B2
SW
EN
FB
C1
FB
C3
C1
Top View
Bottom View
Figure 4. 5-Bump DSBGA Package
See Package Number YZR0005 (1.05 mm x 1.38 mm x 0.6 mm)
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SNVS294Q –NOVEMBER 2004–REVISED NOVEMBER 2013
6
5
4
En
1
2
Fb
Pgnd
Sgnd
Sw
Vin
3
TOP VIEW
Figure 5. 6-Pin USON Package
See Package Number NKH0006B (2 mm x 2 mm x 0.6 mm)
PIN DESCRIPTIONS (SOT-23)
Pin #
Name
VIN
Description
1
2
3
Power supply input. Connect to the input filter capacitor (Figure 1).
Ground pin.
GND
EN
Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled
when >1.0V. Do not leave this pin floating.
4
5
FB
Feedback analog input. Connect directly to the output filter capacitor for fixed voltage
versions. For adjustable version external resistor dividers are required (Figure 2). The
internal resistor dividers are disabled for the adjustable version.
SW
Switching node connection to the internal PFET switch and NFET synchronous rectifier.
PIN DESCRIPTIONS (5-Bump DSBGA)
Pin #
A1
Name
VIN
Description
Power supply input. Connect to the input filter capacitor (Figure 1).
Ground pin.
A3
GND
EN
C1
Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled
when >1.0V. Do not leave this pin floating.
C3
B2
FB
Feedback analog input. Connect directly to the output filter capacitor for fixed voltage
versions. For adjustable version external resistor dividers are required (Figure 2). The
internal resistor dividers are disabled for the adjustable version.
SW
Switching node connection to the internal PFET switch and NFET synchronous rectifier.
PIN DESCRIPTIONS (6-Pin USON)
Pin #
Name
Description
1
EN
Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled
when >1.0V. Do not leave this pin floating.
2
3
4
5
6
Pgnd
VIN
Ground pin.
Power supply input. Connect to the input filter capacitor (Figure 1).
Switching node connection to the internal PFET switch and NFET synchronous rectifier.
Singnal ground (feedback ground).
SW
Sgnd
FB
Feedback analog input. Connect directly to the output filter capacitor for fixed voltage
versions. For adjustable version external resistor dividers are required (Figure 2). The
internal resistor dividers are disabled for the adjustable version.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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ORDERING INFORMATION(1)(2)
Orderable
Voltage Option (V)
SOT-23 Package
LM3671MF-1.2
LM3671MFX-1.2
LM3671MF-1.2/NOPB
LM3671MFX-1.2/NOPB
LM3671QMF-1.2
1.2
LM3671QMFX-1.2
LM3671QMF-1.2/NOPB
LM3671QMFX-1.2/NOPB
LM3671MF-1.25/NOPB
LM3671MFX-1.25/NOPB
LM3671MF-1.375/NOPB
LM3671MFX-1.375/NOPB
LM3671MF-1.5/NOPB
LM3671MFX-1.5/NOPB
LM3671MF-1.6/NOPB
LM3671MFX-1.6/NOPB
LM3671MF-1.8/NOPB
LM3671MFX-1.8/NOPB
LM3671MF-1.875/NOPB
LM3671MFX-1.875/NOPB
LM3671MF-2.5/NOPB
LM3671MFX-2.5/NOPB
LM3671MF-2.8/NOPB
LM3671MFX-2.8/NOPB
LM3671MF-3.3/NOPB
LM3671MFX-3.3/NOPB
LM3671MF-ADJ/NOPB
LM3671MFX-ADJ/NOPB
1.25
1.375
1.5
1.6
1.8
1.875
2.5
2.8
3.3
Adjustable
(1) For the most current package and ordering information, see the Package Option Addendum at the end
of this document, or see the TI web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
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SNVS294Q –NOVEMBER 2004–REVISED NOVEMBER 2013
ORDERING INFORMATION(1)(2) (continued)
Orderable
Voltage Option (V)
DSBGA Package
LM3671TL-1.2/NOPB
LM3671TLX-1.2/NOPB
LM3671TL-1.25/NOPB
LM3671TLX-1.25/NOPB
LM3671TL-1.5/NOPB
LM3671TLX-1.5/NOPB
LM3671TL-1.8/NOPB
LM3671TLX-1.8/NOPB
LM3671QTL-1.8/NOPB
LM3671QTLX-1.8/NOPB
LM3671TL-1.875/NOPB
LM3671TLX-1.875/NOPB
LM3671TL-2.5/NOPB
LM3671TLX-2.5/NOPB
LM3671TL-2.8/NOPB
LM3671TLX-2.8/NOPB
LM3671TL-3.3/NOPB
LM3671TLX-3.3/NOPB
LM3671TL-ADJ/NOPB
LM3671TLX-ADJ/NOPB
1.2
1.25
1.5
1.8
1.875
2.5
2.8
3.3
Adjustable
USON Package
LM3671LC-1.2/NOPB
LM3671LCX-1.2/NOPB
LM3671LC-1.3/NOPB
LM3671LCX-1.3/NOPB
LM3671LC-1.6/NOPB
LM3671LCX-1.6/NOPB
LM3671LC-1.8/NOPB
LM3671LCX-1.8/NOPB
1.2
1.3
1.6
1.8
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ABSOLUTE MAXIMUM RATINGS(1)(2)
VIN Pin: Voltage to GND
−0.2V to 6.0V
FB, SW, EN Pin:
(GND−0.2V) to
(VIN + 0.2V)
(3)
Continuous Power Dissipation
Internally Limited
+125°C
Junction Temperature (TJ-MAX
)
Storage Temperature Range
−65°C to +150°C
260°C
Maximum Lead Temperature
(Soldering, 10 sec.)
(4)
ESD Rating
Human Body Model
Machine Model
2 kV
200V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under
which operation of the device is specified. Operating Ratings do not imply specified performance limits. For specified performance limits
and associated test conditions, see the Electrical Characteristics tables.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for
availability and specifications.
(3) Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ= 150°C (typ.) and
disengages at TJ= 130°C (typ.).
(4) The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF
capacitor discharged directly into each pin. MIL-STD-883 3015.7
OPERATING RATINGS(1) (2)
(3)
Input Voltage Range
2.7V to 5.5V
0mA to 600 mA
−40°C to +125°C
−40°C to +85°C
Recommended Load Current
Junction Temperature (TJ) Range
Ambient Temperature (TA) Range
(4)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under
which operation of the device is specified. Operating Ratings do not imply specified performance limits. For specified performance limits
and associated test conditions, see the Electrical Characteristics tables.
(2) All voltages are with respect to the potential at the GND pin.
(3) The input voltage range recommended for ideal applications performance for the specified output voltages are given below:VIN = 2.7V to
4.5V for 1.1V ≤ VOUT < 1.5VVIN = 2.7V to 5.5V for 1.5V ≤ VOUT < 1.8VVIN = (VOUT+ VDROPOUT) to 5.5V for 1.8V ≤ VOUT ≤ 3.3Vwhere
VDROPOUT = ILOAD *( RDSON, PFET + RINDUCTOR
)
(4) In Applications where high power dissipation and/or poor package resistance is present, the maximum ambient temperature may have
to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX), the
maximum power dissipation of the device in the application (PD-MAX) and the junction to ambient thermal resistance of the package (θJA
)
in the application, as given by the following equation:TA-MAX= TJ-MAX− (θJAx PD-MAX). Refer to Dissipation rating table for PD-MAX values at
different ambient temperatures.
THERMAL PROPERTIES
Junction-to-Ambient Thermal Resistance (θJA) (SOT-23) for 4-layer board
(1)
130°C/W
85°C/W
(1)
(1)
Junction-to-Ambient Thermal Resistance (θJA) (DSBGA) for 4-layer board
Junction-to-Ambient Thermal Resistance (θJA) (USON) for 4-layer board
165°C/W
(1) Junction to ambient thermal resistance is highly application and board layout dependent. In applications where high power dissipation
exists, special care must be given to thermal dissipation issues in board design. Specified value of 130 °C/W for SOT-23 is based on a 4
layer, 4" x 3", 2/1/1/2 oz. Cu board as per JEDEC standards is used.
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ELECTRICAL CHARACTERISTICS(1)(2)(3)
Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the entire junction temperature range for
operation, −40°C to +125°C. Unless otherwise noted, specifications apply to the LM3671MF/TL/LC with VIN = EN = 3.6V
Symbol
VIN
Parameter
Condition
Min
2.7
−4
Typ
Max
5.5
+4
Units
(4)
Input Voltage
V
Feedback Voltage (Fixed) MF
Feedback Voltage (Fixed) TL
Feedback Voltage (Fixed) LC
(5)
PWM mode
−2.5
−4
+2.5
+4
%
%
Feedback Voltage (ADJ) MF
−4
+4
(6)
(5)
PWM mode
VFB
Feedback Voltage (ADJ) TL
Line Regulation
−2.5
+2.5
2.7V ≤ VIN ≤ 5.5V
IO = 10 mA
0.031
%/V
100 mA ≤ IO ≤ 600 mA
VIN= 3.6V
Load Regulation
0.0013
%/mA
VREF
Internal Reference Voltage
Shutdown Supply Current
0.5
V
ISHDN
EN = 0V
0.01
1
µA
No load, device is not switching (FB
forced higher than programmed
output voltage)
IQ
DC Bias Current into VIN
16
35
µA
RDSON (P)
RDSON (N)
ILIM
Pin-Pin Resistance for PFET
Pin-Pin Resistance for NFET
Switch Peak Current Limit
Logic High Input
VIN= VGS= 3.6V
VIN= VGS= 3.6V
380
250
500
400
mΩ
mΩ
mA
V
(7)
Open Loop
830
1.0
1020
1150
VIH
VIL
Logic Low Input
0.4
1
V
IEN
Enable (EN) Input Current
Internal Oscillator Frequency
0.01
2
µA
MHz
(5)
FOSC
PWM Mode
1.6
2.6
(1) All voltages are with respect to the potential at the GND pin.
(2) Min and Max limits are specified by design, test or statistical analysis. Typical numbers are not specified, but do represent the most
likely norm.
(3) The parameters in the electrical characteristic table are tested at VIN= 3.6V unless otherwise specified. For performance over the input
voltage range refer to datasheet curves.
(4) The input voltage range recommended for ideal applications performance for the specified output voltages are given below:VIN = 2.7V to
4.5V for 1.1V ≤ VOUT < 1.5VVIN = 2.7V to 5.5V for 1.5V ≤ VOUT < 1.8VVIN = (VOUT+ VDROPOUT) to 5.5V for 1.8V ≤ VOUT ≤ 3.3Vwhere
VDROPOUT = ILOAD *( RDSON, PFET + RINDUCTOR
)
(5) Test condition: for VOUT less than 2.5V, VIN = 3.6V; for VOUT greater than or equal to 2.5V, VIN = VOUT+ 1V.
(6) ADJ version is configured to 1.5V output. For ADJ output version: VIN = 2.7V to 4.5V for 0.90V ≤ VOUT < 1.1VVIN = 2.7V to 5.5V for 1.1V
≤ VOUT < 3.3V
(7) Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and temperature. Electrical Characteristic
table reflects open loop data (FB=0V and current drawn from SW pin ramped up until cycle by cycle current limit is activated). Closed
loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops
by 10%.
DISSIPATION RATING TABLE
θJA
TA≤ 25°C
TA= 60°C
TA= 85°C
Power Rating
Power Rating
Power Rating
130°C/W (4 layer board) SOT-23
770 mW
500 mW
765 mW
310 mW
470 mW
85°C/W (4 layer board) 5-bump
DSBGA
1179 mW
165°C/W (4 layer board) 6-pin
USON
606 mW
394 mW
242 mW
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BLOCK DIAGRAM
V
EN
SW
IN
Current Limit
Comparator
+
Undervoltage
Lockout
Ramp
Generator
Soft
Start
-
Ref1
PFM Current
Comparator
Thermal
Shutdown
+
Bandgap
2 MHz
Oscillator
-
Ref2
PWM Comparator
Error
Amp
+
-
Control Logic
Driver
pfm_low
pfm_hi
V
+
-
REF
0.5V
Vcomp
1.0V
+
-
+
-
Zero Crossing
Comparator
Frequency
Compensation
Adj Ver
Fixed Ver
FB
GND
Figure 6. Simplified Functional Diagram
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SNVS294Q –NOVEMBER 2004–REVISED NOVEMBER 2013
TYPICAL PERFORMANCE CHARACTERISTICS
LM3671MF/TL/LC, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.5V, TA= 25°C, unless otherwise noted.
Quiescent Supply Current vs. Supply Voltage
20
Shutdown Current vs. Temp
EN = GND
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
EN = V
IN
I
= 0 mA
OUT
T
= 85°C
= 25°C
A
18
16
14
12
10
T
A
T
A
= -30°C
V
= 5.5V
IN
V
= 3.6V
IN
V
= 2.7V
IN
-30
-10
10
30
50
70
90
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
Figure 7.
Figure 8.
Feedback Bias Current vs. Temp
Switching Frequency vs. Temperature
Figure 9.
Figure 10.
RDS(ON) vs. Temperature
Open/Closed Loop Current Limit vs. Temperature
600
550
500
450
400
350
300
250
200
150
100
V
IN
= 2.7V
V
= 4.5V
IN
V
IN
= 3.6V
= 2.7V
PFET
V
IN
V
IN
= 4.5V
NFET
V
= 3.6V
10
IN
-30 -10
30
50
70
90 110
TEMPERATURE (oC)
Figure 11.
Figure 12.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
LM3671MF/TL/LC, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.5V, TA= 25°C, unless otherwise noted.
Output Voltage vs. Supply Voltage
Output Voltage vs. Supply Voltage
(VOUT = 1.5V)
(VOUT = 2.5V)
1.5300
1.5200
1.5100
1.5000
1.4900
1.4800
V
= 1.5 V
OUT
I
= 10 mA
OUT
I
= 300 mA
OUT
I
= 500 mA
OUT
I
= 600 mA
OUT
3.5
2.5
3
4
4.5
5
5.5
SUPPLY VOLTAGE(V)
Figure 13.
Figure 14.
Output Voltage vs. Temperature
(VOUT = 1.5V)
Output Voltage vs. Temperature
(VOUT = 2.5V)
1.5300
1.5250
1.5200
1.5150
1.5100
1.5050
1.5000
1.4950
1.4900
1.4850
1.4800
PFM Mode
I
= 10 mA
OUT
I
= 300 mA
OUT
PWM Mode
V
V
= 3.6V
IN
= 1.5V
I
= 600 mA
OUT
OUT
-30
-10
10
30
50
70
90
TEMPERATURE (oC)
Figure 15.
Figure 16.
Output Voltage vs. Output Current
(VOUT = 1.5V)
Output Voltage vs. Output Current
(VOUT = 2.5V)
1.54
1.52
1.5
V
V
= 3.6V
IN
= 1.5V
OUT
PFM Mode
PWM Mode
1.48
0
100
200
300
400
500
600
OUTPUT CURRENT (mA)
Figure 17.
Figure 18.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
LM3671MF/TL/LC, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.5V, TA= 25°C, unless otherwise noted.
Efficiency vs. Output Current
(VOUT = 1.5V, L= 2.2 µH)
Efficiency vs. Output Current
(VOUT = 1.8V, L= 2.2 µH)
100
90
80
70
60
50
40
30
20
100
90
80
70
60
50
40
30
20
V
OUT
= 1.8V
V
OUT
= 1.5V
V
= 2.7V
V
= 3.0V
IN
IN
V
IN
= 3.0V
V
IN
= 2.7V
V
= 4.5V
IN
V
IN
= 4.5V
V
= 3.6V
IN
V
= 3.6V
IN
0.01
0.10
1.00
10.00 100.00 1000.00
0.01
0.10
1.00
10.00 100.00 1000.00
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
Figure 19.
Figure 20.
Efficiency vs. Output Current
(VOUT = 2.5V, L= 2.2 µH)
Efficiency vs. Output Current
(VOUT = 3.3V, L= 2.2 µH)
Figure 21.
Figure 22.
Line Transient Response
VOUT = 1.5V (PWM Mode)
Line Transient Response
VOUT = 2.5V (PWM Mode)
20 mV/DIV
V
OUT
AC Coupled
3.6V
3.0V
V
IN
V
OUT
= 1.5V
I
= 400 mA
OUT
40 Ps/DIV
Figure 23.
Figure 24.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
LM3671MF/TL/LC, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.5V, TA= 25°C, unless otherwise noted.
Load Transient Response
VOUT = 1.5V (PWM Mode)
Load Transient Response
VOUT = 2.5V (PWM Mode)
Figure 25.
Figure 26.
Load Transient Response (VOUT = 1.5V)
(PFM Mode 0.5 mA to 50 mA)
Load Transient Response (VOUT = 1.5V)
(PFM Mode 50 mA to 0.5 mA)
Figure 27.
Figure 28.
Load Transient Response (VOUT = 2.5V)
(PFM Mode 0.5 mA to 50 mA)
Load Transient Response (VOUT = 2.5V)
(PFM Mode 50 mA to 0.5 mA)
Figure 29.
Figure 30.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
LM3671MF/TL/LC, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.5V, TA= 25°C, unless otherwise noted.
Mode Change by Load Transients
Mode Change by Load Transients
VOUT = 1.5V (PFM to PWM)
VOUT = 1.5V (PWM to PFM)
Figure 31.
Figure 32.
Mode Change by Load Transients
VOUT = 2.5V (PFM to PWM)
Mode Change by Load Transients
VOUT = 2.5V (PWM to PFM)
Figure 33.
Figure 34.
Start Up into PWM Mode
VOUT = 1.5V (Output Current= 300 mA)
Start Up into PWM Mode
VOUT = 2.5V (Output Current= 300 mA)
2V/DIV
V
SW
I
= 300 mA
OUT
500 mA/DIV
1V/DIV
I
L
V
= 3.6V
IN
V
OUT
EN
V
OUT
= 1.5V
2V/DIV
TIME (100 Ps/DIV)
Figure 35.
Figure 36.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
LM3671MF/TL/LC, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.5V, TA= 25°C, unless otherwise noted.
Start Up into PFM Mode
VOUT = 1.5V (Output Current= 1mA)
Start Up into PFM Mode
VOUT = 2.5V (Output Current= 1mA)
2V/DIV
V
SW
500 mV/DIV
V
OUT
EN
V
V
= 3.6V
IN
OUT
= 1 mA
= 1.5V
I
OUT
2V/DIV
TIME (100 Ps/DIV)
Figure 37.
Figure 38.
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OPERATION DESCRIPTION
Device Information
The LM3671, a high-efficiency step-down DC-DC switching buck converter, delivers a constant voltage from a
single Li-Ion battery and input voltage rails from 2.7V to 5.5V to portable devices such as cell phones and PDAs.
Using a voltage mode architecture with synchronous rectification, the LM3671 has the ability to deliver up to 600
mA depending on the input voltage, output voltage, ambient temperature and the inductor chosen.
There are three modes of operation depending on the current required - PWM (Pulse Width Modulation), PFM
(Pulse Frequency Modulation), and shutdown. The device operates in PWM mode at load current of
approximately 80 mA or higher. Lighter load current cause the device to automatically switch into PFM for
reduced current consumption (IQ = 16 µA typ) and a longer battery life. Shutdown mode turns off the device,
offering the lowest current consumption (ISHUTDOWN = 0.01 µA typ).
Additional features include soft-start, under-voltage protection, current overload protection, and thermal shutdown
protection. As shown in Figure 1, only three external power components are required for implementation.
The part uses an internal reference voltage of 0.5V. It is recommended to keep the part in shutdown until the
input voltage is 2.7V or higher.
Circuit Operation
During the first portion of each switching cycle, the control block in the LM3671 turns on the internal PFET
switch. This allows current to flow from the input through the inductor to the output filter capacitor and load. The
inductor limits the current to a ramp with a slope of (VIN–VOUT)/L, by storing energy in a magnetic field.
During the second portion of each cycle, the controller turns the PFET switch off, blocking current flow from the
input, and then turns the NFET synchronous rectifier on. The inductor draws current from ground through the
NFET to the output filter capacitor and load, which ramps the inductor current down with a slope of - VOUT/L.
The output filter stores charge when the inductor current is high, and releases it when inductor current is low,
smoothing the voltage across the load.
The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the
load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and
synchronous rectifier at the SW pin to a low-pass filter formed by the inductor and output filter capacitor. The
output voltage is equal to the average voltage at the SW pin.
PWM Operation
During PWM operation the converter operates as a voltage-mode controller with input voltage feed forward. This
allows the converter to achieve good load and line regulation. The DC gain of the power stage is proportional to
the input voltage. To eliminate this dependence, feed forward inversely proportional to the input voltage is
introduced.
While in PWM mode, the output voltage is regulated by switching at a constant frequency and then modulating
the energy per cycle to control power to the load. At the beginning of each clock cycle the PFET switch is turned
on and the inductor current ramps up until the comparator trips and the control logic turns off the switch. The
current limit comparator can also turn off the switch in case the current limit of the PFET is exceeded. Then the
NFET switch is turned on and the inductor current ramps down. The next cycle is initiated by the clock turning off
the NFET and turning on the PFET.
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V
SW
2V/DIV
I
L
200 mA/DIV
V
V
= 3.6V
IN
I
= 400 mA
OUT
= 1.5V
OUT
V
OUT
10 mV/DIV
AC Coupled
TIME (200 ns/DIV)
Figure 39. Typical PWM Operation
Internal Synchronous Rectification
While in PWM mode, the LM3671 uses an internal NFET as a synchronous rectifier to reduce rectifier forward
voltage drop and associated power loss. Synchronous rectification provides a significant improvement in
efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier
diode.
Current Limiting
A current limit feature allows the LM3671 to protect itself and external components during overload conditions.
PWM mode implements current limiting using an internal comparator that trips at 1020 mA (typ.). If the output is
shorted to ground the device enters a timed current limit mode where the NFET is turned on for a longer duration
until the inductor current falls below a low threshold. This allows the inductor current more time to decay, thereby
preventing runaway.
PFM Operation
At very light load, the converter enters PFM mode and operates with reduced switching frequency and supply
current to maintain high efficiency.
The part automatically transitions into PFM mode when either of two conditions occurs for a duration of 32 or
more clock cycles:
A. The NFET current reaches zero.
B. The peak PMOS switch current drops below the IMODE level, (Typically IMODE < 30 mA + VIN/42Ω ).
2V/DIV
V
SW
I
L
200 mA/DIV
VIN = 3.6V
I
= 20 mA
OUT
VOUT = 1.5V
V
OUT
20 mV/DIV
AC Coupled
TIME (4 Ps/DIV)
Figure 40. Typical PFM Operation
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During PFM operation, the converter positions the output voltage slightly higher than the nominal output voltage
during PWM operation, allowing additional headroom for voltage drop during a load transient from light to heavy
load. The PFM comparators sense the output voltage via the feedback pin and control the switching of the output
FETs such that the output voltage ramps between ~0.6% and ~1.7% above the nominal PWM output voltage. If
the output voltage is below the ‘high’ PFM comparator threshold, the PMOS power switch is turned on. It remains
on until the output voltage reaches the ‘high’ PFM threshold or the peak current exceeds the IPFM level set for
PFM mode. The typical peak current in PFM mode is: IPFM = 112 mA + VIN/27Ω .
Once the PMOS power switch is turned off, the NMOS power switch is turned on until the inductor current ramps
to zero. When the NMOS zero-current condition is detected, the NMOS power switch is turned off. If the output
voltage is below the ‘high’ PFM comparator threshold (see Figure 41), the PMOS switch is again turned on and
the cycle is repeated until the output reaches the desired level. Once the output reaches the ‘high’ PFM
threshold, the NMOS switch is turned on briefly to ramp the inductor current to zero and then both output
switches are turned off and the part enters an extremely low power mode. Quiescent supply current during this
‘sleep’ mode is 16 µA (typ.), which allows the part to achieve high efficiency under extremely light load
conditions.
If the load current should increase during PFM mode (see Figure 41) causing the output voltage to fall below the
‘low2’ PFM threshold, the part will automatically transition into fixed-frequency PWM mode. When VIN =2.7V the
part transitions from PWM to PFM mode at ~35 mA output current and from PFM to PWM mode at ~85 mA ,
when VIN=3.6V, PWM to PFM transition happens at ~50 mA and PFM to PWM transition happens at ~100 mA,
when VIN =4.5V, PWM to PFM transition happens at ~65 mA and PFM to PWM transition happens at ~115 mA.
High PFM Threshold
PFM Mode at Light Load
~1.017*Vout
Load current
increases
Low1 PFM Threshold
~1.006*Vout
Current load
increases,
draws Vout
towards
Low2 PFM
Threshold
High PFM
Nfet on
drains
inductor
current
until
I inductor = 0
Low PFM
Threshold,
turn on
Pfet on
until
Voltage
Threshold
reached,
go into
Ipfm limit
reached
PFET
Low2 PFM Threshold
Vout
sleep mode
PWM Mode at
Moderate to Heavy
Loads
Low2 PFM Threshold,
switch back to PWMmode
Figure 41. Operation in PFM Mode and Transfer to PWM Mode
Shutdown Mode
Setting the EN input pin low (<0.4V) places the LM3671 in shutdown mode. During shutdown the PFET switch,
NFET switch, reference, control and bias circuitry of the LM3671 are turned off. Setting EN high (>1.0V) enables
normal operation. It is recommended to set EN pin low to turn off the LM3671 during system power up and
undervoltage conditions when the supply is less than 2.7V. Do not leave the EN pin floating.
Soft Start
The LM3671 has a soft-start circuit that limits in-rush current during startup. During startup the switch current limit
is increased in steps. Soft start is activated only if EN goes from logic low to logic high after Vin reaches 2.7V.
Soft start is implemented by increasing switch current limit in steps of 70 mA, 140 mA, 280 mA and 1020 mA
(typical switch current limit). The startup time thereby depends on the output capacitor and load current
demanded at startup. Typical startup times with a 10 µF output capacitor and 300 mA load is 400 µs and with
1mA load is 275 µs.
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LDO - Low Dropout Operation
The LM3671-ADJ can operate at 100% duty cycle (no switching; PMOS switch completely on) for low dropout
support of the output voltage. In this way the output voltage will be controlled down to the lowest possible input
voltage. When the device operates near 100% duty cycle, output voltage ripple is approximately 25 mV.
The minimum input voltage needed to support the output voltage is
VIN, MIN = ILOAD * (RDSON, PFET + RINDUCTOR) + VOUT
where
•
•
•
ILOAD: Load current
RDSON, PFET: Drain to source resistance of PFET switch in the triode region
RINDUCTOR: Inductor resistance
(1)
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APPLICATION INFORMATION
Output Voltage Selection for LM3671-ADJ
The output voltage of the adjustable parts can be programmed through the resistor network connected from VOUT
to FB, then to GND. VOUT is adjusted to make the voltage at FB equal to 0.5V. The resistor from FB to GND (R2)
should be 200 kΩ to keep the current drawn through this network well below the 16 µA quiescent current level
(PFM mode) but large enough that it is not susceptible to noise. If R2 is 200 kΩ, and VFB is 0.5V, the current
through the resistor feedback network will be 2.5 µA. The output voltage of the adjustable parts ranges from 1.1V
to 3.3V.
The formula for output voltage selection is:
R1
R2
·
¹
§
VOUT = VFB ꢀ 1 +
©
where
•
•
•
•
VOUT: output voltage (volts)
VFB : feedback voltage = 0.5V
R1: feedback resistor from VOUT to FB
R2: feedback resistor from FB to GND
(2)
For any output voltage greater than or equal to 1.1V, a zero must be added around 45 kHz for stability. The
formula for calculation of C1 is:
1
C1 =
(2 * S * R1 * 45 kHz)
(3)
For output voltages higher than 2.5V, a pole must be placed at 45 kHz as well. If the pole and zero are at the
same frequency the formula for calculation of C2 is:
1
C2 =
(2 * S * R2 * 45 kHz)
(4)
The formula for location of zero and pole frequency created by adding C1 and C2 is given below. By adding C1,
a zero as well as a higher frequency pole is introduced.
1
Fz =
(2 * S * R1 * C1)
(5)
(6)
1
Fp =
2 * S * (R1 R2) * (C1+C2)
See the "LM3671-ADJ configurations for various VOUT" table.
Table 1. LM3671-ADJ Configurations For Various VOUT (Circuit of Figure 2)
(Refer to Note 11 for VIN requirements)
VOUT(V)
0.90
1.1
R1(kΩ)
160
240
280
320
357
442
432
464
523
402
464
562
R2 (kΩ)
200
200
200
200
178
200
178
178
191
100
100
100
C1 (pF)
22
C2 (pF)
none
none
none
none
none
none
none
none
none
none
33
L (µH)
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
CIN (µF)
4.7
COUT(µF)
10
15
4.7
10
1.2
12
4.7
10
1.3
12
4.7
10
1.5
10
4.7
10
1.6
8.2
8.2
8.2
6.8
8.2
8.2
6.8
4.7
10
1.7
4.7
10
1.8
4.7
10
1.875
2.5
4.7
10
4.7
10
2.8
4.7
10
3.3
33
4.7
10
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Inductor Selection
There are two main considerations when choosing an inductor; the inductor should not saturate, and the inductor
current ripple should be small enough to achieve the desired output voltage ripple. Different saturation current
rating specifications are followed by different manufacturers so attention must be given to details. Saturation
current ratings are typically specified at 25°C. However, ratings at the maximum ambient temperature of
application should be requested from the manufacturer. The minimum value of inductance to specify good
performance is 1.76 µH at ILIM (typ.) dc current over the ambient temperature range. Shielded inductors
radiate less noise and should be preferred.
There are two methods to choose the inductor saturation current rating.
Method 1:
The saturation current should be greater than the sum of the maximum load current and the worst case average
to peak inductor current. This can be written as
!
ISAT IOUTMAX + IRIPPLE
VIN - VOUT
VOUT
VIN
1
§
¨
©
·ꢀ §
¸ ¨
¹ ©
·ꢀ § ·
where IRIPPLE
=
¸ ¨ ¸
2 ꢀ L
¹ © f ¹
where
•
•
•
•
•
•
IRIPPLE: average to peak inductor current
IOUTMAX: maximum load current (600 mA)
VIN: maximum input voltage in application
L : min inductor value including worst case tolerances (30% drop can be considered for method 1)
f : minimum switching frequency (1.6 Mhz)
VOUT: output voltage
(7)
Method 2:
A more conservative and recommended approach is to choose an inductor that has a saturation current rating
greater than the maximum current limit of 1150mA.
A 2.2 µH inductor with a saturation current rating of at least 1150 mA is recommended for most applications. The
inductor’s resistance should be less than 0.3Ω for good efficiency. Table 2 lists suggested inductors and
suppliers. For low-cost applications, an unshielded bobbin inductor could be considered. For noise critical
applications, a toroidal or shielded-bobbin inductor should be used. A good practice is to lay out the board with
overlapping footprints of both types for design flexibility. This allows substitution of a low-noise shielded inductor,
in the event that noise from low-cost bobbin models is unacceptable.
Input Capacitor Selection
A ceramic input capacitor of 4.7 µF, 6.3V is sufficient for most applications. Place the input capacitor as close as
possible to the VIN pin of the device. A larger value may be used for improved input voltage filtering. Use X7R or
X5R types; do not use Y5V. DC bias characteristics of ceramic capacitors must be considered when selecting
case sizes like 0805 and 0603. The minimum input capacitance to specify good performance is 2.2 µF at
3V dc bias; 1.5 µF at 5V dc bias including tolerances and over ambient temperature range. The input filter
capacitor supplies current to the PFET switch of the LM3671 in the first half of each cycle and reduces voltage
ripple imposed on the input power source. A ceramic capacitor’s low ESR provides the best noise filtering of the
input voltage spikes due to this rapidly changing current. Select a capacitor with sufficient ripple current rating.
The input current ripple can be calculated as:
2
VOUT
VIN
VOUT
VIN
r
§
¨
©
·
¸
¹
1 -
+
ꢀ
IRMS = IOUTMAX
ꢀ
12
(VIN - VOUT
r =
) V
ꢀ
OUT
Lꢀ f ꢀ IOUTMAX ꢀVIN
ꢀ
The worst case is when VIN = 2 VOUT
(8)
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Table 2. Suggested Inductors and Their Suppliers
Model
Vendor
Coilcraft
Coilcraft
Panasonic
Sumida
Dimensions LxWxH(mm)
3.3 x 3.3 x 1.4
D.C.R (max)
200 mΩ
150 mΩ
53 mΩ
DO3314-222MX
LPO3310-222MX
ELL5GM2R2N
3.3 x 3.3 x 1.0
5.2 x 5.2 x 1.5
CDRH2D14NP-2R2NC
3.2 x 3.2 x 1.55
94 mΩ
Output Capacitor Selection
A ceramic output capacitor of 10 µF, 6.3V is sufficient for most applications. Use X7R or X5R types; do not use
Y5V. DC bias characteristics of ceramic capacitors must be considered when selecting case sizes like 0805 and
0603. DC bias characteristics vary from manufacturer to manufacturer and dc bias curves should be requested
from them as part of the capacitor selection process.
The minimum output capacitance to specify good performance is 5.75 µF at 1.8V dc bias including
tolerances and over ambient temperature range. The output filter capacitor smoothes out current flow from
the inductor to the load, helps maintain a steady output voltage during transient load changes and reduces
output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR to
perform these functions.
The output voltage ripple is caused by the charging and discharging of the output capacitor and by the RESR and
can be calculated as:
Voltage peak-to-peak ripple due to capacitance can be expressed as follow:
IRIPPLE
=
VPP-C
4*f*C
(9)
Voltage peak-to-peak ripple due to ESR can be expressed as follow:
VPP-ESR = (2 * IRIPPLE) * RESR
Because these two components are out of phase the rms (root mean squared) value can be used to get an
approximate value of peak-to-peak ripple.
The peak-to-peak ripple voltage, rms value can be expressed as follow:
2
VPP-RMS
=
VPP-C2 + VPP-ESR
(10)
Note that the output voltage ripple is dependent on the inductor current ripple and the equivalent series
resistance of the output capacitor (RESR).
The RESR is frequency dependent (as well as temperature dependent); make sure the value used for calculations
is at the switching frequency of the part.
Table 3. Suggested Capacitors and Their Suppliers
Case Size
Inch (mm)
Model
4.7 µF for CIN
Type
Vendor
Voltage Rating
C2012X5R0J475K
JMK212BJ475K
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
TDK
Taiyo-Yuden
Murata
6.3V
6.3V
6.3V
6.3V
0805 (2012)
0805 (2012)
0805 (2012)
0603 (1608)
GRM21BR60J475K
C1608X5R0J475K
TDK
10 µF for COUT
GRM21BR60J106K
JMK212BJ106K
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
Murata
Taiyo-Yuden
TDK
6.3V
6.3V
6.3V
6.3V
0805 (2012)
0805 (2012)
0805 (2012)
0603 (1608)
C2012X5R0J106K
C1608X5R0J106K
TDK
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DSBGA Package Assembly and Use
Use of the DSBGA package requires specialized board layout, precision mounting and careful re-flow
techniques, as detailed in Texas Instruments Application Note AN-1112 (Literature Number SNVA009). Refer to
the section "Surface Mount Technology (DSBGA) Assembly Considerations". For best results in assembly,
alignment ordinals on the PC board should be used to facilitate placement of the device. The pad style used with
DSBGA package must be the NSMD (non-solder mask defined) type. This means that the solder-mask opening
is larger than the pad size. This prevents a lip that otherwise forms if the solder-mask and pad overlap, from
holding the device off the surface of the board and interfering with mounting. See Application Note AN-1112
(Literature Number SNVA009) for specific instructions how to do this. The 5-bump package used for LM3671 has
300 micron solder balls and requires 10.82 mils pads for mounting on the circuit board. The trace to each pad
should enter the pad with a 90° entry angle to prevent debris from being caught in deep corners. Initially, the
trace to each pad should be 7 mil wide, for a section approximately 7 mil long or longer, as a thermal relief. Then
each trace should neck up or down to its optimal width. The important criteria is symmetry. This ensures the
solder bumps on the LM3671 re-flow evenly and that the device solders level to the board. In particular, special
attention must be paid to the pads for bumps A1 and A3, because VIN and GND are typically connected to large
copper planes, inadequate thermal relief can result in late or inadequate re-flow of these bumps.
The DSBGA package is optimized for the smallest possible size in applications with red or infrared opaque
cases. Because the DSBGA package lacks the plastic encapsulation characteristic of larger devices, it is
vulnerable to light. Backside metallization and/or epoxy coating, along with front-side shading by the printed
circuit board, reduce this sensitivity. However, the package has exposed die edges. In particular, DSBGA
devices are sensitive to light, in the red and infrared range, shining on the package’s exposed die edges.
BOARD LAYOUT CONSIDERATIONS
PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance
of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss
in the traces. These can send erroneous signals to the DC-DC converter IC, resulting in poor regulation or
instability.
Good layout for the LM3671 can be implemented by following a few simple design rules below. Refer to
Figure 42 for top layer board layout.
1. Place the LM3671, inductor and filter capacitors close together and make the traces short. The traces
between these components carry relatively high switching currents and act as antennas. Following this rule
reduces radiated noise. Special care must be given to place the input filter capacitor very close to the VIN
and GND pin.
2. Arrange the components so that the switching current loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor through the LM3671 and inductor to the output filter
capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled
up from ground through the LM3671 by the inductor to the output filter capacitor and then back through
ground forming a second current loop. Routing these loops so the current curls in the same direction
prevents magnetic field reversal between the two half-cycles and reduces radiated noise.
3. Connect the ground pins of the LM3671 and filter capacitors together using generous component-side
copper fill as a pseudo-ground plane. Then, connect this to the ground-plane (if one is used) with several
vias. This reduces ground-plane noise by preventing the switching currents from circulating through the
ground plane. It also reduces ground bounce at the LM3671 by giving it a low-impedance ground connection.
4. Use wide traces between the power components and for power connections to the DC-DC converter circuit.
This reduces voltage errors caused by resistive losses across the traces.
5. Route noise sensitive traces, such as the voltage feedback path, away from noisy traces between the power
components. The voltage feedback trace must remain close to the LM3671 circuit and should be direct but
should be routed opposite to noisy components. This reduces EMI radiated onto the DC-DC converter’s own
voltage feedback trace. A good approach is to route the feedback trace on another layer and to have a
ground plane between the top layer and layer on which the feedback trace is routed. In the same manner for
the adjustable part it is desired to have the feedback dividers on the bottom layer.
6. Place noise sensitive circuitry, such as radio IF blocks, away from the DC-DC converter, CMOS digital blocks
and other noisy circuitry. Interference with noise-sensitive circuitry in the system can be reduced through
distance.
22
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: LM3671 LM3671Q
LM3671
LM3671Q
www.ti.com
SNVS294Q –NOVEMBER 2004–REVISED NOVEMBER 2013
In mobile phones, for example, a common practice is to place the DC-DC converter on one corner of the board,
arrange the CMOS digital circuitry around it (since this also generates noise), and then place sensitive
preamplifiers and IF stages on the diagonally opposing corner. Often, the sensitive circuitry is shielded with a
metal pan and power to it is post-regulated to reduce conducted noise, using low-dropout linear regulators.
Figure 42. Top Layer Board Layout For SOT-23
Copyright © 2004–2013, Texas Instruments Incorporated
Submit Documentation Feedback
23
Product Folder Links: LM3671 LM3671Q
LM3671
LM3671Q
SNVS294Q –NOVEMBER 2004–REVISED NOVEMBER 2013
www.ti.com
REVISION HISTORY
Changes from Revision P (May 2013) to Revision Q
Page
•
Added LM3671QTL/X-1.8/NOPB to Ordering Table ............................................................................................................. 4
Changes from Revision O (April 2013) to Revision P
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 23
24
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: LM3671 LM3671Q
PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2014
PACKAGING INFORMATION
Orderable Device
LM3671LC-1.2/NOPB
LM3671LC-1.3/NOPB
LM3671LC-1.6/NOPB
LM3671LC-1.8/NOPB
LM3671LCX-1.2/NOPB
LM3671LCX-1.3/NOPB
LM3671LCX-1.6/NOPB
LM3671LCX-1.8/NOPB
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
ACTIVE
USON
USON
USON
USON
USON
USON
USON
USON
NKH
6
6
6
6
6
6
6
6
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
S39
S40
S41
S42
S39
S40
S41
S42
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
NKH
NKH
NKH
NKH
NKH
NKH
NKH
1000
1000
1000
4500
4500
4500
4500
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
LM3671MF-1.2
NRND
SOT-23
SOT-23
DBV
DBV
5
5
1000
1000
TBD
Call TI
CU SN
Call TI
-30 to 85
-30 to 85
SBPB
SBPB
LM3671MF-1.2/NOPB
ACTIVE
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LM3671MF-1.25/NOPB
LM3671MF-1.375/NOPB
LM3671MF-1.5/NOPB
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
5
5
5
1000
1000
1000
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-30 to 85
-30 to 85
-30 to 85
SDRB
SEDB
SBRB
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
LM3671MF-1.6
NRND
SOT-23
SOT-23
DBV
DBV
5
5
1000
1000
TBD
Call TI
CU SN
Call TI
-30 to 85
-30 to 85
SDUB
SDUB
LM3671MF-1.6/NOPB
ACTIVE
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LM3671MF-1.8/NOPB
LM3671MF-1.875/NOPB
LM3671MF-2.5/NOPB
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
5
5
5
1000
1000
1000
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-30 to 85
-30 to 85
-30 to 85
SBSB
SDVB
SJRB
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2014
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
1000
1000
(1)
(2)
(6)
(3)
(4/5)
LM3671MF-2.8
NRND
ACTIVE
SOT-23
SOT-23
DBV
5
5
TBD
Call TI
CU SN
Call TI
-30 to 85
-30 to 85
SJSB
SJSB
LM3671MF-2.8/NOPB
DBV
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LM3671MF-3.3/NOPB
LM3671MF-ADJ/NOPB
LM3671MFX-1.2/NOPB
LM3671MFX-1.25/NOPB
LM3671MFX-1.375/NOPB
LM3671MFX-1.5/NOPB
LM3671MFX-1.6/NOPB
LM3671MFX-1.8/NOPB
LM3671MFX-1.875/NOPB
LM3671MFX-2.5/NOPB
LM3671MFX-2.8/NOPB
LM3671MFX-3.3/NOPB
LM3671MFX-ADJ/NOPB
LM3671QMF-1.2/NOPB
LM3671QMFX-1.2/NOPB
LM3671QTL-1.8/NOPB
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DSBGA
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
YZR
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
1000
1000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
1000
3000
250
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-40 to 125
-40 to 125
-40 to 125
SJEB
SBTB
SBPB
SDRB
SEDB
SBRB
SDUB
SBSB
SDVB
SJRB
SJSB
SJEB
SBTB
SH4B
SH4B
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2014
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
-30 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
LM3671QTLX-1.8/NOPB
LM3671TL-1.2/NOPB
LM3671TL-1.5/NOPB
LM3671TL-1.8/NOPB
LM3671TL-1.875/NOPB
LM3671TL-2.5/NOPB
LM3671TL-2.8/NOPB
LM3671TL-3.3/NOPB
LM3671TL-ADJ/NOPB
LM3671TLX-1.2/NOPB
LM3671TLX-1.5/NOPB
LM3671TLX-1.8/NOPB
LM3671TLX-1.875/NOPB
LM3671TLX-2.5/NOPB
LM3671TLX-2.8/NOPB
LM3671TLX-3.3/NOPB
LM3671TLX-ADJ/NOPB
ACTIVE
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
YZR
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
250
250
Green (RoHS
& no Sb/Br)
C
D
B
S
L
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
K
J
250
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
E
C
D
B
S
L
3000
3000
3000
3000
3000
3000
3000
3000
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
K
J
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
E
(1) The marketing status values are defined as follows:
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2014
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM3671, LM3671-Q1 :
Catalog: LM3671
•
Automotive: LM3671-Q1
•
Addendum-Page 4
PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2014
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
•
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 5
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Dec-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM3671LC-1.2/NOPB
LM3671LC-1.3/NOPB
LM3671LC-1.6/NOPB
LM3671LC-1.8/NOPB
LM3671LCX-1.2/NOPB
LM3671LCX-1.3/NOPB
LM3671LCX-1.6/NOPB
LM3671LCX-1.8/NOPB
LM3671MF-1.2
USON
USON
USON
USON
USON
USON
USON
USON
SOT-23
SOT-23
NKH
NKH
NKH
NKH
NKH
NKH
NKH
NKH
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
6
6
6
6
6
6
6
6
5
5
5
5
5
5
5
5
5
5
1000
1000
1000
1000
4500
4500
4500
4500
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
178.0
178.0
178.0
178.0
330.0
330.0
330.0
330.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
8.4
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
8.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
LM3671MF-1.2/NOPB
8.4
8.0
LM3671MF-1.25/NOPB SOT-23
LM3671MF-1.375/NOPB SOT-23
8.4
8.0
8.4
8.0
LM3671MF-1.5/NOPB
LM3671MF-1.6
SOT-23
SOT-23
SOT-23
SOT-23
8.4
8.0
8.4
8.0
LM3671MF-1.6/NOPB
LM3671MF-1.8/NOPB
8.4
8.0
8.4
8.0
LM3671MF-1.875/NOPB SOT-23
LM3671MF-2.5/NOPB SOT-23
8.4
8.0
8.4
8.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Dec-2013
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM3671MF-2.8
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
1000
1000
1000
1000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
1000
3000
250
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
3.2
3.2
3.2
3.2
1.4
1.4
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
LM3671MF-2.8/NOPB
LM3671MF-3.3/NOPB
3.2
3.2
1.4
LM3671MF-ADJ/NOPB SOT-23
LM3671MFX-1.2/NOPB SOT-23
LM3671MFX-1.25/NOPB SOT-23
LM3671MFX-1.375/NOPB SOT-23
LM3671MFX-1.5/NOPB SOT-23
LM3671MFX-1.6/NOPB SOT-23
LM3671MFX-1.8/NOPB SOT-23
LM3671MFX-1.875/NOPB SOT-23
LM3671MFX-2.5/NOPB SOT-23
LM3671MFX-2.8/NOPB SOT-23
LM3671MFX-3.3/NOPB SOT-23
LM3671MFX-ADJ/NOPB SOT-23
LM3671QMF-1.2/NOPB SOT-23
LM3671QMFX-1.2/NOPB SOT-23
LM3671QTL-1.8/NOPB DSBGA
LM3671QTLX-1.8/NOPB DSBGA
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
1.14
1.14
1.14
1.14
1.14
1.14
1.14
1.14
1.14
1.14
1.14
1.14
1.14
1.14
1.14
1.14
1.14
1.14
1.47
1.47
1.47
1.47
1.47
1.47
1.47
1.47
1.47
1.47
1.47
1.47
1.47
1.47
1.47
1.47
1.47
1.47
0.76
0.76
0.76
0.76
0.76
0.76
0.76
0.76
0.76
0.76
0.76
0.76
0.76
0.76
0.76
0.76
0.76
0.76
3000
250
LM3671TL-1.2/NOPB
LM3671TL-1.5/NOPB
LM3671TL-1.8/NOPB
DSBGA
DSBGA
DSBGA
250
250
LM3671TL-1.875/NOPB DSBGA
250
LM3671TL-2.5/NOPB
LM3671TL-2.8/NOPB
LM3671TL-3.3/NOPB
LM3671TL-ADJ/NOPB
DSBGA
DSBGA
DSBGA
DSBGA
250
250
250
250
LM3671TLX-1.2/NOPB DSBGA
LM3671TLX-1.5/NOPB DSBGA
LM3671TLX-1.8/NOPB DSBGA
LM3671TLX-1.875/NOPB DSBGA
LM3671TLX-2.5/NOPB DSBGA
LM3671TLX-2.8/NOPB DSBGA
LM3671TLX-3.3/NOPB DSBGA
LM3671TLX-ADJ/NOPB DSBGA
3000
3000
3000
3000
3000
3000
3000
3000
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Dec-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM3671LC-1.2/NOPB
LM3671LC-1.3/NOPB
LM3671LC-1.6/NOPB
LM3671LC-1.8/NOPB
LM3671LCX-1.2/NOPB
LM3671LCX-1.3/NOPB
LM3671LCX-1.6/NOPB
LM3671LCX-1.8/NOPB
LM3671MF-1.2
USON
USON
NKH
NKH
NKH
NKH
NKH
NKH
NKH
NKH
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
6
6
6
6
6
6
6
6
5
5
5
5
5
5
5
5
5
5
5
5
1000
1000
1000
1000
4500
4500
4500
4500
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
1000
210.0
210.0
210.0
210.0
367.0
367.0
367.0
367.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
185.0
185.0
185.0
185.0
367.0
367.0
367.0
367.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
USON
USON
USON
USON
USON
USON
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
LM3671MF-1.2/NOPB
LM3671MF-1.25/NOPB
LM3671MF-1.375/NOPB
LM3671MF-1.5/NOPB
LM3671MF-1.6
LM3671MF-1.6/NOPB
LM3671MF-1.8/NOPB
LM3671MF-1.875/NOPB
LM3671MF-2.5/NOPB
LM3671MF-2.8
LM3671MF-2.8/NOPB
Pack Materials-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Dec-2013
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM3671MF-3.3/NOPB
LM3671MF-ADJ/NOPB
LM3671MFX-1.2/NOPB
LM3671MFX-1.25/NOPB
LM3671MFX-1.375/NOPB
LM3671MFX-1.5/NOPB
LM3671MFX-1.6/NOPB
LM3671MFX-1.8/NOPB
LM3671MFX-1.875/NOPB
LM3671MFX-2.5/NOPB
LM3671MFX-2.8/NOPB
LM3671MFX-3.3/NOPB
LM3671MFX-ADJ/NOPB
LM3671QMF-1.2/NOPB
LM3671QMFX-1.2/NOPB
LM3671QTL-1.8/NOPB
LM3671QTLX-1.8/NOPB
LM3671TL-1.2/NOPB
LM3671TL-1.5/NOPB
LM3671TL-1.8/NOPB
LM3671TL-1.875/NOPB
LM3671TL-2.5/NOPB
LM3671TL-2.8/NOPB
LM3671TL-3.3/NOPB
LM3671TL-ADJ/NOPB
LM3671TLX-1.2/NOPB
LM3671TLX-1.5/NOPB
LM3671TLX-1.8/NOPB
LM3671TLX-1.875/NOPB
LM3671TLX-2.5/NOPB
LM3671TLX-2.8/NOPB
LM3671TLX-3.3/NOPB
LM3671TLX-ADJ/NOPB
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
YZR
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
1000
1000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
1000
3000
250
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
3000
250
250
250
250
250
250
250
250
3000
3000
3000
3000
3000
3000
3000
3000
Pack Materials-Page 4
MECHANICAL DATA
NKH0006B
LCA06B (Rev A)
www.ti.com
MECHANICAL DATA
YZR0005xxx
D
0.600±0.075
E
TLA05XXX (Rev C)
D: Max = 1.413 mm, Min =1.352 mm
E: Max = 1.083 mm, Min =1.022 mm
4215043/A
12/12
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
www.ti.com
IMPORTANT NOTICE
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