LM3880MF-1AD/NOPB [TI]
3 Rail Simple Power Sequencer with Fixed Time Delay 6-SOT-23 -40 to 125;
| 型号： | LM3880MF-1AD/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 3 Rail Simple Power Sequencer with Fixed Time Delay 6-SOT-23 -40 to 125 |
| 文件： | 总22页 (文件大小：825K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM3880, LM3880Q-1
www.ti.com
SNVS451I –AUGUST 2006–REVISED MARCH 2013
LM3880/LM3880Q-1 Power Sequencer
Check for Samples: LM3880, LM3880Q-1
1
FEATURES
DESCRIPTION
The LM3880 Power Sequencer offers the easiest
2
•
•
•
•
•
•
•
Easiest Method to Sequence Rails
Power Up and Power Down Control
Input Voltage Range of 2.7V to 5.5V
Small Footprint SOT-23-6
method to control power up and power down of
multiple power supplies (switchers or linear
regulators). By staggering the startup sequence, it is
possible to avoid latch conditions or large in-rush
currents that can affect the reliability of the system.
Low Quiescent Current of 25 µA
Standard Timing Options Available
Available in
a SOT-23-6 package, the Power
Sequencer contains a precision enable pin and three
open drain output flags. Upon enabling the LM3880
the three output flags will sequentially release, after
individual time delays, permitting the connected
power supplies to startup. The output flags will follow
a reverse sequence during power down to avoid latch
conditions.
Customization of Timing and Sequence
Available through Factory Programmability
•
LM3880Q is AEC-Q100 Grade 1 Qualified and
is Manufactured on an Automotive Grade Flow
APPLICATIONS
EPROM capability allows every delay and sequence
to be fully adjustable. Contact Texas Instruments if a
non-standard configuration is required.
•
•
•
•
Multiple Supply Sequencing
Microprocessor / Microcontroller Sequencing
FPGA Sequencing
Automotive
Typical Application Circuit
Power Supply 1
Enable
Input
Supply
VCC
Power Supply 2
Enable
FLAG 1
FLAG 2
FLAG 3
Enable
EN
GND
Power Supply 3
Enable
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2013, Texas Instruments Incorporated
LM3880, LM3880Q-1
SNVS451I –AUGUST 2006–REVISED MARCH 2013
www.ti.com
Connection Diagram
1
6
5
4
VCC
GND
EN
FLAG1
FLAG2
FLAG3
2
3
Figure 1. Top View
SOT-23–6 Package
PIN DESCRIPTIONS
Pin #
Name
VCC
Function
1
2
3
4
5
6
Input supply
GND
Ground
EN
Precision enable pin
Open drain output #3
Open drain output #2
Open drain output #1
FLAG3
FLAG2
FLAG1
Table 1. Sequence Designator Table
Sequence Number
Flag Order
Power Up
1 - 2 - 3
1 - 2 - 3
1 - 2 - 3
1 - 2 - 3
1 - 2 - 3
1 - 2 - 3
Power Down
3 - 2 - 1
1
2
3
4
5
6
3 - 1 - 2
2 - 3 - 1
2 - 1 - 3
1 - 3 - 2
1 - 2 - 3
Table 2. Timing Designator Table(1)
Timing
td1
td2
td3
td4
td5
td6
Designator
AF
AE
AA
AB
AC
AD
16ms
2ms
16ms
2ms
16ms
2ms
16ms
2ms
16ms
2ms
16ms
2ms
10ms
30ms
60ms
120ms
10ms
30ms
60ms
120ms
10ms
30ms
60ms
120ms
10ms
30ms
60ms
120ms
10ms
30ms
60ms
120ms
10ms
30ms
60ms
120ms
(1) See timing diagrams for more information
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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SNVS451I –AUGUST 2006–REVISED MARCH 2013
(1) (2)
Absolute Maximum Ratings
VCC
−0.3V to +6.0V
−0.3V to 6.0V
50 mA
EN, FLAG1, FLAG2, FLAG3
Max Flag 'ON' Current
Storage Temperature Range
Junction Temperature
−65°C to +150°C
150°C
Lead Temperature (Soldering, 5 sec.)
Minimum ESD Rating
260°C
±2 kV
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but does not ensure specific performance limits. For ensured specifications and conditions,
see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(1)
Operating Ratings
VCC to GND
2.7V to 5.5V
−0.3V to VCC + 0.3V
−40°C to +125°C
EN, FLAG1, FLAG2, FLAG3
Junction Temperature
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but does not ensure specific performance limits. For ensured specifications and conditions,
see the Electrical Characteristics.
Electrical Characteristics
Specifications with standard typeface are for TJ = 25°C, and those in bold face type apply over the full Operating Temperature
Range (TJ = -40°C to +125°C). Minimum and Maximum limits are specified through test, design or statistical correlation.
Typical values represent the most likely parametric norm at TJ = 25°C and are provided for reference purposes only. VCC
3.3V, and limits apply to all timing options, unless otherwise specified.
=
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
(1)
(2)
(1)
IQ
Operating Quiescent current
25
1
80
µA
Open Drain Flags
IFLAG
FLAGx Leakage Current
VFLAGx = 3.3V
20
nA
V
VOL
Power Up Sequence
td1
FLAGx Output Voltage Low
IFLAGx = 1.2mA
0.4
Timer delay 1 accuracy
Timer delay 2 accuracy
Timer delay 3 accuracy
-15
-20
-15
-20
-15
-20
15
20
15
20
15
20
%
%
%
2ms Timing Option
2ms Timing Option
2ms Timing Option
td2
td3
Power Down Sequence
td4
Timer delay 4 accuracy
Timer delay 5 accuracy
Timer delay 6 accuracy
-15
-20
-15
-20
-15
-20
15
20
15
20
15
20
%
%
%
2ms Timing Option
2ms Timing Option
2ms Timing Option
td5
td6
(1) Limits are 100% production tested at 25°. Limits over the operating temperature range are ensured through correlation using Statistical
Quality Control (SQC) methods. The limits are used to calculate TI's Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely parametric norm.
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Electrical Characteristics (continued)
Specifications with standard typeface are for TJ = 25°C, and those in bold face type apply over the full Operating Temperature
Range (TJ = -40°C to +125°C). Minimum and Maximum limits are specified through test, design or statistical correlation.
Typical values represent the most likely parametric norm at TJ = 25°C and are provided for reference purposes only. VCC
3.3V, and limits apply to all timing options, unless otherwise specified.
=
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
(1)
(2)
(1)
Timing Delay Error
(td(x) – 400 µs) / td(x+1) Ratio of timing delays
For x = 1 or 4
95
90
95
90
105
110
105
110
%
%
For x = 1 or 4, 2ms option
For x = 2 or 5
td(x) / td(x+1)
Ratio of timing delays
For x = 2 or 5, 2ms option
ENABLE Pin
VEN
IEN
EN pin threshold
1.0
1.25
7
1.4
V
EN pin pull-up current
VEN = 0V
µA
4
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Typical Performance Characteristics
Quiescent Current vs VCC
Quiescent Current vs Temperature (VCC = 3.3V)
30
29
28
27
26
25
24
23
22
21
20
26
25
24
23
22
21
20
-40 -25 -10
5
20 35 50 65 80 95 110 125
2.5
3
3.5
4
4.5
5
5.5
TEMPERATURE (oC)
V
(V)
CC
Figure 2.
Figure 3.
Enable Threshold vs Temperature
Time Delay (30ms) vs VCC
1.232
1.230
1.228
RISING
1.226
1.224
FALLING
1.222
1.220
1.218
1.216
1.214
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
Figure 4.
Figure 5.
Time Delay Ratio vs Temperature
Time Delay (30ms) vs Temperature
Figure 6.
Figure 7.
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Typical Performance Characteristics (continued)
FLAG VOL vs VCC (RFLAG = 100 kΩ)
FLAG Voltage vs Current
Figure 8.
Figure 9.
6
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Block Diagram
VCC
FLAG1
FLAG2
7 mA
t
t
t
t
t
t
d1
d2
d3
d4
d5
d6
EN
+
-
Timing
Delay
Generation
1.25V
Sequence
Control
Master
Clock
FLAG3
EPROM
(Factory Set)
GND
Figure 10. Block Diagram
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Timing Diagrams (Sequence 1)
All standard options use this sequence for output flags rise and fall order.
EN
FLAG1
FLAG2
FLAG3
t
d1
t
d2
t
d3
Figure 11. Power Up Sequence
EN
FLAG1
FLAG2
FLAG3
t
d4
t
t
d6
d5
Figure 12. Power Down Sequence
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SNVS451I –AUGUST 2006–REVISED MARCH 2013
APPLICATION INFORMATION
OVERVIEW
The LM3880 Power Sequencer provides an easy solution for sequencing multiple rails in a controlled manner.
Six independent timers are integrated to control the timing sequence (power up and power down) of three open
drain output flags. These flags permit connection to either a shutdown / enable pin of linear regulators and
switchers to control the power supplies’ operation. This allows a complete power system to be designed without
worrying about large in-rush currents or latch-up conditions that can occur.
The timing sequence of the LM3880 is controlled entirely by the enable (EN) pin. Upon power up, all the flags
are held low until this precision enable is pulled high. After the EN pin is asserted, the power up sequence will
commence. An internal counter will delay the first flag (FLAG1) from rising until a fixed time period has expired.
Upon the release of the first flag another timer will begin to delay the release of the second flag (FLAG2). This
process repeats until all three flags have sequentially been released. The three timers that control the delays are
all independent of each other and can be individually programmed if needed. (See CUSTOM SEQUENCER
section).
The power down sequence is the same as power-up, but in reverse. When EN pin is de-asserted a timer will
begin that delays the third flag (FLAG3) from pulling low. The second and first flag will then follow in a sequential
manner after their appropriate delays. The three timers that are used to control the power down scheme can also
be individually programmed and are completely independent of the power up timers.
Additional sequence patterns are also available in addition to customizable timers. For more information see the
CUSTOM SEQUENCER section.
PART OPERATION
The timing sequence of the LM3880 is controlled by the assertion of the enable signal. The enable pin is
designed with an internal comparator, referenced to a bandgap voltage (1.25V), to provide a precision threshold.
This allows a delayed timing to be externally set using a capacitor or to start the sequencing based on a certain
event, such as a line voltage reaching 90% of nominal. For an additional delayed sequence from the rail
powering VCC, simply attach a capacitor to the EN pin as shown below.
7 mA
EN
+
Enable
-
1.25V
C
EN
Figure 13. Cap Timing
Using the internal pull-up current source to charge the external capacitor (CEN) the enable pin delay can be
calculated by the equation below:
1.25V x CEN
tenable_delay
=
7 mA
(1)
A resistor divider can also be used to enable the LM3880 based on a certain voltage threshold. Care needs to be
taken when sizing the resistor divider to include the effects of the internal current source.
One of the features of the enable pin is that it provides glitch free operation. The first timer will start counting at a
rising threshold, but will always reset if the enable pin is de-asserted before the first output flag is released. This
can be shown in the timing diagram below:
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EN
FLAG1
t
d1
Figure 14. EN Glitch
If the enable signal remains high for the entire power-up sequence, then the part will operate as shown in the
standard timing diagrams. However, if the enable signal is de-asserted before the power-up sequence is
completed the part will enter a controlled shutdown. This allows the system to walk through a controlled power
cycling, preventing any latch conditions from occuring. This state only occurs if the enable pin is de-asserted
after the completion of timer 1, but before the entire power-up sequence is completed.
When this event occurs, the falling edge of enable pin resets the current timer and will allow the remaining
power-up cycle to complete before beginning the power down sequence. The power down sequence starts
approximately 120ms after the final power-up flag. This allows output voltages in the system to stabilize before
everything is shutdown. An example of this operation can be seen below:
EN
FLAG1
FLAG2
FLAG3
t
d1
t
d2
t
120 ms
t
t
d5
t
d6
d3
d4
Figure 15. Incomplete Sequence
All the internal timers are generated by a master clock that has an extremely low tempco. This allows for tight
accuracy across temperature and a consistent ratio between the individual timers. There is a slight additional
delay of approximately 400 µs to timers 1 and 4 which is a result of the EPROM refresh. This refresh time is in
addition to the programmed delay time and will be almost insignificant to all but the shortest of timer delays.
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SNVS451I –AUGUST 2006–REVISED MARCH 2013
CUSTOM SEQUENCER
The LM3880 Power Sequencer is based on a CMOS process utilizing an EPROM that has the capability to be
custom programmed at the factory. Approximately 500,000,000 different options are available allowing even the
most complex system to be simply sequenced. Because of the vast options that are possible, customization is
limited to orders of a certain quantity. Please contact Texas Instruments for more information.
The variables that can be programmed include the six delay timers and the reverse sequence order. For the
timers, each can be individually selected from one of the timer selector columns in the table shown below.
However, all six time delays must be from the same column.
Timer Options 1(1)
Timer Options 2(1)
Timer Options 3(1)
Timer Options 4(1)
0
0
0
0
8
2
4
6
4
8
12
18
24
30
36
42
48
54
60
66
72
78
84
90
16
24
32
40
48
56
64
72
80
88
96
104
112
120
6
12
16
20
24
28
32
36
40
44
48
52
56
60
8
10
12
14
16
18
20
22
24
26
28
30
(1) All times listed are in milliseconds
The sequencing order for power up is always controlled by layout. The flag number translates directly into the
sequence order during power up (ie FLAG1 will always be first). However, for some systems a different power
down order could be required. To allow flexibility for this aspect in a design, the Power Sequencer incorporates
six different options for controlling the power down sequence. These options can be seen in the timing diagrams
on the next page. This ability can be programmed in addition to the custom timers.
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Input
EN
FLAG1
FLAG2
FLAG3
Output
Sequence 1
delay1 delay2 delay3
(t
delay4 delay5 delay6
(t
)
(td2
)
(td3
)
)
d4
(td5
)
(td6)
d1
FLAG1
FLAG2
FLAG3
Sequence 2
Sequence 3
Sequence 4
FLAG1
FLAG2
FLAG3
FLAG1
FLAG2
FLAG3
FLAG1
FLAG2
FLAG3
Sequence 5
FLAG1
FLAG2
FLAG3
Sequence 6
Figure 16. Power Down Sequence Options
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SNVS451I –AUGUST 2006–REVISED MARCH 2013
REVISION HISTORY
Changes from Revision H (March 2013) to Revision I
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 12
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PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
LM3880MF-1AA
ACTIVE
SOT-23
SOT-23
DBV
6
6
1000
TBD
Call TI
CU SN
Call TI
-40 to 125
-40 to 125
F20A
LM3880MF-1AA/NOPB
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
1000
1000
1000
1000
1000
1000
250
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
F20A
F21A
F22A
F23A
F25A
F31A
F20A
F21A
F22A
F23A
F25A
F31A
F20A
F21A
F22A
F23A
LM3880MF-1AB/NOPB
LM3880MF-1AC/NOPB
LM3880MF-1AD/NOPB
LM3880MF-1AE/NOPB
LM3880MF-1AF/NOPB
LM3880MFE-1AA/NOPB
LM3880MFE-1AB/NOPB
LM3880MFE-1AC/NOPB
LM3880MFE-1AD/NOPB
LM3880MFE-1AE/NOPB
LM3880MFE-1AF/NOPB
LM3880MFX-1AA/NOPB
LM3880MFX-1AB/NOPB
LM3880MFX-1AC/NOPB
LM3880MFX-1AD/NOPB
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
3000
3000
3000
3000
Green (RoHS
& no Sb/Br)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
LM3880MFX-1AE/NOPB
LM3880MFX-1AF/NOPB
LM3880QMF-1AA/NOPB
LM3880QMF-1AB/NOPB
LM3880QMF-1AC/NOPB
LM3880QMF-1AD/NOPB
LM3880QMF-1AE/NOPB
LM3880QMF-1AF/NOPB
LM3880QMFE-1AA/NOPB
LM3880QMFE-1AB/NOPB
LM3880QMFE-1AC/NOPB
LM3880QMFE-1AD/NOPB
LM3880QMFE-1AE/NOPB
LM3880QMFE-1AF/NOPB
LM3880QMFX-1AA/NOPB
LM3880QMFX-1AB/NOPB
LM3880QMFX-1AC/NOPB
LM3880QMFX-1AD/NOPB
ACTIVE
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBV
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
3000
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
F25A
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
3000
1000
1000
1000
1000
1000
1000
250
Green (RoHS
& no Sb/Br)
F31A
F27A
F28A
F29A
F30A
F24A
F32A
F27A
F28A
F29A
F30A
F24A
F32A
F27A
F28A
F29A
F30A
Green (RoHS
& no Sb/Br)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
3000
3000
3000
3000
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
LM3880QMFX-1AE/NOPB
LM3880QMFX-1AF/NOPB
ACTIVE
SOT-23
SOT-23
DBV
6
6
3000
Green (RoHS
& no Sb/Br)
CU SN
CU SN
Level-1-260C-UNLIM
F24A
F32A
ACTIVE
DBV
3000
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
-40 to 125
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM3880, LM3880-Q1 :
Catalog: LM3880
•
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Automotive: LM3880-Q1
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
•
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM3880MF-1AA
SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
1000
1000
1000
1000
1000
1000
1000
250
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
LM3880MF-1AA/NOPB SOT-23
LM3880MF-1AB/NOPB SOT-23
LM3880MF-1AC/NOPB SOT-23
LM3880MF-1AD/NOPB SOT-23
LM3880MF-1AE/NOPB SOT-23
LM3880MF-1AF/NOPB SOT-23
LM3880MFE-1AA/NOPB SOT-23
LM3880MFE-1AB/NOPB SOT-23
LM3880MFE-1AC/NOPB SOT-23
LM3880MFE-1AD/NOPB SOT-23
LM3880MFE-1AE/NOPB SOT-23
LM3880MFE-1AF/NOPB SOT-23
LM3880MFX-1AA/NOPB SOT-23
LM3880MFX-1AB/NOPB SOT-23
LM3880MFX-1AC/NOPB SOT-23
LM3880MFX-1AD/NOPB SOT-23
LM3880MFX-1AE/NOPB SOT-23
250
250
250
250
250
3000
3000
3000
3000
3000
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2013
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM3880MFX-1AF/NOPB SOT-23
LM3880QMF-1AA/NOPB SOT-23
LM3880QMF-1AB/NOPB SOT-23
LM3880QMF-1AC/NOPB SOT-23
LM3880QMF-1AD/NOPB SOT-23
LM3880QMF-1AE/NOPB SOT-23
LM3880QMF-1AF/NOPB SOT-23
LM3880QMFE-1AA/NOPB SOT-23
LM3880QMFE-1AB/NOPB SOT-23
LM3880QMFE-1AC/NOPB SOT-23
LM3880QMFE-1AD/NOPB SOT-23
LM3880QMFE-1AE/NOPB SOT-23
LM3880QMFE-1AF/NOPB SOT-23
LM3880QMFX-1AA/NOPB SOT-23
LM3880QMFX-1AB/NOPB SOT-23
LM3880QMFX-1AC/NOPB SOT-23
LM3880QMFX-1AD/NOPB SOT-23
LM3880QMFX-1AE/NOPB SOT-23
LM3880QMFX-1AF/NOPB SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
3000
1000
1000
1000
1000
1000
1000
250
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
250
250
250
250
250
3000
3000
3000
3000
3000
3000
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM3880MF-1AA
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
1000
1000
1000
1000
1000
1000
1000
250
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
LM3880MF-1AA/NOPB
LM3880MF-1AB/NOPB
LM3880MF-1AC/NOPB
LM3880MF-1AD/NOPB
LM3880MF-1AE/NOPB
LM3880MF-1AF/NOPB
LM3880MFE-1AA/NOPB
LM3880MFE-1AB/NOPB
LM3880MFE-1AC/NOPB
LM3880MFE-1AD/NOPB
LM3880MFE-1AE/NOPB
LM3880MFE-1AF/NOPB
LM3880MFX-1AA/NOPB
LM3880MFX-1AB/NOPB
LM3880MFX-1AC/NOPB
LM3880MFX-1AD/NOPB
LM3880MFX-1AE/NOPB
LM3880MFX-1AF/NOPB
LM3880QMF-1AA/NOPB
LM3880QMF-1AB/NOPB
LM3880QMF-1AC/NOPB
LM3880QMF-1AD/NOPB
LM3880QMF-1AE/NOPB
LM3880QMF-1AF/NOPB
LM3880QMFE-1AA/NOPB
LM3880QMFE-1AB/NOPB
LM3880QMFE-1AC/NOPB
LM3880QMFE-1AD/NOPB
LM3880QMFE-1AE/NOPB
LM3880QMFE-1AF/NOPB
LM3880QMFX-1AA/NOPB
LM3880QMFX-1AB/NOPB
LM3880QMFX-1AC/NOPB
LM3880QMFX-1AD/NOPB
LM3880QMFX-1AE/NOPB
LM3880QMFX-1AF/NOPB
250
250
250
250
250
3000
3000
3000
3000
3000
3000
1000
1000
1000
1000
1000
1000
250
250
250
250
250
250
3000
3000
3000
3000
3000
3000
Pack Materials-Page 3
IMPORTANT NOTICE
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changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
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