LM432MA/NOPB [TI]
LM432 Dual Op Amp with On-Chip Fixed 2.5V Reference;
| 型号： | LM432MA/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LM432 Dual Op Amp with On-Chip Fixed 2.5V Reference |
| 文件： | 总9页 (文件大小：681K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM432
www.ti.com
SNOS538D –AUGUST 2000–REVISED MARCH 2013
LM432 Dual Op Amp with On-Chip Fixed 2.5V Reference
Check for Samples: LM432
1
FEATURES
APPLICATIONS
2
•
•
•
•
•
•
Dual Op Amp Circuitry
(Typical for VS= 5V)
•
•
Low Cost Charging Circuitry
Power Supplies and Adapters
Input Offset Voltage 0.6mV
Input Offset Current 1nA
Input Bias Current 3nA
DESCRIPTION
The LM432 integrates two operational amplifiers and
one 2.5V reference. The reference is based on the
LMV431 adjustable shunt regulator with the output
voltage adjusted to a fixed 2.5V. The Op Amps are
similar to the LM358 with a common-mode input
range that includes ground. Integrating the reference
and Op Amps creates a solution for low cost charging
applications.
Common-Mode Input Voltage Range 0V to
VS−1V
•
•
•
•
Power Supply Current 150µA
Reference Circuitry
Reference Voltage 2.5V
Reference Voltage Deviation (−40°C to 85°C)
4mV
•
Sink Current Capability 0.2mA to 10mA
Connection Diagram
Figure 1. 8-Pin SOIC (Top View)
See Package Number D
Application Circuit
Figure 2. Optocoupler Driver Circuit for Power Supply Isolation
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2013, Texas Instruments Incorporated
LM432
SNOS538D –AUGUST 2000–REVISED MARCH 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)(3)
Suppy Voltage (VS)
20V
−65°C to 150°C
150°C
Storage Temperature
Junction Temperature (TJ)
ESD Human Body Model
Input Voltage Range
2kV
−0.3V to 20V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
(2) All voltages are measured with respect to GND = 0VDC, unless otherwise specified.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
Operating Ratings(1)(2)
Temperature Range
Supply Voltage(3)
−40°C to 85°C
2.5V to 16V
162°C/W
Thermal Resistance(θJA
)
(1) Operating Rating indicate conditions for which the device is functional. These rating do not ensure specific performance limits. For
ensured specifications and test conditions, see the Electrical Characteristics. The ensured specifications apply only for the test
conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
(2) All voltages are measured with respect to GND = 0VDC, unless otherwise specified.
(3) Minimum value of operating voltage is for Amplifier B only.
Electrical Characteristics
The following specifications apply for both amplifiers at VS = 5V, VCM = 2.5V, VO = 2.5V, RL = ∞, and TJ = 25°C, unless
otherwise noted.
Symbol
Parameter
Conditions
Min(1)
Typ(2)
Max(1)
Units
OP Amp Circuitry
VOS
IOS
IB
Input Offset Voltage
Input Offset Current
Amplifier B only
−4
0.6
1
4
mV
nA
nA
V
Amplifier B only
50
Input Bias Current
Amplifier B only
3
150
VS-1
500
VCM
IS
Common-Mode Input Voltage Range
Power Supply Current
Amplifier B only, CMRR > 50dB
Total for both amplifiers
0
150
100
µA
AV
VS = 16V, 1V < VO < 11V,
RL = 10kΩ connected to VS/2
Voltage Gain
65
dB
VOL
Output Voltage Low
Output Voltage High
Output Current Source
Output Current Sink
2
VS – 1.3
30
50
mV
V
VOH
VS – 1.5
ISOURCE
ISINK
20
5
mA
mA
11
Reference Circuitry For Op Amp A (The following specifications apply for IZ = 200µA and TJ = 25°C, unless otherwise noted.)
VZ
Reference Voltage at IN+ Terminal
2.450
2.5
2.550
V
VZDEV
Reference Voltage Deviation at IN+
−40°C ≤ TJ ≤ 85°C
4
65
mV
Terminal Over Temperature(3)(4)
IZ (MIN)
rz
Minimum Cathode Current for Regulation
at IN+ (VZ) Terminal
Dynamic Output Impedance(5)
150
0.2
200
µA
200µA < IZ < 1mA, Freq = 0Hz
Ω
(1) Ensured to Average Outgoing Quality Level (AOQL).
(2) Typicals represent the most likely parametic norm.
(3) Reference voltage deviation, VZDEV, is defined as the maximum variation of the reference input voltage over the full temperature range.
(4) Typical Temperature drift ΔV/ΔT = 12.8ppm/°C
(5) The Dynamic Output Impendance, rz, is defined as rz = ΔVZ/ΔIZ.
2
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Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LM432
LM432
www.ti.com
SNOS538D –AUGUST 2000–REVISED MARCH 2013
REVISION HISTORY
Changes from Revision C (March 2013) to Revision D
Page
•
Changed layout of National Data Sheet to TI format ............................................................................................................ 2
Copyright © 2000–2013, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links: LM432
PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2013
PACKAGING INFORMATION
Orderable Device
LM432MA/NOPB
LM432MAX/NOPB
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
ACTIVE
SOIC
SOIC
D
8
8
95
Green (RoHS
& no Sb/Br)
SN | CU SN
Level-1-260C-UNLIM
LM432
MA
ACTIVE
D
2500
Green (RoHS
& no Sb/Br)
SN | CU SN
Level-1-260C-UNLIM
-40 to 85
LM432
MA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2013
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM432MAX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
LM432MAX/NOPB
D
8
2500
Pack Materials-Page 2
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