LM4674TLX/NOPB [TI]
免滤波 2.5 立体声 D 类音频功率放大器 | YZR | 16 | -40 to 85;
| 型号： | LM4674TLX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 免滤波 2.5 立体声 D 类音频功率放大器 | YZR | 16 | -40 to 85 放大器 功率放大器 商用集成电路 |
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LM4674
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SNAS344E –DECEMBER 2005–REVISED APRIL 2013
LM4674
Filterless 2.5W Stereo Class D Audio Power
Amplifier
Check for Samples: LM4674
1
FEATURES
DESCRIPTION
The LM4674 is a single supply, high efficiency,
2.5W/channel, filterless switching audio amplifier. A
low noise PWM architecture eliminates the output
filter, reducing external component count, board area
consumption, system cost, and simplifying design.
2
•
Output Short Circuit Protection
Stereo Class D Operation
No Output Filter Required
Logic Selectable Gain
•
•
•
•
•
•
•
•
Independent Shutdown Control
Minimum External Components
Click and Pop Suppression
Micro-Power Shutdown
The LM4674 is designed to meet the demands of
mobile phones and other portable communication
devices. Operating from a single 5V supply, the
device is capable of delivering 2.5W/channel of
continuous output power to a 4Ω load with less than
10% THD+N. Flexible power supply requirements
allow operation from 2.4V to 5.5V.
Available in Space-Saving 2mm x 2mm x
0.6mm DSBGA, and 4mm x 4mm x 0.8mm
WQFN Packages
The LM4674 features high efficiency compared to
conventional Class AB amplifiers. When driving an
8Ω speaker from a 3.6V supply, the device features
85% efficiency at PO = 500mW. Four gain options are
pin selectable through the G0 and G1 pins.
APPLICATIONS
•
•
•
Mobile Phones
PDAs
Output short circuit protection prevents the device
from being damaged during fault conditions. Superior
click and pop suppression eliminates audible
transients on power-up/down and during shutdown.
Independent left/right shutdown control maximizes
power savings in mixed mono/stereo applications.
Laptops
KEY SPECIFICATIONS
•
•
•
•
Efficiency at 3.6V, 100mW into 8Ω: 80% (typ)
Efficiency at 3.6V, 500mW into 8Ω: 85% (typ)
Efficiency at 5V, 1W into 8Ω: 85% (typ)
Quiescent Power Supply Current
at 3.6V supply: 4mA
•
•
Power Output at VDD = 5V,
RL = 4Ω, THD ≤ 10%: 2.5 W (typ)
Shutdown Current: 0.03μA (typ)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2013, Texas Instruments Incorporated
LM4674
SNAS344E –DECEMBER 2005–REVISED APRIL 2013
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TYPICAL APPLICATION
2.4V to 5.5V
C
S2
C
S1
PV
V
DD
DD
AUDIO
INPUT
C
C
i
i
INR+
OUTRA
OUTRB
GAIN/
MODULATOR
H-BRIDGE
INR-
SDR
G0
G1
OSCILLATOR
SDL
AUDIO
INPUT
C
C
i
i
INL+
OUTLA
OUTLB
GAIN/
MODULATOR
H-BRIDGE
INL-
GND
PGND
Ci = 1 μF
CS1 = 1 μF
CS2 = 0.1 μF
Figure 1. Typical Audio Amplifier Application Circuit
EXTERNAL COMPONENTS DESCRIPTION
(Figure 1)
Components
Functional Description
1.
CS
Supply bypass capacitor which provides power supply filtering. Refer to the AUDIO AMPLIFIER INPUT CAPACITOR
SELECTION section for information concerning proper placement and selection of the supply bypass capacitor.
2.
Ci
Input AC coupling capacitor which blocks the DC voltage at the amplifier's input terminals.
2
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CONNECTION DIAGRAM
OUTLB
OUTLA
SDL
SDR
G1
PGND
GND
G0
OUTRB
OUTRA
4
3
2
12 11
10
9
OUTLB
OUTLA
13
14
15
16
8
7
6
5
OUTRB
OUTRA
V
PV
G1
DD
DD
G0
PV
DD
V
DD
1
2
3
4
INL+
A
INL-
B
INR-
C
INR+
D
1
Figure 2. DSBGA (Top View)
See YZR0016 Package
Figure 3. WQFN (Top View)
See RGH0016A Package
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PIN DESCRIPTION
BUMP
A1
PIN
NAME
FUNCTION
4
6
INL+
PVDD
OUTLA
OUTLB
INL-
Non-inverting left channel input
Power VDD
A2
A3
7
Left channel output A
Left channel output B
Inverting left channel input
Gain setting input 1
A4
8
B1
3
B2
5
G1
B3
10
9
SDR
Right channel shutdown input
Left channel shutdown input
Inverting right channel input
Gain setting input 0
B4
SDL
C1
C2
C3
C4
D1
D2
D3
D4
2
INR-
16
12
11
1
G0
GND
PGND
INR+
VDD
Ground
Power Ground
Non-inverting right channel input
Power Supply
15
14
13
OUTRA
OUTRB
Right channel output A
Right channel output B
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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SNAS344E –DECEMBER 2005–REVISED APRIL 2013
ABSOLUTE MAXIMUM RATINGS(1)(2)
Supply Voltage(1)
6.0V
−65°C to +150°C
–0.3V to VDD +0.3V
Internally Limited
2000V
Storage Temperature
Input Voltage
Power Dissipation(3)
ESD Susceptibility, all other pins(4)
ESD Susceptibility(5)
200V
Junction Temperature (TJMAX
)
150°C
Thermal Resistance
θJA (DSBGA)
θJA (WQFN)
45.7°C/W
38.9°C/W
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX – TA)/ θJA or the number given in Absolute Maximum Ratings,
whichever is lower. For the LM4674 see power derating currents for more information.
(4) Human body model, 100pF discharged through a 1.5kΩ resistor.
(5) Machine Model, 220pF–240pF discharged through all pins.
OPERATING RATINGS(1)(2)
Temperature Range (TMIN ≤ TA ≤ TMAX
)
−40°C ≤ TA ≤ 85°C
2.4V ≤ VDD ≤ 5.5V
Supply Voltage
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
ELECTRICAL CHARACTERISTICS VDD = 3.6V(1)(2)
The following specifications apply for AV = 6dB, RL = 15µH + 8Ω + 15µH, f = 1kHz unless otherwise specified. Limits apply for
TA = 25°C.
LM4674
Units
(Limits)
Symbol
VOS
Parameter
Conditions
Typical(3)
Limit(4)(5)
Differential Output Offset Voltage
VIN = 0, VDD = 2.4V to 5.0V
5
mV
mA
VIN = 0, RL = ∞,
Both channels active, VDD = 3.6V
4
6
IDD
Quiescent Power Supply Current
VIN = 0, RL = ∞,
Both channels active, VDD = 5V
5
7.5
mA
ISD
Shutdown Current
V SDR = V SDL = GND
0.03
1
μA
VSDIH
VSDIL
TWU
Shutdown Voltage Input High
Shutdown Voltage Input Low
Wake Up Time
1.4
0.4
V (min)
V (max)
ms
V SDR/SDL = 0.4V
0.5
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Limits are specified to AOQL (Average Outgoing Quality Level).
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
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ELECTRICAL CHARACTERISTICS VDD = 3.6V(1)(2) (continued)
The following specifications apply for AV = 6dB, RL = 15µH + 8Ω + 15µH, f = 1kHz unless otherwise specified. Limits apply for
TA = 25°C.
LM4674
Units
(Limits)
Symbol
Parameter
Conditions
G0, G1 = GND
Typical(3)
Limit(4)(5)
6
6 ± 0.5
dB
dB
dB
dB
RL = ∞
G0 = VDD, G1 = GND
RL = ∞
12
18
24
12 ± 0.5
18 ± 0.5
24 ± 0.5
AV
Gain
G0 = GND, G1 = VDD
RL = ∞
G0, G1 = VDD
RL = ∞
AV = 6dB
28
kΩ
kΩ
kΩ
kΩ
AV = 12dB
AV = 18dB
AV = 24dB
18.75
11.25
6.25
RIN
Input Resistance
RL = 15μH + 4Ω + 15μH, THD ≤ 10%
f = 1kHz, 22kHz BW
VDD = 5V
2.5
1.2
W
W
W
VDD = 3.6V
VDD = 2.5V
0.530
RL = 15μH + 8Ω + 15μH, THD ≤ 10%
f = 1kHz, 22kHz BW
VDD = 5V
1.5
0.78
0.350
W
W
W
VDD = 3.6V
VDD = 2.5V
0.6
PO
Output Power
RL = 15μH + 4Ω + 15μH, THD ≤ 1%
f = 1kHz, 22kHz BW
VDD = 5V
1.9
1
W
W
W
VDD = 3.6V
VDD = 2.5V
0.430
RL = 15μH + 8Ω + 15μH, THD = 1%
f = 1kHz, 22kHz BW
VDD = 5V
1.25
0.63
0.285
0.07
0.05
W
W
W
%
%
VDD = 3.6V
VDD = 2.5V
PO = 500mW, f = 1kHz, RL = 8Ω
PO = 300mW, f = 1kHz, RL = 8Ω
THD+N
PSRR
Total Harmonic Distortion
VRIPPLE = 200mVP-P Sine,
fRIPPLE = 217Hz, Inputs AC GND,
Ci = 1μF, input referred
75
75
dB
dB
Power Supply Rejection Ratio
VRIPPLE = 1VP-P Sine,
fRIPPLE = 1kHz, Inputs AC GND,
Ci = 1μF, input referred
VRIPPLE = 1VP-P
fRIPPLE = 217Hz
CMRR
Common Mode Rejection Ratio
Efficiency
67
85
dB
%
PO = 1W, f = 1kHz,
RL = 8Ω, VDD = 5V
η
Xtalk
SNR
εOS
Crosstalk
PO = 500mW, f = 1kHz
VDD = 5V, PO = 1W
84
96
20
dB
dB
μV
Signal to Noise Ratio
Output Noise
Input referred, A-Weighted Filter
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BLOCK DIAGRAMS
2.4V to 5.5V
PV
DD
V
DD
OSCILLATOR
INL+
INL-
OUTLA
PWM MODULATOR
H-BRIDGE
OUTLB
G0
G1
GAIN
CONTROL
CLICK/POP
SUPPRESSION
BIAS
OUTRA
INR+
INR-
OUTRB
PWM MODULATOR
H-BRIDGE
PGND
GND SDR
SDL
Figure 4. Differential Input Configuration
2.4V to 5.5V
PV
V
DD
DD
OSCILLATOR
INL+
INL-
OUTLA
OUTLB
PWM MODULATOR
H-BRIDGE
G0
G1
GAIN
CONTROL
CLICK/POP
SUPPRESSION
BIAS
OUTRA
OUTRB
INR+
INR-
PWM MODULATOR
H-BRIDGE
PGND
GND SDR
SDL
Figure 5. Single-Ended Input Configuration
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TYPICAL PERFORMANCE CHARACTERISTICS
THD+N vs Output Power
f = 1kHz, AV = 24dB, RL = 8Ω
THD+N vs Output Power
f = 1kHz, AV = 6dB, RL = 8Ω
100
10
100
10
V
DD
= 5V
V
= 5V
DD
V
= 3.6V
V
DD
= 3.6V
DD
1
1
V
= 2.5V
V
= 2.5V
DD
DD
0.1
0.1
0.01
0.01
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
OUTPUT POWER/CHANNEL (W)
OUTPUT POWER/CHANNEL (W)
Figure 6.
Figure 7.
THD+N vs Output Power
f= 1kHz, AV = 24dB, RL = 4Ω
THD+N vs Output Power
f = 1kHz, AV = 6dB, RL = 4Ω
100
10
100
10
V
= 5V
V
= 5V
DD
DD
V
= 3.6V
V
DD
= 3.6V
DD
1
1
V
= 2.5V
V
= 2.5V
DD
DD
0.1
0.1
0.01
0.01
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
OUTPUT POWER/CHANNEL (W)
OUTPUT POWER/CHANNEL (W)
Figure 8.
Figure 9.
THD+N vs Frequency
VDD = 2.5V, POUT = 100mW/ch, RL = 8Ω
THD+N vs Frequency
VDD = 3.6V, POUT = 250mW/ch, RL = 8Ω
100
100
10
10
1
1
0.1
0.1
0.01
0.01
0.001
0.001
10
100
1000
10000
100000
10
100
1000
10000
100000
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 10.
Figure 11.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
THD+N vs Frequency
VDD = 5V, POUT = 375mW/ch, RL = 8Ω
THD+N vs Frequency
VDD = 2.5V, POUT = 100mW/ch, RL = 4Ω
100
10
100
10
1
1
0.1
0.1
0.01
0.01
0.001
0.001
10
100
1000
10000
100000
10
100
1000
10000
100000
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 12.
Figure 13.
THD+N vs Frequency
VDD = 3.6V, POUT = 250mW/ch, RL = 4Ω
THD+N vs Frequency
VDD = 5V, POUT = 375mW/ch, RL = 4Ω
100
100
10
1
10
1
0.1
0.01
0.1
0.01
0.001
0.001
10
100
1000
10000
100000
10
100
1000
10000
100000
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 14.
Figure 15.
Efficiency vs Output Power/channel
Efficiency vs Output Power/channel
RL = 4Ω, f = 1kHz
RL = 8Ω, f = 1kHz
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 5V
DD
V
= 5V
DD
V
= 3.6V
DD
V
= 3.6V
DD
V
= 2.5V
DD
V
= 2.5V
DD
0
500
1000
1500
2000
0
200
400
600
800 1000 1200
OUTPUT POWER (mW)
OUTPUT POWER (mW)
Figure 16.
Figure 17.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Power Dissipation vs Output Power
Power Dissipation vs Output Power
RL = 4Ω, f = 1kHz
RL = 8Ω, f = 1kHz
1000
750
500
250
0
400
300
200
100
0
V
= 5V
DD
V
= 5V
DD
V
= 3.6V
DD
V
= 3.6V
DD
V
= 2.5V
V
= 2.5V
DD
DD
P
= P
+ P
P
= P
+ P
OUTL OUTR
OUT
OUTL
OUTR
OUT
0
1000
2000
3000
4000
0
500
1000
1500
2000
2500
OUTPUT POWER (mW)
OUTPUT POWER (mW)
Figure 18.
Figure 19.
Output Power/channel vs Supply Voltage
Output Power/channel vs Supply Voltage
RL = 4Ω, f = 1kHz
RL = 8Ω, f = 1kHz
3000
2000
2500
2000
1500
1000
500
1500
1000
THD+N = 10%
THD+N = 10%
THD+N = 1%
THD+N = 1%
500
0
0
2.5
3
3.5
4
4.5
5
5.5
2.5
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 20.
Figure 21.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
PSRR vs Frequency
VDD = 3.6V, VRIPPLE= 200mVP-P, RL = 8Ω
Crosstalk vs Frequency
VDD = 3.6V, VRIPPLE = 1VP-P, RL = 8Ω
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
10
100
1000
10000
100000
10
100
1000
10000
100000
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 22.
Figure 23.
CMRR vs Frequency
VDD = 3.6V, VCM = 1VP-P, RL = 8Ω
Supply Current vs Supply Voltage
RL = ∞
0
-10
-20
-30
-40
-50
-60
-70
-80
8
7
6
5
4
3
2
1
0
2.5
3
3.5
4
4.5
5
5.5
10
100
1000
10000
100000
FREQUENCY (Hz)
SUPPLY VOLTAGE (V)
Figure 24.
Figure 25.
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APPLICATION INFORMATION
GENERAL AMPLIFIER FUNCTION
The LM4674 stereo Class D audio power amplifier features a filterless modulation scheme that reduces external
component count, conserving board space and reducing system cost. The outputs of the device transition from
VDD to GND with a 300kHz switching frequency. With no signal applied, the outputs for each channel switch with
a 50% duty cycle, in phase, causing the two outputs to cancel. This cancellation results in no net voltage across
the speaker, thus there is no current to the load in the idle state.
With the input signal applied, the duty cycle (pulse width) of the LM4674 outputs changes. For increasing output
voltage, the duty cycle of the A output increases, while the duty cycle of the B output decreases for each
channel. For decreasing output voltages, the converse occurs. The difference between the two pulse widths
yields the differential output voltage.
DIFFERENTIAL AMPLIFIER EXPLANATION
As logic supplies continue to shrink, system designers are increasingly turning to differential analog signal
handling to preserve signal to noise ratios with restricted voltage signs. The LM4674 features two fully differential
amplifiers. A differential amplifier amplifies the difference between the two input signals. Traditional audio power
amplifiers have typically offered only single-ended inputs resulting in a 6dB reduction of SNR relative to
differential inputs. The LM4674 also offers the possibility of DC input coupling which eliminates the input coupling
capacitors. A major benefit of the fully differential amplifier is the improved common mode rejection ratio (CMRR)
over single ended input amplifiers. The increased CMRR of the differential amplifier reduces sensitivity to ground
offset related noise injection, especially important in noisy systems.
POWER DISSIPATION AND EFFICIENCY
The major benefit of a Class D amplifier is increased efficiency versus a class AB amplifier. The efficiency of the
LM4674 is attributed to the region of operation of the transistors in the output stage. The Class D output stage
acts as current steering switches, consuming negligible amounts of power compared to their Class AB
counterparts. Most of the power loss associated with the output stage is due to the IR loss of the MOSFET on-
resistance (RDS(ON)), along with switching losses due to gate charge.
SHUTDOWN FUNCTION
The LM4674 features independent left and right channel shutdown controls, allowing each channel to be
disabled independently. SDR controls the right channel, while SDL controls the left channel. Driving either low
disables the corresponding channel.
It is best to switch between ground and VDD for minimum current consumption while in shutdown. The LM4674
may be disabled with shutdown voltages in between GND and VDD, the idle current will be greater than the
typical 0.03µA value. For logic levels between GND and VDD bypass SD_ with a 0.1μF capacitor.
The LM4674 shutdown inputs have internal pulldown resistors. The purpose of these resistors is to eliminate any
unwanted state changes when SD_ is floating. To minimize shutdown current, SD_ should be driven to GND or
left floating. If SD_ is not driven to GND or floating, an increase in shutdown supply current will be noticed.
SINGLE-ENDED AUDIO AMPLIFIER CONFIGURATION
The LM4674 is compatible with single-ended sources. When configured for single-ended inputs, input capacitors
must be used to block any DC component at the input of the device. Figure 5 shows the typical single-ended
applications circuit.
AUDIO AMPLIFIER POWER SUPPLY BYPASSING/FILTERING
Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass
capacitor as close to the device as possible. Typical applications employ a voltage regulator with 10µF and 0.1µF
bypass capacitors that increase supply stability. These capacitors do not eliminate the need for bypassing of the
LM4674 supply pins. A 1µF capacitor is recommended.
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AUDIO AMPLIFIER INPUT CAPACITOR SELECTION
Input capacitors may be required for some applications, or when the audio source is single-ended. Input
capacitors block the DC component of the audio signal, eliminating any conflict between the DC component of
the audio source and the bias voltage of the LM4674. The input capacitors create a high-pass filter with the input
resistance Ri. The -3dB point of the high pass filter is found using Equation (1) below.
f = 1 / 2πRiCi
(1)
The values for Ri can be found in the EC table for each gain setting.
The input capacitors can also be used to remove low frequency content from the audio signal. Small speakers
cannot reproduce, and may even be damaged by low frequencies. High pass filtering the audio signal helps
protect the speakers. When the LM4674 is using a single-ended source, power supply noise on the ground is
seen as an input signal. Setting the high-pass filter point above the power supply noise frequencies, 217 Hz in a
GSM phone, for example, filters out the noise such that it is not amplified and heard on the output. Capacitors
with a tolerance of 10% or better are recommended for impedance matching and improved CMRR and PSRR.
AUDIO AMPLIFIER GAIN SETTING
The LM4674 features four internally configured gain settings. The device gain is selected through the two logic
inputs, G0 and G1. The gain settings are as shown in the following table.
LOGIC INPUT
GAIN
G1
0
G0
0
V/V
2
dB
6
0
1
4
12
18
24
1
0
8
1
1
16
PCB LAYOUT GUIDELINES
As output power increases, interconnect resistance (PCB traces and wires) between the amplifier, load and
power supply create a voltage drop. The voltage loss due to the traces between the LM4674 and the load results
in lower output power and decreased efficiency. Higher trace resistance between the supply and the LM4674 has
the same effect as a poorly regulated supply, increasing ripple on the supply line, and reducing peak output
power. The effects of residual trace resistance increases as output current increases due to higher output power,
decreased load impedance or both. To maintain the highest output voltage swing and corresponding peak output
power, the PCB traces that connect the output pins to the load and the supply pins to the power supply should
be as wide as possible to minimize trace resistance.
The use of power and ground planes will give the best THD+N performance. In addition to reducing trace
resistance, the use of power planes creates parasitic capacitors that help to filter the power supply line.
The inductive nature of the transducer load can also result in overshoot on one or both edges, clamped by the
parasitic diodes to GND and VDD in each case. From an EMI standpoint, this is an aggressive waveform that
can radiate or conduct to other components in the system and cause interference. In is essential to keep the
power and output traces short and well shielded if possible. Use of ground planes beads and micros-strip layout
techniques are all useful in preventing unwanted interference.
As the distance from the LM4674 and the speaker increases, the amount of EMI radiation increases due to the
output wires or traces acting as antennas become more efficient with length. Ferrite chip inductors places close
to the LM4674 outputs may be needed to reduce EMI radiation.
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LM4674
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LM4674TL DEMO BOARD SCHEMATIC
U1
VDD
D2
C3
D1
A2
C4
JP1
VDD
VDD
GND
INR+
PVDD
PGND
+
C11
10 mF
C1
1 mF
C2
1 mF
GND
POWER
C4
L1
JP2
INR+
INR-
1 mF
1 mH
D3
D4
JP9
JP10
C7
C3
OUTRA
OUTRB
C1
B1
A1
0.022 mF
INR-
INL+
INL-
1
2
1
2
R1
300
RIGHT INPUT
1 mF
C8
C5
Header 2
0.022 mF
Right Output
JP3
L2
1 mF
INL+
INL-
1 mH
L4
C6
JP6
VDD
G0
GND
VDD
LEFT INPUT
1 mF
C2
B2
1 mH
G0
G1
A3
A4
JP8
JP11
C10
OUTLA
OUTLB
0.022 mF
1
2
1
2
R2
300
G0
C9
JP7
VDD
VDD
B3
B4
Header 2
0.022 mF
Left Output
JP4
VDD
JP5
SDR
L3
G1
GND
VDD
SDR
1 mH
SDL
VDD
G1
SDR
VDD
SDL
LM4674TL
SDL
Figure 26. LM4674TL Demo Board Schematic
LM4674TL DEMONSTRATION BOARD LAYOUT
Figure 27. Layer 1
14
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LM4674
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SNAS344E –DECEMBER 2005–REVISED APRIL 2013
Figure 28. Layer 2
Figure 29. Layer 3
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SNAS344E –DECEMBER 2005–REVISED APRIL 2013
www.ti.com
Figure 30. Layer 4
Figure 31. Top Silkscreen
16
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Product Folder Links: LM4674
LM4674
www.ti.com
SNAS344E –DECEMBER 2005–REVISED APRIL 2013
Figure 32. Bottom Silkscreen
LM4674SQ DEMO BOARD SCHEMATIC
Figure 33. LM4674SQ Demo Board Schematic
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LM4674SQ DEMONSTRATION BOARD LAYOUT
Figure 34. Layer 1
Figure 35. Layer 2
Figure 36. Layer 3
18
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LM4674
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SNAS344E –DECEMBER 2005–REVISED APRIL 2013
Figure 37. Top Silkscreen
Figure 38. Bottom Layer
REVISION TABLE
Rev
1.0
1.1
1.2
1.3
1.4
1.5
Date
Description
12/16/06
05/17/06
05/31/06
09/05/06
09/21/06
09/27/06
Initial release.
Added the LLP package.
Added the LLP markings.
Added “No Load” in the Conditions on Av (3.6V table).
Edited graphics (26, 38, 60) and input some text edits.
Edited Figure 1 (page 2), TL and LLP pkg/marking drawings (page 3).
Input text edits.
1.6
1.7
1.8
E
07/13/07
10/30/07
07/02/08
04/05/13
Added the TL and SQ demo boards and schematics diagrams.
Updated the SQ schematic diagram and replaced the demo boards.
Text edits (under SHUTDOWN FUNCTION).
Changed layout of National Data Sheet to TI format.
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM4674SQ/NOPB
LM4674TLX/NOPB
ACTIVE
ACTIVE
WQFN
RGH
YZR
16
16
1000 RoHS & Green
3000 RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
L4674SQ
GG2
DSBGA
SNAGCU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Nov-2021
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM4674SQ/NOPB
LM4674TLX/NOPB
WQFN
RGH
YZR
16
16
1000
3000
178.0
178.0
12.4
8.4
4.3
4.3
1.3
8.0
4.0
12.0
8.0
Q1
Q1
DSBGA
2.08
2.08
0.76
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Nov-2021
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM4674SQ/NOPB
LM4674TLX/NOPB
WQFN
RGH
YZR
16
16
1000
3000
208.0
208.0
191.0
191.0
35.0
35.0
DSBGA
Pack Materials-Page 2
MECHANICAL DATA
YZR0016xxx
D
0.600±0.075
E
TLA16XXX (Rev C)
D: Max = 1.99 mm, Min = 1.93 mm
E: Max = 1.99 mm, Min = 1.93 mm
4215051/A
12/12
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
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