LM4755TSX/NOPB [TI]

LM4755 Stereo 11W Audio Power Amplifier with Mute;
LM4755TSX/NOPB
型号: LM4755TSX/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

LM4755 Stereo 11W Audio Power Amplifier with Mute

放大器 商用集成电路
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LM4755  
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LM4755 Stereo 11W Audio Power Amplifier with Mute  
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1
FEATURES  
DESCRIPTION  
The LM4755 is a stereo audio amplifier capable of  
delivering 11W per channel of continuous average  
output power to a 4load or 7W per channel into 8Ω  
using a single 24V supply at 10% THD+N. The  
internal mute circuit and pre-set gain resistors provide  
for a very economical design solution.  
2
Drives 4and 8Loads  
Integrated Mute Function  
Internal Gain Resistors  
Minimal External Components Needed  
Single Supply Operation  
Output power specifications at both 20V and 24V  
supplies and low external component count offer high  
value to consumer electronic manufacturers for  
stereo TV and compact stereo applications. The  
LM4755 is specifically designed for single supply  
operation.  
Internal Current Limiting and Thermal  
Protection  
Compact 9-lead TO-220 Package  
Wide Supply Range 9V - 40V  
APPLICATIONS  
Stereos TVs  
Compact Stereos  
Mini Component Stereos  
KEY SPECIFICATIONS  
Output Power at 10% THD with 1kHz into 4at  
VCC = 24V 11 W (typ)  
Output Power at 10% THD with 1kHz into 8at  
VCC = 24V 7 W (typ)  
Closed Loop Gain 34 dB (typ)  
PO at 10% THD+N @ 1kHz into 4Single-  
Ended DDPAK Package at VCC=12V 2.5 W (typ)  
PO at 10% THD+N @ 1kHz into 8Bridged  
DDPAK Package at VCC=12V 5 W (typ)  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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TYPICAL APPLICATION  
Figure 1. Typical Audio Amplifier Application Circuit  
Connection Diagram  
9 Pin TO-220  
Plastic Package (Top View)  
See Package Number NEC  
9 Pin DDPAK  
Plastic Package (Top View)  
See Package Number KTW  
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
ABSOLUTE MAXIMUM RATINGS(1)(2)(3)(4)  
Supply Voltage  
40V  
±0.7V  
Input Voltage  
(5)  
Input Voltage at Output Pins  
GND -0.4V  
Internally Limited  
62.5W  
Output Current  
(6)  
Power Dissipation  
(7)  
ESD Susceptibility  
2 kV  
Junction Temperature  
Soldering Information  
Storage Temperature  
150°C  
NEC Package (10 seconds)  
250°C  
40°C to 150°C  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical  
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the  
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication  
of device performance.  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and  
specifications.  
(3) The TO-263 Package is not recommended for VS > 16V due to impractical heatsinking limitations.  
(4) All voltages are measured with respect to the GND pin (5), unless otherwse specified.  
(5) The outputs of the LM4755 cannot be driven externally in any mode with a voltage lower than -0.4V below GND or permanent damage  
to the LM4755 will result.  
(6) For operating at case temperatures above 25°C, the device must be derated based on a 150°C maximum junction temperature and a  
thermal resistance of θJC = 2°C/W (junction to case). Refer to the section DETERMINING MAXIMUM POWER DISSIPATION in the  
APPLICATION INFORMATION section for more information.  
(7) Human body model, 100 pF discharged through a 1.5 kresistor.  
OPERATING RATINGS  
Temperature Range TMIN TA TMAX  
40°C TA +85°C  
9V to 32V  
Supply Voltage  
θJC  
θJA  
2°C/W  
76°C/W  
ELECTRICAL CHARACTERISTICS  
The following specifications apply to each channel with VCC = 24V, TA = 25°C unless otherwise specified.  
LM4755  
Typical(1)  
Units  
(Limits)  
Symbol  
ITOTAL  
Parameter  
Conditions  
Limit  
Total Quiescent Power  
Supply Current  
Mute Off  
Mute On  
10  
15  
7
mA(max)  
mA(min)  
mA  
7
7
PO  
Output Power (Continuous  
Average per Channel)  
f = 1 kHz, THD+N = 10%, RL = 8Ω  
f = 1 kHz, THD+N = 10%, RL = 4Ω  
VS = 20V, RL = 8Ω  
W
11  
4
10  
W(min)  
W
VS = 20V, RL = 4Ω  
7
W
f = 1 kHz, THD+N = 10%, RL = 4Ω  
VS = 12V, DDPAK Pkg.  
2.5  
W
THD  
Total Harmonic Distortion  
Output Swing  
f = 1 kHz, PO = 1 W/ch, RL = 8Ω  
PO = 10W, RL = 8Ω  
0.08  
15  
%
V
VOSW  
PO = 10W, RL = 4Ω  
14  
V
XTALK  
Channel Separation  
See Apps. Circuit (Figure 1)  
f = 1 kHz, VO = 4 Vrms  
55  
dB  
(1) Typicals are measured at 25°C and represent the parametric norm.  
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ELECTRICAL CHARACTERISTICS (continued)  
The following specifications apply to each channel with VCC = 24V, TA = 25°C unless otherwise specified.  
LM4755  
Typical(1)  
Units  
(Limits)  
Symbol  
PSRR  
Parameter  
Conditions  
Limit  
Power Supply Rejection Ratio  
See Apps. Circuit (Figure 1)  
f = 120 Hz, VO = 1 mVrms  
VIN = 0V  
50  
dB  
VODV  
Differential DC Output Offset  
Voltage  
0.09  
0.4  
V(max)  
SR  
Slew Rate  
2
V/µs  
kΩ  
RIN  
Input Impedance  
83  
65  
34  
PBW  
AVCL  
Power Bandwidth  
3 dB BW at PO = 2.5W, RL = 8Ω  
RL = 8Ω  
kHz  
Closed Loop Gain (Internally Set)  
33  
35  
dB(min)  
dB(max)  
mVrms  
εIN  
Noise  
IHF-A Weighting Filter, RL = 8Ω  
0.2  
Output Referred  
IO  
Output Short Circuit Limit  
Mute Low Input Voltage  
VIN = 0.5V, RL = 2Ω  
2
A(min)  
V(max)  
Mute Pin  
VIL  
Not in Mute Mode  
0.8  
VIH  
AM  
Mute High Input Voltage  
Mute Attenuation  
In Mute Mode  
VMUTE = 5.0V  
2.0  
80  
2.5  
V(min)  
dB  
EQUIVALENT SCHEMATIC  
Figure 2.  
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TEST CIRCUIT  
Figure 3. Test Circuit  
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SYSTEM APPLICATION CIRCUIT  
Figure 4. Circuit for External Components Description  
EXTERNAL COMPONENTS DESCRIPTION  
Components  
Function Description  
Provides power supply filtering and bypassing.  
1, 2  
3, 4  
5, 6  
7
CS  
RSN  
CSN  
Cb  
Works with CSN to stabilize the output stage from high frequency oscillations.  
Works with RSN to stabilize the output stage from high frequency oscillations.  
Provides filtering for the internally generated half-supply bias generator.  
8, 9  
Ci  
Input AC coupling capacitor which blocks DC voltage at the amplifier's input terminals. Also creates a high pass  
filter with fc=1/(2 • π • Rin • Cin).  
10, 11  
Co  
Output AC coupling capacitor which blocks DC voltage at the amplifier's output terminal. Creates a high pass filter  
with fc=1/(2 • π • Rout • Cout).  
12, 13  
14  
Ri  
Voltage control - limits the voltage level allowed to the amplifier's input terminals.  
Works with Cm to provide mute function timing.  
Rm  
Cm  
15  
Works with Rm to provide mute function timing.  
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TYPICAL PERFORMANCE CHARACTERISTICS  
Typicals are measured at 25°C and represent the parametric norm.  
THD+N vs Output Power  
THD+N vs Output Power  
Figure 5.  
Figure 6.  
THD+N vs Output Power  
THD+N vs Output Power  
Figure 7.  
Figure 8.  
THD+N vs Output Power  
THD+N vs Output Power  
Figure 9.  
Figure 10.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Typicals are measured at 25°C and represent the parametric norm.  
THD+N vs Output Power  
THD+N vs Output Power  
Figure 11.  
Figure 12.  
THD+N vs Output Power  
THD+N vs Output Power  
Figure 13.  
Figure 14.  
THD+N vs Output Power  
THD+N vs Output Power  
Figure 15.  
Figure 16.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Typicals are measured at 25°C and represent the parametric norm.  
THD+N vs Output Power  
THD+N vs Output Power  
Figure 17.  
Figure 18.  
THD+N vs Output Power  
THD+N vs Output Power  
Figure 19.  
Figure 20.  
THD+N vs Output Power  
THD+N vs Output Power  
Figure 21.  
Figure 22.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Typicals are measured at 25°C and represent the parametric norm.  
THD+N vs Output Power  
THD+N vs Output Power  
Figure 23.  
Figure 24.  
THD+N vs Output Power  
THD+N vs Output Power  
Figure 25.  
Figure 26.  
THD+N vs Output Power  
THD+N vs Output Power  
Figure 27.  
Figure 28.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Typicals are measured at 25°C and represent the parametric norm.  
Output Power vs Supply Voltage  
Output Power vs Supply Voltage  
Figure 29.  
Figure 30.  
Frequency Response  
THD+N vs Frequency  
Figure 31.  
Figure 32.  
THD+N vs Frequency  
Frequency Response  
Figure 33.  
Figure 34.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Typicals are measured at 25°C and represent the parametric norm.  
Channel Separation  
PSRR vs Frequency  
Figure 35.  
Figure 36.  
Supply Current vs Supply Voltage  
Power Derating Curve  
Figure 37.  
Figure 38.  
Power Dissipation vs Output Power  
Power Dissipation vs Output Power  
Figure 39.  
Figure 40.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Typicals are measured at 25°C and represent the parametric norm.  
Power Dissipation vs Output Power  
Power Dissipation vs Output Power  
Figure 41.  
Figure 42.  
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APPLICATION INFORMATION  
The LM4755 contains circuitry to pull down the bias line internally, effectively shutting down the input stage. An  
external R-C should be used to adjust the timing of the pull-down. If the bias line is pulled down too quickly,  
currents induced in the internal bias resistors will cause a momentary DC voltage to appear across the inputs of  
each amplifier's internal differential pair, resulting in an output DC shift towards Vsupply. An R-C timing circuit  
should be used to limit the pull-down time such that output “pops” and signal feedthroughs will be minimized. The  
pull-down timing is a function of a number of factors, including the internal mute circuitry, the voltage used to  
activate the mute, the bias capacitor, the half-supply voltage, and internal resistances used in the half-supply  
generator. Table 1 shows a list of recommended values for the external R-C.  
Table 1. RECOMMENDED VALUES FOR MUTE CIRCUIT  
VMUTE  
5V  
VCC  
12V  
15V  
20V  
24V  
28V  
30V  
Rm  
Cm  
18 kΩ  
18 kΩ  
12 kΩ  
12 kΩ  
8.2 kΩ  
8.2 kΩ  
10 µF  
10 µF  
10 µF  
10 µF  
10 µF  
10 µF  
5V  
5V  
5V  
5V  
5V  
CAPACITOR SELECTION AND FREQUENCY RESPONSE  
With the LM4755, as in all single supply amplifiers, AC coupling capacitors are used to isolate the DC voltage  
present at the inputs (pins 3, 7) and outputs (pins 1, 8). As mentioned earlier in the EXTERNAL COMPONENTS  
DESCRIPTION section these capacitors create high-pass filters with their corresponding input/output  
impedances. The Typical Application Circuit shown in Figure 1 shows input and output capacitors of 0.1 µF and  
1,000 µF respectively. At the input, with an 83 ktypical input resistance, the result is a high pass 3 dB point  
occurring at 19 Hz. There is another high pass filter at 39.8 Hz created with the output load resistance of 4.  
Careful selection of these components is necessary to ensure that the desired frequency response is obtained.  
The Frequency Response curves in the TYPICAL PERFORMANCE CHARACTERISTICS section show how  
different output coupling capacitors affect the low frequency roll-off.  
OPERATING IN BRIDGE-MODE  
Though designed for use as a single-ended amplifier, the LM4755 can be used to drive a load differentially  
(bridge-mode). Due to the low pin count of the package, only the non-inverting inputs are available. An inverted  
signal must be provided to one of the inputs. This can easily be done with the use of an inexpensive op-amp  
configured as a standard inverting amplifier. An LF353 is a good low-cost choice. Care must be taken, however,  
for a bridge-mode amplifier must theoretically dissipate four times the power of a single-ended type. The load  
seen by each amplifier is effectively half that of the actual load being used, thus an amplifier designed to drive a  
4load in single-ended mode should drive an 8load when operating in bridge-mode.  
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Figure 43. Bridge-Mode Application  
Figure 44. THD+N vs POUT for Bridge-Mode Application  
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PREVENTING OSCILLATIONS  
With the integration of the feedback and bias resistors on-chip, the LM4755 fits into a very compact package.  
However, due to the close proximity of the non-inverting input pins to the corresponding output pins, the inputs  
should be AC terminated at all times. If the inputs are left floating, the amplifier will have a positive feedback path  
through high impedance coupling, resulting in a high frequency oscillation. In most applications, this termination  
is typically provided by the previous stage's source impedance. If the application will require an external signal,  
the inputs should be terminated to ground with a resistance of 50 kor less on the AC side of the input coupling  
capacitors.  
UNDERVOLTAGE SHUTDOWN  
If the power supply voltage drops below the minimum operating supply voltage, the internal under-voltage  
detection circuitry pulls down the half-supply bias line, shutting down the preamp section of the LM4755. Due to  
the wide operating supply range of the LM4755, the threshold is set to just under 9V. There may be certain  
applications where a higher threshold voltage is desired. One example is a design requiring a high operating  
supply voltage, with large supply and bias capacitors, and there is little or no other circuitry connected to the  
main power supply rail. In this circuit, when the power is disconnected, the supply and bias capacitors will  
discharge at a slower rate, possibly resulting in audible output distortion as the decaying voltage begins to clip  
the output signal. An external circuit may be used to sense for the desired threshold, and pull the bias line (pin 6)  
to ground to disable the input preamp. Figure 45 shows an example of such a circuit. When the voltage across  
the zener diode drops below its threshold, current flow into the base of Q1 is interrupted. Q2 then turns on,  
discharging the bias capacitor. This discharge rate is governed by several factors, including the bias capacitor  
value, the bias voltage, and the resistor at the emitter of Q2. An equation for approximating the value of the  
emitter discharge resistor, R, is given below:  
R = (0.7v) / (Cb • (VCC/2) / 0.1s)  
(1)  
Note that this is only a linearized approximation based on a discharge time of 0.1s. The circuit should be  
evaluated and adjusted for each application.  
As mentioned earlier in the Built-in Mute Circuit section, when using an external circuit to pull down the bias line,  
the rate of discharge will have an effect on the turn-off induced distortions. Please refer to the Table 1 section for  
more information.  
Figure 45. External Undervoltage Pull-Down  
THERMAL CONSIDERATIONS  
Heat Sinking  
Proper heatsinking is necessary to ensure that the amplifier will function correctly under all operating conditions.  
A heatsink that is too small will cause the die to heat excessively and will result in a degraded output signal as  
the thermal protection circuitry begins to operate.  
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The choice of a heatsink for a given application is dictated by several factors: the maximum power the IC needs  
to dissipate, the worst-case ambient temperature of the circuit, the junction-to-case thermal resistance, and the  
maximum junction temperature of the IC. The heat flow approximation equation used in determining the correct  
heatsink maximum thermal resistance is given below:  
TJ–TA = PDMAX • (θJC + θCS + θSA  
)
where  
PDMAX = maximum power dissipation of the IC  
TJ(°C) = junction temperature of the IC  
TA(°C) = ambient temperature  
θJC(°C/W) = junction-to-case thermal resistance of the IC  
θCS(°C/W) = case-to-heatsink thermal resistance (typically 0.2 to 0.5 °C/W)  
θSA(°C/W) = thermal resistance of heatsink  
(2)  
(3)  
When determining the proper heatsink, the above equation should be re-written as:  
θSA [(TJ–TA) / PDMAX] - θJCθCS  
DDPAK HEATSINKING  
Surface mount applications will be limited by the thermal dissipation properties of printed circuit board area. The  
DDPAK package is not recommended for surface mount applications with VS > 16V due to limited printed circuit  
board area. There are DDPAK package enhancements, such as clip-on heatsinks and heatsinks with adhesives,  
that can be used to improve performance.  
Standard FR-4 single-sided copper clad will have an approximate Thermal resistance (θSA) ranging from:  
1.5 × 1.5 in. sq.  
2 × 2 in. sq.  
20–27°C/W  
16–23°C/W  
(TA=28°C, Sine wave  
testing, 1 oz. Copper)  
The above values for θSA vary widely due to dimensional proportions (i.e. variations in width and length will vary  
θSA).  
For audio applications, where peak power levels are short in duration, this part will perform satisfactory with less  
heatsinking/copper clad area. As with any high power design proper bench testing should be undertaken to  
assure the design can dissipate the required power. Proper bench testing requires attention to worst case  
ambient temperature and air flow. At high power dissipation levels the part will show a tendency to increase  
saturation voltages, thus limiting the undistorted power levels.  
DETERMINING MAXIMUM POWER DISSIPATION  
For a single-ended class AB power amplifier, the theoretical maximum power dissipation point is a function of the  
supply voltage, VS, and the load resistance, RL and is given by the following equation:  
(single channel)  
PDMAX (W) = [VS2 / (2 • π2 • RL)]  
The above equation is for a single channel class-AB power amplifier. For dual amplifiers such as the LM4755,  
the equation for calculating the total maximum power dissipated is:  
(dual channel)  
PDMAX (W) = 2 • [VS2 / (2 • π2 • RL)]  
or  
VS2 / (π2 • RL)  
(Bridged Outputs)  
PDMAX (W) = 4[VS2 / (2π2 • RL)]  
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HEATSINK DESIGN EXAMPLE  
Determine the system parameters:  
VS = 24V  
RL = 4Ω  
Operating Supply Voltage  
Minimum Load Impedance  
TA = 55°C  
Worst Case Ambient Temperature  
Device parameters from the datasheet:  
TJ = 150°C  
Maximum Junction Temperature  
Junction-to-Case Thermal Resistance  
θJC = 2°C/W  
Calculations:  
2 • PDMAX = 2 • [VS2 / 2 • π2 • RL)] = (24V)2 / (2 • π2 • 4) = 14.6W  
θSA [(TJ-TA) / PDMAX] - θJCθCS = [ (150°C - 55°C) / 14.6W] - 2°C/W–0.2°C/W = 4.3°C/W  
Conclusion: Choose a heatsink with θSA 4.3°C/W.  
DDPAK HEATSINK DESIGN EXAMPLES  
Example 1:(Stereo Single-Ended Output)  
Given: TA=30°C  
TJ=150°C  
RL=4Ω  
VS=12V  
θJC=2°C/W  
PDMAX from PD vs PO Graph:  
P
DMAX 3.7W  
(4)  
(5)  
Calculating PDMAX  
:
PDMAX = VCC2/(π2RL) = (12V)2/π2(4)) = 3.65W  
Calculating Heatsink Thermal Resistance:  
θSA < TJ TA / PDMAX − θJC − θCS  
(6)  
(7)  
θSA < 120°C/3.7W 2.0°C/W 0.2°C/W = 30.2°C/W  
Therefore the recommendation is to use 1.5 × 1.5 square inch of single-sided copper clad.  
Example 2:(Stereo Single-Ended Output)  
Given: TA=50°C  
TJ=150°C  
RL=4Ω  
VS=12V  
θJC=2°C/W  
PDMAX from PD vs PO Graph:  
P
DMAX 3.7W  
(8)  
(9)  
Calculating PDMAX  
:
PDMAX = VCC2/(π2RL)= (12V) 2/(π2(4)) = 3.65W  
Calculating Heatsink Thermal Resistance:  
θSA < [(TJ TA) / PDMAX] − θJC − θCS  
(10)  
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θSA < 100°C/3.7W 2.0°C/W 0.2°C/W = 24.8°C/W  
(11)  
Therefore the recommendation is to use 2.0 × 2.0 square inch of single-sided copper clad.  
Example 3:(Bridged Output)  
Given: TA=50°C  
TJ=150°C  
RL=8Ω  
VS=12V  
θJC=2°C/W  
Calculating PDMAX  
:
PDMAX = 4[VCC2/(2π2RL)] = 4(12V)2/(2π2(8)) = 3.65W  
(12)  
Calculating Heatsink Thermal Resistance:  
θSA < [(TJ TA) / PDMAX] − θJC − θCS  
(13)  
(14)  
θSA < 100°C / 3.7W 2.0°C/W 0.2°C/W = 24.8°C/W  
Therefore the recommendation is to use 2.0 × 2.0 square inch of single-sided copper clad.  
LAYOUT AND GROUND RETURNS  
Proper PC board layout is essential for good circuit performance. When laying out a PC board for an audio  
power amplifier, particular attention must be paid to the routing of the output signal ground returns relative to the  
input signal and bias capacitor grounds. To prevent any ground loops, the ground returns for the output signals  
should be routed separately and brought together at the supply ground. The input signal grounds and the bias  
capacitor ground line should also be routed separately. The 0.1 µF high frequency supply bypass capacitor  
should be placed as close as possible to the IC.  
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PC BOARD LAYOUT-COMPOSITE  
Figure 46.  
20  
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PC BOARD LAYOUT-SILK SCREEN  
Figure 47.  
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PC BOARD LAYOUT-SOLDER SIDE  
Figure 48.  
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SNAS010E FEBRUARY 1999REVISED APRIL 2013  
REVISION HISTORY  
Changes from Revision D (April 2013) to Revision E  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 22  
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