LM4835MTEX/NOPB [TI]
IC 2 CHANNEL(S), VOLUME CONTROL CIRCUIT, PDSO28, TSSOP-28, Audio Control IC;
| 型号： | LM4835MTEX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | IC 2 CHANNEL(S), VOLUME CONTROL CIRCUIT, PDSO28, TSSOP-28, Audio Control IC 光电二极管 |
| 文件： | 总29页 (文件大小：948K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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February 2003
LM4835
Stereo 2W Audio Power Amplifiers
with DC Volume Control and Selectable Gain
General Description
Key Specifications
n PO at 1% THD+N
The LM4835 is a monolithic integrated circuit that provides
DC volume control, and stereo bridged audio power amplifi-
ers capable of producing 2W into 4Ω (Note 1) with less than
1.0% THD or 2.2W into 3Ω (Note 2) with less than 1.0%
THD.
n
n
n
into 3Ω (LM4835LQ, LM4835MTE)
into 4Ω (LM4835LQ, LM4835MTE)
into 8Ω (LM4835)
2.2W (typ)
2.0W (typ)
1.1W (typ)
n Single-ended mode - THD+N at 85mW into 32Ω
(typ)
n Shutdown current
1.0%
Boomer® audio integrated circuits were designed specifically
to provide high quality audio while requiring a minimum
amount of external components. The LM4835 incorporates a
DC volume control, stereo bridged audio power amplifiers
and a selectable gain or bass boost, making it optimally
suited for multimedia monitors, portable radios, desktop, and
portable computer applications.
0.7µA (typ)
Features
n PC98 Compliant
n DC Volume Control Interface
n System Beep Detect
n Stereo switchable bridged/single-ended power amplifiers
n Selectable internal/external gain and bass boost
configurable
The LM4835 features an externally controlled, low-power
consumption shutdown mode, and both a power amplifier
and headphone mute for maximum system flexibility and
performance.
Note 1: When properly mounted to the circuit board, the LM4835LQ and
LM4835MTE will deliver 2W into 4Ω. The LM4835MT will deliver 1.1W into
8Ω. See the Application Information section LM4835LQ and for LM4835MTE
usage information.
n “Click and pop” suppression circuitry
n Thermal shutdown protection circuitry
Applications
Note 2: An LM4835LQ and LM4835MTE that have been properly mounted
to the circuit board and forced-air cooled will deliver 2.2W into 3Ω.
n Portable and Desktop Computers
n Multimedia Monitors
n Portable Radios, PDAs, and Portable TVs
Connection Diagrams
LLP Package
TSSOP Package
10013902
Top View
Order Number LM4835MT or LM4835MTE
See NS Package MTC28 for TSSOP
or See NS Package MXA28A for Exposed-DAP TSSOP
10013935
Top View
Order Number LM4835LQ
See NS Package LQA028AA for Exposed-DAP LLP
Boomer® is a registered trademark of NationalSemiconductor Corporation.
© 2003 National Semiconductor Corporation
DS100139
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Block Diagram
10013901
FIGURE 1. LM4835 Block Diagram
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2
Absolute Maximum Ratings (Note 12)
θJC (typ)—LQA028AA
3.0˚C/W
42˚C/W
20˚C/W
80˚C/W
2˚C/W
θJA (typ)—LQA028AA (Note 7)
θJC (typ)—MTC28
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
θJA (typ)—MTC28
Supply Voltage
6.0V
-65˚C to +150˚C
−0.3V to VDD +0.3V
Internally limited
2000V
θJC (typ)—MXA28A
Storage Temperature
Input Voltage
θJA (typ)—MXA28A (Note 4)
θJA (typ)—MXA28A (Note 3)
θJA (typ)—MXA28A (Note 5)
θJA (typ)—MXA28A (Note 6)
41˚C/W
54˚C/W
59˚C/W
93˚C/W
Power Dissipation
ESD Susceptibility (Note 14)
ESD Susceptibility (Note 15)
Junction Temperature
Soldering Information
Small Outline Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
200V
150˚C
Operating Ratings
Temperature Range
TMIN ≤ TA ≤TMAX
Supply Voltage
−40˚C ≤TA ≤ 85˚C
2.7V≤ VDD ≤ 5.5V
215˚C
220˚C
See AN-450 “Surface Mounting and their Effects on
Product Reliability” for other methods of soldering surface
mount devices.
Electrical Characteristics for Entire IC
(Notes 8, 12) The following specifications apply for VDD = 5V unless otherwise noted. Limits apply for TA = 25˚C.
LM4835
Units
(Limits)
Symbol
VDD
Parameter
Supply Voltage
Conditions
Typical
(Note 16)
Limit
(Note 17)
2.7
V (min)
V (max)
mA (max)
µA (max)
V (min)
5.5
IDD
ISD
VIH
VIL
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, IO = 0A
Vpin 2 = VDD
15
30
0.7
2.0
Headphone Sense High Input Voltage
Headphone Sense Low Input Voltage
4
0.8
V (max)
Electrical Characteristics for Volume Attenuators
(Notes 8, 12) The following specifications apply for VDD = 5V. Limits apply for TA = 25˚C.
LM4835
Units
(Limits)
Symbol
CRANGE
AM
Parameter
Attenuator Range
Mute Attenuation
Conditions
Gain with Vpin 7 = 5V
Typical
Limit
(Note 17)
0.5
(Note 16)
0
dB (max)
dB (min)
dB (min)
dB (min)
Attenuation with Vpin 7 = 0V
Vpin 5 = 5V, Bridged Mode
Vpin 5 = 5V, Single-Ended Mode
-81
-88
-88
-80
-80
-80
Electrical Characteristics for Single-Ended Mode Operation
(Notes 8, 12) The following specifications apply for VDD = 5V. Limits apply for TA = 25˚C.
LM4835
Units
(Limits)
Symbol
PO
Parameter
Output Power
Conditions
Typical
(Note 16)
85
Limit
(Note 17)
THD = 1.0%; f = 1kHz; RL = 32Ω
THD = 10%; f = 1 kHz; RL = 32Ω
VOUT = 1VRMS, f=1kHz, RL = 10kΩ,
AVD = 1
mW
mW
%
95
THD+N
PSRR
Total Harmonic Distortion+Noise
Power Supply Rejection Ratio
0.065
CB = 1.0 µF, f =120 Hz,
VRIPPLE = 200 mVrms
58
dB
3
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Electrical Characteristics for Single-Ended Mode Operation (Continued)
(Notes 8, 12) The following specifications apply for VDD = 5V. Limits apply for TA = 25˚C.
LM4835
Units
(Limits)
Symbol
SNR
Xtalk
Parameter
Signal to Noise Ratio
Channel Separation
Conditions
Typical
(Note 16)
102
Limit
(Note 17)
POUT =75 mW, R = 32Ω, A-Wtd
dB
dB
L
Filter
f=1kHz, CB = 1.0 µF
65
Electrical Characteristics for Bridged Mode Operation
(Notes 8, 12) The following specifications apply for VDD = 5V, unless otherwise noted. Limits apply for TA = 25˚C.
LM4835
Units
(Limits)
Symbol
VOS
Parameter
Conditions
Typical
(Note 16)
5
Limit
(Note 17)
30
Output Offset Voltage
Output Power
VIN = 0V
mV (max)
W
PO
THD + N = 1.0%; f=1kHz; RL = 3Ω
(Notes 9, 11)
2.2
THD + N = 1.0%; f=1kHz; RL = 4Ω
(Notes 10, 11)
2
W
THD = 0.5% (max);f = 1 kHz;
RL = 8Ω
1.1
1.0
W (min)
THD+N = 10%;f = 1 kHz; RL = 8Ω
1.5
0.3
W
%
< <
20 kHz,
THD+N
Total Harmonic Distortion+Noise
PO = 1W, 20 Hz
RL = 8Ω, AVD = 2
f
PO = 340 mW, RL = 32Ω
CB = 1.0 µF, f = 120 Hz,
VRIPPLE = 200 mVrms; RL = 8Ω
VDD = 5V, POUT = 1.1W, RL = 8Ω,
A-Wtd Filter
1.0
74
%
PSRR
SNR
Xtalk
Power Supply Rejection Ratio
Signal to Noise Ratio
dB
93
70
dB
dB
Channel Separation
f=1kHz, CB = 1.0 µF
2
Note 3: The θ given is for an MXA28A package whose exposed-DAP is soldered to an exposed 2in piece of 1 ounce printed circuit board copper.
JA
2
Note 4: The θ given is for an MXA28A package whose exposed-DAP is soldered to a 2in piece of 1 ounce printed circuit board copper on a bottom side layer
JA
through 21 8mil vias.
2
Note 5: The θ given is for an MXA28A package whose exposed-DAP is soldered to an exposed 1in piece of 1 ounce printed circuit board copper.
JA
Note 6: The θ given is for an MXA28A package whose exposed-DAP is not soldered to any copper.
JA
2
Note 7: The given θ is for an LM4835 packaged in an LQA24A with the exposed-DAP soldered to an exposed 2in area of 1oz printed circuit board copper.
JA
Note 8: All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical application as shown
in Figure 1.
Note 9: When driving 3Ω loads and operating on a 5V supply, the LM4835MTE must be mounted to the circuit board and forced-air cooled.
Note 10: When driving 4Ω loads and operating on a 5V supply, the LM4835MTE must be mounted to the circuit board.
2
Note 11: When driving a 3Ω or 4Ω loads and operating on a 5V supply, the LM4835LQ must be mounted to the circuit board that has a minimum of 2.5in of
exposed, uninterrupted copper area connected to the LLP package’s exposed DAP.
Note 12: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 13: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
, θ , and the ambient temperature T . The maximum
JA A
JMAX
allowable power dissipation is P
= (T
− T )/θ . For the LM4835LQ and LM4835MT, T
= 150˚C, and the typical junction-to-ambient thermal
DMAX
JMAX
A
JA
JMAX
resistance, when board mounted, is 80˚C/W for the MTC28 package and 42˚C/W for the LM4835LQ package.
Note 14: Human body model, 100pF discharged through a 1.5kΩ resistor.
Note 15: Machine Model, 220pF–240pF discharged through all pins.
Note 16: Typicals are measured at 25˚C and represent the parametric norm.
Note 17: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
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Typical Application
10013903
FIGURE 2. Typical Application Circuit
Truth Table for Logic Inputs (Note 18)
Mute
Mode
HP Sense
DC Vol. Control
Fixed Level
Fixed Level
Adjustable
Adjustable
_
Bridged Output
Vol. Fixed
Muted
Single-Ended Output
0
0
0
0
1
0
0
1
1
X
0
1
0
1
X
_
Vol. Fixed
_
Vol. Changes
Muted
Vol. Changes
Muted
Muted
Note 18: If system beep is detected on the Beep In pin (pin 11), the system beep will be passed through the bridged amplifier regardless of the logic of the Mute
and HP sense pins.
5
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Typical Performance Characteristics
MTE Specific Characteristics
LM4835MTE
LM4835MTE
THD+N vs Output Power
THD+N vs Frequency
10013970
10013971
LM4835MTE
LM4835MTE
THD+N vs Output Power
THD+N vs Frequency
10013972
10013973
LM4835MTE
LM4835MTE (Note 19)
Power Dissipation vs Output Power
Power Derating Curve
10013965
10013964
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Typical Performance Characteristics
MTE Specific Characteristics (Continued)
LM4835LQ
Power Derating Curve
10013982
Note 19: These curves show the thermal dissipation ability of the LM4835MTE at different ambient temperatures given these conditions:
2
2
500LFPM + 2in : The part is soldered to a 2in , 1 oz. copper plane with 500 linear feet per minute of forced-air flow across it.
2
2
2in on bottom: The part is soldered to a 2in , 1oz. copper plane that is on the bottom side of the PC board through 21 8 mil vias.
2
2
2in : The part is soldered to a 2in , 1oz. copper plane.
2
2
1in : The part is soldered to a 1in , 1oz. copper plane.
Not Attached: The part is not soldered down and is not forced-air cooled.
Typical Performance Characteristics
Non-MTE Specific Characteristics
THD+N vs Frequency
THD+N vs Frequency
10013958
10013957
7
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Typical Performance Characteristics
Non-MTE Specific Characteristics (Continued)
THD+N vs Frequency
THD+N vs Frequency
10013914
10013915
THD+N vs Frequency
THD+N vs Frequency
10013917
10013916
THD+N vs Frequency
THD+N vs Frequency
10013918
10013919
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Typical Performance Characteristics
Non-MTE Specific Characteristics (Continued)
THD+N vs Frequency
THD+N vs Frequency
THD+N vs Output Power
THD+N vs Output Power
10013921
10013920
THD+N vs Frequency
10013924
10013922
THD+N vs Output Power
10013925
10013926
9
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Typical Performance Characteristics
Non-MTE Specific Characteristics (Continued)
THD+N vs Output Power
THD+N vs Output Power
10013927
10013928
THD+N vs Output Power
THD+N vs Output Power
10013930
10013929
THD+N vs Output Power
THD+N vs Output Power
10013931
10013932
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Typical Performance Characteristics
Non-MTE Specific Characteristics (Continued)
THD+N vs Output Power
THD+N vs Output Power
10013934
10013933
THD+N vs Output Voltage
Docking Station Pins
THD+N vs Output Voltage
Docking Station Pins
10013959
10013960
11
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Typical Performance Characteristics
Output Power vs
Load Resistance
Output Power vs
Load Resistance
10013962
10013906
Output Power vs
Load Resistance
Power Supply
Rejection Ratio
10013938
10013907
Output Power vs
Load Resistance
Dropout Voltage
10013953
10013908
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Typical Performance Characteristics (Continued)
Noise Floor
Noise Floor
10013941
10013942
Volume Control
Characteristics
Power Dissipation vs
Output Power
10013951
10013910
External Gain/
Bass Boost
Characteristics
Power Dissipation vs
Output Power
10013952
10013961
13
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Typical Performance Characteristics (Continued)
Power Derating Curve
Crosstalk
10013963
10013949
10013954
10013909
Output Power
vs Supply voltage
Crosstalk
10013950
Output Power
vs Supply Voltage
Supply Current
vs Supply Voltage
10013956
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14
highest load dissipation and widest output voltage swing,
PCB traces that connect the output pins to a load must be as
wide as possible.
Application Information
EXPOSED-DAP PACKAGE PCB MOUNTING
CONSIDERATIONS
Poor power supply regulation adversely affects maximum
output power. A poorly regulated supply’s output voltage
decreases with increasing load current. Reduced supply
voltage causes decreased headroom, output signal clipping,
and reduced output power. Even with tightly regulated sup-
plies, trace resistance creates the same effects as poor
supply regulation. Therefore, making the power supply
traces as wide as possible helps maintain full output voltage
swing.
The LM4835’s exposed-DAP (die attach paddle) packages
(MTE and LQ) provide a low thermal resistance between the
die and the PCB to which the part is mounted and soldered.
This allows rapid heat transfer from the die to the surround-
ing PCB copper traces, ground plane and, finally, surround-
ing air. The result is a low voltage audio power amplifier that
produces 2.1W at ≤ 1% THD with a 4Ω load. This high power
is achieved through careful consideration of necessary ther-
mal design. Failing to optimize thermal design may compro-
mise the LM4835’s high power performance and activate
unwanted, though necessary, thermal shutdown protection.
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 2, the LM4835 consists of two pairs of
operational amplifiers, forming a two-channel (channel A and
channel B) stereo amplifier. (Though the following discusses
channel A, it applies equally to channel B.) External resistors
Rf and Ri set the closed-loop gain of Amp1A, whereas two
internal 20kΩ resistors set Amp2A’s gain at −1. The LM4835
drives a load, such as a speaker, connected between the two
amplifier outputs, −OUTA and +OUTA.
The MTE and LQ packages must have their DAPs soldered
to a copper pad on the PCB. The DAP’s PCB copper pad is
connected to a large plane of continuous unbroken copper.
This plane forms a thermal mass and heat sink and radiation
area. Place the heat sink area on either outside plane in the
case of a two-sided PCB, or on an inner layer of a board with
more than two layers. Connect the DAP copper pad to the
inner layer or backside copper heat sink area with 32(4x8)
(MTE) or 6(3x2) (LQ) vias. The via diameter should be
0.012in–0.013in with a 1.27mm pitch. Ensure efficient ther-
mal conductivity by plating-through and solder-filling the
vias.
Figure 2 shows that Amp1A’s output serves as Amp2A’s
input. This results in both amplifiers producing signals iden-
tical in magnitude, but 180˚ out of phase. Taking advantage
of this phase difference, a load is placed between −OUTA
and +OUTA and driven differentially (commonly referred to
as “bridge mode”). This results in a differential gain of
Best thermal performance is achieved with the largest prac-
tical copper heat sink area. If the heatsink and amplifier
share the same PCB layer, a nominal 2.5in2 (min) area is
necessary for 5V operation with a 4Ω load. Heatsink areas
not placed on the same PCB layer as the LM4835 should be
5in2 (min) for the same supply voltage and load resistance.
The last two area recommendations apply for 25˚C ambient
temperature. Increase the area to compensate for ambient
temperatures above 25˚C. In systems using cooling fans, the
LM4835MTE can take advantage of forced air cooling. With
an air flow rate of 450 linear-feet per minute and a 2.5in2
exposed copper or 5.0in2 inner layer copper plane heatsink,
the LM4835MTE can continuously drive a 3Ω load to full
power. The LM4835LQ achieves the same output power
level without forced air cooling. In all circumstances and
conditions, the junction temperature must be held below
150˚C to prevent activating the LM4835’s thermal shutdown
protection. The LM4835’s power de-rating curve in the Typi-
cal Performance Characteristics shows the maximum
power dissipation versus temperature. Example PCB layouts
for the exposed-DAP TSSOP and LQ packages are shown in
the Demonstration Board Layout section. Further detailed
and specific information concerning PCB layout, fabrication,
and mounting an LQ (LLP) package is available in National
Semiconductor’s AN1187.
*
AVD = 2 (Rf / Ri)
(1)
Bridge mode amplifiers are different from single-ended am-
plifiers that drive loads connected between a single amplifi-
er’s output and ground. For a given supply voltage, bridge
mode has a distinct advantage over the single-ended con-
figuration: its differential output doubles the voltage swing
across the load. This produces four times the output power
when compared to a single-ended amplifier under the same
conditions. This increase in attainable output power as-
sumes that the amplifier is not current limited or that the
output signal is not clipped. To ensure minimum output sig-
nal clipping when choosing an amplifier’s closed-loop gain,
refer to the Audio Power Amplifier Design section.
Another advantage of the differential bridge output is no net
DC voltage across the load. This is accomplished by biasing
channel A’s and channel B’s outputs at half-supply. This
eliminates the coupling capacitor that single supply, single-
ended amplifiers require. Eliminating an output coupling ca-
pacitor in a single-ended configuration forces a single-supply
amplifier’s half-supply bias voltage across the load. This
increases internal IC power dissipation and may perma-
nently damage loads such as speakers.
PCB LAYOUT AND SUPPLY REGULATION
CONSIDERATIONS FOR DRIVING 3Ω AND 4Ω LOADS
POWER DISSIPATION
Power dissipation is a major concern when designing a
successful single-ended or bridged amplifier. Equation (2)
states the maximum power dissipation point for a single-
ended amplifier operating at a given supply voltage and
driving a specified output load.
Power dissipated by a load is a function of the voltage swing
across the load and the load’s impedance. As load imped-
ance decreases, load dissipation becomes increasingly de-
pendent on the interconnect (PCB trace and wire) resistance
between the amplifier output pins and the load’s connec-
tions. Residual trace resistance causes a voltage drop,
which results in power dissipated in the trace and not in the
load as desired. For example, 0.1Ω trace resistance reduces
the output power dissipated by a 4Ω load from 2.1W to 2.0W.
This problem of decreased load dissipation is exacerbated
as load impedance decreases. Therefore, to maintain the
2
PDMAX = (VDD
)
/ (2π2RL) Single-Ended
(2)
15
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7106D can also improve power dissipation. When adding a
heat sink, the θJA is the sum of θJC, θCS, and θSA. (θJC is the
junction-to-case thermal impedance, θCS is the case-to-sink
thermal impedance, and θSA is the sink-to-ambient thermal
impedance.) Refer to the Typical Performance Character-
istics curves for power dissipation information at lower out-
put power levels.
Application Information (Continued)
However, a direct consequence of the increased power de-
livered to the load by a bridge amplifier is higher internal
power dissipation for the same conditions.
The LM4835 has two operational amplifiers per channel. The
maximum internal power dissipation per channel operating in
the bridge mode is four times that of a single-ended ampli-
fier. From Equation (3), assuming a 5V power supply and a
4Ω load, the maximum single channel power dissipation is
1.27W or 2.54W for stereo operation.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is
critical for low noise performance and high power supply
rejection. Applications that employ a 5V regulator typically
use a 10µF in parallel with a 0.1µF filter capacitors to stabi-
lize the regulator’s output, reduce noise on the supply line,
and improve the supply’s transient response. However, their
presence does not eliminate the need for a local 1.0µF
tantalum bypass capacitance connected between the
LM4835’s supply pins and ground. Do not substitute a ce-
ramic capacitor for the tantalum. Doing so may cause oscil-
lation. Keep the length of leads and traces that connect
capacitors between the LM4835’s power supply pin and
ground as short as possible. Connecting a 1µF capacitor,
CB, between the BYPASS pin and ground improves the
internal bias voltage’s stability and improves the amplifier’s
PSRR. The PSRR improvements increase as the bypass pin
capacitor value increases. Too large, however, increases
turn-on time and can compromise amplifier’s click and pop
performance. The selection of bypass capacitor values, es-
pecially CB, depends on desired PSRR requirements, click
and pop performance (as explained in the section, Proper
Selection of External Components), system cost, and size
constraints.
2
*
PDMAX = 4 (VDD
)
/ (2π2RL) Bridge Mode
(3)
The LM4835’s power dissipation is twice that given by Equa-
tion (2) or Equation (3) when operating in the single-ended
mode or bridge mode, respectively. Twice the maximum
power dissipation point given by Equation (3) must not ex-
ceed the power dissipation given by Equation (4):
PDMAX' = (TJMAX − TA) / θJA
(4)
The LM4835’s TJMAX = 150˚C. In the LQ package soldered
to a DAP pad that expands to a copper area of 5in2 on a
PCB, the LM4835’s θJA is 20˚C/W. In the MTE package
soldered to a DAP pad that expands to a copper area of 2in2
on a PCB, the LM4835’s θJA is 41˚C/W. At any given ambient
temperature TA, use Equation (4) to find the maximum inter-
nal power dissipation supported by the IC packaging. Rear-
ranging Equation (4) and substituting PDMAX for PDMAX' re-
sults in Equation (5). This equation gives the maximum
ambient temperature that still allows maximum stereo power
dissipation without violating the LM4835’s maximum junction
temperature.
SELECTING PROPER EXTERNAL COMPONENTS
Optimizing the LM4835’s performance requires properly se-
lecting external components. Though the LM4835 operates
well when using external components with wide tolerances,
best performance is achieved by optimizing component val-
ues.
TA = TJMAX – 2*PDMAX θJA
(5)
The LM4835 is unity-gain stable, giving a designer maximum
design flexibility. The gain should be set to no more than a
given application requires. This allows the amplifier to
achieve minimum THD+N and maximum signal-to-noise ra-
tio. These parameters are compromised as the closed-loop
gain increases. However, low gain demands input signals
with greater voltage swings to achieve maximum output
power. Fortunately, many signal sources such as audio
CODECs have outputs of 1VRMS (2.83VP-P). Please refer to
the Audio Power Amplifier Design section for more infor-
mation on selecting the proper gain.
For a typical application with a 5V power supply and an 4Ω
load, the maximum ambient temperature that allows maxi-
mum stereo power dissipation without exceeding the maxi-
mum junction temperature is approximately 99˚C for the LQ
package and 45˚C for the MTE package.
TJMAX = PDMAX θJA + TA
(6)
Equation (6) gives the maximum junction temperature
TJMAX. If the result violates the LM4835’s 150˚C, reduce the
maximum junction temperature by reducing the power sup-
ply voltage or increasing the load resistance. Further allow-
ance should be made for increased ambient temperatures.
Input Capacitor Value Selection
Amplifying the lowest audio frequencies requires high value
input coupling capacitor (0.33µF in Figure 2). A high value
capacitor can be expensive and may compromise space
efficiency in portable designs. In many cases, however, the
speakers used in portable systems, whether internal or ex-
ternal, have little ability to reproduce signals below 150 Hz.
Applications using speakers with this limited frequency re-
sponse reap little improvement by using large input capaci-
tor.
The above examples assume that a device is a surface
mount part operating around the maximum power dissipation
point. Since internal power dissipation is a function of output
power, higher ambient temperatures are allowed as output
power or duty cycle decreases.
If the result of Equation (2) is greater than that of Equation
(3), then decrease the supply voltage, increase the load
impedance, or reduce the ambient temperature. If these
measures are insufficient, a heat sink can be added to
reduce θJA. The heat sink can be created using additional
copper area around the package, with connections to the
ground pin(s), supply pin and amplifier output pins. External,
solder attached SMT heatsinks such as the Thermalloy
Besides effecting system cost and size, the input coupling
capacitor has an affect on the LM4835’s click and pop per-
formance. When the supply voltage is first applied, a tran-
sient (pop) is created as the charge on the input capacitor
changes from zero to a quiescent state. The magnitude of
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16
mode, an external 1kΩ–5kΩ resistor can be placed in par-
allel with the internal 20kΩ resistor. The tradeoff for using
this resistor is increased quiescent current.
Application Information (Continued)
the pop is directly proportional to the input capacitor’s size.
Higher value capacitors need more time to reach a quiescent
DC voltage (usually VDD/2) when charged with a fixed cur-
rent. The amplifier’s output charges the input capacitor
through the feedback resistor, Rf. Thus, pops can be mini-
mized by selecting an input capacitor value that is no higher
than necessary to meet the desired −3dB frequency.
A shown in Figure 2, the input resistor (20kΩ) and the input
capacitor produce a −3dB high pass filter cutoff frequency
that is found using Equation (7).
(7)
As an example when using a speaker with a low frequency
limit of 150Hz, the input coupling capacitor, using Equation
(7), is 0.063µF. The 0.33µF input coupling capacitor shown
in Figure 2 allows the LM4835 to drive high efficiency, full
range speaker whose response extends below 30Hz.
10013905
FIGURE 3. Resistor for Varying Output Loads
OPTIMIZING CLICK AND POP REDUCTION
PERFORMANCE
DOCKING STATION INTERFACE
The LM4835 contains circuitry that minimizes turn-on and
shutdown transients or “clicks and pop”. For this discussion,
turn-on refers to either applying the power supply voltage or
when the shutdown mode is deactivated. While the power
supply is ramping to its final value, the LM4835’s internal
amplifiers are configured as unity gain buffers. An internal
current source changes the voltage of the BYPASS pin in a
controlled, linear manner. Ideally, the input and outputs track
the voltage applied to the BYPASS pin. The gain of the
internal amplifiers remains unity until the voltage on the
bypass pin reaches 1/2 VDD. As soon as the voltage on the
bypass pin is stable, the device becomes fully operational.
Although the BYPASS pin current cannot be modified,
changing the size of CB alters the device’s turn-on time and
the magnitude of “clicks and pops”. Increasing the value of
CB reduces the magnitude of turn-on pops. However, this
presents a tradeoff: as the size of CB increases, the turn-on
time increases. There is a linear relationship between the
size of CB and the turn-on time. Here are some typical
turn-on times for various values of CB:
Applications such as notebook computers can take advan-
tage of a docking station to connect to external devices such
as monitors or audio/visual equipment that sends or receives
line level signals. The LM4835 has two outputs, Pin 9 and
Pin 13, which connect to outputs of the internal input ampli-
fiers that drive the volume control inputs. These input ampli-
>
fiers can drive loads of 1kΩ (such as powered speakers)
with a rail-to-rail signal. Since the output signal present on
the RIGHT DOCK and LEFT DOCK pins is biased to VDD/2,
coupling capacitors should be connected in series with the
load. Typical values for the coupling capacitors are 0.33µF to
1.0µF. If polarized coupling capacitors are used, connect
their "+" terminals to the respective output pin.
Since the DOCK outputs precede the internal volume con-
trol, the signal amplitude will be equal to the input signal’s
magnitude and cannot be adjusted. However, the input am-
plifier’s closed-loop gain can be adjusted using external
resistors. These resistors are shown in Figure 2 as 20kΩ
devices that set each input amplifier’s gain to -1. Use Equa-
tion 8 to determine the input and feedback resistor values for
a desired gain.
CB
TON
2ms
- Av = RF / Ri
(8)
0.01µF
0.1µF
0.22µF
0.47µF
1.0µF
20ms
44ms
Adjusting the input amplifier’s gain sets the minimum gain for
that channel. The DOCK outputs adds circuit and functional
flexibility because their use supercedes using the inverting
outputs of each bridged output amplifier as line-level out-
puts.
94ms
200ms
In order eliminate “clicks and pops”, all capacitors must be
discharged before turn-on. Rapidly switching VDD may not
allow the capacitors to fully discharge, which may cause
“clicks and pops”. In a single-ended configuration, the output
is coupled to the load by COUT. This capacitor usually has a
high value. COUT discharges through internal 20kΩ resistors.
Depending on the size of COUT, the discharge time constant
can be relatively large. To reduce transients in single-ended
BEEP DETECT FUNCTION
Computers and notebooks produce a system “beep“ signal
that drives a small speaker. The speaker’s auditory output
signifies that the system requires user attention or input. To
accommodate this system alert signal, the LM4835’s pin 11
is a mono input that accepts the beep signal. Internal level
detection circuitry at this input monitors the beep signal’s
magnitude. When a signal level greater than VDD/2 is de-
17
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shutdown current is achieved by applying a voltage that is as
near as VDD as possible to the SHUTDOWN pin. A voltage
that is less than VDD may increase the shutdown current.
Table 1 shows the logic signal levels that activate and deac-
tivate micro-power shutdown and headphone amplifier op-
eration.
Application Information (Continued)
tected on pin 11, the bridge output amplifiers are enabled.
The beep signal is amplified and applied to the load con-
nected to the output amplifiers. A valid beep signal will be
applied to the load even when MUTE is active. Use the input
resistors connected between the BEEP IN pin and the stereo
input pins to accommodate different beep signal amplitudes.
These resistors are shown as 200kΩ devices in Figure 2.
Use higher value resistors to reduce the gain applied to the
beep signal. The resistors must be used to pass the beep
signal to the stereo inputs. The BEEP IN pin is used only to
detect the beep signal’s magnitude: it does not pass the
signal to the output amplifiers. The LM4835’s shutdown
mode must be deactivated before a system alert signal is
applied to BEEP IN pin.
There are a few ways to control the micro-power shutdown.
These include using a single-pole, single-throw switch, a
microprocessor, or a microcontroller. When using a switch,
connect an external 10kΩ pull-up resistor between the
SHUTDOWN pin and VDD. Connect the switch between the
SHUTDOWN pin and ground. Select normal amplifier opera-
tion by closing the switch. Opening the switch connects the
SHUTDOWN pin to VDD through the pull-up resistor, activat-
ing micro-power shutdown. The switch and resistor guaran-
tee that the SHUTDOWN pin will not float. This prevents
unwanted state changes. In a system with a microprocessor
or a microcontroller, use a digital output to apply the control
voltage to the SHUTDOWN pin. Driving the SHUTDOWN pin
with active circuitry eliminates the pull up resistor.
MICRO-POWER SHUTDOWN
The voltage applied to the SHUTDOWN pin controls the
LM4835’s shutdown function. Activate micro-power shut-
down by applying VDD to the SHUTDOWN pin. When active,
the LM4835’s micro-power shutdown feature turns off the
amplifier’s bias circuitry, reducing the supply current. The
logic threshold is typically VDD/2. The low 0.7µA typical
TABLE 1. Logic Level Truth Table for SHUTDOWN, HP-IN, and MUX Operation
SHUTDOWN HP-IN PIN MUX CHANNEL OPERATIONAL MODE
PIN
SELECT PIN
Logic Low
Logic High
Logic Low
Logic High
X
(MUX INPUT CHANNEL #)
Bridged Amplifiers (1)
Logic Low
Logic Low
Logic Low
Logic Low
Logic High
Logic Low
Logic Low
Logic High
Logic High
X
Bridged Amplifiers (2)
Single-Ended Amplifiers (1)
Single-Ended Amplifiers (2)
Micro-Power Shutdown
MODE FUNCTION
The LM4835’s MODE function has two states controlled by
the voltage applied to the MODE pin (pin 4). Mode 0, se-
lected by applying 0V to the MODE pin, forces the LM4835
to effectively function as a "line-out," unity-gain amplifier.
Mode 1, which uses the internal DC controlled volume con-
trol, is selected by applying VDD to the MODE pin. This mode
sets the amplifier’s gain according to the DC voltage applied
to the DC VOL CONTROL pin. Prevent unanticipated gain
behavior by connecting the MODE pin to VDD or ground. Do
not let pin 4 float.
MUTE FUNCTION
The LM4835 mutes the amplifier and DOCK outputs when
VDD is applied to pin 5, the MUTE pin. Even while muted, the
LM4835 will amplify a system alert (beep) signal whose
magnitude satisfies the BEEP DETECT circuitry. Applying
0V to the MUTE pin returns the LM4835 to normal, unmated
operation. Prevent unanticipated mute behavior by connect-
ing the MUTE pin to VDD or ground. Do not let pin 5 float.
10013904
FIGURE 4. Headphone Sensing Circuit
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18
Application Information (Continued)
HP-IN FUNCTION
Applying a voltage between 4V and VDD to the LM4835’s
HP-IN headphone control pin turns off Amp2A and Amp2B,
muting a bridged-connected load. Quiescent current con-
sumption is reduced when the IC is in this single-ended
mode.
Figure 4 shows the implementation of the LM4835’s head-
phone control function. With no headphones connected to
the headphone jack, the R1-R2 voltage divider sets the
voltage applied to the HP-IN pin (pin 16) at approximately
50mV. This 50mV enables Amp1B and Amp2B, placing the
LM4835 in bridged mode operation. The output coupling
capacitor blocks the amplifier’s half supply DC voltage, pro-
tecting the headphones.
10013911
The HP-IN threshold is set at 4V. While the LM4835 operates
in bridged mode, the DC potential across the load is essen-
tially 0V. Therefore, even in an ideal situation, the output
swing cannot cause a false single-ended trigger. Connecting
headphones to the headphone jack disconnects the head-
phone jack contact pin from −OUTA and allows R1 to pull the
HP Sense pin up to VDD. This enables the headphone func-
tion, turns off Amp2A and Amp2B, and mutes the bridged
speaker. The amplifier then drives the headphones, whose
impedance is in parallel with resistor R2 and R3. These
resistors have negligible effect on the LM4835’s output drive
capability since the typical impedance of headphones is
32Ω.
Figure 4 also shows the suggested headphone jack electri-
cal connections. The jack is designed to mate with a three-
wire plug. The plug’s tip and ring should each carry one of
the two stereo output signals, whereas the sleeve should
carry the ground return. A headphone jack with one control
pin contact is sufficient to drive the HP-IN pin when connect-
ing headphones.
At low, frequencies CLFE is a virtual open circuit and at high
frequencies, its nearly zero ohm impedance shorts RLFE
.
The result is increased bridge-amplifier gain at low frequen-
cies. The combination of RLFE and CLFE form with a -3dB
corner frequency at
FIGURE 5. Figure 5. Low Frequency Enhancement
fC = 1 / (2πRLFE
C
)
(9)
LFE
The bridged-amplifier low frequency differential gain is:
AVD = 2(RF + RLFE) / Ri
(10)
Using the component values shown in Figure 1 (RF = 20kΩ,
RLFE = 20kΩ, and CLFE = 0.068µF), a first-order, -3dB pole is
created at 120Hz. Assuming R = 20kΩ, the low frequency
i
A microprocessor or a switch can replace the headphone
jack contact pin. When a microprocessor or switch applies a
voltage greater than 4V to the HP-IN pin, a bridge-connected
speaker is muted and Amp1A and Amp2A drive a pair of
headphones.
differential gain is 4. The input (Ci) and output (CO) capacitor
values must be selected for a low frequency response that
covers the range of frequencies affected by the desired
bass-boost operation.
DC VOLUME CONTROL
GAIN SELECT FUNCTION (Bass Boost)
The LM4835 has an internal stereo volume control whose
setting is a function of the DC voltage applied to the DC VOL
CONTROL pin. The volume control’s voltage input range is
0V to VDD. The volume range is from 0dB (DC control
voltage = 80% VDD) to -80dB (DC control voltage = 0V). The
volume remains at 0dB for DC control voltages greater than
80% VDD. When the MODE input is 0V, the LM4835 oper-
ates at unity gain, bypassing the volume control. A graph
showing a typical volume response versus DC control volt-
age is shown in the Typical Performance Characteristics
section.
The LM4835 features selectable gain, using either internal
and external feedback resistors. Either set of feedback re-
sistors set the gain of the output amplifiers. The voltage
applied to pin 3 (GAIN SELECT pin) controls which gain is
selected. Applying VDD to the GAIN SELECT pin selects the
external gain mode. Applying 0V to the GAIN SELECT pin
selects the internally set unity gain.
In some cases a designer may want to improve the low
frequency response of the bridged amplifier or incorporate a
bass boost feature. This bass boost can be useful in systems
where speakers are housed in small enclosures. A resistor,
RLFE, and a capacitor, CLFE, in parallel, can be placed in
series with the feedback resistor of the bridged amplifier as
seen in Figure 5.
Like all volume controls, the LM4835’s internal volume con-
trol is set while listening to an amplified signal that is applied
to an external speaker. The actual voltage applied to the DC
VOL CONTROL pin is a result of the volume a listener
desires. As such, the volume control is designed for use in a
feedback system that includes human ears and preferences.
This feedback system operates quite well without the need
for accurate gain. The user simply sets the volume to the
desired level as determined by their ear, without regard to
the actual DC voltage that produces the volume. Therefore,
the accuracy of the volume control is not critical, as long as
the volume changes monotonically, matches well between
19
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The amplifier’s overall gain is set using the input (Ri) and
feedback (Ri) resistors. With the desired input impedance
set at 20kΩ, the feedback resistor is found using Equation
(14).
Application Information (Continued)
stereo channels, and the step size is small enough to reach
a desired volume that is not too loud or too soft. Since gain
accuracy is not critical, there will be volume variation from
part-to-part even with the same applied DC control voltage.
The gain of a given LM4835 can be set with a fixed external
voltage, but another LM4835 may require a different control
voltage to achieve the same gain. The typical part-to-part
variation can be as large as 8dB for the same control volt-
age.
Rf / Ri = AVD / 2
The value of Rf is 30kΩ.
(14)
The last step in this design example is setting the amplifier’s
−3dB frequency bandwidth. To achieve the desired 0.25dB
pass band magnitude variation limit, the low frequency re-
sponse must extend to at least one-fifth the lower bandwidth
limit and the high frequency response must extend to at least
five times the upper bandwidth limit. The gain variation for
both response limits is 0.17dB, well within the 0.25dB
desired limit. The results are an
AUDIO POWER AMPLIFIER DESIGN
Audio Amplifier Design: Driving 1W into an 8Ω Load
The following are the desired operational parameters:
Power Output:
Load Impedance:
Input Level:
1 WRMS
8Ω
1 VRMS
Input Impedance:
Bandwidth:
20 kΩ
fL = 100Hz / 5 = 20Hz
(15)
100 Hz−20 kHz 0.25 dB
and an
The design begins by specifying the minimum supply voltage
necessary to obtain the specified output power. One way to
find the minimum supply voltage is to use the Output Power
vs Supply Voltage curve in the Typical Performance Char-
acteristics section. Another way, using Equation (10), is to
calculate the peak output voltage necessary to achieve the
desired output power for a given load impedance. To ac-
count for the amplifier’s dropout voltage, two additional volt-
ages, based on the Dropout Voltage vs Supply Voltage in the
Typical Performance Characteristics curves, must be
added to the result obtained by Equation (11). The result is
Equation (12).
fH = 20kHz x 5 = 100kHz
(16)
As mentioned in the Selecting Proper External Compo-
nents section, Ri and Ci create a highpass filter that sets the
amplifier’s lower bandpass frequency limit. Find the input
coupling capacitor’s value using Equation (17).
Ci≥ 1 / (2πRifL)
(17)
The result is
*
*
1 / (2π 20kΩ 20Hz) = 0.397µF
(18)
(11)
Use a 0.39µF capacitor, the closest standard value.
VDD ≥ (VOUTPEAK+ (VOD
+ VODBOT))
(12)
The product of the desired high frequency cutoff (100kHz in
this example) and the differential gain AVD, determines the
TOP
upper passband response limit. With AVD = 3 and fH
=
The Output Power vs Supply Voltage graph for an 8Ω load
indicates a minimum supply voltage of 4.6V. This is easily
met by the commonly used 5V supply voltage. The additional
voltage creates the benefit of headroom, allowing the
LM4835 to produce peak output power in excess of 1W
without clipping or other audible distortion. The choice of
supply voltage must also not create a situation that violates
of maximum power dissipation as explained above in the
Power Dissipation section.
100kHz, the closed-loop gain bandwidth product (GBWP) is
300kHz. This is less than the LM4835’s 3.5MHz GBWP. With
this margin, the amplifier can be used in designs that require
more differential gain while avoiding performance,restricting
bandwidth limitations.
RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT
Figure (6) through (10) show the recommended four-layer
PC board layout that is optimized for the 24-pin LQ-
packaged LM4835 and associated external components.
This circuit is designed for use with an external 5V supply
and 4Ω speakers.
After satisfying the LM4835’s power dissipation require-
ments, the minimum differential gain needed to achieve 1W
dissipation in an 8Ω load is found using Equation (13).
This circuit board is easy to use. Apply 5V and ground to the
board’s VDD and GND pads, respectively. Connect 4Ω
speakers between the board’s −OUTA and +OUTA and
OUTB and +OUTB pads.
(13)
Thus, a minimum gain of 2.83 allows the LM4835’s to reach
full output swing and maintain low noise and THD+N perfor-
mance. For this example, let AVD = 3.
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20
Application Information (Continued)
10013977
FIGURE 6. Recommended LQ PC Board Layout:
Component-Side Silkscreen
10013978
FIGURE 7. Recommended LQ PC Board Layout:
Component-Side Layout
21
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Application Information (Continued)
10013979
FIGURE 8. Recommended LQ PC Board Layout:
Upper Inner-Layer Layout
10013980
FIGURE 9. Recommended LQ PC Board Layout:
Lower Inner-Layer Layout
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22
Application Information (Continued)
10013981
FIGURE 10. Recommended LQ PC Board Layout:
Bottom-Side Layout
23
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LM4835 MDC MWC
Stereo 2W Audio Power Amplifier with DC Volume Control and Selectable
Gain
10013983
Die Layout (A - Step)
DIE/WAFER CHARACTERISTICS
Fabrication Attributes
General Die Information
Physical Die Identification
LM4835A
A
Bond Pad Opening Size
104µm x 104µm
(min)
Die Step
Bond Pad Metalization
Passivation
ALUMINUM
Physical Attributes
NITRIDE OVER
PASSIVATION OXIDE
BARE BACK
Wafer Diameter
150mm
Back Side Metal
Dise Size (Drawn)
2578µm x 2438µm Back Side Connection
Floating
101.5mils x
96.0mils
Thickness
Min Pitch
254µm Nominal
145µm Nominal
Special Assembly Requirements:
Note: Actual die size is rounded to the nearest micron.
Die Bond Pad Coordinate Locations (A - Step)
(Referenced to die center, coordinates in µm) NC = No Connection, N.U. = Not Used
X/Y COORDINATES
PAD SIZE
SIGNAL NAME PAD# NUMBER
X
Y
X
Y
Right Out +
GND
1
2
-245
1093
1093
1093
1093
835
212
212
104
104
104
104
104
104
104
104
104
104
104
104
x
x
x
x
x
x
x
x
x
x
x
x
x
x
104
104
104
104
104
104
104
104
212
104
104
104
104
104
-505
SHUT DOWN
Gain Select
Mode
3
-791
4
-936
5
-1162
-1162
-1162
-1162
-1162
-1162
-1162
-1162
-936
Mute
6
690
VDD
7
340
DC Vol
8
101
GND
9
-186
-385
-618
-850
-1093
-1093
Right Dock
Right In
Beep In
Left In
10
11
12
13
14
Left Dock
-791
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24
LM4835 MDC MWC
Stereo 2W Audio Power Amplifier with DC Volume Control and Selectable
Gain (Continued)
GND
15
16
17
18
19
20
21
22
23
24
25
26
27
28
-505
-245
192
-1093
-1093
-1093
-1093
-1093
-854
-654
-454
449
212
212
212
212
104
104
104
104
104
104
104
104
212
212
x
x
x
x
x
x
x
x
x
x
x
x
x
x
104
104
104
104
104
104
212
104
104
212
104
104
104
104
Left Out +
VDD
Left Out -
Left Gain 2
Left Gain 1
GND
660
859
1162
1162
1162
1162
1162
1162
859
HP Sense
Bypass
GND
649
Right Gain 1
Right Gain 2
Right Out -
VDD
849
1093
1093
1093
660
192
IN U.S.A
Tel #:
Fax:
1 877 Dial Die 1 877 342 5343
1 207 541 6140
IN EUROPE
Tel:
49 (0) 8141 351492 / 1495
49 (0) 8141 351470
Fax:
IN ASIA PACIFIC
Tel:
(852) 27371701
81 043 299 2308
IN JAPAN
Tel:
25
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Physical Dimensions inches (millimeters) unless otherwise noted
LLP Package
Order Number LM4835LQ
NS Package Number LQA028A For Exposed-DAP LLP
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26
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
TSSOP Package
Order Number LM4835MT
NS Package Number MTC28 for TSSOP
Exposed-DAP TSSOP Package
Order Number LM4835MTE
NS Package Number MXA28A for Exposed-DAP TSSOP
27
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Notes
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
National Semiconductor
Americas Customer
Support Center
National Semiconductor
Europe Customer Support Center
Fax: +49 (0) 180-530 85 86
National Semiconductor
Asia Pacific Customer
Support Center
National Semiconductor
Japan Customer Support Center
Fax: 81-3-5639-7507
Email: new.feedback@nsc.com
Tel: 1-800-272-9959
Email: europe.support@nsc.com
Deutsch Tel: +49 (0) 69 9508 6208
English Tel: +44 (0) 870 24 0 2171
Français Tel: +33 (0) 1 41 91 8790
Fax: 65-6250 4466
Email: ap.support@nsc.com
Tel: 65-6254 4466
Email: nsj.crc@jksmtp.nsc.com
Tel: 81-3-5639-7560
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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