LM4893MM/NOPB [TI]
IC 1.1 W, 1 CHANNEL, AUDIO AMPLIFIER, PDSO10, MSOP-10, Audio/Video Amplifier;
| 型号： | LM4893MM/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | IC 1.1 W, 1 CHANNEL, AUDIO AMPLIFIER, PDSO10, MSOP-10, Audio/Video Amplifier 放大器 光电二极管 商用集成电路 |
| 文件： | 总26页 (文件大小：715K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM4893
LM4893 1.1 Watt Audio Power Amplifier
Literature Number: SNAS159D
OBSOLETE
LM4893
October 5, 2011
1.1 Watt Audio Power Amplifier
General Description
Key Specifications
The LM4893 is an audio power amplifier primarily designed
for demanding applications in mobile phones and other
portable communication device applications. It is capable of
delivering 1.1 watt of continuous average power to an 8Ω BTL
load with less than 1% distortion (THD+N) from a 5VDC power
supply.
■ꢀImproved PSRR at 5V, 3V, & 217Hz
■ꢀHigher Power Output at 5V & 1% THD
■ꢀHigher Power Output at 3V & 1% THD
■ꢀShutdown Current
62dB (typ)
1.1W (typ)
350mW (typ)
0.1µA (typ)
Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. The LM4893 does not require output
coupling capacitors or bootstrap capacitors, and therefore is
ideally suited for lower-power portable applications where
minimal space and power consumption are primary require-
ments.
Features
■
No output coug cacitors, snubber networks or
bootstrap capacequir
Unity gain able
■
■
■
■
■
Ultra loent shutdown mode
Instanneoun-on time
The LM4893 features a low-power consumption global shut-
down mode, which is achieved by driving the shutdown pin
with logic low. Additionally, the LM4893 features an internal
thermal shutdown protection mechanism.
BToutput can de capacitive loads up to 100pF
vanpop & click circuitry eliminates noises during
and n-off transitions
The LM4893 contains advanced pop & click circuitry which
eliminates noises which would otherwise occur during turn-on
and turn-off transitions.
2.2V 5peration
■
■
Available n space-saving µSMD, SO, and MSOP
packaes
The LM4893 is unity-gain stable and can be configured by
external gain-setting resistors.
Aplications
Mobile Phones
■
PDAs
Portable electronic devices
Typical Application
20038001
FIGURE 1. Typical Audio Amplifier Application Circuit
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2011 National Semiconductor Corporation
200380
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200380 Version 5 Revision 8 Print Date/Time: 2011/10/05 07:43:13
9 Bump micro SMD Marking
Connection Diagrams
9 Bump micro SMD
20038087
Top View
X - Date Code
T - Die Traceability
G - Boomer Family
93 - LM4893ITL
SO Marking
20038086
Top View
Order Number LM4893ITL, LM4893ITLX
See NS Package Number TLA09AAA
Small Outline (SO) Package
20038092
p View
XY - Date Code
TT - Die Traceability
Bm 2 lines - Part Number
MSOP Marking
20038091
Top View
Order Number LM4893MA
See NS package Number M08A
20038085
Mini Small Outline (MSOP) Package
Top View
G - Boomer Family
93 - LM4893MM
Top V
NC = N
Order NumM
See NS PackagB10A
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180°C/W (Note 10)
56°C/W
ꢁθJA (TLA09AAA)
ꢁθJC (MUB10A)
ꢁθJA (MUB10A)
ꢁθJC (M08A)
Absolute Maximum Ratings (Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
190°C/W
35°C/W
Supply Voltage (Note 9)
Storage Temperature
Input Voltage
6.0V
−65°C to +150°C
−0.3V to VDD +0.3V
Internally Limited
2000V
150°C/W
ꢁθJA (M08A)
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
Supply Voltage
Power Dissipation (Note 3)
ESD Susceptibility (Note 4)
ESD Susceptibility (Note 5)
Junction Temperature
Thermal Resistance
−40°C ≤ TA ≤ 85°C
2.2V ≤ VDD ≤ 5.5V
200V
150°C
Electrical Characteristics VDD = 5V (Note 1, Note 2)
The following specifications apply for the circuit shown in Figure 1 unless otherwise speied. Limits apply for TA = 25°C.
LM4893
pica
Limit
Units
(Limits)
Symbol
Parameter
Conditions
(N)
(Note 7)
(Note 8)
IDD
Quiescent Power Supply Current
Shutdown Current
5
10
2.0
40
mA (max)
µA (max)
mV (max)
W (min)
%
VIN = 0V, 8Ω BTL
ISD
Vshutdown = GND
0.1
5
VOS
Po
Output Offset Voltage
Output Power
THD = 1% (max); f = 1kH
Po = 0.4Wrms; = 1kHz
1.1
0.1
0.9
THD+N
Total Harmonic Distortion+Noise
Vripple = 200mVs-p, C1.0µF 68 (f = 1kHz)
PSRR
Power Supply Rejection Ratio
55
dB (min)
62 (f = 217Hz)
Input termied with to ground
VSDIH
VSDIL
Shutdown High Input Voltage
Shutdown Low Input Voltage
1.4
0.4
V (min)
V (max)
-Weighted; Measured across 8Ω
NOUT
µVRMS
Output Noise
26
Input ternated with 10Ω to ground
Electrical Characteris= 3.0V (Note 1, Note 2)
The following specifications apply for the own in Figure 1 unless otherwise specified. Limits apply for TA = 25°C.
LM4893
Typical
Limit
Units
(Limits)
Symbol
Para
Conditions
(Note 6)
(Note 7)
(Note 8)
IDD
Quiescent Power Supply Current
Shutdown Current
4.5
0.1
5
9
mA (max)
µA (max)
mV (max)
mW
VIN = 0V, 8Ω BTL
ISD
Vshutdown = GND
2.0
40
VOS
Po
Output Offset Voltage
Output Power
THD = 1% (max); f = 1kHz
Po = 0.15Wrms; f = 1kHz
350
0.1
320
THD+N
Total Harmonic Distortion+Noise
%
Vripple = 200mVsine p-p, CB = 1.0µF 68 (f = 1kHz)
PSRR
Power Supply Rejection Ratio
55
dB (min)
62 (f = 217Hz)
Input terminated with 10Ω to ground
VSDIH
VSDIL
Shutdown High Input Voltage
Shutdown Low Input Voltage
1.4
0.4
V (min)
V (max)
A-Weighted; Measured across 8Ω
BTL
NOUT
µVRMS
Output Noise
26
Input terminated with 10Ω to ground
3
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Electrical Characteristics VDD = 2.6V (Note 1, Note 2)
The following specifications apply for the circuit shown in Figure 1 unless otherwise specified. Limits apply for TA = 25°C.
LM4893
Typical
Limit
Units
(Limits)
Symbol
Parameter
Conditions
(Note 6)
(Note 7)
(Note 8)
IDD
Quiescent Power Supply Current
Shutdown Current
3.5
0.1
5
mA
µA
VIN = 0V, 8Ω BTL
ISD
Vshutdown = GND
VOS
Output Offset Voltage
mV
THD = 1% (max); f = 1kHz
RL = 8Ω
250
350
0.1
Po
Output Power
mW
%
RL = 4Ω
THD+N
PSRR
Total Harmonic Distortion+Noise
Power Supply Rejection Ratio
Po = 0.1Wrms; f = 1kHz
Vripple = 200mVsine p-p, CB = 1.0µF 5 (f 1kHz)
dB
(217)
Input terminated with 10Ω to ground
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may oating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state Dand Atrical specifications under particular test conditions
which guarantee specific performance limits. This assumes that the device is within the Orating Ratingcifications are not guaranteed for parameters
where no limit is given, however, the typical value is a good indication of device performe.
Note 3: The maximum power dissipation must be derated at elevated temperatures andictaby TJMAX, θJA, and the ambient temperature TA. The maximum
allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Ratinwhichever is lower. For the LM4893, see power derating
curves for additional information.
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 5: Machine Model, 220pF–240pF discharged through all pins.
Note 6: Typicals are measured at 25°C and represent the parametric norm.
Note 7: Limits are guaranteed to National's AOQL (Average Outgoing QLevel)
Note 8: For micro SMD only, shutdown current is measured in a Novironment. Exposure to direct sunlight will increase ISD by a maximum of 2µA.
Note 9: If the product is in shutdown mode, and VDD exceeds 6V D), then most of the excess current will flow through the ESD protection
circuits. If the source impedance limits the current to a max of 10mae protected. If the part is enabled when VDD is above 6V, circuit performance
will be curtailed or the part may be permanently damaged.
Note 10: All bumps have the same thermal resistance anntribute equwhen used to lower thermal resistance.
Note 11: Maximum power dissipation (PDMAX) in the devoccun output power level significantly below full output power. PDMAX can be calculated using
Equation 1 shown in the Application section. It may also d the power dissipation graphs.
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External Components Description
(Figure 1)
Components
Functional Description
1.
2.
Ri
Ci
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a high
pass filter with Ci at fC= 1/(2π RiCi).
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a highpass filter
with Ri at fc = 1/(2π RiCi). Refer to the section, Proper Selection of External Components, for an explanation of
how to determine the value of Ci.
3.
4.
Rf
Feedback resistance which sets the closed-loop gain in conjunction with Ri.
CS
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing section for
information concerning proper placement and selection of the supply bypass capacitor.
5.
CB
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB.
5
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Typical Performance Characteristics
THD+N vs Frequency
at VDD = 5V, 8Ω RL, and PWR = 250mW
THD+N vs Frequency
at VDD = 3.0V, 8Ω RL, and PWR = 150mW
20038037
20038038
THD+N vs Frequency
at VDD = 2.6V, 8Ω RL, and PWR = 100mW
THD+N vs Frequency
VDD 2.6V, 4Ω RL, and PWR = 100mW
20038039
20038040
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200380 Version 5 Revision 8 Print Date/Time: 2011/10/05 07:43:13
THD+N vs Power Out
@ VDD = 5V, 8Ω RL, 1kHz
THD+N vs Power Out
@ VDD = 3.0V, 8Ω RL, 1kHz
20038041
20038042
THD+N vs Power Out
@ VDD = 2.6V, 8Ω RL, 1kHz
THD+N vs Power Out
@ = 2.6V, 4Ω RL, 1kHz
20038043
20038044
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Power Supply Rejection Ratio (PSRR) @ VDD = 5V
Power Supply Rejection Ratio (PSRR) @ VDD = 3V
20038045
20038073
Input terminated with 10Ω R
nput terminated with 10Ω R
Power Supply Rejection Ratio (PSRR) @ VDD = 2.6V
Power Dissin vs Output Power @ VDD = 5V
20038046
20038047
Input termin10Ω
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Power Dissipation vs
Output Power
VDD = 3.0V
Power Dissipation vs
Output Power
@ VDD = 2.6V
20038049
20038079
20038081
20038048
Power Derating - MSOP
PDMAX = 670mW for 5V, 8Ω
ower Derating - SOP
PDM= 670mW for 5V, 8Ω
20038093
Power Deratinmp µSD
Output Power vs
Supply Voltage
PDMAX = 6, 8Ω
20038051
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Output Power vs
Supply Voltage
Output Power vs
Load Resistance
20038050
0038052
20038076
20038074
Clipping (Dropout) Voltage vs
Supply Voltage
Supply Current vs
Shutdown Voltage
20038075
Shutdown Hysterisis V
V
Shutdown Hysterisis Voltage
VDD = 3V
20038077
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Shutdown Hysterisis Voltage
VDD = 2.6V
Open Loop Frequency Response
20038054
20038078
Frequency Response vs
Input Capacitor Size
20038056
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voltage, higher load impedance, or reduced ambient temper-
ature. Internal power dissipation is a function of output power.
Refer to the Typical Performance Characteristics curves
for power dissipation information for different output powers
and output loading.
Application Information
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4893 has two operational am-
plifiers internally, allowing for a few different amplifier config-
urations. The first amplifier's gain is externally configurable,
while the second amplifier is internally fixed in a unity-gain,
inverting configuration. The closed-loop gain of the first am-
plifier is set by selecting the ratio of Rf to Ri while the second
amplifier's gain is fixed by the two internal 20 kΩ resistors.
Figure 1 shows that the output of amplifier one serves as the
input to amplifier two which results in both amplifiers produc-
ing signals identical in magnitude, but out of phase by 180°.
Consequently, the differential gain for the IC is
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for
low noise performance and high power supply rejection. The
capacitor location on both the bypass and power supply pins
should be as close to the device as possible. Typical appli-
cations employ a 5V regulator with 10 µF tantalum or elec-
trolytic capacitor and a ceramic bypass capacitor which aid in
supply stability. This does not eliminate the need for bypass-
ing the supply nodes of the LM4893. The selection of a bypass
capacitor, especially CB, is dependent upon PSRR require-
ments, click and pop performance (as explained in the sec-
tion, Proper Selecon of External Components), system
cost, and size corains.
AVD= 2 *(Rf/Ri)
By driving the load differentially through outputs Vo1 and Vo2,
an amplifier configuration commonly referred to as “bridged
mode” is established. Bridged mode operation is different
from the classical single-ended amplifier configuration where
one side of the load is connected to ground.
SHUTDOWN FUN
In order to duce ponsumption while not in use, the
LM4893 ains a SHUTDOWN pin to externally turn off the
amplifibircuitry. This shutdown feature turns the am-
plifier off when a c low is placed on the SHUTDOWN pin.
By itching the SHUTDOWN pin to ground, the LM4893
sply cent draw will be minimized in idle mode. While the
dill be isabled with SHUTDOWN pin voltages less
than he idle current may be greater than the typical
value of µA. (Idle current is measured with the SHUT-
DOWN pin tied to ground).
A bridge amplifier design has a few distinct advantages over
the single-ended configuration, as it provides differential drive
to the load, thus doubling output swing for a specified supply
voltage. Four times the output power is possible as compared
to a single-ended amplifier under the same conditions. This
increase in attainable output power assumes that the ampli-
fier is not current limited or clipped. In order to choose an
amplifier's closed-loop gain without causing excessive clip-
ping, please refer to the Audio Power Amplifier Design
section.
my applications, a microcontroller or microprocessor
ot is used to control the shutdown circuitry to provide a
quick, smooth transition into shutdown. Another solution is to
use a single-pole, single-throw switch in conjunction with an
external pull-up resistor. When the switch is closed, the
SHUTDOWN pin is connected to ground which disables the
amplifier. If the switch is open, then the external pull-up re-
sistor to VDD will enable the LM4893. This scheme guarantees
that the SHUTDOWN pin will not float thus preventing un-
wanted state changes.
A bridge configuration, such as the one used in LM4893,
creates a second advantage over single-ended amp
Since the differential outputs, Vo1 and Vo2, are biased
supply, no net DC voltage exists across the load. This
nates the need for an output coupling capacitr whic
required in a single supply, single-ended amplr configura-
tion. Without an output coupling capacitor, hly
bias across the load would result in both increaternC
power dissipation and also possible loudaker dama
PROPER SELECTION OF EXTERNAL COMPONENTS
POWER DISSIPATION
Proper selection of external components in applications using
integrated power amplifiers is critical to optimize device and
system performance. While the LM4893 is tolerant of external
component combinations, consideration to component values
must be used to maximize overall system quality.
Power dissipation is a major concern ng a suc-
cessful amplifier, whether the amplifier is or single-
ended. A direct consequene incased power
delivered to the load by a br is an increase in
internal power dissipation. S93 has two opera-
tional amplifiers in one packamum internal power
dissipation is 4 times that of a ended amplifier. The
maximum power dissipation for a given application can be
derived from the power dissipation graphs or from Equation
1.
The LM4893 is unity-gain stable which gives the designer
maximum system flexibility. The LM4893 should be used in
low gain configurations to minimize THD+N values, and max-
imize the signal to noise ratio. Low gain configurations require
large input signals to obtain a given output power. Input sig-
nals equal to or greater than 1 Vrms are available from
sources such as audio codecs. Please refer to the section,
Audio Power Amplifier Design, for a more complete expla-
nation of proper gain selection.
2
PDMAX = 4*(VDD)2/(2π RL)
(1)
It is critical that the maximum junction temperature (TJMAX) of
150°C is not exceeded. TJMAX can be determined from the
power derating curves by using PDMAX and the PC board foil
area. By adding additional copper foil, the thermal resistance
of the application can be reduced from a free air value of 150°
C/W, resulting in higher PDMAX. Additional copper foil can be
added to any of the leads connected to the LM4893. It is es-
pecially effective when connected to VDD, GND, and the
output pins. Refer to the application information on the
LM4893 reference design board for an example of good heat
sinking. If TJMAX still exceeds 150°C, then additional changes
must be made. These changes can include reduced supply
Besides gain, one of the major considerations is the closed-
loop bandwidth of the amplifier. To a large extent, the band-
width is dictated by the choice of external components shown
in Figure 1. The input coupling capacitor, Ci, forms a first order
high pass filter which limits low frequency response. This val-
ue should be chosen based on needed frequency response
for a few distinct reasons.
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Selection Of Input Capacitor Size
AUDIO POWER AMPLIFIER DESIGN
Large input capacitors are both expensive and space hungry
for portable designs. Clearly, a certain sized capacitor is
needed to couple in low frequencies without severe attenua-
tion. But in many cases the speakers used in portable sys-
tems, whether internal or external, have little ability to
reproduce signals below 100 Hz to 150 Hz. Thus, using a
large input capacitor may not increase actual system perfor-
mance.
A 1W/8Ω Audio Amplifier
Given:
Power Output
1 Wrms
Load Impedance
Input Level
8Ω
1 Vrms
Input Impedance
20 kΩ
In addition to system cost and size, click and pop performance
is effected by the size of the input coupling capacitor, Ci. A
larger input coupling capacitor requires more charge to reach
its quiescent DC voltage (nominally 1/2 VDD). This charge
comes from the output via the feedback and is apt to create
pops upon device enable. Thus, by minimizing the capacitor
size based on necessary low frequency response, turn-on
pops can be minimized.
Bandwidth
100 Hz–20 kHz ± 0.25 dB
A designer must first determine the minimum supply rail to
obtain the specified output power. By extrapolating from the
Output Power vs Supply Voltage graphs in the Typical Per-
formance Characteristics section, the supply rail can be
easily found. A second way to determine the minimum supply
rail is to calculate te required Vopeak using Equation 2 and
add the output voge. Using this method, the minimum sup-
Besides minimizing the input capacitor size, careful consid-
eration should be paid to the bypass capacitor value. Bypass
capacitor, CB, is the most critical component to minimize turn-
on pops since it determines how fast the LM4893 turns on.
The slower the LM4893's outputs ramp to their quiescent DC
voltage (nominally 1/2 VDD), the smaller the turn-on pop.
Choosing CB equal to 1.0 µF along with a small value of Ci (in
the range of 0.1 µF to 0.39 µF), should produce a virtually
clickless and popless shutdown function. While the device will
function properly, (no oscillations or motorboating), with CB
equal to 0.1 µF, the device will be much more susceptible to
turn-on clicks and pops. Thus, a value of CB equal to 1.0 µF
is recommended in all but the most cost sensitive designs.
ply voltage wobe opea+ (VOD
+ VOD )), where
TOP
BOT
VOD and VD xtraated from the Dropout Voltage
BOT
TOP
vs Supply age cuhe Typical Performance Char-
acteristiection.
(2)
5V is a rd voltage, in most applications, chosen for the
supply railExtra supply voltage creates headroom that allows
the LM893 to reproduce peaks in excess of 1W without pro-
ciaudible distortion. At this time, the designer must make
sthat the power supply choice along with the output
impedance does not violate the conditions explained in the
Power Dissipation section.
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equa-
tion 3.
Figure 2 shows the LM4893's turn-on characteristics when
coming out of shutdown mode. Trace B is the differential ou
put signal across a BTL 8Ω load. The LM4893's activ
SHUTDOWN pin is driven by the logic signal shown in
A. Trace C is the Vo1- output signal and Trace D is th
output signal. A shown in Figure 2, the differential outpu
nal Trace B appears just as Trace A transitions m logic low
to logic high (turn-on condition).
(3)
AVD = (Rf/Ri) 2
From Equation 3, the minimum AVD is 2.83; use AVD = 3.
Since the desired input impedance was 20 kΩ, and with a
AVD of 3, a ratio of 1.5:1 of Rf to Ri results in an allocation of
Ri = 20 kΩ and Rf = 30 kΩ. The final design step is to address
the bandwidth requirements which must be stated as a pair
of −3 dB frequency points. Five times away from a −3 dB point
is 0.17 dB down from passband response which is better than
the required ±0.25 dB specified.
20038097
fL = 100 Hz/5 = 20 Hz
fH = 20 kHz * 5 = 100 kHz
FIGURE 2. LM4893 Turn-on Characteristics
Differential output signal (Trace B) is devoid of
transients. The SHUTDOWN pin is driven by a shutdown
signal (Trace A). The inverting output (Trace C) and the
non-inverting output (Trace D) are applied across an 8Ω
BTL load.
As stated in the External Components section, Ri in con-
junction with Ci create a highpass filter.
Ci ≥ 1/(2π*20 kΩ*20 Hz) = 0.397 µF; use 0.39 µF
The high frequency pole is determined by the product of the
desired frequency pole, fH, and the differential gain, AVD. With
a AVD = 3 and fH = 100 kHz, the resulting GBWP = 300 kHz
which is much smaller than the LM4893 GBWP of 10 MHz.
This figure displays that if a designer has a need to design an
amplifier with a higher differential gain, the LM4893 can still
be used without running into bandwidth limitations.
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20038088
FIGURE 3. HIGHER GAIN AUDIO APLIFIER
The LM4893 is unity-gain stable and requires no external
components besides gain-setting resistors, an input co
capacitor, and proper supply bypassing in the typica
cation. However, if a closed-loop differential gain of
than 10 is required, a feedback capacitor (C4) may be ne
as shown in Figure 2 to bandwidth limit the plifier. Thi
feedback capacitor creates a low pass filter t elites
le high frequency oscillations. Care should be taken
when calculating the -3dB frequency in that an incorrect com-
bination of R3 and C4 will cause rolloff before 20kHz. A typical
combination of feedback resistor and capacitor that will not
produce audio band high frequency rolloff is R3 = 20kΩ and
C4 = 25pf. These components result in a -3dB point of ap-
proximately 320 kHz.
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20038089
FIGURE 4. DIFFERENTIAL AMPLIFIER CONFIGUATION FOR LM4893
20038090
FIGURE 5. REFERENCE DESIGN BOARD and LAYOUT - micro SMD
15
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LM4893 SO BOARD ARTWORK
Silk Screen
208
20038095
20038096
Top Layer
BLayer
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20038068
FIGURE 6. REFERENCE DESIGN BOARD and PCB T GUIDELINES - MSOP & SO Boards
17
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LM4893 MSOP DEMO BOARD ARTWORK
Silk Screen
20038
Top Layer
20038066
Layer
20038067
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Mono LM4893 Reference Design Boards
Bill of Material for all 3 Demo Boards
Item
1
Part Number
Part Description
Qty
1
Ref Designator
551011208-001
482911183-001
151911207-001
151911207-002
152911207-001
472911207-001
210007039-002
LM4893 Mono Reference Design Board
LM4893 Audio AMP
10
20
21
25
30
35
1
U1
Tant Cap 1uF 16V 10
1
C1
Cer Cap 0.39uF 50V Z5U 20% 1210
Tant Cap 1.0uF 16V 10
1
C2
1
C3
Res 20K Ohm 1/10W 5
3
R1, R2, R3
J1, J2
Jumper Header Vertical Mount 2X1 0.100
2
PCB LAYOUT GUIDELINES
SINGLE-POINT POWER / GROUND CONNECTIONS
This section provides practical guidelines for mixed signal
PCB layout that involves various digital/analog power and
ground traces. Designers should note that these are only
"rule-of-thumb" recommendations and the actual results will
depend heavily on the final layout.
The analog power traces should be connected to the digital
traces through a single point (link). A "Pi-filter" can be helpful
in minimizing high quency noise coupling between the ana-
log and digital tionIt is further recommended to put
digital and analog tracover the corresponding digital
and analog ound trminimize noise coupling.
General Mixed Signal Layout Recommendations
POWER AND GROUND CIRCUITS
PLACEOF DIGITAL AND ANALOG COMPONENTS
All digital compnts and high-speed digital signals traces
shobe located far away as possible from analog com-
pents nd circuit traces.
For 2 layer mixed signal design, it is important to isolate the
digital power and ground trace paths from the analog power
and ground trace paths. Star trace routing techniques (bring-
ing individual traces back to a central point rather than daisy
chaining traces together in a serial manner) can have a major
impact on low level signal performance. Star trace routing
refers to using individual traces to feed power and ground to
each circuit or even device. This technique will take require a
greater amount of design time but will not increase the
price of the board. The only extra parts required may be
jumpers.
AVG TPICAL DESIGN / LAYOUT PROBLEMS
Avoid gloops or running digital and analog traces par-
allel to each other (side-by-side) on the same PCB layer.
When ces must cross over each other do it at 90 degrees.
g digital and analog traces at 90 degrees to each other
frothe top to the bottom side as much as possible will min-
imize capacitive noise coupling and cross talk.
19
200380 Version 5 Revision 8 Print Date/Time: 2011/10/05 07:43:13
www.national.com
Physical Dimensions inches (millimeters) unless otherwise noted
9-Bumcro SMD
Order Number LM4TL, L893ITLX
NS Package Numb9AAA
X1 = 1.514±0.03 14±0.X3 = 0.60±0.075
www.national.com
20
200380 Version 5 Revision 8 Print Date/Time: 2011/10/05 07:43:13
SO
Order Number LM43MA
NS Package NumM0
21
www.national.com
200380 Version 5 Revision 8 Print Date/Time: 2011/10/05 07:43:13
MSOP
Order Number LM4893M
NS Package mber MUB10A
www.national.com
22
200380 Version 5 Revision 8 Print Date/Time: 2011/10/05 07:43:13
Notes
23
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200380 Version 5 Revision 8 Print Date/Time: 2011/10/05 07:43:13
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