LM4938MH/NOPB [TI]
具有 DC 音量控制和可选增益的立体声 2W 音频功率放大器 | PWP | 28 | -20 to 85;
| 型号： | LM4938MH/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有 DC 音量控制和可选增益的立体声 2W 音频功率放大器 | PWP | 28 | -20 to 85 放大器 功率放大器 光电二极管 商用集成电路 |
| 文件： | 总36页 (文件大小：9316K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM4938
www.ti.com
SNAS245B –FEBRUARY 2005–REVISED MAY 2013
LM4938 Boomer™ Audio Power Amplifier Series Stereo 2W Audio Power Amplifiers
with DC Volume Control and Selectable Gain
Check for Samples: LM4938
1
FEATURES
DESCRIPTION
The LM4938 is a monolithic integrated circuit that
provides DC volume control, and stereo bridged
audio power amplifiers capable of producing 2W into
4Ω with less than 1.0% THD or 2.2W into 3Ω with
less than 1.0% THD.
23
•
Improved Click and Pop Circuitry Virtually
Eliminates Noise During Turn On/Off
Transitions
•
•
•
DC Volume Control Interface
System Beep Detect
Boomer audio integrated circuits were designed
specifically to provide high quality audio while
requiring a minimum amount of external components.
The LM4938 incorporates a DC volume control,
Stereo Switchable Bridged/Single-Ended
Power Amplifiers
•
Selectable Internal/External Gain and Bass
Boost
stereo bridged audio power amplifiers and
a
selectable gain or bass boost, making it optimally
suited for multimedia monitors, portable radios,
desktop, and portable computer applications.
•
•
Thermal Shutdown Protection Circuitry
Unity Gain Stable
The LM4938 features an externally controlled, low-
power consumption shutdown mode, and both a
power amplifier and headphone mute for maximum
system flexibility and performance.
APPLICATIONS
•
•
•
•
Flat Panel Displays
Portable and Desktop Computers
Multimedia Monitors
Note 1: When properly mounted to the circuit board,
LM4938MH will deliver 2W into 4Ω. See Application
Information section HTSSOP PACKAGE PCB
Portable Radios, PDAs, and Portable TVs
MOUNTING
information.
CONSIDERATIONS
for
more
KEY SPECIFICATIONS
•
PO at 1% THD+N
Note 2: An LM4938MH that has been properly
mounted to the circuit board and forced-air cooled will
deliver 2.2W into 3Ω.
–
–
–
into 3Ω: 2.2W (typ)
into 4Ω: 2.0W (typ)
into 8Ω: 1.3W (typ)
•
•
Single-ended mode
THD+N at 92mW into 32Ω: 1.0% (typ)
Shutdown Current: 0.5µA (typ)
–
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
Boomer is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2013, Texas Instruments Incorporated
LM4938
SNAS245B –FEBRUARY 2005–REVISED MAY 2013
www.ti.com
Block Diagram
Figure 1. LM4938 Block Diagram
Connection Diagram
Figure 2. HTSSOP Package (Top View)
See Package Number PWP0028A for HTSSOP
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
Supply Voltage
6.0V
-65°C to +150°C
−0.3V to VDD +0.3V
Internally limited
2000V
Storage Temperature
Input Voltage
Power Dissipation(3)
ESD Susceptibility(4)
ESD Susceptibility(5)
Junction Temperature
200V
150°C
Vapor Phase (60 sec.)
Infrared (15 sec.)
215°C
Soldering Information
Small Outline Package
220°C
θJC (typ) - PWP0028A
2°C/W
θJA (typ) - PWP0028A (HTSSOP)(6)
θJA (typ) - PWP0028A (HTSSOP)(7)
θJA (typ) - PWP0028A (HTSSOP)(8)
θJA (typ) - PWP0028A(HTSSOP)(9)
41°C/W
54°C/W
59°C/W
93°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θ JA, and the ambient temperature
TA. The maximum allowable power dissipation is PDMAX = (TJMAX − TA )/θJA. For the LM4938, TJMAX = 150°C, and the typical junction-to-
ambient thermal resistance for each package can be found in the Absolute Maximum Ratings()() section above.
(4) Human body model, 100pF discharged through a 1.5kΩ resistor.
(5) Machine Model, 200pF – 220pF discharged through all pins.
(6) The θJA given is for an PWP0028A package whose HTSSOP is soldered to an exposed 2in 2 piece of 1 ounce printed circuit board
copper.
(7) The θJA given is for an PWP0028A package whose HTSSOP is soldered to a 2in2 piece of 1 ounce printed circuit board copper on a
bottom side layer through 21 8mil vias.
(8) The θJA given is for an PWP0028A package whose HTSSOP is soldered to an exposed 1in 2 piece of 1 ounce printed circuit board
copper.
(9) The θJA given is for an PWP0028A package whose HTSSOP is not soldered to any copper.
Operating Ratings
Temperature Range
TMIN ≤ TA ≤TMAX
−20°C ≤TA ≤ 85°C
2.7V≤ VDD ≤ 5.5V
Supply Voltage
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Electrical Characteristics for Entire IC(1)(2)
The following specifications apply for VDD = 5V unless otherwise noted. Limits apply for TA = 25°C.
LM4938
Units
(Limits)
Symbol
VDD
Parameter
Conditions
Typical(3)
Limit(4)
Supply Voltage
2.7
5.5
30
2.0
4
V (min)
V (max)
mA (max)
μA (max)
V (min)
IDD
ISD
VIH
VIL
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, IO = 0A
Vshutdown = VDD
11
0.5
Headphone Sense High Input Voltage
Headphone Sense Low Input Voltage
0.8
V (max)
(1) All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical
application as shown in Figure 1.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are specified
by design, test, or statistical analysis.
Electrical Characteristics for Volume Attenuators(1)(2)
The following specifications apply for VDD = 5V. Limits apply for TA = 25°C.
LM4938
Units
(Limits)
Symbol
Parameter
Conditions
Typical(3)
Limit(4)
Gain accuracy with VDCVol = 5V,
No Load
±0.5
±2
±0.75
dB (max)
Gain accuracy with VDCVol < 0.5V,
No Load
CRANGE
Attenuator Range
dB (max)
dB (min)
Attenuation with VDCVol = 0V
(BM & SE)
89
89
75
AM
Mute Attenuation
Vmute = 5V, Bridged Mode (BM)
78
78
dB (min)
dB (min)
Vmute = 5V, Single-Ended Mode (SE)
(1) All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical
application as shown in Figure 1.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are specified
by design, test, or statistical analysis.
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Electrical Characteristics for Bridged Mode Operation(1)(2)
The following specifications apply for VDD = 5V, unless otherwise noted. Limits apply for TA = 25°C.
LM4938
Typical(3)
Units
(Limits)
Symbol
Parameter
Conditions
VIN = 0V, No Load
Limit(4)
VOS
Output Offset Voltage
5
±50
mV (max)
W
PO
Output Power
THD + N = 1.0%; f = 1kHz
2.2
RL = 3Ω(5)
THD + N = 1.0%; f = 1kHz
2
W
RL = 4Ω(6)
THD = 1% (max); f = 1kHz
RL = 8Ω
1.3
1.5
1.0
W (min)
THD+N = 10%; f = 1 kHz; RL = 8Ω
W
%
THD+N
PSRR
Total Harmonic Distortion + Noise
Power Supply Rejection Ratio
PO = 0.4W, f = 1kHz,
RL = 8Ω, AVD = 2
0.05
CB = 1.0 µF, f = 120 Hz,
VRIPPLE = 200 mVrms; RL = 8Ω,
Floating
78
60
dB
dB
CB = 1.0 µF, f = 120 Hz,
VRIPPLE = 200 mVrms; RL = 8Ω,
Terminated
SNR
Xtalk
Signal to Noise Ratio
Channel Separation
VDD = 5V, POUT = 1.2W, RL = 8Ω, A-
Wtd Filter, 1kHz
100
76
dB
dB
f = 1kHz, CB = 1.0μF, 1W
(1) All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical
application as shown in Figure 1.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are specified
by design, test, or statistical analysis.
(5) When driving 3Ω loads from a 5V supply the LM4938MH must be mounted to the circuit board and forced-air cooled.
(6) When driving 4Ω loads from a 5V supply the LM4938MH must be mounted to the circuit board.
Electrical Characteristics for Single-Ended Mode Operation(1)(2)
The following specifications apply for VDD = 5V. Limits apply for TA = 25°C.
LM4938
Typical(3) Limit(4)
Units
(Limits)
Symbol
Parameter
Conditions
PO
Output Power
THD = 1.0%; f = 1kHz; RL = 32Ω
92
mW
%
THD+N
PSRR
Total Harmonic Distortion + Noise
VOUT = 1VRMS, f = 1kHz,
RL = 10kΩ, AVD = 1
0.065
CB = 1.0 μF, f = 120 Hz, VRIPPLE = 200
mVrms, Floating
63
59
dB
dB
Power Supply Rejection Ratio
CB = 1.0 μF, f = 120 Hz, VRIPPLE = 200
mVrms, Terminated
SNR
Xtalk
Signal to Noise Ratio
Channel Separation
POUT = 75mW, R L = 32Ω,
A-Wtd Filter
100
73
dB
dB
f = 1kHz, CB = 1.0 μF
(1) All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical
application as shown in Figure 1.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are specified
by design, test, or statistical analysis.
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Typical Application
V
DD
V
DD
DC Volume
Control
CV
0.1 mF
Left Gain 1
Left Gain 2
20 kW
V
DD
20 kW
RPU
100 kW
Internal gain select
RI
RF
18
HP Sense
3
7
19
RBS
20 kW
100 kW
To Control Pin on
Headphone Jack
21
5
4
CBS
0.068 mF
Mode
Control
RS
10 kW
10 kW
Mute
Mode
CO
13
Left Dock
+
R
FL
1 mF
20 kW
Audio
-LOut
+
R
IL
COUT
17
In Left
-
C
IL
20 kW
+
12
11
10
-
Beep
220 mF
+
C
200 kW
20 kW
+
IB
Volume
Control
32 steps
In
0.33 mF
20 kW
RL
1.5 kW
+LOut
Rbeep
Beep
Detect
CONTROL PIN
RING
Bias
+
200 kW
Bias
15
-
C
IR
0.33 mF
Rbeep
+
-
+
Audio
+
20 kW
In Right
0.33 mF
To HP sense
Circuit
R
IR
R
28 +ROut
FR
+
-
CO
20 kW
9
Right Dock
+
SLEEVE
TIP
1 mF
20 kW
20 kW
V
-ROut
DD
6,16,27
26
+
-
Power
Management
GND
+
HEADPHONE JACK
RL
1.5 kW
COUT
1,8,14,20,23
220 mF
10 kW
10 kW
Bypass
22
RBS
20 kW
Click and Pop
Suppression
Circuitry
CS1 CS CS
10 mF 0.1mF 0.1mF
CBS
0.068 mF
1 mF
CB
Shutdown 2
24
25
RI
20 kW
RF
20 kW
Right Gain 1 Right Gain 2
Figure 3. Typical Application Circuit
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Truth Table for Logic Inputs(5)
Gain Sel
Mode
Headphone
Sense
Mute
Shutdown Output Stage Set To
DC Volume
Output Stage
Configuration
0
0
0
0
1
1
1
1
X
X
0
0
1
1
0
0
1
1
X
X
0
1
0
1
0
1
0
1
X
X
0
0
0
0
0
0
0
0
1
X
0
0
0
0
0
0
0
0
0
1
Internal Gain
Internal Gain
Internal Gain
Internal Gain
External Gain
External Gain
External Gain
External Gain
Muted
Fixed
Fixed
BTL
SE
Adjustable
Adjustable
Fixed
BTL
SE
BTL
SE
Fixed
Adjustable
Adjustable
X
BTL
SE
Muted
X
Shutdown
X
(5) If system beep is detected on the Beep In pin, the system beep will be passed through the bridged amplifier regardless of the logic of
the Mute and HP sense pins.
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Typical Performance Characteristics
THD+N vs Output Power
VDD = 3V, RL = 4Ω, f = 1kHz
THD+N vs Output Power
VDD = 3V, RL = 8Ω, f = 1kHz
Figure 4.
Figure 5.
THD+N vs Output Power
VDD = 3V, RL = 32Ω, SE, f = 1kHz
THD+N vs Output Power
VDD = 5V, RL = 3Ω, f = 1kHz
Figure 6.
Figure 7.
THD+N vs Output Power
VDD = 5V, RL = 4Ω, f = 1kHz
THD+N vs Output Power
VDD = 5V, RL = 8Ω, BTL, f = 1kHz
Figure 8.
Figure 9.
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Typical Performance Characteristics (continued)
THD+N vs Output Power
VDD = 5V, RL = 32Ω, SE, f = 1kHz
THD+N vs Frequency
VDD = 5V, RL = 8Ω, PO = 1W, BTL
Figure 10.
Figure 11.
THD+N vs Frequency
VDD = 3V, RL = 4Ω, PO = 170mW
THD+N vs Frequency
VDD = 3V, RL = 8Ω, PO = 160mW
Figure 12.
Figure 13.
THD+N vs Frequency
VDD = 3V, RL = 32Ω, PO = 20mW, SE
THD+N vs Frequency
VDD = 5V, RL = 3Ω, PO = 600mW
Figure 14.
Figure 15.
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Typical Performance Characteristics (continued)
THD+N vs Frequency
VDD = 5V, RL = 4Ω, PO = 600mW
THD+N vs Frequency
VDD = 5V, RL = 32Ω, PO = 70mW, SE
Figure 16.
Figure 17.
Frequency Response
VDD = 3V, RL = 4Ω, PO = 1.8W
Frequency Response
VDD = 3V, RL = 8Ω, PO = 570mW
Figure 18.
Figure 19.
Frequency Response
VDD = 3V, RL = 32Ω, PO = 30mW, SE
Frequency Response
VDD = 5V, RL = 3Ω, PO = 1.8W
Figure 20.
Figure 21.
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Typical Performance Characteristics (continued)
Frequency Response
VDD = 5V, RL = 4Ω, PO = 1.5W
Frequency Response
VDD = 5V, RL = 8Ω, PO = 1W
Figure 22.
Figure 23.
Frequency Response
VDD = 5V, RL = 32Ω, PO = 30mW, SE
PSRR vs Frequency
VDD = 3V, RL = 8Ω, Terminated
0.0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
20
100
1k
10k 20k
FREQUENCY (Hz)
Figure 24.
Figure 25.
PSRR vs Frequency
VDD = 3V, RL = 8Ω, Unterminated
PSRR vs Frequency
VDD = 3V, RL = 32Ω, Terminated
0.0
-10
-20
-30
-40
-50
-60
0.0
-10
-20
-30
-40
-50
-60
-70
-80
-70
-80
-90
-90
-100
-100
20
100
1k
10k 20k
20
100
1k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 26.
Figure 27.
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Typical Performance Characteristics (continued)
PSRR vs Frequency
VDD = 3V, RL = 32Ω, Unterminated
PSRR vs Frequency
VDD = 5V, RL = 8Ω, Terminated
0.0
-10
-20
-30
-40
-50
-60
0
-10
-20
-30
-40
-50
-60
-70
-80
-70
-80
-90
-90
-100
-100
20
100
1k
10k 20k
20
100
1k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 28.
Figure 29.
PSRR vs Frequency
VDD = 5V, RL = 8Ω, Unterminated
PSRR vs Frequency
VDD = 5V, RL = 32Ω, Terminated, SE
0.0
-10
-20
-30
-40
-50
-60
0.0
-10
-20
-30
-40
-50
-60
-70
-80
-70
-80
-90
-90
-100
-100
20
100
1k
10k 20k
20
100
1k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 30.
Figure 31.
PSRR vs Frequency
VDD = 5V, RL = 32Ω, Unterminated, SE
Crosstalk vs Frequency
VDD = 3V, RL = 8Ω, PO = 570mW
0.0
-10
-20
-30
-40
-50
-60
0.0
-10
-20
-30
-40
-50
-60
-70
-80
-70
-80
-90
-90
-100
-100
20
100
1k
10k 20k
20
100
1k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 32.
Figure 33.
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Typical Performance Characteristics (continued)
Crosstalk vs Frequency
VDD = 3V, RL = 32Ω, PO = 30mW, SE
Crosstalk vs Frequency
VDD = 5V, RL = 8Ω, PO = 1W
0.0
-10
-20
-30
-40
-50
-60
0.0
-10
-20
-30
-40
-50
-60
-70
-80
-70
-80
-90
-90
-100
-100
20
100
1k
10k 20k
20
100
1k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 34.
Figure 35.
Crosstalk vs Frequency
VDD = 5V, RL = 32Ω, PO = 30mW, SE
Volume Control Characteristics
0.0
-10
-20
-30
-40
-50
-60
10
0.0
-10
-20
-30
-40
-50
-60
-70
-80
-70
-80
-90
-90
-100
-100
0
1
2
3
4
5
20
100
1k
10k 20k
DC VOLUME CONTROL VOLTAGE
FREQUENCY (Hz)
Figure 36.
Figure 37.
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Typical Performance Characteristics (continued)
Power Derating Curve(1)
Dropout Voltage
Figure 38.
Figure 39.
External Gain/
Bass Boost Characteristics
Power Dissipation vs Output Power
Figure 40.
Figure 41.
Power Dissipation vs
Output Power
Power Dissipation vs Output Power
Figure 42.
Figure 43.
(1) These curves show the thermal dissipation ability of the LM4938MH at different ambient temperatures given these conditions:
500LFPM + 2in2: The part is soldered to a 2in2, 1 oz. copper plane with 500 linear feet per minute of forced-air flow across it.
2in2on bottom: The part is soldered to a 2in2, 1oz. copper plane that is on the bottom side of the PC board through 21 8 mil vias.
2in2: The part is soldered to a 2in2, 1oz. copper plane.
1in2: The part is soldered to a 1in2, 1oz. copper plane.
Not Attached: The part is not soldered down and is not forced-air cooled.
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Typical Performance Characteristics (continued)
Output Power vs Supply Voltage
Figure 44.
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APPLICATION INFORMATION
HTSSOP PACKAGE PCB MOUNTING CONSIDERATIONS
The LM4938's HTSSOP (die attach paddle) package (MH) provides a low thermal resistance between the die
and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the
surrounding PCB copper traces, ground plane and, finally, surrounding air. The result is a low voltage audio
power amplifier that produces 2.0W at ≤ 1% THD with a 4Ω load. This high power is achieved through careful
consideration of necessary thermal design. Failing to optimize thermal design may compromise the LM4938's
high power performance and activate unwanted, though necessary, thermal shutdown protection.
The MH package must have its exposed DAP soldered to a grounded copper pad on the PCB. The DAP's PCB
copper pad is connected to a large grounded plane of continuous unbroken copper. This plane forms a thermal
mass heat sink and radiation area. Place the heat sink area on either outside plane in the case of a two-sided
PCB, or on an inner layer of a board with more than two layers. Connect the DAP copper pad to the inner layer
or backside copper heat sink area with 32(4x8) (MH) vias. The via diameter should be 0.012in–0.013in with a
1.27mm pitch. Ensure efficient thermal conductivity by plating-through and solder-filling the vias.
Best thermal performance is achieved with the largest practical copper heat sink area. If the heatsink and
amplifier share the same PCB layer, a nominal 2.5in2 (min) area is necessary for 5V operation with a 4Ω load.
Heatsink areas not placed on the same PCB layer as the LM4938 MH package should be 5in2 (min) for the same
supply voltage and load resistance. The last two area recommendations apply for 25°C ambient temperature.
Increase the area to compensate for ambient temperatures above 25°C. In systems using cooling fans, the
LM4938MH can take advantage of forced air cooling. With an air flow rate of 450 linear-feet per minute and a
2.5in2 exposed copper or 5.0in2 inner layer copper plane heatsink, the LM4938MH can continuously drive a 3Ω
load to full power. In all circumstances and conditions, the junction temperature must be held below 150°C to
prevent activating the LM4938's thermal shutdown protection. The LM4938's power de-rating curve in the Typical
Performance Characteristics shows the maximum power dissipation versus temperature. Example PCB layouts
for the HTSSOP are shown in the Demonstration Board Layout section. Further detailed and specific
information concerning PCB layout, fabrication, and mounting a package is available in Texas Instruments'
AN1187.
PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 3Ω AND 4Ω
LOADS
Power dissipated by a load is a function of the voltage swing across the load and the load's impedance. As load
impedance decreases, load dissipation becomes increasingly dependent on the interconnect (PCB trace and
wire) resistance between the amplifier output pins and the load's connections. Residual trace resistance causes
a voltage drop, which results in power dissipated in the trace and not in the load as desired. For example, 0.1Ω
trace resistance reduces the output power dissipated by a 4Ω load from 2.1W to 2.0W. This problem of
decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load
dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide
as possible.
Poor power supply regulation adversely affects maximum output power. A poorly regulated supply's output
voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output
signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the
same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps
maintain full output voltage swing.
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 3, the LM4938 output stage consists of two pairs of operational amplifiers, forming a two-
channel (channel A and channel B) stereo amplifier. (Though the following discusses channel A, it applies
equally to channel B.)
Figure 3 shows that the first amplifier's negative (-) output serves as the second amplifier's input. This results in
both amplifiers producing signals identical in magnitude, but 180° out of phase. Taking advantage of this phase
difference, a load is placed between −OUTA and +OUTA and driven differentially (commonly referred to as
“bridge mode”). This results in a differential gain of
AVD = 2 * (Rf/R i)
(1)
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Bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single
amplifier's output and ground. For a given supply voltage, bridge mode has a distinct advantage over the single-
ended configuration: its differential output doubles the voltage swing across the load. This produces four
times the output power when compared to a single-ended amplifier under the same conditions. This increase in
attainable output power assumes that the amplifier is not current limited or that the output signal is not clipped.
To ensure minimum output signal clipping when choosing an amplifier's closed-loop gain, refer to the AUDIO
POWER AMPLIFIER DESIGN section.
Another advantage of the differential bridge output is no net DC voltage across the load. This is accomplished by
biasing channel A's and channel B's outputs at half-supply. This eliminates the coupling capacitor that single
supply, single-ended amplifiers require. Eliminating an output coupling capacitor in a single-ended configuration
forces a single-supply amplifier's half-supply bias voltage across the load. This increases internal IC power
dissipation and may permanently damage loads such as speakers.
POWER DISSIPATION
Power dissipation is a major concern when designing a successful single-ended or bridged amplifier. Equation 2
states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and
driving a specified output load.
PDMAX = (VDD)2/(2π2RL) Single-Ended
(2)
However, a direct consequence of the increased power delivered to the load by a bridge amplifier is higher
internal power dissipation for the same conditions.
The LM4938 has two operational amplifiers per channel. The maximum internal power dissipation per channel
operating in the bridge mode is four times that of a single-ended amplifier. From Equation 3), assuming a 5V
power supply and a 4Ω load, the maximum single channel power dissipation is 1.27W or 2.54W for stereo
operation.
PDMAX = 4 * (VDD)2/(2π2RL) Bridge Mode
(3)
The LM4938's power dissipation is twice that given by Equation 2or Equation 3when operating in the single-
ended mode or bridge mode, respectively. Twice the maximum power dissipation point given by Equation 3 must
not exceed the power dissipation given by Equation 4:
PDMAX′ = (TJMAX − TA)/θJA
(4)
The LM4938's TJMAX = 150°C. In the MH package soldered to a DAP pad that expands to a copper area of 2in2
on a PCB, the LM4938MH's θJA is 41°C/W. At any given ambient temperature TA, use Equation 4to find the
maximum internal power dissipation supported by the IC packaging. Rearranging Equation 4 and substituting
PDMAX for PDMAX′ results in Equation 5. This equation gives the maximum ambient temperature that still allows
maximum stereo power dissipation without violating the LM4938's maximum junction temperature.
TA = TJMAX – 2*PDMAX θJA
(5)
For a typical application with a 5V power supply and an 4Ω load, the maximum ambient temperature that allows
maximum stereo power dissipation without exceeding the maximum junction temperature is approximately 45°C
for the MH package.
TJMAX = PDMAX θJA + TA
(6)
Equation 6 gives the maximum junction temperature TJMAX. If the result violates the LM4938's 150°C TJMAX
,
reduce the maximum junction temperature by reducing the power supply voltage or increasing the load
resistance. Further allowance should be made for increased ambient temperatures.
The above examples assume that a device is a surface mount part operating around the maximum power
dissipation point. Since internal power dissipation is a function of output power, higher ambient temperatures are
allowed as output power or duty cycle decreases.
If the result of Equation 2 is greater than that of Equation 3, then decrease the supply voltage, increase the load
impedance, or reduce the ambient temperature. If these measures are insufficient, a heat sink can be added to
reduce θJA. The heat sink can be created using additional copper area around the package, with connections to
the ground pin(s), supply pin and amplifier output pins. External, solder attached SMT heatsinks such as the
Thermalloy 7106D can also improve power dissipation. When adding a heat sink, the θJA is the sum of θJC, θCS
,
and θSA. (θJC is the junction-to-case thermal impedance, θCS is the case-to-sink thermal impedance, and θSA is
the sink-to-ambient thermal impedance.) Refer to the Typical Performance Characteristics curves for power
dissipation information at lower output power levels.
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POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. Applications that employ a 5V regulator typically use a 10 µF in parallel with a 0.1 µF filter capacitor to
stabilize the regulator's output, reduce noise on the supply line, and improve the supply's transient response.
However, their presence does not eliminate the need for a local 1.0µF tantalum bypass capacitance connected
between the LM4938's supply pins and ground. Do not substitute a ceramic capacitor for the tantalum. Doing so
may cause oscillation. Keep the length of leads and traces that connect capacitors between the LM4938's power
supply pin and ground as short as possible. Connecting a 1µF capacitor, CB, between the BYPASS pin and
ground improves the internal bias voltage's stability and the amplifier's PSRR. The PSRR improvements increase
as the BYPASS pin capacitor value increases. Too large a capacitor, however, increases turn-on time and can
compromise the amplifier's click and pop performance. The selection of bypass capacitor values, especially CB,
depends on desired PSRR requirements, click and pop performance (as explained in the following section,
SELECTING PROPER EXTERNAL COMPONENTS), system cost, and size constraints.
SELECTING PROPER EXTERNAL COMPONENTS
Optimizing the LM4938's performance requires properly selecting external components. Though the LM4938
operates well when using external components with wide tolerances, best performance is achieved by optimizing
component values.
The LM4938 is unity-gain stable, giving a designer maximum design flexibility. The gain should be set to no more
than a given application requires. This allows the amplifier to achieve minimum THD+N and maximum signal-to-
noise ratio. These parameters are compromised as the closed-loop gain increases. However, low gain circuits
demand input signals with greater voltage swings to achieve maximum output power. Fortunately, many signal
sources such as audio CODECs have outputs of 1VRMS (2.83VP-P). Please refer to the AUDIO POWER
AMPLIFIER DESIGN section for more information on selecting the proper gain.
INPUT CAPACITOR VALUE SELECTION
Amplifying the lowest audio frequencies requires a high value input coupling capacitor (0.33µF in Figure 3), but
high value capacitors can be expensive and may compromise space efficiency in portable designs. In many
cases, however, the speakers used in portable systems, whether internal or external, have little ability to
reproduce signals below 150 Hz. Applications using speakers with this limited frequency response reap little
improvement by using a large input capacitor.
Besides effecting system cost and size, the input coupling capacitor has an affect on the LM4938's click and pop
performance. When the supply voltage is first applied, a transient (pop) is created as the charge on the input
capacitor changes from zero to a quiescent state. The magnitude of the pop is directly proportional to the input
capacitor's size. Higher value capacitors need more time to reach a quiescent DC voltage (usually VDD/2) when
charged with a fixed current. The amplifier's output charges the input capacitor through the feedback resistor, Rf.
Thus, pops can be minimized by selecting an input capacitor value that is no higher than necessary to meet the
desired −6dB frequency.
As shown in Figure 3, the input resistor (RIR, RIL = 20k) ( and the input capacitor (CIR, CIL = 0.33µF) produce a
−6dB high pass filter cutoff frequency that is found using Equation 7.
(7)
As an example when using a speaker with a low frequency limit of 150Hz, the input coupling capacitor, using
Equation 7, is 0.053µF. The 0.33µF input coupling capacitor shown in Figure 3 allows the LM4938 to drive a high
efficiency, full range speaker whose response extends below 30Hz.
OPTIMIZING CLICK AND POP REDUCTION PERFORMANCE
The LM4938 contains circuitry that minimizes turn-on and shutdown transients or “clicks and pops”. For this
discussion, turn-on refers to either applying the power supply voltage or when the shutdown mode is deactivated.
While the power supply is ramping to its final value, the LM4938's internal amplifiers are configured as unity gain
buffers. An internal current source changes the voltage of the BYPASS pin in a controlled, linear manner. Ideally,
the input and outputs track the voltage applied to the BYPASS pin. The gain of the internal amplifiers remains
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unity until the voltage on the BYPASS pin reaches 1/2 VDD . As soon as the voltage on the BYPASS pin is
stable, the device becomes fully operational. Although the BYPASS pin current cannot be modified, changing the
size of CB alters the device's turn-on time and the magnitude of “clicks and pops”. Increasing the value of CB
reduces the magnitude of turn-on pops. However, this presents a tradeoff: as the size of CB increases, the turn-
on time increases. There is a linear relationship between the size of CB and the turn-on time.
DOCKING STATION INTERFACE
Applications such as notebook computers can take advantage of a docking station to connect to external devices
such as monitors or audio/visual equipment that sends or receives line level signals. The LM4938 has two
outputs, Right Dock and Left Dock, which connect to outputs of the internal input amplifiers that drive the volume
control inputs. These input amplifiers can drive loads of >1kΩ (such as powered speakers) with a rail-to-rail
signal. Since the output signal present on the RIGHT DOCK and LEFT DOCK pins is biased to VDD/2, coupling
capacitors should be connected in series with the load when using these outputs. Typical values for the output
coupling capacitors are 0.33µF to 1.0µF. If polarized coupling capacitors are used, connect their "+" terminals to
the respective output pin, see Figure 3.
Since the DOCK outputs precede the internal volume control, the signal amplitude will be equal to the input
signal's magnitude and cannot be adjusted. However, the input amplifier's closed-loop gain can be adjusted
using external resistors. These 20k resistors (RFR, RFL) are shown in Figure 3 and they set each input amplifier's
gain to -1. Use Equation 7 to determine the input and feedback resistor values for a desired gain.
- AVR = RFR/RIR and - AVL = RFL/RIL
(8)
Adjusting the input amplifier's gain sets the minimum gain for that channel. Although the single ended output of
the Bridge Output Amplifiers can be used to drive line level outputs, it is recommended that the R & L Dock
Outputs simpler signal path be used for better performance.
BEEP DETECT FUNCTION
Computers and notebooks produce a system “beep“ signal that drives a small speaker. The speaker's auditory
output signifies that the system requires user attention or input. To accommodate this system alert signal, the
LM4938's beep input pin is a mono input that accepts the beep signal. Internal level detection circuitry at this
input monitors the beep signal's magnitude. When a signal level greater than VDD/2 is detected on the BEEP IN
pin, the bridge output amplifiers are enabled. The beep signal is amplified and applied to the load connected to
the output amplifiers. A valid beep signal will be applied to the load even when MUTE is active. Use the input
resistors connected between the BEEP IN pin and the stereo input pins to accommodate different beep signal
amplitudes. These resistors (RBEEP) are shown as 200kΩ devices in Figure 3. Use higher value resistors to
reduce the gain applied to the beep signal. The resistors must be used to pass the beep signal to the stereo
inputs. The BEEP IN pin is used only to detect the beep signal's magnitude: it does not pass the signal to the
output amplifiers. The LM4938's shutdown mode must be deactivated before a system alert signal is applied to
BEEP IN pin.
If the “Beep” feature is not needed, remove the two Beep Resistors (200k) and Beep input capacitor (.33μf).
Then, tie the Beep input pin (#11) to ground. Note that the Beep Circuit is designed to operate with only a square
wave input from a control source.
MICRO-POWER SHUTDOWN
The voltage applied to the SHUTDOWN pin controls the LM4938's shutdown function. Activate micro-power
shutdown by applying VDD to the SHUTDOWN pin. When active, the LM4938's micro-power shutdown feature
turns off the amplifier's bias circuitry, reducing the supply current. The logic threshold is typically VDD/2. The low
0.5 µA typical shutdown current is achieved by applying a voltage that is as near as VDD as possible to the
SHUTDOWN pin. A voltage that is less than VDD may increase the shutdown current.
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There are a few ways to control the micro-power shutdown. These include using a single-pole, single-throw
switch, a microprocessor, or a microcontroller. When using a switch, connect an external 10kΩ pull-up resistor
between the SHUTDOWN pin and VDD. Connect the switch between the SHUTDOWN pin and ground. Select
normal amplifier operation by closing the switch. Opening the switch connects the SHUTDOWN pin to VDD
through the pull-up resistor, activating micro-power shutdown. The switch and resistor ensure that the
SHUTDOWN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or a
microcontroller, use a digital output to apply the control voltage to the SHUTDOWN pin. Driving the SHUTDOWN
pin with active circuitry eliminates the need for a pull up resistor.
MODE FUNCTION
The LM4938's MODE function has 2 states controlled by the voltage applied to the MODE pin. Mode 0, selected
by applying 0V to the MODE pin, forces the LM4938 to effectively function as a "line-out," unity-gain amplifier.
Mode 1, which uses the internal DC controlled volume control is selected by applying VDD to the MODE pin. This
mode sets the amplifier's gain according to the DC voltage applied to the DC VOL CONTROL pin. Unanticipated
gain behavior can be prevented by connecting the MODE pin to VDD or ground. Note: Do not let the mode pin
float.
MUTE FUNCTION
The LM4938 mutes the amplifier and DOCK outputs when VDD is applied to the MUTE pin. Even while muted,
the LM4938 will amplify a system alert (beep) signal whose magnitude satisfies the BEEP DETECT circuitry.
Applying 0V to the MUTE pin returns the LM4938 to normal, unmuted operation. Prevent unanticipated mute
behavior by connecting the MUTE pin to VDD or ground. Do not let the mute pain float.
+5V
RPU
100 kW
RS
100 kW
HP
Sense
LM4938
C
OUT
220 mF
Headphone Jack
-LOUT
-ROUT
R
L
1.5 kW
C
OUT
220 mF
R
L
1 kW
Figure 45. Headphone Sensing Circuit
HP SENSE FUNCTION ( Head Phone In )
Applying a voltage between 4V and VDD to the LM4938's HP-IN headphone control pin turns off the amps that
drive the Left out "+" and Right out "+" pins. This action mutes a bridged-connected load. Quiescent current
consumption is reduced when the IC is in this single-ended mode.
Figure 45 shows the implementation of the LM4938's headphone control function. With no headphones
connected to the headphone jack, the R1-R2 voltage divider sets the voltage applied to the HP SENSE pin at
approximately 50mV. This 50mV puts the LM4938 into bridged mode operation. The output coupling capacitor
blocks the amplifier's half supply DC voltage, protecting the headphones.
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The HP-IN threshold is set at 4V. While the LM4938 operates in bridged mode, the DC potential across the load
is essentially 0V. Therefore, even in an ideal situation, the output swing cannot cause a false single-ended
trigger. Connecting headphones to the headphone jack disconnects the headphone jack contact pin from R2 and
allows R1 to pull the HP Sense pin up to VDD through R4. This enables the headphone function, turns off both of
the "+" output amplifiers, and mutes the bridged speaker. The remaining single-ended amplifiers then drive the
headphones, whose impedance is in parallel with resistors R2 and R3. These resistors have negligible effect on
the LM4938's output drive capability since the typical impedance of headphones is 32Ω.
Figure 45 also shows the suggested headphone jack electrical connections. The jack is designed to mate with a
three-wire plug. The plug's tip and ring should each carry one of the two stereo output signals, whereas the
sleeve should carry the ground return. A headphone jack with one control pin contact is sufficient to drive the HP-
IN pin when connecting headphones.
A microprocessor or a switch can replace the headphone jack contact pin. When a microprocessor or switch
applies a voltage greater than 4V to the HP-IN pin, a bridge-connected speaker is muted and the single ended
output amplifiers 1A and 2A will drive a pair of headphones.
GAIN SELECT FUNCTION (Bass Boost)
The LM4938 features selectable gain, using either internal or external feedback resistors. Either set of feedback
resistors set the gain of the output amplifiers. The voltage applied to the GAIN SELECT pin controls which gain is
selected. Applying VDD to the GAIN SELECT pin selects the external gain mode. Applying 0V to the GAIN
SELECT pin selects the internally set unity gain.
In some cases a designer may want to improve the low frequency response of the bridged amplifier or
incorporate a bass boost feature. This bass boost can be useful in systems where speakers are housed in small
enclosures. A resistor, RLFE, and a capacitor, CLFE, in parallel, can be placed in series with the feedback resistor
of the bridged amplifier as seen in Figure 46.
Right Gain 1
or
Left Gain 1
R
I
Right Gain 2
or
Left Gain 2
R
F
R
LFE
C
LFE
(CBS)
(RBS)
Right Out -
or
Left Out -
Figure 46. Low Frequency Enhancement
At low, frequencies CLFE is a virtual open circuit and at high frequencies, its nearly zero ohm impedance shorts
RLFE. The result is increased bridge-amplifier gain at low frequencies. The combination of RLFE and CLFE form a -
6dB corner frequency at
fC = 1/(2πRLFEC LFE
)
(9)
The bridged-amplifier low frequency differential gain is:
AVD = 2(RF + RLFE) / R i
(10)
Using the component values shown in Figure 1 (RF = 20kΩ, RLFE = 20kΩ, and CLFE = 0.068µF), a first-order, -
6dB pole is created at 120Hz. Assuming R = 20kΩ, the low frequency differential gain is 4. The input (Ci) and
i
output (CO) capacitor values must be selected for a low frequency response that covers the range of frequencies
affected by the desired bass-boost operation.
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DC VOLUME CONTROL
The LM4938 has an internal stereo volume control whose setting is a function of the DC voltage applied to the
DC VOL CONTROL pin.
The LM4938 volume control consists of 31 steps that are individually selected by a variable DC voltage level on
the volume control pin. The range of the steps, controlled by the DC voltage, are from 0dB - 89dB. Each gain
step corresponds to a specific input voltage range, as shown in VOLUME CONTROL TABLE.
To minimize the effect of noise on the volume control pin, which can affect the selected gain level, hysteresis has
been implemented. The amount of hysteresis corresponds to half of the step width, as shown in Volume Control
Characterization Graph (DS200133-40).
For highest accuracy, the voltage shown in the 'recommended voltage' column of the table is used to select a
desired gain. This recommended voltage is exactly halfway between the two nearest transitions to the next
highest or next lowest gain levels.
The gain levels are 1dB/step from 0dB to -6dB, 2dB/step from -6dB to -36dB, 3dB/step from -36dB to -47dB,
4dB/step from -47db to -51dB, 5dB/step from -51dB to -66dB, and 12dB to the last step at -89dB.
VOLUME CONTROL TABLE
Gain (dB)
Voltage Range (% of Vdd)
Voltage Range (Vdd = 5)
Voltage Range (Vdd = 3)
Low
High
Recommended
Low
High
Recommended
Low
High
Recommended
0
77.5%
75.0%
72.5%
70.0%
67.5%
65.0%
62.5%
60.0%
57.5%
55.0%
52.5%
50.0%
47.5%
45.0%
42.5%
40.0%
37.5%
35.0%
32.5%
30.0%
27.5%
25.0%
22.5%
20.0%
17.5%
15.0%
12.5%
10.0%
7.5%
100.00%
78.5%
100.000%
76.875%
74.375%
71.875%
69.375%
66.875%
64.375%
61.875%
59.375%
56.875%
54.375%
51.875%
49.375%
46.875%
44.375%
41.875%
39.375%
36.875%
34.375%
31.875%
29.375%
26.875%
24.375%
21.875%
19.375%
16.875%
14.375%
11.875%
9.375%
3.875
3.750
3.625
3.500
3.375
3.250
3.125
3.000
2.875
2.750
2.625
2.500
2.375
2.250
2.125
2.000
1.875
1.750
1.625
1.500
1.375
1.250
1.125
1.000
0.875
0.750
0.625
0.500
0.375
0.250
0.000
5.000
3.938
3.813
3.688
3.563
3.438
3.313
3.188
3.063
2.938
2.813
2.688
2.563
2.438
2.313
2.188
2.063
1.938
1.813
1.688
1.563
1.438
1.313
1.188
1.063
0.937
0.812
0.687
0.562
0.437
0.312
5.000
3.844
3.719
3.594
3.469
3.344
3.219
3.094
2.969
2.844
2.719
2.594
2.469
2.344
2.219
2.094
1.969
1.844
1.719
1.594
1.469
1.344
1.219
1.094
0.969
0.844
0.719
0.594
0.469
0.344
0.000
2.325
2.250
2.175
2.100
2.025
1.950
1.875
1.800
1.725
1.650
1.575
1.500
1.425
1.350
1.275
1.200
1.125
1.050
0.975
0.900
0.825
0.750
0.675
0.600
0.525
0.450
0.375
0.300
0.225
0.150
0.000
3.000
2.363
2.288
2.213
2.138
2.063
1.988
1.913
1.838
1.763
1.688
1.613
1.538
1.463
1.388
1.313
1.238
1.163
1.088
1.013
0.937
0.862
0.787
0.712
0.637
0.562
0.487
0.412
0.337
0.262
0.187
3.000
2.306
2.231
2.156
2.081
2.006
1.931
1.856
1.781
1.706
1.631
1.556
1.481
1.406
1.331
1.256
1.181
1.106
1.031
0.956
0.881
0.806
0.731
0.656
0.581
0.506
0.431
0.356
0.281
0.206
0.000
-1
-2
76.25%
73.75%
71.25%
68.75%
66.25%
63.75%
61.25%
58.75%
56.25%
53.75%
51.25%
48.75%
46.25%
43.75%
41.25%
38.75%
36.25%
33.75%
31.25%
28.75%
26.25%
23.75%
21.25%
18.75%
16.25%
13.75%
11.25%
8.75%
-3
-4
-5
-6
-8
-10
-12
-14
-16
-18
-20
-22
-24
-26
-28
-30
-32
-34
-36
-39
-42
-45
-47
-51
-56.5
-62.5
-68.5
-89
5.0%
6.875%
0.0%
6.25%
0.000%
22
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LM4938
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SNAS245B –FEBRUARY 2005–REVISED MAY 2013
AUDIO POWER AMPLIFIER DESIGN
Audio Amplifier Design: Driving 1W into an 8Ω Load
The following are the desired operational parameters:
Power Output:
Load Impedance:
Input Level:
1 WRMS
8Ω
1 VRMS
20 kΩ
Input Impedance:
Bandwidth:
100 Hz−20 kHz ± 0.25 dB
The design begins by specifying the minimum supply voltage necessary to obtain the specified output power.
One way to find the minimum supply voltage is to use the Output Power vs Supply Voltage curve in the Typical
Performance Characteristics section. Another way, using Equation 10, is to calculate the peak output voltage
necessary to achieve the desired output power for a given load impedance. To account for the amplifier's dropout
voltage, two additional voltages, based on the Dropout Voltage vs Supply Voltage in the Typical Performance
Characteristics curves, must be added to the result obtained by Equation 10. The result is Equation 11.
(11)
V
DD ≥ (VOUTPEAK+ (VOD + VODBOT))
(12)
TOP
The Output Power vs Supply Voltage graph for an 8Ω load indicates a minimum supply voltage of 4.6V. This is
easily met by the commonly used 5V supply voltage. The additional voltage creates the benefit of headroom,
allowing the LM4938 to produce peak output power in excess of 1W without clipping or other audible distortion.
The choice of supply voltage must also not create a situation that violates of maximum power dissipation as
explained above in the POWER DISSIPATION section.
After satisfying the LM4938's power dissipation requirements, the minimum differential gain needed to achieve
1W dissipation in an 8Ω load is found using Equation 12.
(13)
Thus, a minimum overall gain of 2.83 allows the LM4938's to reach full output swing and maintain low noise and
THD+N performance.
The last step in this design example is setting the amplifier's −6dB frequency bandwidth. To achieve the desired
±0.25dB pass band magnitude variation limit, the low frequency response must extend to at least one-fifth the
lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth
limit. The gain variation for both response limits is 0.17dB, well within the ±0.25dB desired limit. The results are
an
fL = 100Hz/5 = 20Hz
(14)
and an
fH = 20kHz x 5 = 100kHz
(15)
As mentioned in the SELECTING PROPER EXTERNAL COMPONENTS section, Ri (Right & Left) and Ci (Right
& Left) create a highpass filter that sets the amplifier's lower bandpass frequency limit. Find the input coupling
capacitor's value using Equation 14.
Ci ≥ 1/(2πRifL)
(16)
The result is
1/(2π*20kΩ*20Hz) = 0.397μF
(17)
Use a 0.39μF capacitor, the closest standard value.
The product of the desired high frequency cutoff (100kHz in this example) and the differential gain AVD
,
determines the upper passband response limit. With AVD = 3 and fH = 100kHz, the closed-loop gain bandwidth
product (GBWP) is 300kHz. This is less than the LM4938's 3.5MHz GBWP. With this margin, the amplifier can
be used in designs that require more differential gain while avoiding performance,restricting bandwidth
limitations.
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Recommended Printed Circuit Board Layout
The following figures show the recommended PC board layouts for the LM4938MH. This circuit is designed for
use with an external 5V supply and 4Ω speakers.
This circuit board is easy to use. Apply 5V and ground to the board's VDD and GND pads, respectively. Connect
4Ω speakers between the board's −OUTA and +OUTA and OUTB and +OUTB pads.
Figure 47. Top Layer Silkscreen
Figure 48. Top Layer TSSOP
24
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SNAS245B –FEBRUARY 2005–REVISED MAY 2013
Figure 49. Inner Layer (2)
Figure 50. Inner Layer (3)
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Figure 51. Bottom Layer TSSOP
26
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Product Folder Links: LM4938
LM4938
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SNAS245B –FEBRUARY 2005–REVISED MAY 2013
Analog Audio LM4938 TSSOP Eval Board
Assembly Part Number: 980011373-100
Revision: A
Bill of Material
Item
Part Number
Part Description
Qty
Ref Designator
Remark
1
551011373-001
LM4938 Eval Board PCB
etch 001
1
10
20
482911373-001
151911368-001
LM4938 TSSOP
1
2
Cer Cap 0.068µF 50V 10%
1206
CBS
25
26
27
28
29
30
31
32
33
40
41
42
43
44
45
152911368-001
152911368-002
152911368-003
152911368-004
152911368-005
472911368-001
472911368-002
472911368-003
472911368-004
131911368-001
131911368-002
131911368-003
131911368-004
131911368-005
131911368-006
Tant Cap 0.1µF 10V 10%
Size = A 3216
3
3
3
1
2
2
10
2
2
1
4
1
3
3
3
CS, CS, CV
CIN
Tant Cap 0.33µF 10V 10%
Size = A 3216
Tant Cap 1µF 16V 10%
Size = A 3216
CB, CO1, CO2
CS1
Tant Cap 10µF 10V 10%
Size = C 6032
Tant Cap 220µF 16V 10%
Size = D 7343
CoutL, R
RL
Res 1.5K Ohm 1/8W
1% 1206
Res 20K Ohm 1/8W
1% 1206
RIN(4), RF(2),
RDOCK(2), RBS(2)
Res 100K Ohm 1/8W
1% 1206
RPU, RS
RBEEP
Res 200K Ohm 1/16W 1%
0603
Stereo Headphone Jack W/
Switch
Mouser # 161-
3500
Slide Switch
mute, mode, Gain, Mouser #
SD
10SP003
Potentiometer
RCA Jack
Volume Control
Mouser # 317-
2090-100K
Right-In, Beep-In,
Left-In
Mouser #
16PJ097
Banana Jack, Black
Banana Jack, Red
Mouser # ME164-
6219
Mouser # ME164-
6218
Revision History
Rev
Date
Description
1.0
7/15/05
Added f = 1kHz to the titles on A2, A3, A4, A5,
A6, A7, and A8. Re-released D/S to the WEB.
B
5/03/13
Changed layout of National Data Sheet to TI
format.
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PACKAGE OPTION ADDENDUM
www.ti.com
17-May-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM4938MH/NOPB
LM4938MHX/NOPB
ACTIVE
ACTIVE
HTSSOP
HTSSOP
PWP
PWP
28
28
48
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-20 to 85
-20 to 85
LM4938MH
LM4938MH
Samples
Samples
2500 RoHS & Green
SN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
17-May-2022
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Apr-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM4938MHX/NOPB
HTSSOP PWP
28
2500
330.0
16.4
6.8
10.2
1.6
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Apr-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
HTSSOP PWP 28
SPQ
Length (mm) Width (mm) Height (mm)
356.0 356.0 35.0
LM4938MHX/NOPB
2500
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Apr-2022
TUBE
*All dimensions are nominal
Device
Package Name Package Type
PWP HTSSOP
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
LM4938MH/NOPB
28
48
495
8
2514.6
4.06
Pack Materials-Page 3
PACKAGE OUTLINE
PWP0028A
PowerPADTM - 1.1 mm max height
S
C
A
L
E
1
.
8
0
0
PLASTIC SMALL OUTLINE
C
6.6
6.2
TYP
SEATING PLANE
A
PIN 1 ID
AREA
0.1 C
26X 0.65
28
1
9.8
9.6
NOTE 3
2X
8.45
14
B
15
0.30
0.19
28X
1.1 MAX
4.5
4.3
0.1
C A
B
NOTE 4
0.20
0.09
TYP
SEE DETAIL A
3.15
2.75
0.25
GAGE PLANE
5.65
5.25
0.10
0.02
THERMAL
PAD
0 - 8
0.7
0.5
DETAIL A
(1)
TYPICAL
4214870/A 10/2014
PowerPAD is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm, per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side.
5. Reference JEDEC registration MO-153, variation AET.
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EXAMPLE BOARD LAYOUT
PWP0028A
PowerPADTM - 1.1 mm max height
PLASTIC SMALL OUTLINE
(3.4)
NOTE 9
(3)
SOLDER
MASK
OPENING
SOLDER MASK
DEFINED PAD
28X (1.5)
28X (1.3)
28X (0.45)
28X (0.45)
1
28
26X
(0.65)
SYMM
(5.5)
(9.7)
SOLDER
MASK
OPENING
(1.3) TYP
14
15
(
0.2) TYP
(1.3)
SEE DETAILS
(0.65) TYP
(0.9) TYP
(6.1)
VIA
SYMM
METAL COVERED
BY SOLDER MASK
HV / ISOLATION OPTION
0.9 CLEARANCE CREEPAGE
OTHER DIMENSIONS IDENTICAL TO IPC-7351
(5.8)
IPC-7351 NOMINAL
0.65 CLEARANCE CREEPAGE
LAND PATTERN EXAMPLE
SCALE:6X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL
METAL UNDER
SOLDER MASK
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214870/A 10/2014
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).
9. Size of metal pad may vary due to creepage requirement.
www.ti.com
EXAMPLE STENCIL DESIGN
PWP0028A
PowerPADTM - 1.1 mm max height
PLASTIC SMALL OUTLINE
(3)
BASED ON
0.127 THICK
STENCIL
METAL COVERED
BY SOLDER MASK
28X (1.5)
28X (1.3)
28X (0.45)
1
28
26X (0.65)
28X (0.45)
(5.5)
SYMM
BASED ON
0.127 THICK
STENCIL
14
15
SEE TABLE FOR
DIFFERENT OPENINGS
SYMM
(6.1)
FOR OTHER STENCIL
THICKNESSES
(5.8)
HV / ISOLATION OPTION
0.9 CLEARANCE CREEPAGE
OTHER DIMENSIONS IDENTICAL TO IPC-7351
IPC-7351 NOMINAL
0.65 CLEARANCE CREEPAGE
SOLDER PASTE EXAMPLE
EXPOSED PAD
100% PRINTED SOLDER COVERAGE AREA
SCALE:6X
STENCIL
THICKNESS
SOLDER STENCIL
OPENING
0.1
3.55 X 6.37
3.0 X 5.5 (SHOWN)
2.88 X 5.16
0.127
0.152
0.178
2.66 X 4.77
4214870/A 10/2014
NOTES: (continued)
10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
11. Board assembly site may have different recommendations for stencil design.
www.ti.com
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Copyright © 2022, Texas Instruments Incorporated
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