LM4991 [TI]

3W Audio Power Amplifier with Shutdown Mode;
LM4991
型号: LM4991
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

3W Audio Power Amplifier with Shutdown Mode

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LM4991  
www.ti.com  
SNAS217A MAY 2004REVISED APRIL 2013  
LM4991  
3W Audio Power Amplifier with Shutdown Mode  
Check for Samples: LM4991  
1
FEATURES  
DESCRIPTION  
The LM4991 is a mono bridged audio power amplifier  
capable of delivering 3W of continuous average  
power into a 3load with less than 10% THD when  
powered by a 5V power supply (see Note below). To  
conserve power in portable applications, the  
LM4991's micropower shutdown mode (ISD = 0.1µA,  
typ) is activated when VDD is applied to the  
SHUTDOWN pin.  
2
Available in Space-Saving WSON and SOIC  
Packages  
Ultra Low Current Shutdown Mode  
Can Drive Capacitive Loads up to 500pF  
Improved Click and Pop Circuitry Reduces  
Noises During Turn-On and Turn-Off  
Transitions  
Boomer audio power amplifiers are designed  
specifically to provide high power, high fidelity audio  
output. They require few external components and  
operate on low supply voltages from 2.2V to 5.5V.  
Since the LM4991 does not require output coupling  
capacitors, bootstrap capacitors, or snubber  
networks, it is ideally suited for low-power portable  
systems that require minimum volume and weight.  
2.2 - 5.5V Operation  
No Output Coupling Capacitors, Snubber  
Networks, Bootstrap Capacitors or Gain-  
Setting Resistors Required  
Unity-Gain Stable  
APPLICATIONS  
Additional LM4991 features include thermal shutdown  
protection, unity-gain stability, and external gain set.  
Wireless and Cellular Handsets  
PDAs  
Note: An LM4991LD that has been properly mounted  
to a circuit board will deliver 3W into 3(at 10%  
THD). The other package options for the LM4991 will  
deliver 1.5W into 8(at 10% THD). See the  
Portable Computers  
Desktop Computers  
KEY SPECIFICATIONS  
Application  
information  
LM4991M.  
Information  
concerning  
sections  
the LM4991LD  
for  
further  
and  
Improved PSRR at 217kHz and 1kHz: 64 dB  
(typ)  
PO at VDD = 5.0V, 10% THD, 1kHz  
LM4991LD (only), 3, 4: 3W (typ), 2.5 W  
(typ)  
All packages, 8load: 1.5 W (typ)  
Shutdown current: 0.1µA (typ)  
Connection Diagrams  
Top View  
Top View  
Figure 1. SOIC Package  
See Package Number D0008A  
Figure 2. WSON Package  
See Package Number NGN0008A  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2004–2013, Texas Instruments Incorporated  
LM4991  
SNAS217A MAY 2004REVISED APRIL 2013  
www.ti.com  
Typical Application  
Figure 3. Typical Audio Amplifier Application Circuit  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
Absolute Maximum Ratings(1)(2)  
Supply Voltage  
6.0V  
65°C to +150°C  
0.3V to VDD to +0.3V  
Internally Limited  
2000V  
Supply Temperature  
Input Voltage  
Power Dissipation(3)  
ESD Susceptibility(4)  
ESD Susceptibility(5)  
Junction Temperature  
Thermal Resistance  
200V  
150°C  
θJC (LD)(6)  
θJA (LD)  
4.3°C/W  
56°C/W  
θJC (MA)  
θJA (MA)  
35°C/W  
140°C/W  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics VDD= 5V state DC and AC  
electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within  
the Operating Ratings. Specifications are not ensure for parameters where no limit is given, however, the typical value is a good  
indication of device performance.  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and  
specifications.  
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature  
TA. The maximum allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Maximum Ratings, whichever  
is lower. For the LM4991, TJMAX = 150°C. For the θJA's for different packages, please see theApplication Information section or the  
Absolute Maximum Ratings section.  
(4) Human body model, 100pF discharged through a 1.5kresistor.  
(5) Machine Model, 220pF–240pF discharged through all pins.  
(6) The given θJA is for an LM4991 packaged in an LDC08A with the Exposed–DAP soldered to an exposed 1in2 area of 1oz printed circuit  
board copper.  
Operating Ratings  
Temperature Range  
T
MIN TA TMAX  
40°C TA +85°C  
2.2V VDD 5.5V  
Supply Voltage  
2
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(1) (2)  
Electrical Characteristics VDD = 5V  
The following specifications apply for VDD = 5V and RL = 8unless otherwise specified. Limits apply for TA = 25°C.  
LM4991  
Parameter  
Test Conditions  
Units  
(Limits)  
Typ(3)  
Limit(4)  
Quiescent Power Supply Current VIN = 0V, no Load  
3
4
7
IDD  
mA (max)  
VIN = 0V, RL = 8Ω  
10  
2.0  
ISD  
Shutdown Current  
Shutdown Voltage  
VSHUTDOWN = VDD  
0.1  
1.5  
1.3  
5
µA (max)  
V
VSDIH  
VSDIL  
VOS  
V
Output Offset Voltage  
35  
mV (max)  
W (min)  
(5)  
(5)  
THD = 1% (max), f = 1kHz  
THD+N = 10%, f = 1kHz  
LM4991LD, RL = 3Ω  
LM4991LD, RL = 4Ω  
LM4991, RL = 8Ω  
2.38  
2.1  
1.3  
3
0.9  
Po  
Output Power  
(5)  
(5)  
LM4991LD, RL = 3Ω  
LM4991LD, RL = 4Ω  
LM4991, RL = 8Ω  
2.5  
1.5  
0.2  
W
THD+N  
PSRR  
Total Harmonic Distortion+Noise PO = 0.5W, f = 1kHz  
%
Power Supply Rejection Ratio  
VRIPPLE = 200mV sine p-p,  
Input terminated with 10,  
f = 1kHz  
64  
55  
dB (min)  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics VDD= 5V state DC and AC  
electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within  
the Operating Ratings. Specifications are not ensure for parameters where no limit is given, however, the typical value is a good  
indication of device performance.  
(2) All voltages are measured with respect to the ground pin, unless otherwise specified.  
(3) Typicals are specified at 25°C and represent the parametric norm.  
(4) Limits are ensured to AOQL (Average Outgoing Quality Level).  
(5) When driving 3or 4loads from a 5V supply, the LM4991LD must be mounted to a circuit board.  
(1) (2)  
Electrical Characteristics VDD = 3V  
The following specifications apply for VDD = 3V and RL = 8unless otherwise specified. Limits apply for TA = 25°C.  
LM4991  
Parameter  
Test Conditions  
Units  
(Limits)  
Typ(3)  
Limit(4)  
IDD  
Quiescent Power Supply  
Current  
VIN = 0V, no Load  
VIN = 0V, RL = 8Ω  
VSHUTDOWN = VDD  
3
4
7
7
mA  
(max)  
ISD  
Shutdown Current  
0.1  
1.1  
0.9  
5
2.0  
µA (max)  
VSDIH  
VSDIL  
VOS  
Shutdown Voltage Input High  
Shutdown Voltage Input Low  
Output Offset Voltage  
V
V
35  
mV  
(max)  
Po  
Output Power  
THD = 1% (max), f = 1kHz  
PO = 0.25W, f = 1kHz  
RL = 4Ω  
RL = 8Ω  
600  
425  
mW  
%
Total Harmonic  
Distortion+Noise  
THD+N  
0.1  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics VDD= 5V state DC and AC  
electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within  
the Operating Ratings. Specifications are not ensure for parameters where no limit is given, however, the typical value is a good  
indication of device performance.  
(2) All voltages are measured with respect to the ground pin, unless otherwise specified.  
(3) Typicals are specified at 25°C and represent the parametric norm.  
(4) Limits are ensured to AOQL (Average Outgoing Quality Level).  
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Electrical Characteristics VDD = 3V (1) (2) (continued)  
The following specifications apply for VDD = 3V and RL = 8unless otherwise specified. Limits apply for TA = 25°C.  
LM4991  
Parameter  
Test Conditions  
Units  
(Limits)  
Typ(3)  
Limit(4)  
PSRR  
Power Supply Rejection Ratio VRIPPLE = 200mV sine p-p,  
Input terminated with 10,  
68  
dB  
f = 1kHz  
(1) (2)  
Electrical Characteristics VDD = 2.6V  
The following specifications apply for VDD = 2.6V and RL = 8unless otherwise specified. Limits apply for TA = 25°C.  
LM4991  
Parameter  
Test Conditions  
Units  
(Limits)  
Typ(3)  
Limits(4)  
Quiescent Power Supply Current VIN = 0V, no Load  
2
3
IDD  
mA (max)  
VIN = 0V, RL = 8Ω  
ISD  
Shutdown Current  
VSHUTDOWN = VDD  
0.1  
1
µA(max)  
VSDIH  
VSDIL  
VOS  
Shutdown Voltage Input High  
Shutdown Voltage Input Low  
Output Offset Voltage  
V
0.9  
5
V
mV (max)  
mW  
35  
THD = 1% (max), f = 1kHz  
RL = 4Ω  
RL = 8Ω  
400  
300  
0.1  
Po  
Output Power  
%
THD+N  
PSRR  
Total Harmonic Distortion+Noise PO = 0.15W, f = 1kHz  
Power Supply Rejection Ratio  
VRIPPLE = 200mV sine p-p,  
Input terminated with 10,  
f = 1kHz  
51  
dB  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics VDD= 5V state DC and AC  
electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within  
the Operating Ratings. Specifications are not ensure for parameters where no limit is given, however, the typical value is a good  
indication of device performance.  
(2) All voltages are measured with respect to the ground pin, unless otherwise specified.  
(3) Typicals are specified at 25°C and represent the parametric norm.  
(4) Limits are ensured to AOQL (Average Outgoing Quality Level).  
External Components Description  
(Figure 3)  
Components  
Functional Description  
1.  
Ri  
Inverting input resistance that sets the closed-loop gain in conjunction with Rf. This resistor also forms a high pass filter  
with Ci at fC= 1/(2π RiCi).  
2.  
Ci  
Input coupling capacitor that blocks the DC voltage at the amplifiers input terminals. Also creates a highpass filter with  
Ri at fc = 1/(2π RiCi). Refer to the section, PROPER SELECTION OF EXTERNAL COMPONENTS, for an explanation  
of how to determine the value of Ci.  
3.  
4.  
Rf  
Feedback resistance that sets the closed-loop gain in conjunction with Ri.  
CS  
Supply bypass capacitor that provides power supply filtering. Refer to the POWER SUPPLY BYPASSING section for  
information concerning proper placement and selection of the supply bypass capacitor.  
5.  
CB  
Bypass pin capacitor that provides half-supply filtering. Refer to the section, PROPER SELECTION OF EXTERNAL  
COMPONENTS, for information concerning proper placement and selection of CB.  
4
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Typical Performance Characteristics  
LD and MA Specific Characteristics  
THD+N vs Frequency  
VDD = 5V, RL = 4, and PO = 1W  
THD+N vs Output Power  
VDD = 5V, RL = 4, and f = 1 kHz  
10  
1
10  
1
0.1  
0.1  
0.01  
0.01  
20  
100  
1k  
FREQUENCY (Hz)  
Figure 4.  
10k 20k  
10m  
100m  
1
3
OUTPUT POWER (W)  
Figure 5.  
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Typical Performance Characteristics  
THD+N vs Frequency  
VDD = 5V, RL = 8, and PO = 500mW  
THD+N vs Frequency  
VDD = 3V, RL = 4, and PO = 500mW  
10  
1
10  
1
0.1  
0.1  
0.01  
0.01  
20  
100  
1k  
FREQUENCY (Hz)  
Figure 6.  
10k 20k  
20  
100  
1k  
FREQUENCY (Hz)  
Figure 7.  
10k 20k  
THD+N vs Frequency  
VDD = 3V, RL = 8, and PO = 250mW  
THD+N vs Frequency  
VDD = 2.6V, RL = 4, and PO = 150mW  
10  
1
10  
1
0.1  
0.1  
0.01  
0.01  
20  
100  
1k  
FREQUENCY (Hz)  
Figure 8.  
10k 20k  
20  
100  
1k  
FREQUENCY (Hz)  
Figure 9.  
10k 20k  
THD+N vs Frequency  
VDD = 2.6V, RL = 8, and PO = 150mW  
THD+N vs Output Power  
VDD = 5V, RL = 8, and f = 1kHz  
10  
1
10  
1
0.1  
0.1  
0.01  
0.01  
20  
100  
1k  
FREQUENCY (Hz)  
Figure 10.  
10k 20k  
10m  
100m  
1
3
OUTPUT POWER (W)  
Figure 11.  
6
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Typical Performance Characteristics (continued)  
THD+N vs Output Power  
VDD = 3V, RL = 4, and f = 1kHz  
THD+N vs Output Power  
VDD = 3V, RL = 8, and f = 1kHz  
10  
1
10  
1
0.1  
0.1  
0.01  
0.01  
10m  
100m  
1
10m  
100m  
1
OUTPUT POWER (W)  
Figure 12.  
OUTPUT POWER (W)  
Figure 13.  
THD+N vs Output Power  
VDD = 2.6V, RL = 4, and f = 1kHz  
THD+N vs Output Power  
VDD = 2.6V, RL = 8, and f = 1kHz  
10  
1
10  
1
0.1  
0.1  
0.01  
0.01  
10m  
100m  
1
10m  
100m  
OUTPUT POWER (W)  
Figure 15.  
500m  
OUTPUT POWER (W)  
Figure 14.  
Power Supply Rejection Ratio (PSRR) vs Frequency  
Power Supply Rejection Ratio (PSRR) vs Frequency  
VDD = 5V, RL = 8, input 10terminated  
VDD = 5V, RL = 8, input floating  
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
20  
100  
1k  
10k 20k  
20  
100  
1k  
FREQUENCY (Hz)  
Figure 16.  
10k 20k  
FREQUENCY (Hz)  
Figure 17.  
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Typical Performance Characteristics (continued)  
Power Supply Rejection Ratio (PSRR) vs Frequency  
Power Supply Rejection Ratio (PSRR) vs Frequency  
VDD = 3V, RL = 8, input floating  
VDD = 3V, RL = 8, input 10terminated  
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
20  
100  
1k  
10k 20k  
20  
100  
1k  
10k 20k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 18.  
Figure 19.  
Power Supply Rejection Ratio (PSRR) vs Frequency  
Power Supply Rejection Ratio (PSRR) vs Frequency  
VDD = 2.6V, RL = 8, input 10terminated  
VDD = 2.6V, RL = 8, Input Floating  
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
20  
100  
1k  
10k 20k  
20  
100  
1k  
10k 20k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 20.  
Figure 21.  
Noise Floor, 5V, 8Ω  
80kHz Bandwidth, Input to GND  
Open Loop Frequency Response, 5V  
Figure 22.  
Figure 23.  
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Typical Performance Characteristics (continued)  
Power Dissipation vs Output Power, VDD = 5V  
Power Dissipation vs Output Power, VDD = 3V  
1.4  
0.5  
0.45  
4W  
1.2  
0.4  
4W  
1
0.35  
8W  
0.3  
0.8  
0.25  
0.2  
0.15  
0.1  
0.05  
0
0.6  
8W  
0.4  
0.2  
0
0
0.5  
1
1.5  
2
2.5  
0
0.2  
0.4  
0.6  
0.8  
1
OUTPUT POWER (W)  
OUTPUT POWER (W)  
Figure 24.  
Figure 25.  
Shutdown Hysteresis Voltage  
VDD = 5V, SD Mode = VDD  
Power Dissipation vs Output Power, VDD = 2.6V  
0.4  
0.35  
4W  
0.3  
0.25  
0.2  
8W  
0.15  
0.1  
0.05  
0
0
0.1  
0.2  
0.4  
0.5  
0.6  
0.3  
OUTPUT POWER (W)  
Figure 26.  
Figure 27.  
Shutdown Hysteresis Voltage  
VDD = 3V, SD Mode = VDD  
Shutdown Hysteresis Voltage  
VDD = 2.6V, SD Mode = VDD  
Figure 28.  
Figure 29.  
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Typical Performance Characteristics (continued)  
Output Power vs Supply Voltage, RL = 4Ω  
Output Power vs Supply Voltage, RL = 8Ω  
3
3.5  
f = 1kHz  
f = 1kHz  
3
2.5  
2.5  
2
1.5  
1
10% THD+N  
2
1.5  
1
10% THD+N  
1% THD+N  
1% THD+N  
500m  
500m  
0
0
2.2  
3
4
5
5.5  
2.2  
3
4
5
5.5  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
Figure 30.  
Figure 31.  
Output Power vs Supply Voltage, RL = 16Ω  
1000  
Output Power vs Supply Voltage, RL = 32Ω  
1000  
900  
800  
700  
600  
500  
400  
300  
200  
100  
0
900  
800  
700  
600  
500  
400  
300  
200  
100  
0
f=1kHz  
f=1kHz  
10% THD+N  
1% THD+N  
10% THD+N  
1% THD+N  
2.2  
3
4
5
5.5  
2.2  
3
4
5
5.5  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
Figure 32.  
Figure 33.  
Frequency Response vs Input Capacitor Size  
Figure 34.  
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APPLICATION INFORMATION  
EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATION  
The LM4991's exposed-DAP (die attach paddle) package (LD) provides a low thermal resistance between the die  
and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the  
surrounding PCB copper traces, ground plane, and surrounding air. The result is a low voltage audio power  
amplifier that produces 2W at 1% THD with a 4load. This high power is achieved through careful  
consideration of necessary thermal design. Failing to optimize thermal design may compromise the LM4991's  
high power performance and activate unwanted, though necessary, thermal shutdown protection.  
The LD package must have its DAP soldered to a copper pad on the PCB. The DAP's PCB copper pad is  
connected to a large plane of continuous unbroken copper. This plane forms a thermal mass, heat sink, and  
radiation area. Place the heat sink area on either outside plane in the case of a two-sided PCB, or on an inner  
layer of a board with more than two layers. Connect the DAP copper pad to the inner layer or backside copper  
heat sink area with 4(2x2) vias. The via diameter should be 0.012in-0.013in with a 1.27mm pitch. Ensure efficient  
thermal conductivity by plating through the vias.  
Best thermal performance is achieved with the largest practical heat sink area. If the heatsink and amplifier share  
the same PCB layer, a nominal 2.5in2 area is necessary for 5V operation with a 4load. Heatsink areas not  
placed on the same PCB layer as the LM4991 should be 5in2 (min) for the same supply voltage and load  
resistance. The last two area recommendations apply for 25°C ambient temperature. Increase the area to  
compensate for ambient temperatures above 25°C. The LM4991's power de-rating curve in the Typical  
Performance Characteristics shows the maximum power dissipation versus temperature. An example PCB layout  
for the LD package is shown in the Demonstration Board Layout section. Further detailed and specific  
information concerning PCB layout, fabrication, and mounting an LD (WSON) package is available from Texas  
Instruments Package Engineering Group under application note AN-1187 (Literature Number SNOA401).  
PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 3AND 4Ω  
LOADS  
Power dissipated by a load is a function of the voltage swing across the load and the load's impedance. As load  
impedance decreases, load dissipation becomes increasingly dependant on the interconnect (PCB trace and  
wire) resistance between the amplifier output pins and the load's connections. Residual trace resistance causes  
a voltage drop, which results in power dissipated in the trace and not in the load as desired. For example, 0.1Ω  
trace resistance reduces the output power dissipated by a 4load from 2.0W to 1.95W. This problem of  
decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load  
dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide  
as possible.  
Poor power supply regulation adversely affects maximum output power. A poorly regulated supply's output  
voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output  
signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the  
same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps  
maintain full output voltage swing.  
BRIDGE CONFIGURATION EXPLANATION  
As shown in Figure 3, the LM4991 has two operational amplifiers internally, allowing for a few different amplifier  
configurations. The first amplifier's gain is externally configurable; the second amplifier is internally fixed in a  
unity-gain, inverting configuration. The closed-loop gain of the first amplifier is set by selecting the ratio of Rf to Ri  
while the second amplifier's gain is fixed. Figure 3 shows that the output of amplifier one serves as the input to  
amplifier two, which results in both amplifiers producing signals identical in magnitude, but 180° out of phase.  
Consequently, the differential gain for the IC is  
AVD= 2 *(Rf/Ri)  
(1)  
By driving the load differentially through outputs Vo1 and Vo2, an amplifier configuration commonly referred to as  
“bridged mode” is established. Bridged mode operation is different from the classical single-ended amplifier  
configuration where one side of its load is connected to ground.  
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A bridge amplifier design has a few distinct advantages over the single-ended configuration, as it provides  
differential drive to the load, thus doubling output swing for a specified supply voltage. Four times the output  
power is possible as compared to a single-ended amplifier under the same conditions. This increase in attainable  
output power assumes that the amplifier is not current limited or clipped. In order to choose an amplifier's closed-  
loop gain without causing excessive clipping, please refer to the AUDIO POWER AMPLIFIER DESIGN section.  
Another advantage of the differential bridge output is no net DC voltage across load. This results from biasing  
VO1 and VO2 at the same DC voltage, in this case VDD/2 . This eliminates the coupling capacitor that single  
supply, single-ended amplifiers require. Eliminating an output coupling capacitor in a single-ended configuration  
forces a single supply amplifier's half-supply bias voltage across the load. The current flow created by the half-  
supply bias voltage increases internal IC power dissipation and my permanently damage loads such as  
speakers.  
POWER DISSIPATION  
Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or  
single-ended. A direct consequence of the increased power delivered to the load by a bridge amplifier is an  
increase in internal power dissipation. Equation (2) states the maximum power dissipation point for a bridge  
amplifier operating at a given supply voltage and driving a specified output load.  
PDMAX = 4*(VDD)2/(2π2RL)  
(2)  
Since the LM4991 has two operational amplifiers in one package, the maximum internal power dissipation is 4  
times that of a single-ended ampifier. Even with this substantial increase in power dissipation, the LM4991 does  
not require heatsinking under most operating conditions and output loading. From Equation (2), assuming a 5V  
power supply and an 8load, the maximum power dissipation point is 625 mW. The maximum power dissipation  
point obtained from Equation (2) must not be greater than the power dissipation that results from Equation (3):  
PDMAX = (TJMAX–TA)/θJA  
(3)  
For the SO package, θJA = 140°C/W. For the LD package soldered to a DAP pad that expands to a copper area  
of 1.0in2 on a PCB, the LM4991's θJA is 56°C/W. TJMAX = 150°C for the LM4991. The θJA can be decreased by  
using some form of heat sinking. The resultant θJA will be the summation of the θJC, θCS, and θSA. θJC is the  
junction to case of the package (or to the exposed DAP, as is the case with the LD package), θCS is the case to  
heat sink thermal resistance and θSA is the heat sink to ambient thermal resistance. By adding additional copper  
area around the LM4991, the θJA can be reduced from its free air value for the SO package. Increasing the  
copper area around the LD package from 1.0in2 to 2.0in2 area results in a θJA decrease to 46°C/W. Depending  
on the ambient temperature, TA, and the θJA, Equation (3) can be used to find the maximum internal power  
dissipation supported by the IC packaging. If the result of Equation (2) is greater than that of Equation (3), then  
either the supply voltage must be decreased, the load impedance increased, the θJA decreased, or the ambient  
temperature reduced. For the typical application of a 5V power supply, with an 8load, and no additional  
heatsinking, the maximum ambient temperature possible without violating the maximum junction temperature is  
approximately 61°C provided that device operation is around the maximum power dissipation point and assuming  
surface mount packaging. For the LD package in a typical application of a 5V power supply, with a 4load, and  
1.0in2 copper area soldered to the exposed DAP pad, the maximum ambient temperature is approximately 77°C  
providing device operation is around the maximum power dissipation point. Internal power dissipation is a  
function of output power. If typical operation is not around the maximum power dissipation point, the ambient  
temperature can be increased. Refer to the Typical Performance Characteristics curves for power dissipation  
information for different output powers and output loading.  
POWER SUPPLY BYPASSING  
As with any amplifier, proper supply bypassing is critical for low noise performance and high power supply  
rejection. The capacitor location on both the bypass and power supply pins should be as close to the LM4991 as  
possible. The capacitor connected between the bypass pin and ground improves the internal bias voltage's  
stability, producing improved PSRR. The improvements to PSRR increase as the bypass pin capacitor increases.  
Typical applications employ a 5V regulator with 10µF and a 0.1µF bypass capacitors which aid in supply stability.  
This does not eliminate the need for bypassing the supply nodes of the LM4991 with a 1µF tantalum capacitor.  
The selection of bypass capacitors, especially CB, is dependent upon PSRR requirements, click and pop  
performance as explained in the section, PROPER SELECTION OF EXTERNAL COMPONENTS, system cost,  
and size constraints.  
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SHUTDOWN FUNCTION  
In order to reduce power consumption while not in use, the LM4991 contains a shutdown pin to externally turn off  
the amplifier's bias circuitry. This shutdown feature turns the amplifier off when a logic high is placed on the  
shutdown pin. The trigger point between a logic low and logic high level is typically half- supply. It is best to  
switch between ground and supply to provide maximum device performance. By switching the shutdown pin to  
VDD, the LM4991 supply current draw will be minimized in idle mode. While the device will be disabled with  
shutdown pin voltages less then VDD, the idle current may be greater than the typical value of 0.1µA. In either  
case, the shutdown pin should be tied to a definite voltage to avoid unwanted state changes.  
In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry which  
provides a quick, smooth transition into shutdown. Another solution is to use a single-pole, single-throw switch in  
conjunction with an external pull-up resistor. When the switch is closed, the shutdown pin is connected to ground  
and enables the amplifier. If the switch is open, then the external pull-up resistor will disable the LM4991. This  
scheme ensures that the shutdown pin will not float thus preventing unwanted state changes.  
PROPER SELECTION OF EXTERNAL COMPONENTS  
Proper selection of external components in applications using integrated power amplifiers is critical to optimize  
device and system performance. While the LM4991 is tolerant of external component combinations,  
consideration to component values must be used to maximize overall system quality.  
The LM4991 is unity-gain stable which gives a designer maximum system flexibility. The LM4991 should be used  
in low gain configurations to minimize THD+N values, and maximize the signal to noise ratio. Low gain  
configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1  
Vrms are available from sources such as audio codecs. Please refer to the section, AUDIO POWER AMPLIFIER  
DESIGN, for a more complete explanation of proper gain selection.  
Besides gain, one of the major considerations is the closed-loop bandwidth of the amplifier. To a large extent, the  
bandwidth is dictated by the choice of external components shown in Figure 3. The input coupling capacitor, Ci,  
forms a first order high pass filter which limits low frequency response. This value should be chosen based on  
needed frequency response for a few distinct reasons.  
Selection Of Input Capacitor Size  
Large input capacitors are both expensive and space hungry for portable designs. Clearly, a certain sized  
capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the speakers  
used in portable systems, whether internal or external, have little ability to reproduce signals below 100Hz to  
150Hz. Thus, using a large input capacitor may not increase actual system performance.  
In addition to system cost and size, click and pop performance is effected by the size of the input coupling  
capacitor, Ci. A larger input coupling capacitor requires more charge to reach its quiescent DC voltage (nominally  
1/2 VDD). This charge comes from the output via the feedback and is apt to create pops upon device enable.  
Thus, by minimizing the capacitor size based on necessary low frequency response, turn-on pops can be  
minimized.  
Besides minimizing the input capacitor size, careful consideration should be paid to the bypass capacitor value.  
Bypass capacitor, CB, is the most critical component to minimize turn-on pops since it determines how fast the  
LM4991 turns on. The slower the LM4991's outputs ramp to their quiescent DC voltage (nominally 1/2 VDD), the  
smaller the turn-on pop. Choosing CB equal to 1.0µF along with a small value of Ci (in the range of 0.1µF to  
0.39µF), should produce a virtually clickless and popless shutdown function. While the device will function  
properly, (no oscillations or motorboating), with CB equal to 0.1µF, the device will be much more susceptible to  
turn-on clicks and pops. Thus, a value of CB equal to 1.0µF is recommended in all but the most cost sensitive  
designs.  
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AUDIO POWER AMPLIFIER DESIGN  
Design a 1W/8Audio Amplifier  
www.ti.com  
Given:  
Power Output  
Load Impedance  
Input Level  
1 Wrms  
8Ω  
1 Vrms  
Input Impedance  
Bandwidth  
20 kΩ  
100 Hz–20 kHz ± 0.25 dB  
A designer must first determine the minimum supply rail to obtain the specified output power. By extrapolating  
from the Output Power vs Supply Voltage graphs in theTypical Performance Characteristics section, the supply  
rail can be easily found. A second way to determine the minimum supply rail is to calculate the required Vopeak  
using Equation (3) and add the output voltage. Using this method, the minimum supply voltage would be (Vopeak  
+ (VOD + VODBOT)), where V  
and VOD are extrapolated from the Dropout Voltage vs Supply Voltage curve  
TOP  
BOT  
OD  
TOP  
in the Typical Performance Characteristics section.  
(4)  
Using the Output Power vs Supply Voltage graph for an 8load, the minimum supply rail is 4.6V. But since 5V is  
a standard voltage in most applications, it is chosen for the supply rail. Extra supply voltage creates headroom  
that allows the LM4991 to reproduce peaks in excess of 1W without producing audible distortion. At this time, the  
designer must make sure that the power supply choice along with the output impedance does not violate the  
conditions explained in the POWER DISSIPATION section.  
Once the power dissipation equations have been addressed, the required differential gain can be determined  
from Equation (4).  
(5)  
Rf/Ri = AVD/2  
(6)  
From Equation (4), the minimum AVD is 2.83; use AVD = 3.  
Since the desired input impedance was 20k, and with a AVD impedance of 2, a ratio of 1.5:1 of Rf to Ri results  
in an allocation of Ri = 20kand Rf = 30k. The final design step is to address the bandwidth requirements  
which must be stated as a pair of 3dB frequency points. Five times away from a 3dB point is 0.17dB down  
from passband response which is better than the required ±0.25dB specified.  
fL = 100Hz/5 = 20Hz  
fH = 20kHz * 5 = 100kHz  
As stated in the External Components Description section, Ri in conjunction with Ci create a highpass filter.  
Ci 1/(2π*20k*20Hz) = 0.397µF; use 0.39µF  
The high frequency pole is determined by the product of the desired frequency pole, fH, and the differential gain,  
AVD. With a AVD = 3 and fH = 100kHz, the resulting GBWP = 150kHz which is much smaller than the LM4991  
GBWP of 4MHz. This figure displays that if a designer has a need to design an amplifier with a higher differential  
gain, the LM4991 can still be used without running into bandwidth limitations.  
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SNAS217A MAY 2004REVISED APRIL 2013  
REVISION HISTORY  
Changes from Original (April 2013) to Revision A  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 14  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
12-Oct-2014  
PACKAGING INFORMATION  
Orderable Device  
LM4991LD/NOPB  
LM4991LDX/NOPB  
LM4991MA/NOPB  
LM4991MAX/NOPB  
Status Package Type Package Pins Package  
Eco Plan  
Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 85  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(6)  
(3)  
(4/5)  
ACTIVE  
WSON  
WSON  
SOIC  
NGN  
8
8
8
8
1000  
Green (RoHS  
& no Sb/Br)  
CU SN  
CU SN  
CU SN  
CU SN  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
L4991  
L4991  
ACTIVE  
ACTIVE  
ACTIVE  
NGN  
D
4500  
95  
Green (RoHS  
& no Sb/Br)  
-40 to 85  
Green (RoHS  
& no Sb/Br)  
-40 to 85  
LM49  
91MA  
SOIC  
D
2500  
Green (RoHS  
& no Sb/Br)  
-40 to 85  
LM49  
91MA  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish  
value exceeds the maximum column width.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
12-Oct-2014  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
8-Apr-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LM4991LD/NOPB  
LM4991LDX/NOPB  
LM4991MAX/NOPB  
WSON  
WSON  
SOIC  
NGN  
NGN  
D
8
8
8
1000  
4500  
2500  
178.0  
330.0  
330.0  
12.4  
12.4  
12.4  
4.3  
4.3  
6.5  
4.3  
4.3  
5.4  
1.3  
1.3  
2.0  
8.0  
8.0  
8.0  
12.0  
12.0  
12.0  
Q1  
Q1  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
8-Apr-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LM4991LD/NOPB  
LM4991LDX/NOPB  
LM4991MAX/NOPB  
WSON  
WSON  
SOIC  
NGN  
NGN  
D
8
8
8
1000  
4500  
2500  
213.0  
367.0  
367.0  
191.0  
367.0  
367.0  
55.0  
35.0  
35.0  
Pack Materials-Page 2  
MECHANICAL DATA  
NGN0008A  
LDC08A (Rev B)  
www.ti.com  
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