LM4995TM/NOPB [TI]

1.3 W Audio Power Amplifier;
LM4995TM/NOPB
型号: LM4995TM/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

1.3 W Audio Power Amplifier

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LM4995, LM4995TMBD  
www.ti.com  
SNAS329G APRIL 2006REVISED APRIL 2013  
LM4995  
1.3 W Audio Power Amplifier  
Check for Samples: LM4995, LM4995TMBD  
1
FEATURES  
DESCRIPTION  
The LM4995 is an audio power amplifier primarily  
designed for demanding applications in mobile  
phones and other portable communication device  
applications. It is capable of delivering 1.2W of  
continuous average power to an 8BTL load with  
less than 1% distortion (THD+N) from a 5VDC power  
supply.  
2
Available in Space-Saving 0.4mm Pitch  
DSBGA Package  
Ultra Low Current Shutdown Mode  
BTL Output Can Drive Capacitive Loads  
Improved Click and Pop Circuitry Eliminates  
Noise during Turn-On and Turn-Off Transitions  
Boomer audio power amplifiers were designed  
specifically to provide high quality output power with a  
minimal amount of external components. The  
LM4995 does not require output coupling capacitors  
or bootstrap capacitors, and therefore is ideally suited  
for mobile phone and other low voltage applications  
where minimal power consumption is a primary  
requirement.  
2.4 - 5.5V Operation  
No Output Coupling Capacitors, Snubber  
Networks or Bootstrap Capacitors Required  
Unity-Gain Stable  
External Gain Configuration Capability  
WSON Package: 0.5mm Pitch, 3 x 3 mm  
The LM4995 features a low-power consumption  
shutdown mode, which is achieved by driving the  
shutdown pin with logic low. Additionally, the LM4995  
features an internal thermal shutdown protection  
mechanism.  
APPLICATIONS  
Mobile Phones  
PDAs  
Portable electronic devices  
The LM4995 contains advanced click and pop  
circuitry which eliminates noise which would  
otherwise occur during turn-on and turn-off  
transitions.  
KEY SPECIFICATIONS  
PSRR at 3.6V (217Hz & 1kHz): 75 dB  
Output Power at 5.0V, 1% THD+N, 8:  
The LM4995 is unity-gain stable and can be  
configured by external gain-setting resistors.  
1.3 W (typ)  
Output Power at 3.6V, 1% THD+N, 8:  
625 mW (typ)  
Shutdown Current: 0.01µA (typ)  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2006–2013, Texas Instruments Incorporated  
LM4995, LM4995TMBD  
SNAS329G APRIL 2006REVISED APRIL 2013  
www.ti.com  
TYPICAL APPLICATION  
Figure 1. Typical Audio Amplifier Application Circuit  
CONNECTION DIAGRAM  
xxx  
xxx  
V
1
3
2
1
-IN  
+IN  
O
SHUTDOWN  
1
8
V
2
O
BYPASS  
+IN  
2
3
7
6
GND  
V
DD  
GND  
V
DD  
GND  
-IN  
4
5
V
O
1
BYP  
A
V
2
SHDN  
C
O
Figure 3. WSON (Top View)  
See NGQ0008A Package  
B
Figure 2. DSBGA (Top View)  
See YFQ0009 Package  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
2
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LM4995, LM4995TMBD  
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SNAS329G APRIL 2006REVISED APRIL 2013  
ABSOLUTE MAXIMUM RATINGS(1)(2)  
Supply Voltage(3)  
6.0V  
65°C to +150°C  
0.3V to VDD +0.3V  
Internally Limited  
2000V  
Storage Temperature  
Input Voltage  
Power Dissipation(4)(5)  
ESD Susceptibility(6)  
ESD Susceptibility(7)  
200V  
Junction Temperature  
150°C  
Thermal Resistance  
θJA (DSBGA)  
θJA (WSON)  
96.5°C/W  
56°C/W  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical  
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the  
Operating Ratings. Specifications are not ensure for parameters where no limit is given, however, the typical value is a good indication  
of device performance.  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and  
specifications.  
(3) If the product is in Shutdown mode and VDD exceeds 6V (to a max of 8V VDD), then most of the excess current will flow through the  
ESD protection circuits. If the source impedance limits the current to a max of 10mA, then the device will be protected. If the device is  
enabled when VDD is greater than 5.5V and less than 6.5V, no damage will occur, although operation life will be reduced. Operation  
above 6.5V with no current limit will result in permanent damage.  
(4) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature  
TA. The maximum allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Maximum Ratings, whichever  
is lower. For the LM4995, see power derating curves for additional information.  
(5) Maximum power dissipation in the device (PDMAX) occurs at an output power level significantly below full output power. PDMAX can be  
calculated using Equation 1 shown in the APPLICATION INFORMATION section. It may also be obtained from the power dissipation  
graphs.  
(6) Human body model, 100pF discharged through a 1.5kresistor.  
(7) Machine Model, 220pF–240pF discharged through all pins.  
OPERATING RATINGS  
Temperature Range (TMIN TA TMAX  
)
40°C TA 85°C  
2.4V VDD 5.5V  
Supply Voltage  
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ELECTRICAL CHARACTERISTICS VDD = 5V(1)(2)  
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25°C.  
LM4995  
Typical(3)  
Units  
(Limits)  
Symbol  
Parameter  
Conditions  
Limit(4)(5)  
VIN = 0V, Io = 0A, No Load  
VIN = 0V, Io = 0A, 8Load  
VSD = VGND  
1.5  
1.8  
0.01  
5
2.5  
mA (max)  
mA  
IDD  
Quiescent Power Supply Current  
ISD  
VOS  
Po  
Shutdown Current  
Output Offset Voltage  
Output Power  
1
µA (max)  
mV (max)  
W
No Load  
26  
THD+N = 1% (max); f = 1 kHz  
1.3 (TM)  
1.25 (SD)  
TWU  
Wake-up time  
165  
ms  
%
THD+N  
Total Harmonic Distortion + Noise  
Po = 500mWRMS; f = 1kHz  
0.08  
Vripple = 200mV sine p-p  
Input terminated to GND  
73 (f = 217Hz)  
73 (f = 1kHz)  
PSRR  
Power Supply Rejection Ratio  
dB  
VSDIH  
VSDIL  
Shutdown Voltage Input High  
Shutdown Voltage Input Low  
1.5  
1.2  
V
V
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.  
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical  
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the  
Operating Ratings. Specifications are not ensure for parameters where no limit is given, however, the typical value is a good indication  
of device performance.  
(3) Typicals are measured at 25°C and represent the parametric norm.  
(4) Limits are specified to AOQL (Average Outgoing Quality Level).  
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.  
ELECTRICAL CHARACTERISTICS VDD = 3.6V(1)(2)  
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25°C.  
LM4995  
Typical(3)  
Units  
(Limits)  
Symbol  
Parameter  
Conditions  
Limit(4)(5)  
VIN = 0V, Io = 0A, No Load  
VIN = 0V, Io = 0A, 8Load  
VSD = VGND  
1.3  
1.6  
0.01  
5
2.3  
mA (max)  
mA  
IDD  
Quiescent Power Supply Current  
ISD  
Shutdown Current  
Output Offset Voltage  
Output Power  
1
µA (max)  
mV (max)  
mW  
VOS  
No Load  
26  
THD+N = 1% (max); f = 1 kHz  
625 (TM)  
610 (SD)  
Po  
TWU  
Wake-up time  
130  
ms  
%
THD+N  
Total Harmonic Distortion + Noise  
Po = 300mWRMS; f = 1kHz  
0.07  
Vripple = 200mV sine p-p  
Input terminated to GND  
75 (f = 217Hz)  
76 (f = 1kHz)  
PSRR  
Power Supply Rejection Ratio  
dB  
VSDIH  
VSDIL  
Shutdown Voltage Input High  
Shutdown Voltage Input Low  
1.3  
1
V
V
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.  
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical  
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the  
Operating Ratings. Specifications are not ensure for parameters where no limit is given, however, the typical value is a good indication  
of device performance.  
(3) Typicals are measured at 25°C and represent the parametric norm.  
(4) Limits are specified to AOQL (Average Outgoing Quality Level).  
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.  
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SNAS329G APRIL 2006REVISED APRIL 2013  
ELECTRICAL CHARACTERISTICS VDD = 3.0V(1)(2)  
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25°C.  
LM4995  
Typical(3)  
Units  
(Limits)  
Symbol  
Parameter  
Conditions  
Limit(4)(5)  
VIN = 0V, Io = 0A, No Load  
VIN = 0V, Io = 0A, 8Load  
VSD = VGND  
1.3  
1.6  
mA  
mA  
µA  
IDD  
Quiescent Power Supply Current  
ISD  
Shutdown Current  
0.01  
5
VOS  
Po  
Output Offset Voltage  
Output Power  
No Load  
mV  
mW  
ms  
%
THD+N = 1% (max); f = 1 kHz  
400  
110  
0.07  
TWU  
THD+N  
Wake-up time  
Total Harmonic Distortion + Noise  
Po = 250mWRMS; f = 1kHz  
Vripple = 200mV sine p-p  
Input terminated to GND  
74 (f = 217Hz)  
75 (f = 1kHz)  
PSRR  
Power Supply Rejection Ratio  
dB  
VSDIH  
VSDIL  
Shutdown Voltage Input High  
Shutdown Voltage Input Low  
1.2  
1
V
V
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.  
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical  
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the  
Operating Ratings. Specifications are not ensure for parameters where no limit is given, however, the typical value is a good indication  
of device performance.  
(3) Typicals are measured at 25°C and represent the parametric norm.  
(4) Limits are specified to AOQL (Average Outgoing Quality Level).  
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.  
EXTERNAL COMPONENTS DESCRIPTION  
(Figure 1)  
Components  
Functional Description  
1.  
Ri  
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a high pass  
filter with Ci at fC= 1/(2π RiCi).  
2.  
Ci  
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a highpass filter with  
Ri at fC = 1/(2π RiCi). Refer to the section, PROPER SELECTION OF EXTERNAL COMPONENTS, for an explanation  
of how to determine the value of Ci.  
3.  
4.  
Rf  
Feedback resistance which sets the closed-loop gain in conjunction with Ri.  
CS  
Supply bypass capacitor which provides power supply filtering. Refer to the POWER SUPPLY BYPASSING section for  
information concerning proper placement and selection of the supply bypass capacitor.  
5.  
CB  
Bypass pin capacitor which provides half-supply filtering. Refer to the section, PROPER SELECTION OF EXTERNAL  
COMPONENTS, for information concerning proper placement and selection of CB.  
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TYPICAL PERFORMANCE CHARACTERISTICS  
THD+N vs Output Power  
VDD = 3V, RL = 8  
THD+N vs Output Power  
VDD = 3.6V, RL = 8Ω  
10  
5
10  
5
                                                                                                                                                                                                          
2
2
1
1
0.5  
0.5  
0.2  
0.1  
0.2  
0.1  
0.05  
0.05  
0.02  
0.01  
0.02  
0.01  
10  
20  
50  
100 200  
500 1000  
10  
20  
50  
100 200  
500 1000  
OUTPUT POWER (mW)  
OUTPUT POWER (mW)  
Figure 4.  
Figure 5.  
THD+N vs Frequency  
VDD = 3V, RL = 8,  
f = 1kHz, PO = 250mW  
THD+N vs Output Power  
VDD = 5V, RL = 8Ω  
10  
5
10  
5
2
2
1
1
0.5  
0.5  
0.2  
0.1  
0.2  
0.1  
0.05  
0.05  
0.02  
0.01  
0.02  
0.01  
20  
50 100 200 500 1k 2k 5k 10k 20k  
20  
50  
100 200 500  
1000 2000  
OUTPUT POWER (mW)  
FREQUENCY (Hz)  
Figure 6.  
Figure 7.  
THD+N vs Frequency  
VDD = 3.6V, RL = 8,  
f = 1kHz, PO = 300mW  
THD+N vs Frequency  
VDD = 5V, RL = 8,  
f = 1kHz, PO = 500mW  
10  
5
10  
5
2
2
1
1
0.5  
0.5  
0.2  
0.1  
0.2  
0.1  
0.05  
0.05  
0.02  
0.01  
0.02  
0.01  
20  
50 100 200 500 1k 2k 5k 10k 20k  
20  
50 100 200 500 1k 2k 5k 10k 20k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 8.  
Figure 9.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
PSRR vs Frequency  
VDD = 3V, RL = 8Ω  
PSRR vs Frequency  
VDD = 3.6V, RL = 8Ω  
0
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
20  
50 100 200 500 1k 2k 5k 10k 20k  
20  
50 100 200 500 1k 2k 5k 10k 20k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 10.  
Figure 11.  
PSRR vs Frequency  
VDD = 5V, RL = 8Ω  
Power Dissipation vs Output Power  
VDD = 3V, RL = 8Ω  
0
250  
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
200  
150  
100  
50  
0
0
50 100 150 200 250 300 350  
50 100 200 500 1k 2k 5k 10k  
OUTPUT POWER (mW)  
FREQUENCY (Hz)  
Figure 12.  
Figure 13.  
Power Dissipation vs Output Power  
Power Dissipation vs Output Power  
VDD = 3.6V, RL = 8Ω  
VDD = 5V, RL = 8Ω  
350  
700  
300  
250  
200  
150  
100  
50  
600  
500  
400  
300  
200  
100  
0
0
0
100  
200  
300  
400  
500  
600  
0
200 400 600 800 1000 1200  
OUTPUT POWER (mW)  
OUTPUT POWER (mW)  
Figure 14.  
Figure 15.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Output Level vs Frequency Response  
(Three different caps)  
Shutdown Voltage VSDIH  
VDD = 3V  
100  
90  
80  
70  
60  
+1  
Ci = 1mF (tantulum)  
Ci = 1mF (ceramic)  
0
-1  
-2  
-3  
-4  
-5  
-6  
-7  
-8  
-9  
-10  
Ci = 0.33mF (tantulum)  
50  
40  
30  
20  
10  
0
20  
50 100 200 500 1k 2k  
5k 10k 20k  
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6  
FREQUENCY (Hz)  
SHUTDOWN VOLTAGE (V)  
Figure 16.  
Figure 17.  
Shutdown Voltage VSDIH  
VDD = 3.6V  
Shutdown Voltage VSDIH  
VDD = 5V  
100  
90  
80  
70  
60  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
50  
40  
30  
20  
10  
0
0
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6  
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6  
SHUTDOWN VOLTAGE (V)  
SHUTDOWN VOLTAGE (V)  
Figure 18.  
Figure 19.  
Shutdown Voltage VSDIL  
VDD = 3V  
Shutdown Voltage VSDIL  
VDD = 3.6V  
100  
100  
90  
80  
70  
60  
90  
80  
70  
60  
50  
40  
30  
20  
10  
50  
40  
30  
20  
10  
0
0
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6  
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6  
SHUTDOWN VOLTAGE (V)  
SHUTDOWN VOLTAGE (V)  
Figure 20.  
Figure 21.  
8
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Shutdown Voltage VSDIL  
VDD = 5V  
Output Power vs Supply Voltage  
RL = 8Ω  
100  
90  
80  
70  
60  
2000  
1800  
1600  
1400  
1200  
1000  
800  
THD+N = 10%  
50  
40  
30  
20  
10  
THD+N = 1%  
600  
400  
200  
0
0
2.0  
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6  
3.0  
4.0  
5.0  
6.0  
VOLTAGE SUPPLY (V)  
SHUTDOWN VOLTAGE (V)  
Figure 22.  
Figure 23.  
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APPLICATION INFORMATION  
BRIDGE CONFIGURATION EXPLANATION  
As shown in Figure 1, the LM4995 has two internal operational amplifiers. The first amplifier's gain is externally  
configurable, while the second amplifier is internally fixed in a unity-gain, inverting configuration. The closed-loop  
gain of the first amplifier is set by selecting the ratio of Rf to Ri while the second amplifier's gain is fixed by the  
two internal 20kresistors. Figure 1 shows that the output of amplifier one serves as the input to amplifier two  
which results in both amplifiers producing signals identical in magnitude, but out of phase by 180°. Consequently,  
the differential gain for the IC is  
AVD= 2 *(Rf/Ri)  
(1)  
By driving the load differentially through outputs Vo1 and Vo2, an amplifier configuration commonly referred to as  
“bridged mode” is established. Bridged mode operation is different from the classical single-ended amplifier  
configuration where one side of the load is connected to ground.  
A bridge amplifier design has a few distinct advantages over the single-ended configuration, as it provides  
differential drive to the load, thus doubling output swing for a specified supply voltage. Four times the output  
power is possible as compared to a single-ended amplifier under the same conditions. This increase in attainable  
output power assumes that the amplifier is not current limited or clipped. In order to choose an amplifier's closed-  
loop gain without causing excessive clipping, please refer to the AUDIO POWER AMPLIFIER DESIGN section.  
A bridge configuration, such as the one used in LM4995, also creates a second advantage over single-ended  
amplifiers. Since the differential outputs, Vo1 and Vo2, are biased at half-supply, no net DC voltage exists across  
the load. This eliminates the need for an output coupling capacitor which is required in a single supply, single-  
ended amplifier configuration. Without an output coupling capacitor, the half-supply bias across the load would  
result in both increased internal IC power dissipation and also possible loudspeaker damage.  
POWER DISSIPATION  
Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or  
single-ended. A direct consequence of the increased power delivered to the load by a bridge amplifier is an  
increase in internal power dissipation. Since the LM4995 has two operational amplifiers in one package, the  
maximum internal power dissipation is 4 times that of a single-ended amplifier. The maximum power dissipation  
for a given application can be derived from the power dissipation graphs or from Equation (1).  
PDMAX = 4*(VDD)2/(2π2RL)  
(2)  
It is critical that the maximum junction temperature TJMAX of 150°C is not exceeded. TJMAX can be determined  
from the power derating curves by using PDMAX and the PC board foil area. By adding copper foil, the thermal  
resistance of the application can be reduced from the free air value of θJA, resulting in higher PDMAX values  
without thermal shutdown protection circuitry being activated. Additional copper foil can be added to any of the  
leads connected to the LM4995. It is especially effective when connected to VDD, GND, and the output pins.  
Refer to the application information on the LM4995 reference design board for an example of good heat sinking.  
If TJMAX still exceeds 150°C, then additional changes must be made. These changes can include reduced supply  
voltage, higher load impedance, or reduced ambient temperature. Internal power dissipation is a function of  
output power. Refer to the TYPICAL PERFORMANCE CHARACTERISTICS curves for power dissipation  
information for different output powers and output loading.  
POWER SUPPLY BYPASSING  
As with any amplifier, proper supply bypassing is critical for low noise performance and high supply rejection.  
The capacitor location on both the bypass and power supply pins should be as close to the device as possible. A  
ceramic 0.1μF placed in parallel with the tantalum 2.2μF bypass (CB) capacitor will aid in supply stability. This  
does not eliminate the need for bypassing the power supply pins of the LM4995. The selection of a bypass  
capacitor, especially CB, is dependent upon PSRR requirements, click and pop performance (as explained in the  
section, PROPER SELECTION OF EXTERNAL COMPONENTS), system cost, and size constraints.  
10  
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SHUTDOWN FUNCTION  
In order to reduce power consumption while not in use, the LM4995 contains shutdown circuitry that is used to  
turn off the amplifier's bias circuitry. This shutdown feature turns the amplifier off when logic low is placed on the  
shutdown pin. By switching the shutdown pin to GND, the LM4995 supply current draw will be minimized in idle  
mode. Idle current is measured with the shutdown pin connected to GND. The trigger point for shutdown is  
shown as a typical value in the Shutdown Hysteresis Voltage graphs in the TYPICAL PERFORMANCE  
CHARACTERISTICS section. It is best to switch between ground and supply for maximum performance. While  
the device may be disabled with shutdown voltages in between ground and supply, the idle current may be  
greater than the typical value of 0.01µA. In either case, the shutdown pin should be tied to a definite voltage to  
avoid unwanted state changes.  
In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry, which  
provides a quick, smooth transition to shutdown. Another solution is to use a single-throw switch in conjunction  
with an external pull-up resistor. This scheme ensures that the shutdown pin will not float, thus preventing  
unwanted state changes.  
PROPER SELECTION OF EXTERNAL COMPONENTS  
Proper selection of external components in applications using integrated power amplifiers is critical to optimize  
device and system performance. While the LM4995 is tolerant of external component combinations,  
consideration to component values must be used to maximize overall system quality.  
The LM4995 is unity-gain stable which gives the designer maximum system flexibility. The LM4995 should be  
used in low gain configurations to minimize THD+N values, and maximize the signal to noise ratio. Low gain  
configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1  
Vrms are available from sources such as audio codecs. Please refer to the section, AUDIO POWER AMPLIFIER  
DESIGN, for a more complete explanation of proper gain selection.  
Besides gain, one of the major considerations is the closed-loop bandwidth of the amplifier. To a large extent, the  
bandwidth is dictated by the choice of external components shown in Figure 1. The input coupling capacitor, Ci,  
forms a first order high pass filter which limits low frequency response. This value should be chosen based on  
needed frequency response for a few distinct reasons.  
SELECTION OF INPUT CAPACITOR SIZE  
Large input capacitors are both expensive and space hungry for portable designs. Clearly, a certain sized  
capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the speakers  
used in portable systems, whether internal or external, have little ability to reproduce signals below 100Hz to  
150Hz. Thus, using a large input capacitor may not increase actual system performance.  
In addition to system cost and size, click and pop performance is effected by the size of the input coupling  
capacitor, Ci. A larger input coupling capacitor requires more charge to reach its quiescent DC voltage (nominally  
1/2 VDD). This charge comes from the output via the feedback and is apt to create pops upon device enable.  
Thus, by minimizing the capacitor size based on necessary low frequency response, turn-on pops can be  
minimized.  
Besides minimizing the input capacitor size, careful consideration should be paid to the bypass capacitor value.  
Bypass capacitor, CB, is the most critical component to minimize turn-on pops since it determines how fast the  
LM4995 turns on. The slower the LM4995's outputs ramp to their quiescent DC voltage (nominally 1/2 VDD), the  
smaller the turn-on pop. Choosing CB equal to 1.0µF along with a small value of Ci (in the range of 0.1µF to  
0.39µF), should produce a virtually clickless and popless shutdown function. While the device will function  
properly, (no oscillations or motorboating), with CB equal to 0.1µF, the device will be much more susceptible to  
turn-on clicks and pops. Thus, a value of CB equal to 1.0µF is recommended in all but the most cost sensitive  
designs.  
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SNAS329G APRIL 2006REVISED APRIL 2013  
AUDIO POWER AMPLIFIER DESIGN  
A 1W/8AUDIO AMPLIFIER  
www.ti.com  
Given:  
Power Output  
Load Impedance  
Input Level  
1 Wrms  
8Ω  
1 Vrms  
Input Impedance  
Bandwidth  
20 kΩ  
100 Hz–20 kHz ± 0.25 dB  
A designer must first determine the minimum supply rail to obtain the specified output power. By extrapolating  
from the Output Power vs Supply Voltage graphs in the TYPICAL PERFORMANCE CHARACTERISTICS  
section, the supply rail can be easily found.  
5V is a standard voltage in most applications, it is chosen for the supply rail. Extra supply voltage creates  
headroom that allows the LM4995 to reproduce peaks in excess of 1W without producing audible distortion. At  
this time, the designer must make sure that the power supply choice along with the output impedance does not  
violate the conditions explained in the POWER DISSIPATION section.  
Once the power dissipation equations have been addressed, the required differential gain can be determined  
from Equation (3).  
(3)  
Rf/Ri = AVD/2  
(4)  
From Equation (3), the minimum AVD is 2.83; use AVD = 3.  
Since the desired input impedance was 20 k, and with a AVD impedance of 2, a ratio of 1.5:1 of Rf to Ri results  
in an allocation of Ri = 20 kand Rf = 30 k. The final design step is to address the bandwidth requirements  
which must be stated as a pair of 3 dB frequency points. Five times away from a 3 dB point is 0.17 dB down  
from passband response which is better than the required ±0.25 dB specified.  
fL = 100Hz/5 = 20Hz  
fH = 20kHz * 5 = 100kHz  
As stated in the EXTERNAL COMPONENTS DESCRIPTION section, Ri in conjunction with Ci create a highpass  
filter.  
Ci 1/(2π*20 k*20 Hz) = 0.397 µF; use 0.39 µF  
The high frequency pole is determined by the product of the desired frequency pole, fH, and the differential gain,  
AVD. With a AVD = 3 and fH = 100kHz, the resulting GBWP = 300kHz which is much smaller than the LM4995  
GBWP of 2.5MHz. This figure displays that if a designer has a need to design an amplifier with a higher  
differential gain, the LM4995 can still be used without running into bandwidth limitations.  
The LM4995 is unity-gain stable and requires no external components besides gain-setting resistors, an input  
coupling capacitor, and proper supply bypassing in the typical application. However, if a closed-loop differential  
gain of greater than 10 is required, a feedback capacitor (C4) may be needed as shown in Figure 24 to  
bandwidth limit the amplifier. This feedback capacitor creates a low pass filter that eliminates possible high  
frequency oscillations. Care should be taken when calculating the -3dB frequency in that an incorrect  
combination of R3 and C4 will cause rolloff before 20kHz. A typical combination of feedback resistor and  
capacitor that will not produce audio band high frequency rolloff is R3 = 20kand C4 = 25pf. These components  
result in a -3dB point of approximately 320kHz.  
12  
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SNAS329G APRIL 2006REVISED APRIL 2013  
Figure 24. HIGHER GAIN AUDIO AMPLIFIER  
Figure 25. DIFFERENTIAL AMPLIFIER CONFIGURATION FOR LM4995  
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LM4995, LM4995TMBD  
SNAS329G APRIL 2006REVISED APRIL 2013  
www.ti.com  
Figure 26. REFERENCE DESIGN BOARD SCHEMATIC  
PCB LAYOUT GUIDELINES  
This section provides practical guidelines for mixed signal PCB layout that involves various digital/analog power  
and ground traces. Designers should note that these are only "rule-of-thumb" recommendations and the actual  
results will depend heavily on the final layout.  
GENERAL MIXED SIGNAL LAYOUT RECOMMENDATION  
POWER AND GROUND CIRCUITS  
For 2 layer mixed signal design, it is important to isolate the digital power and ground trace paths from the  
analog power and ground trace paths. Star trace routing techniques (bringing individual traces back to a central  
point rather than daisy chaining traces together in a serial manner) can have a major impact on low level signal  
performance. Star trace routing refers to using individual traces to feed power and ground to each circuit or even  
device. This technique will require a greater amount of design time but will not increase the final price of the  
board. The only extra parts required will be some jumpers.  
SINGLE-POINT POWER / GROUND CONNECTIONS  
The analog power traces should be connected to the digital traces through a single point (link). A "Pi-filter" can  
be helpful in minimizing High Frequency noise coupling between the analog and digital sections. It is further  
recommended to put digital and analog power traces over the corresponding digital and analog ground traces to  
minimize noise coupling.  
PLACEMENT OF DIGITAL AND ANALOG COMPONENTS  
All digital components and high-speed digital signal traces should be located as far away as possible from analog  
components and circuit traces.  
AVOIDING TYPICAL DESIGN / LAYOUT PROBLEMS  
Avoid ground loops or running digital and analog traces parallel to each other (side-by-side) on the same PCB  
layer. When traces must cross over each other do it at 90 degrees. Running digital and analog traces at 90  
degrees to each other from the top to the bottom side as much as possible will minimize capacitive noise  
coupling and cross talk.  
14  
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SNAS329G APRIL 2006REVISED APRIL 2013  
REVISION HISTORY  
Rev  
1.0  
1.1  
1.2  
1.3  
Date  
Description  
Initial WEB released of the datasheet.  
Added the SD package.  
Text edits.  
04/05/06  
05/17/06  
08/07/06  
08/22/06  
Edited the THD+N Typical values on the 3  
EC tables, then re-released the D/S to the  
WEB (per Allan S.).  
1.4  
09/11/07  
Updated the SD pkg. diagram.  
Changes from Revision F (April 2013) to Revision G  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 14  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
26-Aug-2013  
PACKAGING INFORMATION  
Orderable Device  
LM4995SD/NOPB  
LM4995TM/NOPB  
LM4995TMX/NOPB  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
ACTIVE  
WSON  
DSBGA  
DSBGA  
NGQ  
8
9
9
1000  
Green (RoHS  
& no Sb/Br)  
Call TI  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
L4995  
ACTIVE  
ACTIVE  
YFQ  
YFQ  
250  
Green (RoHS  
& no Sb/Br)  
SNAGCU  
SNAGCU  
-40 to 85  
-40 to 85  
G
G8  
3000  
Green (RoHS  
& no Sb/Br)  
G
G8  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
26-Aug-2013  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Oct-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LM4995SD/NOPB  
LM4995TM/NOPB  
LM4995TMX/NOPB  
WSON  
DSBGA  
DSBGA  
NGQ  
YFQ  
YFQ  
8
9
9
1000  
250  
178.0  
178.0  
178.0  
12.4  
8.4  
3.3  
3.3  
1.0  
8.0  
4.0  
4.0  
12.0  
8.0  
Q1  
Q1  
Q1  
1.35  
1.35  
1.35  
1.35  
0.76  
0.76  
3000  
8.4  
8.0  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Oct-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LM4995SD/NOPB  
LM4995TM/NOPB  
LM4995TMX/NOPB  
WSON  
DSBGA  
DSBGA  
NGQ  
YFQ  
YFQ  
8
9
9
1000  
250  
210.0  
210.0  
210.0  
185.0  
185.0  
185.0  
35.0  
35.0  
35.0  
3000  
Pack Materials-Page 2  
MECHANICAL DATA  
NGQ0008A  
SDA08A (Rev A)  
www.ti.com  
MECHANICAL DATA  
YFQ0009x
D
0.600±0.075  
E
TMD09XXX (Rev A)  
D: Max = 1.24 mm, Min = 1.18 mm  
E: Max = 1.24 mm, Min = 1.18 mm  
4215077/A  
12/12  
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.  
B. This drawing is subject to change without notice.  
NOTES:  
www.ti.com  
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