LM5008MMX [TI]

Step-Down Switching Regulator;


型号：	LM5008MMX
厂家：	TEXAS INSTRUMENTS
描述：	Step-Down Switching Regulator 开关光电二极管
文件：	总23页 (文件大小：1047K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LM5008A

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SNVS583F –MARCH 2009–REVISED MARCH 2013

100-V 350-mA Constant On-Time Buck Switching Regulator

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FEATURES

DESCRIPTION

The LM5008A is a functional variant of the LM5008

COT Buck Switching Regulator. The functional

differences of the LM5008A are: the minimum input

operating voltage is 6 V, the on-time equation is

slightly different, and the requirement for a minimum

load current is removed.

•

Operating input voltage range: 6V to 95V

Integrated 100V N-Channel buck switch

Internal start-up regulator

No loop compensation required

Ultra-fast transient response

The LM5008A Step Down Switching Regulator

features all of the functions needed to implement a

low cost, efficient, Buck bias regulator. This high

voltage regulator contains an 100 V N-Channel Buck

Switch. The device is easy to implement and is

provided in the VSSOP-8 and the thermally enhanced

WSON-8 packages. The regulator is based on a

control scheme using an ON time inversely

proportional to V_IN. This feature allows the operating

frequency to remain relatively constant. The control

scheme requires no loop compensation. An intelligent

current limit is implemented with forced OFF time,

which is inversely proportional to Vout. This scheme

ensures short circuit control while providing minimum

foldback. Other features include: Thermal Shutdown,

V_CCunder-voltage lockout, Gate drive under-voltage

lockout, Max Duty Cycle limiter, and a pre-charge

switch.

On time varies inversely with input voltage

Operating frequency remains constant with

varying line voltage and load current

•

Adjustable output voltage from 2.5V

Highly efficient operation

Precision internal reference

Low bias current

Intelligent current limit

Thermal shutdown

VSSOP-8 and WSON-8 (4mm x 4mm) packages

APPLICATIONS

•

Non-Isolated Telecommunication Buck

Regulator

•

Secondary High Voltage Post Regulator

+42V Automotive Systems

Typical Application, Basic Step-Down Regulator

6V - 95V

Input

VCC

VIN

LM5008A

BST

GND

RT/SD

RCL

OUT

SHUTDOWN

FB2

RTN

GND

FB1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

LM5008A

SNVS583F –MARCH 2009–REVISED MARCH 2013

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Connection Diagram

VIN

BST

RCL

RTN

VIN

BST

RCL

RTN

VCC

RT/SD

Exposed Pad on Bottom

Connect to Ground

Figure 1. Top View

8-Lead WSON

Figure 2. Top View

8-Lead VSSOP

Pin Functions

Table 1. Pin Descriptions

Name

Description

Application Information

Switching Node

Power switching node. Connect to the output inductor, re-circulating diode, and

bootstrap capacitor.

BST

RCL

Boost pin (bootstrap capacitor

input)

An external capacitor is required between the BST and the SW pins. A 0.01 µF

ceramic capacitor is recommended. An internal diode charges the capacitor from V_CC

during each off-time.

Current Limit OFF time set pin

Ground pin

A resistor between this pin and RTN sets the off-time when current limit is detected.

The off-time is preset to 35 µs if FB = 0V.

RTN

Ground for the entire circuit.

Feedback input from Regulated

Output

This pin is connected to the inverting input of the internal regulation comparator. The

regulation threshold is 2.5V.

RT/SD On time set pin

A resistor between this pin and VIN sets the switch on time as a function of V_IN. The

minimum recommended on time is 400 ns at the maximum input voltage. This pin can

be used for remote shutdown.

VCC

Output from the internal high

This regulated voltage provides gate drive power for the internal Buck switch. An

internal diode is provided between this pin and the BST pin. A local 0.47 µF

decoupling capacitor is required. The series pass regulator is current limited to 9 mA.

voltage series pass regulator

VIN

Input voltage

Exposed Pad

Input operating range: 6V to 95V.

The exposed pad has no electrical contact. Connect to system ground plane for

reduced thermal resistance.

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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

(1)

Absolute Maximum Ratings

V_INto GND

-0.3V to 100V

-0.3V to 114V

-1V

BST to GND

SW to GND (Steady State)

ESD Rating, Human Body Model⁽²⁾

BST to V_CC

2kV

100V

BST to SW

14V

V_CCto GND

14V

All Other Inputs to GND

Lead Temperature (Soldering 4 sec)

Storage Temperature Range

-0.3 to 7V

260°C

-55°C to +150°C

(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which

operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.

(2) The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. The ESD rating for pin 2, pin 7, and pin

8 is 1 kV.

(1)

Operating Ratings

V_IN

6V to 95V

Operating Junction Temperature

−40°C to + 125°C

(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which

operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.

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Electrical Characteristics

Specifications with standard typeface are for T_J= 25°C, and those with boldface type apply over full Operating Junction

(1)

Temperature range. V_IN= 48V, unless otherwise stated

Symbol

Parameter

Conditions

Min

6.6

Typ

Max

7.4

Unit

VCC Supply

Vcc Reg Vcc Regulator Output

Vin – Vcc

Vin = 48V

6V < Vin < 8.5V

Vin Increasing

100

8.5

300

100

8.8

0.8

9.2

5.3

190

Vcc Bypass Threshold

Vcc Bypass Hysteresis

Vcc Output Impedance

Ω

Vin =6V

Vin = 10V

Vin = 48V

Vcc Increasing

Ω

Vcc Current Limit

Vcc UVLO

Vcc UVLO hysteresis

Vcc UVLO filter delay

Iin Operating current

Iin Shutdown Current

Switch Characteristics

Buck switch Rds(on)

Gate Drive UVLO

µs

µA

FB = 3V, Vin = 48V

RT/SD = 0V

550

110

750

176

Itest = 200 mA

1.25

3.8

2.57

4.8

Ω

Vbst – Vsw Rising

2.8

Gate Drive UVLO hysteresis

Pre-charge switch voltage

Pre-charge switch on-time

Current Limit

490

0.8

At 1 mA

150

Current Limit Threshold

Current Limit Response Time

0.41

0.51

350

0.61

I_switchOverdrive = 0.1A, Time to Switch Off

FB=0V, R_CL= 100K

µs

T_OFF-1

T_OFF-2

OFF time generator

FB=2.3V, R_CL= 100K

2.56

On Time Generator

T_ON- 1

Vin = 10V, Ron = 200K

Vin = 95V, Ron = 200K

Rising

2.15

200

2.77

300

0.70

3.5

420

1.05

µs

T_ON- 2

Remote Shutdown Threshold

Remote Shutdown Hysteresis

Minimum Off Time

0.40

Minimum Off Timer

Regulation and OV Comparators

FB Reference Threshold

FB Over-Voltage Threshold

FB Bias Current

FB = 0V

300

Internal reference, Trip point for switch ON

Trip point for switch OFF

2.445

2.5

2.875

100

2.550

Thermal Shutdown

Tsd

Thermal Shutdown Temperature

Thermal Shutdown Hysteresis

165

°C

Thermal Resistance

θ_JAJunction to Ambient

VSSOP Package

WSON Package

200

°C/W

(1) All electrical characteristics having room temperature limits are tested during production with T_A= T_J= 25°C. All hot and cold limits are

specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

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Typical Performance Characteristics

Efficiency vs. Load Current and V_IN

(Circuit of Figure 12)

VCC vs. VIN

Figure 3.

Figure 4.

ON-Time vs Input Voltage and R_T

Current Limit Off-Time vs. V_FBand R_CL

= 500k

300k

50k

100k

0.5

1.0

1.5

(V)

2.0

2.5

Figure 5.

Figure 6.

I_CCCurrent vs. Applied V_CCVoltage

Maximum Frequency vs. V_OUTand V_IN

Figure 7.

Figure 8.

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BLOCK DIAGRAM

7V BIAS

REGULATOR

6V to 95V

Input

LM5008A

VIN

VCC

UVLO

SENSE

THERMAL

SHUTDOWN

BYPASS

SWITCH

VCC

GND

ON TIMER

START

0.7V

FINISH

RT/SD

BST

START

Vin

SHUTDOWN

OVER-VOLTAGE

COMPARATOR

UVLO

300 ns MIN

OFF TIMER

DRIVER

PRE

2.875V

2.5V

FINISH

LEVEL

SHIFT

S_SET

R_CLR

OUT

REGULATION

COMPARATOR

CHARGE

BUCK

SWITCH

CURRENT

SENSE

RCL

RTN

FINISH

START

CURRENT LIMIT

OFF TIMER

FB2

0.51A

FB1

FUNCTIONAL DESCRIPTION

The LM5008A Step Down Switching Regulator features all the functions needed to implement a low cost,

efficient, Buck bias power converter. This high voltage regulator contains a 100 V N-Channel Buck Switch, is

easy to implement and is provided in the VSSOP-8 and the thermally enhanced WSON-8 packages. The

regulator is based on a control scheme using an on-time inversely proportional to V_IN. The control scheme

requires no loop compensation. Current limit is implemented with forced off-time, which is inversely proportional

to V_OUT. This scheme ensures short circuit control while providing minimum foldback.

The LM5008A can be applied in numerous applications to efficiently regulate down higher voltages. This

regulator is well suited for 48 Volt Telecom and the new 42V Automotive power bus ranges. Features include:

Thermal Shutdown, V_CCunder-voltage lockout, Gate drive under-voltage lockout, Max Duty Cycle limit timer,

intelligent current limit off timer, and a pre-charge switch.

Control Circuit Overview

The LM5008A is a Buck DC-DC regulator that uses a control scheme in which the on-time varies inversely with

line voltage (V_IN). Control is based on a comparator and the on-time one-shot, with the output voltage feedback

(FB) compared to an internal reference (2.5V). If the FB level is below the reference the buck switch is turned on

for a fixed time determined by the line voltage and a programming resistor (R_T). Following the ON period the

switch will remain off for at least the minimum off-timer period of 300ns. If FB is still below the reference at that

time the switch will turn on again for another on-time period. This will continue until regulation is achieved.

The LM5008A operates in discontinuous conduction mode at light load currents, and continuous conduction

mode at heavy load current. In discontinuous conduction mode, current through the output inductor starts at zero

and ramps up to a peak during the on-time, then ramps back to zero before the end of the off-time. The next on-

time period starts when the voltage at FB falls below the internal reference - until then the inductor current

remains zero. In this mode the operating frequency is lower than in continuous conduction mode, and varies with

load current. Therefore at light loads the conversion efficiency is maintained, since the switching losses reduce

with the reduction in load and frequency. The discontinuous operating frequency can be calculated as follows:

V_OUT²x L x 1.04 x 10²⁰

F =

R_Lx (R_T)²

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where

•

R_L= the load resistance

(1)

In continuous conduction mode, current flows continuously through the inductor and never ramps down to zero.

In this mode the operating frequency is greater than the discontinuous mode frequency and remains relatively

constant with load and line variations. The approximate continuous mode operating frequency can be calculated

as follows:

V_OUT

1.385 x 10^-10x R_T

F =

(2)

The output voltage (V_OUT) is programmed by two external resistors as shown in the Block Diagram. The

regulation point can be calculated as follows:

V_OUT= 2.5 x (R_FB1+ R_FB2) / R_FB1

(3)

The LM5008A regulates the output voltage based on ripple voltage at the feedback input, requiring a minimum

amount of ESR for the output capacitor C2. A minimum of 25mV to 50mV of ripple voltage at the feedback pin

(FB) is required for the LM5008A. In cases where the capacitor ESR is too small, additional series resistance

may be required (R3 in the Block Diagram).

For applications where lower output voltage ripple is required the output can be taken directly from a low ESR

output capacitor, as shown in Figure 9. However, R3 slightly degrades the load regulation.

FB2

LM5008A

OUT2

FB1

Figure 9. Low Ripple Output Configuration

Start-Up Regulator (V_CC)

The high voltage bias regulator is integrated within the LM5008A. The input pin (VIN) can be connected directly

to line voltages between 6V and 95V, with transient capability to 100V. Referring to the block diagram and the

graph of V_CCvs V_IN, when V_INis between 6V and the bypass threshold (nominally 8.5V), the bypass switch (Q2)

is on, and V_CCtracks V_INwithin 100 mV to 150 mV. The bypass switch on-resistance is approximately 100Ω, with

inherent current limiting at approximately 100 mA. When V_INis above the bypass threshold Q2 is turned off, and

V_CCis regulated at 7V. The V_CCregulator output current is limited at approximately 9.2 mA. When the LM5008A

is shutdown using the RT/SD pin, the V_CCbypass switch is shut off regardless of the voltage at V_IN.

When VIN exceeds the bypass threshold, the time required for Q2 to shut off is approximately 2 - 3 µs. The

capacitor at VCC (C3) must be a minimum of 0.47 µF to prevent the voltage at VCC from rising above its

absolute maximum rating in response to a step input applied at V_IN. C3 must be located as close as possible to

the VCC and RTN pins. In applications with a relatively high input voltage, power dissipation in the bias regulator

is a concern. An auxiliary voltage of between 7.5V and 14V can be diode connected to the VCC pin to shut off

the V_CCregulator, thereby reducing internal power dissipation. The current required into the VCC pin is shown in

the graph “I_CCCurrent vs. Applied V_CCVoltage”. Internally a diode connects VCC to VIN requiring that the

auxiliary voltage be less than V_IN.

The turn-on sequence is shown in Figure 10. During the initial delay (t1) VCC ramps up at a rate determined by

its current limit and C3 while internal circuitry stabilizes. When V_CCreaches the upper threshold of its under-

voltage lock-out (UVLO, typically 5.3V) the buck switch is enabled. The inductor current increases to the current

limit threshold (I_LIM) and during t2 V_OUTincreases as the output capacitor charges up. When V_OUTreaches the

intended voltage the average inductor current decreases (t3) to the nominal load current (I_O).

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7 V

UVLO

Vin

SW Pin

LIM

Inductor

Current

OUT

Figure 10. Startup Sequence

Regulation Comparator

The feedback voltage at FB is compared to an internal 2.5V reference. In normal operation (the output voltage is

regulated), an on-time period is initiated when the voltage at FB falls below 2.5V. The buck switch will stay on for

the on-time, causing the FB voltage to rise above 2.5V. After the on-time period, the buck switch will stay off until

the FB voltage again falls below 2.5V. During start-up, the FB voltage will be below 2.5V at the end of each on-

time, resulting in the minimum off-time of 300 ns. Bias current at the FB pin is nominally 100 nA.

Over-Voltage Comparator

The feedback voltage at FB is compared to an internal 2.875V reference. If the voltage at FB rises above 2.875V

the on-time pulse is immediately terminated. This condition can occur if the input voltage, or the output load,

change suddenly. The buck switch will not turn on again until the voltage at FB falls below 2.5V.

On-Time Generator and Shutdown

The on-time for the LM5008A is determined by the R_Tresistor, and is inversely proportional to the input voltage

(Vin), resulting in a nearly constant frequency as Vin is varied over its range. The on-time equation for the

LM5008A is:

T_ON= 1.385 x 10^-10x R_T/ V_IN

(4)

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R_Tshould be selected for a minimum on-time (at maximum V_IN) greater than 400 ns, for proper current limit

operation. This requirement limits the maximum frequency for each application, depending on V_INand V_OUT

The LM5008A can be remotely disabled by taking the R_T/SD pin to ground. See Figure 11. The voltage at the

R_T/SD pin is between 1.5 and 3.0 volts, depending on Vin and the value of the R_Tresistor.

Input

Voltage

VIN

LM5008A

R /SD

STOP

RUN

Figure 11. Shutdown Implementation

Current Limit

The LM5008A contains an intelligent current limit OFF timer. If the current in the Buck switch exceeds 0.51A the

present cycle is immediately terminated, and a non-resetable OFF timer is initiated. The length of off-time is

controlled by an external resistor (R_CL) and the FB voltage (see the graph Current Limit Off-Time vs. V_FBand

R_CL). When FB = 0V, a maximum off-time is required, and the time is preset to 35µs. This condition occurs when

the output is shorted, and during the initial part of start-up. This amount of time ensures safe short circuit

operation up to the maximum input voltage of 95V. In cases of overload where the FB voltage is above zero volts

(not a short circuit) the current limit off-time will be less than 35µs. Reducing the off-time during less severe

overloads reduces the amount of foldback, recovery time, and the start-up time. The off-time is calculated from

Equation 5.

(5)

The current limit sensing circuit is blanked for the first 50-70ns of each on-time so it is not falsely tripped by the

current surge which occurs at turn-on. The current surge is required by the re-circulating diode (D1) for its turn-

off recovery.

N-Channel Buck Switch and Driver

The LM5008A integrates an N-Channel Buck switch and associated floating high voltage gate driver. The gate

driver circuit works in conjunction with an external bootstrap capacitor and an internal high voltage diode. A 0.01

µF ceramic capacitor (C4) connected between the BST pin and SW pin provides the voltage to the driver during

the on-time.

During each off-time, the SW pin is at approximately 0V, and the bootstrap capacitor charges from Vcc through

the internal diode. The minimum OFF timer, set to 300ns, ensures a minimum time each cycle to recharge the

bootstrap capacitor.

The internal pre-charge switch at the SW pin is turned on for ≊150 ns during the minimum off-time period,

ensuring sufficient voltage exists across the bootstrap capacitor for the on-time. This feature helps prevent

operating problems which can occur during very light load conditions, involving a long off-time, during which the

voltage across the bootstrap capacitor could otherwise reduce below the Gate Drive UVLO threshold. The pre-

charge switch also helps prevent startup problems which can occur if the output voltage is pre-charged prior to

turn-on. After current limit detection, the pre-charge switch is turned on for the entire duration of the forced off-

time .

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Thermal Protection

The LM5008A should be operated so the junction temperature does not exceed 125°C during normal operation.

An internal Thermal Shutdown circuit is provided to shutdown the LM5008A in the event of a higher than normal

junction temperature. When activated, typically at 165°C, the controller is forced into a low power reset state by

disabling the buck switch. This feature prevents catastrophic failures from accidental device overheating. When

the junction temperature reduces below 140°C (typical hysteresis = 25°C) normal operation is resumed.

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APPLICATIONS INFORMATION

SELECTION OF EXTERNAL COMPONENTS

A guide for determining the component values will be illustrated with a design example. Refer to the Block

Diagram. The following steps will configure the LM5008A for:

•

Input voltage range (Vin): 12V to 95V

Output voltage (V_OUT1): 10V

Load current (for continuous conduction mode): 100 mA to 300 mA

R_FB1, R_FB2: V_OUT= V_FBx (R_FB1+ R_FB2) / R_FB1, and since V_FB= 2.5V, the ratio of R_FB2to R_FB1calculates as 3:1.

Standard values of 3.01 kΩ and 1.00 kΩ are chosen. Other values could be used as long as the 3:1 ratio is

maintained.

F_sand R_T: The recommended operating frequency range for the LM5008A is 50 kHz to 1.1 MHz. Unless the

application requires a specific frequency, the choice of frequency is generally a compromise since it affects the

size of L1 and C2, and the switching losses. The maximum allowed frequency, based on a minimum on-time of

400 ns, is calculated from:

F_MAX= V_OUT/ (V_INMAXx 400 ns)

(6)

For this exercise, Fmax = 263 kHz. From Equation 2, R_Tcalculates to 274 kΩ. A standard value 324 kΩ resistor

will be used to allow for tolerances in Equation 2, resulting in a frequency of 223 kHz.

L1: The main parameter affected by the inductor is the output current ripple amplitude. The choice of inductor

value therefore depends on both the minimum and maximum load currents, keeping in mind that the maximum

ripple current occurs at maximum Vin.

a) Minimum load current: To maintain continuous conduction at minimum Io (100 mA), the ripple amplitude

(I_OR) must be less than 200 mAp-p so the lower peak of the waveform does not reach zero. L1 is calculated

using Equation 7.

V_OUTx (V_IN- V_OUT

)

L1 =

I_ORx F_sx V_IN

(7)

At Vin = 95V, L1(min) calculates to 200 µH. The next larger standard value (220 µH) is chosen and with this

value I_ORcalculates to 182 mAp-p at Vin = 95V, and 34 mAp-p at Vin = 12V.

b) Maximum load current: At a load current of 300 mA, the peak of the ripple waveform must not reach the

minimum value of the LM5008A’s current limit threshold (410 mA). Therefore the ripple amplitude must be less

than 220 mAp-p, which is already satisfied in the above calculation. With L1 = 220 µH, at maximum Vin and Io,

the peak of the ripple will be 391 mA. While L1 must carry this peak current without saturating or exceeding its

temperature rating, it also must be capable of carrying the maximum value of the LM5008A’s current limit

threshold (610 mA) without saturating, since the current limit is reached during startup.

The DC resistance of the inductor should be as low as possible. For example, if the inductor’s DCR is one ohm,

the power dissipated at maximum load current is 0.09W. While small, it is not insignificant compared to the load

power of 3W.

C3: The capacitor on the V_CCoutput provides not only noise filtering and stability, but its primary purpose is to

prevent false triggering of the V_CCUVLO at the buck switch on/off transitions. C3 should be no smaller than 0.47

µF.

C2, and R3: When selecting the output filter capacitor C2, the items to consider are ripple voltage due to its

ESR, ripple voltage due to its capacitance, and the nature of the load.

ESR and R3: A low ESR for C2 is generally desirable so as to minimize power losses and heating within the

capacitor. However, the regulator requires a minimum amount of ripple voltage at the feedback input for proper

loop operation. For the LM5008A the minimum ripple required at pin 5 is 25 mVp-p, requiring a minimum ripple at

V_OUTof 100 mV. Since the minimum ripple current (at minimum Vin) is 34 mA p-p, the minimum ESR required at

V_OUTis 100 mV/34 mA = 2.94Ω. Since quality capacitors for SMPS applications have an ESR considerably less

than this, R3 is inserted as shown in the Block Diagram. R3’s value, along with C2’s ESR, must result in at least

25 mVp-p ripple at pin 5. Generally, R3 will be 0.5 to 3.0Ω.

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R_CL: When current limit is detected, the minimum off-time set by this resistor must be greater than the maximum

normal off-time, which occurs at maximum input voltage. Using Equation 4, the minimum on-time is 472 ns,

yielding an off-time of 4 µs (at 223 kHz). Due to the 25% tolerance on the on-time, the off-time tolerance is also

25%, yielding a maximum off-time of 5 µs. Allowing for the response time of the current limit detection circuit

(350 ns) increases the maximum off-time to 5.35 µs. This is increased an additional 25% to 6.7 µs to allow for

the tolerances of Equation 5. Using Equation 5, R_CLcalculates to 325 kΩ at V_FB= 2.5V. A standard value 332 kΩ

resistor will be used.

D1: The important parameters are reverse recovery time and forward voltage. The reverse recovery time

determines how long the reverse current surge lasts each time the buck switch is turned on. The forward voltage

drop is significant in the event the output is short-circuited as it is only this diode’s voltage which forces the

inductor current to reduce during the forced off-time. For this reason, a higher voltage is better, although that

affects efficiency. A good choice is a Schottky power diode, such as the DFLS1100. D1’s reverse voltage rating

must be at least as great as the maximum Vin, and its current rating be greater than the maximum current limit

threshold (610 mA).

C1: This capacitor’s purpose is to supply most of the switch current during the on-time, and limit the voltage

ripple at Vin, on the assumption that the voltage source feeding Vin has an output impedance greater than zero.

At maximum load current, when the buck switch turns on, the current into pin 8 will suddenly increase to the

lower peak of the output current waveform, ramp up to the peak value, then drop to zero at turn-off. The average

input current during this on-time is the load current (300 mA). For a worst case calculation, C1 must supply this

average load current during the maximum on-time. To keep the input voltage ripple to less than 2V (for this

exercise), C1 calculates to:

I x t_ON

0.3A x 3.74 ms

= 0.56 mF

C1 =

2.0V

(8)

Quality ceramic capacitors in this value have a low ESR which adds only a few millivolts to the ripple. It is the

capacitance which is dominant in this case. To allow for the capacitor’s tolerance, temperature effects, and

voltage effects, a 1.0 µF, 100V, X7R capacitor will be used.

C4: The recommended value is 0.01µF for C4, as this is appropriate in the majority of applications. A high quality

ceramic capacitor, with low ESR is recommended as C4 supplies the surge current to charge the buck switch

gate at turn-on. A low ESR also ensures a quick recharge during each off-time. At minimum Vin, when the on-

time is at maximum, it is possible during start-up that C4 will not fully recharge during each 300 ns off-time. The

circuit will not be able to complete the start-up, and achieve output regulation. This can occur when the

frequency is intended to be low (e.g., R_T= 500K). In this case C4 should be increased so it can maintain

sufficient voltage across the buck switch driver during each on-time.

C5: This capacitor helps avoid supply voltage transients and ringing due to long lead inductance at V_IN. A low

ESR, 0.1µF ceramic chip capacitor is recommended, located close to the LM5008A.

FINAL CIRCUIT

The final circuit is shown in Figure 12. The circuit was tested, and the resulting performance is shown in

Figure 13 and Figure 14.

PC BOARD LAYOUT

The LM5008A regulation and over-voltage comparators are very fast, and as such will respond to short duration

noise pulses. Layout considerations are therefore critical for optimum performance. The components at pins 1, 2,

3, 5, and 6 should be as physically close as possible to the IC, thereby minimizing noise pickup in the PC tracks.

The current loop formed by D1, L1, and C2 should be as small as possible. The ground connection from D1 to

C1 should be as short and direct as possible.

If the internal dissipation of the LM5008A produces excessive junction temperatures during normal operation,

good use of the PC board’s ground plane can help considerably to dissipate heat. The exposed pad on the

bottom of the WSON-8 package can be soldered to a ground plane on the PC board, and that plane should

extend out from beneath the IC to help dissipate the heat. Additionally, the use of wide PC board traces, where

possible, can also help conduct heat away from the IC. Judicious positioning of the PC board within the end

product, along with use of any available air flow (forced or natural convection) can help reduce the junction

temperatures.

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LM5008A

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SNVS583F –MARCH 2009–REVISED MARCH 2013

12 - 95V

Input

VCC

VIN

0.47 mF

1.0 mF

0.1 mF

BST

0.01 mF

324k

R /SD

LM5008A

220 mH

10.0V

OUT

SHUTDOWN

3.0

FB2

3.01k

RCL

R_CL

332k

22 mF

FB1

1.0k

RTN

GND

Figure 12. LM5008A Example Circuit

Table 2. Bill of Materials

Item

Description

Ceramic Capacitor

Schottky Power Diode

Power Inductor

Part Number

Value

TDK C4532X7R2A105M

TDK C4532X7R1E226M

1 µF, 100V

22 µF, 25V

0.47 µF, 50V

0.01 µF, 50V

0.1 µF, 100V

100V, 1A

Kemet C1206C474K5RAC

Kemet C1206C103K5RAC

TDK C3216X7R2A104M

Diodes Inc. DFLS1100

COILTRONICS DR125-221-R or

TDK SLF10145T-221MR65

220 µH

R_FB2

R_FB1

Resistor

Vishay CRCW12063011F

Vishay CRCW12061001F

Vishay CRCW12063R00F

Vishay CRCW12063243F

Vishay CRCW12063323F

LM5008A

3.01 kΩ

1.0 kΩ

3.0 Ω

Resistor

R_T

Resistor

324 kΩ

332 kΩ

R_CL

Resistor

Switching Regulator

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SNVS583F –MARCH 2009–REVISED MARCH 2013

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Figure 13. Efficiency vs. Load Current and V_IN

LOW OUTPUT RIPPLE CONFIGURATIONS

Figure 14. Efficiency vs. V_IN

For applications where low output ripple is required, the following options can be used to reduce or nearly

eliminate the ripple.

a) Reduced ripple configuration: In Figure 15, Cff is added across R_FB2to AC-couple the ripple at V_OUTdirectly

to the FB pin. This allows the ripple at V_OUTto be reduced to a minimum of 25 mVp-p by reducing R3, since the

ripple at V_OUTis not attenuated by the feedback resistors. The minimum value for Cff is determined from:

3 x t_{ON (max)}

Cff =

(R_FB1//R_FB2

)

where

•

t_ON(max)is the maximum on-time, which occurs at V_IN(min). The next larger standard value capacitor should be

used for Cff.

(9)

OUT

Cff

LM5008A

FB2

FB1

Figure 15. Reduced Ripple Configuration

b) Minimum ripple configuration: If the application requires a lower value of ripple (<10 mVp-p), the circuit of

Figure 16 can be used. R3 is removed, and the resulting output ripple voltage is determined by the inductor’s

ripple current and C2’s characteristics. RA and CA are chosen to generate a sawtooth waveform at their junction,

and that voltage is AC-coupled to the FB pin via CB. To determine the values for RA, CA and CB, use the

following procedure:

Calculate V_A= V_OUT- (V_SWx (1 - (V_OUT/V_IN(min))))

where

•

V_SWis the absolute value of the voltage at the SW pin during the off-time (typically 1V). VA is the DC voltage

at the RA/CA junction, and is used in Equation 11. (10)

Calculate RA x CA = (V_IN(min)- V_A) x t_ON/ΔV

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SNVS583F –MARCH 2009–REVISED MARCH 2013

where

•

t_ONis the maximum on-time (at minimum input voltage), and ΔV is the desired ripple amplitude at the RA/CA

junction (typically 40-50 mV). RA and CA are then chosen from standard value components to satisfy the

above product. Typically CA is 1000 pF to 5000 pF, and RA is 10 kΩ to 300 kΩ. CB is then chosen large

compared to CA, typically 0.1 µF.

(11)

OUT

LM5008A

FB2

FB1

Figure 16. Minimum Output Ripple Using Ripple Injection

c) Alternate minimum ripple configuration: The circuit in Figure 17 is the same as that in the Block Diagram,

except the output voltage is taken from the junction of R3 and C2. The ripple at V_OUTis determined by the

inductor’s ripple current and C2’s characteristics. However, R3 slightly degrades the load regulation. This circuit

may be suitable if the load current is fairly constant.

LM5008A

FB2

OUT

FB1

Figure 17. Alternate Minimum Output Ripple

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REVISION HISTORY

Changes from Revision E (March 2013) to Revision F

Page

•

Changed layout of National Data Sheet to TI format .......................................................................................................... 15

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PACKAGE OPTION ADDENDUM

www.ti.com

11-Apr-2013

PACKAGING INFORMATION

Orderable Device

LM5008AMM/NOPB

LM5008AMMX/NOPB

LM5008ASD/NOPB

LM5008ASDX/NOPB

Status Package Type Package Pins Package

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

-40 to 125

Top-Side Markings

Samples

Drawing

Qty

(1)

(2)

(3)

(4)

ACTIVE

VSSOP

WSON

DGK

1000

Green (RoHS

& no Sb/Br)

CU SN

Level-1-260C-UNLIM

SAYA

ACTIVE

DGK

NGU

3500

1000

4500

Green (RoHS

& no Sb/Br)

SAYA

Green (RoHS

& no Sb/Br)

L00070A

Green (RoHS

& no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)

Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a

continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

11-Apr-2013

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

21-Mar-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

LM5008AMM/NOPB

LM5008AMMX/NOPB

LM5008ASD/NOPB

LM5008ASDX/NOPB

VSSOP

WSON

DGK

NGU

1000

3500

1000

4500

178.0

330.0

178.0

330.0

12.4

5.3

4.3

3.4

4.3

1.4

1.3

8.0

12.0

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

21-Mar-2013

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

LM5008AMM/NOPB

LM5008AMMX/NOPB

LM5008ASD/NOPB

LM5008ASDX/NOPB

VSSOP

WSON

DGK

NGU

1000

3500

1000

4500

203.0

367.0

203.0

367.0

190.0

367.0

190.0

367.0

41.0

35.0

41.0

35.0

Pack Materials-Page 2

MECHANICAL DATA

NGU0008B

SDC08B (Rev A)

www.ti.com

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LM5008MMX [TI]

相关型号：

LM5008MMX/NOPB

LM5008MMX/NOPB

LM5008MMXEP

LM5008SD

LM5008SD

LM5008SDC

LM5008SDC/NOPB

LM5008SDCX

LM5008SDCX/NOPB

LM5008SDEP

LM5008SDX

LM5008SDX/NOPB