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LM6161W/883X

更新时间：2024-09-18 14:17:23
品牌：TI
描述：OP-AMP, 10000uV OFFSET-MAX, 50MHz BAND WIDTH, CDFP10, CERAMIC, DFP-10

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LM6161W/883X 概述

OP-AMP, 10000uV OFFSET-MAX, 50MHz BAND WIDTH, CDFP10, CERAMIC, DFP-10 运算放大器

LM6161W/883X 规格参数

生命周期：Obsolete包装说明：DFP,
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.33.00.01风险等级：5.71
Is Samacsys：N放大器类型：OPERATIONAL AMPLIFIER
最大平均偏置电流 (IIB)：6 µA最小共模抑制比：80 dB
标称共模抑制比：80 dB最大输入失调电压：10000 µV
JESD-30 代码：R-GDFP-F10负供电电压上限：-18 V
标称负供电电压 (Vsup)：-15 V功能数量：1
端子数量：10最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：CERAMIC, GLASS-SEALED
封装代码：DFP封装形状：RECTANGULAR
封装形式：FLATPACK认证状态：Not Qualified
筛选级别：MIL-STD-883座面最大高度：2.032 mm
最小摆率：200 V/us标称压摆率：300 V/us
供电电压上限：18 V标称供电电压 (Vsup)：15 V
表面贴装：YES技术：BIPOLAR
温度等级：MILITARY端子形式：FLAT
端子节距：1.27 mm端子位置：DUAL
标称均一增益带宽：50000 kHz最小电压增益：550
宽度：6.3246 mmBase Number Matches：1

LM6161W/883X 数据手册

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National Semiconductor is now part of  
Texas Instruments.  
Search http://www.ti.com/ for the latest technical  
information and details on our current products and services.  
MICROCIRCUIT DATA SHEET  
Original Creation Date: 08/03/95  
Last Update Date: 09/04/02  
MNLM6161-X REV 2B1  
Last Major Revision Date: 10/28/98  
HIGH SPEED OPERATIONAL AMPLIFIER  
General Description  
The LM6161 high-speed amplifier exhibits an excellent speed-power product in delivering  
300 V/uS and 50 MHz unity gain stability with only 5 mA of supply current. Further, power  
savings and application convenience are possible by taking advantage of the wide dynamic  
range in operating supply voltage which extends all the way down to +5V.  
This amplifier is built with National's VIP[TM] (Vertically Integrated PNP) process which  
provides fast PNP transistors that are true complements to the already fast NPN devices.  
This advanced junction-isolated process delivers high speed performance without the need  
for complex and expensive dielectric isolation.  
Industry Part Number  
NS Part Numbers  
LM6161  
LM6161E/883  
LM6161J-QMLV  
LM6161J/883  
LM6161W/883  
LM6161WG-QMLV  
LM6161WG/883  
Prime Die  
LM6161B  
Controlling Document  
SEE FEATURES SECTION  
Processing  
Subgrp Description  
Temp (oC)  
MIL-STD-883, Method 5004  
1
Static tests at  
+25  
2
Static tests at  
+125  
-55  
3
Static tests at  
4
Dynamic tests at  
Dynamic tests at  
Dynamic tests at  
Functional tests at  
Functional tests at  
Functional tests at  
Switching tests at  
Switching tests at  
Switching tests at  
+25  
Quality Conformance Inspection  
5
+125  
-55  
6
MIL-STD-883, Method 5005  
7
+25  
8A  
8B  
9
+125  
-55  
+25  
10  
11  
+125  
-55  
1
MICROCIRCUIT DATA SHEET  
MNLM6161-X REV 2B1  
Features  
- High slew rate  
300V/uS  
50MHz  
- High unity gain freq  
- Low supply current  
5mA  
- Fast settling  
120nS to 0.1%  
<0.1%  
- Low differential gain  
- Low differential phase  
- Wide supply range  
0.1 degrees  
4.75V to 32V  
- Stable with unlimited capacitive load  
- Well behaved; easy to apply  
CONTROLLING DOCUMENT:  
LM6161E/883  
LM6161J-QMLV  
LM6161J/883  
LM6161W/883  
LM6161WG-QMLV  
LM6161WG/883  
5962-89621012A  
5962-8962101VPA  
5962-8962101PA  
5962-8962101HA  
5962-8962101VXA  
5962-8962101XA  
Applications  
- Video amplifier  
- High-frequency filter  
- Wide-bandwidth signal conditioning  
- Radar  
- Sonar  
2
MICROCIRCUIT DATA SHEET  
MNLM6161-X REV 2B1  
(Absolute Maximum Ratings)  
(Note 1)  
Supply Voltage  
(V+ - V-)  
36V  
+8V  
Differential Input Voltage Range  
(Note 4)  
Common-Mode Voltage Range  
(Note 6)  
(V+ - 0.7V) to (V- - 7V)  
Continuous  
Output Short Circuit to Gnd  
(Note 3)  
Power Dissipation  
(Note 2)  
400mW  
Soldering Information  
(Soldering, 10 seconds)  
260 C  
Storage Temperature Range  
-65 C to +150 C  
150 C  
Maximum Junction Temperature  
Thermal Resistance  
ThetaJA  
LCC  
(Still Air)  
90 C/W  
61 C/W  
(500LF/Min Air flow)  
(Still Air)  
CERDIP  
CERPAK  
113 C/W  
51 C/W  
(500LF/Min Air flow)  
(Still Air)  
(500LF/Min Air flow)  
228 C/W  
140 C/W  
228 C/W  
140 C/W  
CERAMIC SOIC (Still Air)  
(500LF/Min Air flow)  
ThetaJC  
LCC  
20 C/W  
21 C/W  
21 C/W  
21 C/W  
CERDIP  
CERPAK  
CERAMIC SOIC  
ESD Tolerance  
(Note 4, 5)  
+500V  
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.  
Operating Ratings indicate conditions for which the device is functional, but do not  
guarantee specific performance limits. For guaranteed specifications and test  
conditions, see the Electrical Characteristics. The guaranteed specifications apply  
only for the test conditions listed. Some performance characteristics may degrade  
when the device is not operated under the listed test conditions.  
Note 2: The maximum power dissipation must be derated at elevated temperatures and is  
dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to  
ambient thermal resistance), and TA (ambient temperature). The maximum allowable  
power dissipation at any temperature is Pdmax = (Tjmax - TA)/ThetaJA or the number  
given in the Absolute Maximum Ratings, whichever is lower.  
Note 3: Continuous short-circuit operation at elevated ambient temperature can result in  
exceeding the maximum allowed junction temperature of 150 C.  
Note 4: In order to achieve optimum AC performance, the input stage was designed without  
protective clamps. Exceeding the maximum differential input voltage results in  
reverse breakdown of the base-emitter junction of one of the input transistors and  
probable degradation of the input parameters (especially Vio, Iio and Noise).  
Note 5: The average voltage that the weakest pin combinations (those involving Pin 2 or Pin  
3) can withstand and still conform to the datasheet limits. The test circuit used  
consists of the human body model of 100pF in series with 1500 Ohms.  
Note 6: The voltage between V+ and either input pin must not exceed 36V.  
3
MICROCIRCUIT DATA SHEET  
MNLM6161-X REV 2B1  
Recommended Operating Conditions  
(Note 1)  
Temperature Range  
-55 C < TA < +125 C  
4.75V to 32V  
Supply Voltage Range  
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.  
Operating Ratings indicate conditions for which the device is functional, but do not  
guarantee specific performance limits. For guaranteed specifications and test  
conditions, see the Electrical Characteristics. The guaranteed specifications apply  
only for the test conditions listed. Some performance characteristics may degrade  
when the device is not operated under the listed test conditions.  
4
MICROCIRCUIT DATA SHEET  
MNLM6161-X REV 2B1  
Electrical Characteristics  
DC PARAMETERS  
(The following conditions apply to all the following parameters, unless otherwise specified.)  
DC: Vcc = +15V, Vcm = 0V, Rl > 100K Ohms, Rs = 10K Ohms.  
PIN-  
NAME  
SUB-  
SYMBOL  
Vio  
PARAMETER  
CONDITIONS  
NOTES  
MIN  
-7  
MAX UNIT  
GROUPS  
Input Offset  
Voltage  
7
mV  
1
-10  
-3  
10  
3
mV  
uA  
uA  
nA  
nA  
V
2, 3  
1
Iib  
Input Bias  
Current  
-6  
6
2, 3  
1
Iio  
Input Offset  
Current  
-350  
-800  
13.9  
13.8  
3.9  
3.8  
350  
800  
2, 3  
1
+Vcmr  
Positive  
Common-Mode  
Voltage Range  
Vcc = +15V  
Vcc = +5V  
Vcc = +15V  
Vcc = +5V  
V
2, 3  
1
2
2
V
V
2, 3  
1
-Vcmr  
Negative  
Common-Mode  
Voltage Range  
-12.9 V  
-12.7 V  
2, 3  
1
2
2
2.0  
2.2  
V
V
2, 3  
1
CMRR  
PSRR  
Ios  
Common-Mode  
Rejection Ratio  
-12.9V < Vcm < 13.9V  
-12.7V < Vcm < 13.8V  
+10V < Vcc < +16V  
80  
74  
80  
74  
dB  
dB  
dB  
dB  
mA  
mA  
mA  
mA  
mA  
mA  
2, 3  
1
Power Supply  
Rejection Ratio  
2, 3  
1
Output Short  
Circuit Current  
Source  
Sink  
-30  
-20  
2, 3  
1
30  
20  
2, 3  
1
Icc  
Supply Current  
6.5  
6.8  
2, 3  
Avs  
Large Signal  
Voltage Gain  
Vout = +10V, Rl = 2K Ohms  
1
1
550  
V/V 1  
300  
V/V 2, 3  
+Vop  
Positive Voltage Vcc = +15V, Rl = 2K Ohms  
Swing  
13.5  
13.3  
3.5  
V
V
V
V
1
2, 3  
1
Vcc = +5V, Rl = 2K Ohms  
3.3  
2, 3  
5
MICROCIRCUIT DATA SHEET  
MNLM6161-X REV 2B1  
Electrical Characteristics  
DC PARAMETERS(Continued)  
(The following conditions apply to all the following parameters, unless otherwise specified.)  
DC: Vcc = +15V, Vcm = 0V, Rl > 100K Ohms, Rs = 10K Ohms.  
PIN-  
NAME  
SUB-  
SYMBOL  
-Vop  
PARAMETER  
CONDITIONS  
NOTES  
MIN  
MAX UNIT  
GROUPS  
Negative Voltage Vcc = +15V, Rl = 2K Ohms  
Swing  
-13.0 V  
-12.7 V  
1
2, 3  
1
Vcc = +5V, Rl = 2K Ohms  
1.7  
2.0  
V
V
2, 3  
AC PARAMETERS  
(The following conditions apply to all the following parameters, unless otherwise specified.)  
AC: Vcc = +15V, Vcm = 0V, Rl > 100K Ohms, Rs = 10K Ohms.  
Gbw  
+Sr  
-Sr  
ts  
Gain Bandwidth  
Product  
f = 20Mhz  
40  
Mhz 4  
30  
Mhz 5, 6  
V/uS 4  
Slew Rate  
Output step = -4V to +4V, Av = +1,  
Vin = 8V step  
200  
180  
200  
180  
V/uS 5, 6  
V/uS 4  
Slew Rate  
Output step = +4V to -4V, Av = +1,  
Vin = 8V step  
V/uS 5, 6  
Setting Time  
10V step to 0.1% , Av = 1,  
Rl = 2K Ohms  
300  
325  
nS  
nS  
9
10, 11  
DC PARAMETERS: DRIFT VALUES  
(The following conditions apply to all the following parameters, unless otherwise specified.)  
DC: Vcc = +15V, Vcm = 0V, Rl > 100K Ohms, Rs = 10K Ohms. Delta Calculations Performed on QMLV Devices at  
Group B, Subgroup 5 ONLY.  
Vio  
Iib  
Iio  
CMRR  
Input Offset  
Voltage  
-0.7  
-0.5  
-35  
-5  
+0.7  
+0.5  
+35  
+5  
mV  
uA  
nA  
dB  
1
1
1
1
Input Bias  
Current  
Input Offset  
Current  
Common Mode  
Rejection Ratio  
-12.9V < +Vcm < 13.9V  
Note 1: Voltage gain is the total output swing (20V) divided by the signal required to  
produce that swing.  
Note 2: For single supply operation, the following conditions apply: V+ = 5V, V- = 0V, Vcm =  
2.5V, Vout = 2.5V. Vio adjust pins are each connected to V- to realize maximum output  
swing. This connection will degrade Vio.  
6
MICROCIRCUIT DATA SHEET  
MNLM6161-X REV 2B1  
Graphics and Diagrams  
GRAPHICS#  
DESCRIPTION  
05885HRA4  
06190HRA3  
06191HRA2  
E20ARE  
CERDIP (J), 8 LEAD (B/I CKT)  
CERPACK (W, WG), 10LD (B/I CKT)  
LCC (E), TYPE C, 20 TERMINAL (B/I CKT)  
LCC (E), TYPE C, 20 TERMINAL(P/P DWG)  
CERDIP (J), 8 LEAD (P/P DWG)  
J08ARL  
P000167A  
P000168B  
P000169A  
P000259A  
W10ARG  
CERPACK (W), 10 LEAD (PINOUT)  
LCC (E), 20 LEAD, TYPE C (PINOUT)  
CERDIP (J), 8 LEAD (PINOUT)  
CERAMIC SOIC (WG), 10 LEAD (PINOUT)  
CERPACK (W), 10 LEAD (P/P DWG)  
CERAMIC SOIC (WG), 10 LEAD (P/P DWG)  
WG10ARC  
See attached graphics following this page.  
7
1
2
3
4
5
10  
9
NC  
NC  
V ADJUST  
V ADJUST  
IO  
IO  
V+  
IN-  
8
V
7
OUTPUT  
IN+  
V-  
NC  
6
LM6161W  
10 - LEAD CERPACK  
CONNECTION DIAGRAM  
TOP VIEW  
P000167A  
N
MIL/AEROSPACE OPERATIONS  
2900 SEMICONDUCTOR DRIVE  
SANTA CLARA, CA 95050  
V
ADJUST  
ADJUST  
V
IO  
IO  
N/C  
19  
N/C  
N/C  
3
2
1
20  
N/C  
V+  
N/C  
IN-  
4
5
6
7
8
18  
17  
16  
15  
14  
N/C  
IN+  
N/C  
VOUT  
N/C  
N/C  
9
10  
V-  
11  
12  
13  
N/C  
N/C  
N/C  
N/C  
LM6161E  
20 - LEAD LCC  
CONNECTION DIAGRAM  
TOP VIEW  
P000168B  
MIL/AEROSPACE OPERATIONS  
2900 SEMICONDUCTOR DRIVE  
SANTA CLARA, CA 95050  
1
2
3
4
8
7
6
5
V ADJUST  
V ADJUST  
IO  
IO  
IN-  
V+  
V
IN+  
V-  
OUT  
NC  
LM6161J  
8 - LEAD DIP  
CONNECTION DIAGRAM  
TOP VIEW  
P000169A  
N
MIL/AEROSPACE OPERATIONS  
2900 SEMICONDUCTOR DRIVE  
SANTA CLARA, CA 95050  
ꢀꢁꢂꢃꢂꢃꢄꢅ  
ꢃꢆꢇꢈꢇꢀꢉꢊꢋꢇꢌꢉꢍꢊꢁꢎꢌꢇꢏꢐꢎꢌ  
ꢌꢐꢔꢔꢉꢌꢑꢎꢐꢔꢇꢋꢎꢊꢅꢍꢊꢁ  
ꢑꢐꢒꢇꢓꢎꢉꢄ  
ꢒꢆꢆꢆꢕꢖꢗꢊ  
MICROCIRCUIT DATA SHEET  
MNLM6161-X REV 2B1  
Revision History  
Rev ECN # Rel Date Originator Changes  
1A1  
M0002843 11/23/98  
Barbara Lopez  
Update MDS: MNLM6161-X Rev. 0B0 to MNLM6161-X Rev.  
1A1. Updated NSID, deleted W-SMD and added WG ID.  
Added SMD number for WG package. Added WG package to  
thermal resistance, updated note 6, deleted note 7,  
added power dissipation limit in Absolute section.  
Updated Subgroups to match SMD, added note 2 to  
Electrical section. Added MKT graphic for WG package.  
Added Pinouts for all packages. Added Burn-In CKT for  
W and E packages.  
2A1  
2B1  
M0003073 09/04/02  
M0004061 09/04/02  
Rose Malone  
Rose Malone  
Update MDS: MNLM6161-X, Rev. 1A1 to MNLM6161-X, Rev.  
2A1.  
Update MDS: MNLM6161-X, Rev. 2A1 to MNLM6161-X, Rev.  
2B1. Deleted reference to NSID LM6161W-SMD from Main  
Table. NSID no longer on CPL/SWIS.  
8

LM6161W/883X 相关器件

型号 制造商 描述 价格 文档
LM6161W883 ROCHESTER ADDED LEVELS OF RELIABILITY for the LM6161 family of Op Amps 获取价格
LM6161WB ROCHESTER ADDED LEVELS OF RELIABILITY for the LM6161 family of Op Amps 获取价格
LM6161WG ROCHESTER ADDED LEVELS OF RELIABILITY for the LM6161 family of Op Amps 获取价格
LM6161WG-QMLV ROCHESTER ADDED LEVELS OF RELIABILITY for the LM6161 family of Op Amps 获取价格
LM6161WG-QMLV TI OP-AMP, 10000uV OFFSET-MAX, 50MHz BAND WIDTH, CDSO10, CERAMIC, SOIC-10 获取价格
LM6161WG/883 NSC High Speed Operational Amplifier 获取价格
LM6161WG883 ROCHESTER ADDED LEVELS OF RELIABILITY for the LM6161 family of Op Amps 获取价格
LM6162 NSC High Speed Operational Amplifier 获取价格
LM6162E/883 NSC High Speed Operational Amplifier 获取价格
LM6162J/883 NSC High Speed Operational Amplifier 获取价格

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