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LM63

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LM63 ±1°C/±3°C Accurate Remote Diode Digital Temperature Sensor with Integrated Fan

Control

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1

FEATURES

DESCRIPTION

The LM63 is a remote diode temperature sensor with

integrated fan control. The LM63 accurately

measures: (1) its own temperature and (2) the

temperature of a diode-connected transistor, such as

a 2N3904, or a thermal diode commonly found on

Computer Processors, Graphics Processor Units

(GPU) and other ASIC's. The LM63 remote

temperature sensor's accuracy is factory trimmed for

the series resistance and 1.0021 non-ideality of the

Intel 0.13 µm Pentium 4 and Mobile Pentium 4

Processor-M thermal diode. The LM63 has an offset

register to correct for errors caused by different non-

ideality factors of other thermal diodes.

23

•

Accurately Senses Diode-Connected 2N3904

Transistors or Thermal Diodes On Board Large

Processors or ASICs

•

Accurately Senses its Own Temperature

Factory Trimmed for Intel^®Pentium^®4 and

Mobile Pentium 4 Processor-M Thermal Diodes

•

Integrated PWM Fan Speed Control Output

Acoustic Fan Noise Reduction With User-

Programmable 8-Step Lookup Table

•

Multi-Function, User-Selectable Pin for Either

ALERT Output, or Tachometer Input,

Functions

The LM63 also features an integrated, pulse-width-

modulated (PWM), open-drain fan control output. Fan

speed is a combination of the remote temperature

reading, the lookup table and the register settings.

The 8-step Lookup Table enables the user to

program a non-linear fan speed vs. temperature

transfer function often used to quiet acoustic fan

noise.

•

Tachometer Input for Measuring Fan RPM

Smart-Tach Modes for Measuring RPM of Fans

With Pulse-Width-Modulated Power as Shown

in Typical Application

•

Offset Register can Adjust for a Variety of

Thermal Diodes

10 Bit Plus Sign Remote Diode Temperature

Data Format, With 0.125°C Resolution

CONNECTION DIAGRAM

SMBus 2.0 Compatible Interface, Supports

TIMEOUT

1

2

3

4

8

7

6

5

SMBCLK

SMBDAT

VDD

•

LM86-Compatible Pinout

LM86-Compatible Register Set

8-Pin SOIC Package

D+

D-

LM63

ALERT / TACH

GND

PWM

APPLICATIONS

Figure 1. 8-Pin SOIC (D Package)

•

Computer Processor Thermal Management

(Laptop, Desktop, Workstations, Servers)

Graphics Processor Thermal Management

Electronic Test Equipment

Projectors

•

Office Equipment

Industrial Controls

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

3

Intel, Pentium are registered trademarks of Intel Corporation.

All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

LM63

SNAS190E –SEPTEMBER 2002–REVISED MAY 2013

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KEY SPECIFICATIONS

•

Remote Diode Temp Accuracy (with quantization error)

Ambient Temp

30 to 50°C

0 to 85°C

Diode Temp

60 to 100°C

25 to 125°C

I_PWMLMax

5 mA

Version

LM63C

LM63D

All

Max Error

±1.0°C

±3.0°C

5 mA

8 mA

•

Local Temp Accuracy (includes quantization error)

Ambient Temp

Max Error

±3.0°C

25°C to 125°C

•

Supply Voltage: 3.0 V to 3.6 V

Supply Current: 1.3 mA (typ)

PIN DESCRIPTIONS

NAME

INPUT/OUTPUT

FUNCTION AND CONNECTION

Connect to a low-noise +3.3 ± 0.3 VDC power supply, and bypass to GND with a

0.1 µF ceramic capacitor in parallel with a 100 pF ceramic capacitor. A bulk

capacitance of 10 µF needs to be in the vicinity of the LM63's V_DDpin.

1

V_DD

Power Supply Input

Connect to the anode (positive side) of the remote diode. A 2.2 nF ceramic capacitor

must be connected between pins 2 and 3.

2

3

D+

Analog Input

Connect to the cathode (negative side) of the remote diode. A 2.2 nF ceramic capacitor

must be connected between pins 2 and 3.

D−

Open-Drain

Digital Output

Open-Drain Digital Output. Connect to fan drive circuitry. The power-on default for this

pin is low (pin 4 pulled to ground).

4

5

PWM

GND

Ground

This is the analog and digital ground return.

Depending on how the LM63 is programmed, this pin is either an open-drain ALERT

output or a tachometer input for measuring fan speed. The power-on default for this pin

is the ALERT function.

6

ALERT/TACH

Digital I/O

Digital Input/

Open-Drain Output

7

8

SMBDAT

SMBCLK

This is the bi-directional SMBus data line.

Digital Input. This is the SMBus clock input.

Digital Input

2

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SIMPLIFIED BLOCK DIAGRAM

Internal Diode

LM63

D+

Diode

Bias and

DS ADC

Control

D-

Tachometer

Detection

Temp Reading,

Temp Limit,

SMBDAT

2 - Wire

Serial

Hysteresis, and

Temp Sensor

Filter Registers

Comparators

Interface

SMBCLK

Tach

ALERT/Tach

ALERT

Status and Status

Mask Registers

PWM

PWM Fan Control

Registers

PWM Fan

Control

Figure 2.

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TYPICAL APPLICATION

+3.3 VDC from motherboard

0.1

10 mF

These two capacitors

are close to Pin 1

ALERT to system

shutdown circuitry

100 pF

Fan voltage

+12 or +5 VDC

DC brushless

fan module with

Tachometer

LM63

1

8

7

6

5

To SMBus

interface

control

VDD

SMBCLK

SMBDAT

Processor

Fan V+

2

1k

0.2W

D+

circuitry

2.2 nF

3

13k

Tach In

D- ALERT / Tach

Tach. input

from Fan

4

10k

PWM

GND

+3.3 VDC

Fan V-

470

Remote diode-

connected transistor

inside of an Intel®

10

PWM Output

MMBT2222A

Pentium® 4 Processor

Figure 3.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

4

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ABSOLUTE MAXIMUM RATINGS⁽¹⁾⁽²⁾

Supply Voltage, V_DD

−0.3 V to 6.0 V

−0.5 V to 6.0 V

−0.3 V to (V_DD+ 0. 3 V)

±1 mA

Voltage on SMBDAT, SMBCLK, ALERT/Tach, PWM Pins

Voltage on Other Pins

Input Current, D− Pin

Input Current at All Other Pins⁽³⁾

Package Input Current⁽³⁾

5 mA

30 mA

Package Power Dissipation

See⁽⁴⁾

SMBDAT, ALERT, PWM pins

Storage Temperature

Output Sink Current

10 mA

−65°C to +150°C

2000 V

Human Body Model

Machine Model

ESD Susceptibility⁽⁵⁾

200 V

Vapor Phase (60 seconds)

Infrared (15 seconds)

215°C

Soldering Information, Lead Temperature

SOIC-8 Package⁽⁶⁾

220°C

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is functional, but do not ensure performance limits. For ensured specifications and test conditions, see the Electrical

Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade

when the device is not operated under the listed test conditions.

(2) All voltages are measured with respect to GND, unless otherwise noted.

(3) When the input voltage (V_IN) at any pin exceeds the power supplies (V_IN< GND or V_IN> V+), the current at that pin should be limited to

5 mA. Parasitic components and/or ESD protection circuitry for the LM63's pins are shown in Figure 4 and Table 1. The nominal

breakdown voltage of D3 is 6.5 V. Care should be taken not to forward bias the parasitic diode, D1, present on pins D+ and D−. Doing

so by more than 50 mV may corrupt temperature measurements. An "X" means it exists in the circuit.

(4) Thermal resistance junction-to-ambient when attached to a printed circuit board with 2 oz. foil is 168°C/W.

(5) Human body model, 100 pF discharged through a 1.5 kΩ resistor. Machine model, 200 pF discharged directly into each pin. See

Figure 4 and Table 1 for the ESD Protection Input Structure.

(6) See the URL http://www.ti.com/packaging for other recommendations and methods of soldering surface mount devices.

V+

D1

D3

D4

R1

D6

I/O

D2

ESD

SNP

D5

D7

Clamp

GND

Figure 4. ESD Protection Input Structure

Table 1. ESD Protection Input Structure

PIN NAME

V_DD

PIN #

D1

D2

D3

D4

D5

D6

R1

SNP

ESD CLAMP

1

2

3

4

6

7

8

X

D+

X

D−

X

PWM

X

ALERT/Tach

SMBDAT

SMBCLK

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OPERATING RATINGS⁽¹⁾⁽²⁾

Specified Temperature Range (T_MIN≤ T_A≤ T_MAX

Remote Diode Temperature Range

)

LM63CIM, LM63DIM

0°C ≤ T_A≤ +85°C

0°C ≤ T_A≤ +125°C

+3.0 V to +3.6 V

Supply Voltage Range (V_DD

)

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is functional, but do not ensure performance limits. For ensured specifications and test conditions, see the Electrical

Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade

when the device is not operated under the listed test conditions.

(2) All voltages are measured with respect to GND, unless otherwise noted.

DC ELECTRICAL CHARACTERISTICS

TEMPERATURE-TO-DIGITAL CONVERTER CHARACTERISTICS

The following specifications apply for V_DD= 3.0 VDC to 3.6 VDC, and all analog source impedance R_S= 50Ω unless

otherwise specified in the conditions. Boldface limits apply for T_A= T_MINto T_MAX; all other limits T_A= +25°C.

UNITS

(LIMITS)

PARAMETER

CONDITIONS

VERSION TYPICAL⁽¹⁾LIMITS⁽²⁾

T_D= +60 to +100°C

T_D= Remote Diode

Junction Temperature

LM63C

LM63D

±1

°C (max)

Temperature Error Using the

Remote Thermal Diode of an Intel

Pentium 4 or Mobile Pentium 4

Processor-M with typical non-

ideality of 1.0021.

T_A= +30 to +50°C

_PWML≤ 5 mA

I

±3

°C (max)

T_A= +0 to +85°C

_PWML≤ 8 mA

T_D= +25 to +125°C

All

±3

I

Temperature Error Using the Local

Diode

T_A= +25 to +125°C⁽³⁾⁽⁴⁾

±1

°C (max)

11

0.125

8

Bits

°C

Remote Diode Resolution

Local Diode Resolution

All

Bits

1

°C

Conversion Time, All Temperatures Fastest Setting

All

31.25

0.7

34.4

ms (max)

V

D− Source Voltage

315

110

20

µA (max)

µA (min)

µA (max)

µA (min)

(V_D+− V_D−) = +0.65 V; High Current

All

160

13

Diode Source Current

Low Current

7

(1) “Typicals” are at T_A= 25°C and represent most likely parametric norm. They are to be used as general reference values not for critical

design calculations.

(2) Limits are specified to AOQL (Average Outgoing Quality Level).

(3) Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the

internal power dissipation of the LM63 and the thermal resistance. For the thermal resistance to be used in the self-heating calculation,

see the table footnote about Thermal resistance junction-to-ambient.

(4) Thermal resistance junction-to-ambient when attached to a printed circuit board with 2 oz. foil is 168°C/W.

OPERATING ELECTRICAL CHARACTERISTICS

PARAMETER

CONDITIONS

ALERT

TYPICAL⁽¹⁾

LIMITS⁽²⁾

UNITS

PWM

5 mA

ALERT and PWM Output Saturation Voltage

I_OUT

4 mA

6 mA

0.4

0.55

2.4

V (max)

V (min)

Power-On-Reset Threshold Voltage

1.8

SMBus Inactive, 16 Hz

Conversion Rate

1.1

2.0

mA (max)

µA

(3)

Supply Current

STANDBY Mode

300

(1) “Typicals” are at T_A= 25°C and represent most likely parametric norm. They are to be used as general reference values not for critical

design calculations.

(2) Limits are specified to AOQL (Average Outgoing Quality Level).

(3) The supply current will not increase substantially with an SMBus transaction.

6

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AC ELECTRICAL CHARACTERISTICS

The following specifications apply for V_DD= 3.0 VDC to 3.6 VDC, and all analog source impedance R_S= 50Ω unless

otherwise specified in the conditions. Boldface limits apply for T_A= T_MINto T_MAX; all other limits T_A= +25°C.

UNITS

(LIMIT)

SYMBOL

PARAMETER

CONDITIONS

TYPICAL⁽¹⁾

LIMITS⁽²⁾

TACHOMETER ACCURACY

Fan Control Accuracy

±10

% (max)

(max)

kHz

Fan Full-Scale Count

65535

Fan Counter Clock Frequency

Fan Count Update Frequency

90

1.0

Hz

FAN PWM OUTPUT

Frequency Accuracy

±10

% (max)

(1) “Typicals” are at T_A= 25°C and represent most likely parametric norm. They are to be used as general reference values not for critical

design calculations.

(2) Limits are specified to AOQL (Average Outgoing Quality Level).

DIGITAL ELECTRICAL CHARACTERISTICS

UNITS

SYMBOL

PARAMETER

CONDITIONS

TYPICAL⁽¹⁾

LIMITS⁽²⁾

(LIMIT)

V (min)

V (max)

µA (max)

pF

V_IH

V_IL

I_IH

Logical High Input Voltage

Logical Low Input Voltage

Logical High Input Current

Logical Low Input Current

Digital Input Capacitance

2.1

0.8

V_IN= V_DD

V_IN= GND

0.005

−0.005

20

+10

−10

I_IL

C_IN

(1) “Typicals” are at T_A= 25°C and represent most likely parametric norm. They are to be used as general reference values not for critical

design calculations.

(2) Limits are specified to AOQL (Average Outgoing Quality Level).

SMBus LOGICAL ELECTRICAL CHARACTERISTICS

The following specifications apply for V_DD= 3.0 VDC to 3.6 VDC, and all analog source impedance R_S= 50Ω unless

otherwise specified in the conditions. Boldface limits apply for T_A= T_MINto T_MAX; all other limits T_A= +25°C.

UNITS

(LIMIT)

SYMBOL

PARAMETER

CONDITIONS

TYPICAL⁽¹⁾

LIMITS⁽²⁾

SMBDAT OPEN-DRAIN OUTPUT

V_OL

I_OH

Logic Low Level Output Voltage

High Level Output Current

I_OL= 4 mA

V_OUT= V_DD

0.4

10

V (max)

0.03

µA (max)

SMBDAT, SMBCLK INPUTS

V_IH

V_IL

Logical High Input Voltage

2.1

0.8

V (min)

V (max)

mV

Logical Low Input Voltage

V_HYST

Logic Input Hysteresis Voltage

320

(1) “Typicals” are at T_A= 25°C and represent most likely parametric norm. They are to be used as general reference values not for critical

design calculations.

(2) Limits are specified to AOQL (Average Outgoing Quality Level).

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SMBus DIGITAL SWITCHING CHARACTERISTICS

Unless otherwise noted, these specifications apply for V_DD= +3.0 VDC to +3.6 VDC, C_L(load capacitance) on output lines =

80 pF. Boldface limits apply for T_A= T_J; T_MIN≤ T_A≤ T_MAX; all other limits T_A= T_J= +25°C, unless otherwise noted. The

switching characteristics of the LM63 fully meet or exceed the published specifications of the SMBus version 2.0. The

following parameters are the timing relationships between SMBCLK and SMBDAT signals related to the LM63. They adhere

to, but are not necessarily the same as the SMBus bus specifications.

UNITS

(LIMIT)

SYMBOL

PARAMETER

SMBus Clock Frequency

CONDITIONS

LIMITS⁽¹⁾

10

100

kHz (min)

kHz (max)

f_SMB

t_LOW

t_HIGH

SMBus Clock Low Time

SMBus Clock High Time

From V_{IN(0) max}to V_{IN(0) max}

From V_{IN(1) min}to V_{IN(1) min}

4.7

µs (min)

4.0

50

µs (min)

µs (max)

(2)

t_R

SMBus Rise Time

SMBus Fall Time

Output Fall Time

See

1

µs (max)

ns (max)

(3)

t_F

See

0.3

250

t_OF

C_L= 400 pF, I_O= 3 mA

SMBData and SMBCLK Time Low for Reset of

25

35

ms (min)

ms (max)

t_TIMEOUT

t_SU:DAT

t_HD:DAT

(4)

Serial Interface. See

.

Data In Setup Time to SMBCLK High

250

ns (min)

300

930

ns (min)

ns (max)

Data Out Hold Time after SMBCLK Low

Hold Time after (Repeated) Start Condition. After

this period the first clock is generated.

t_HD:STA

t_SU:STO

t_SU:STA

t_BUF

4.0

100

4.7

µs (min)

ns (min)

µs (min)

Stop Condition SMBCLK High to SMBDAT Low

(Stop Condition Setup)

SMBus Repeated Start-Condition Setup Time,

SMBCLK High to SMBDAT Low

SMBus Free Time between Stop and Start

Conditions

(1) Limits are specified to AOQL (Average Outgoing Quality Level).

(2) The output rise time is measured from (V_{IL max}- 0.15 V) to (V_{IH min}+ 0.15 V).

(3) The output fall time is measured from (V_{IH min}+ 0.15 V) to (V_{IL min}- 0.15 V).

(4) Holding the SMBData and/or SMBCLK lines Low for a time interval greater than t_TIMEOUTwill reset the LM63’s SMBus state machine,

therefore setting SMBDAT and SMBCLK pins to a high-impedance state.

t_LOW

t_R

t_F

V_IH

V_IL

SMBCLK

SMBDAT

t_HD;STA

t_SU;STA

t_HIGH

t_SU;STO

t_BUF

t_SU;DAT

t_HD;DAT

V_IH

V_IL

P

S

P

Figure 5. SMBus Timing Diagram for SMBCLK and SMBDAT Signals

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FUNCTIONAL DESCRIPTION

The LM63 Remote Diode Temperature Sensor with Integrated Fan Control incorporates a ΔV_BE-based

temperature sensor using a Local or Remote diode and a 10-bit plus sign ΔΣ ADC (Delta-Sigma Analog-to-Digital

Converter). The pulse-width modulated (PWM) open-drain output, with a pullup resistor, can drive a switching

transistor to modulate fan speed. When the ALERT/Tach is programmed to the Tach mode the LM63 can

measure the fan speed on the pulses from the fan’s tachometer output. The LM63 includes a smart-tach

measurement mode to accommodate the corrupted tachometer pulses when using switching transistor drive.

When the ALERT/Tach pin is programmed to the ALERT mode the ALERT open-drain output will be pulled low

when the measured temperature exceeds certain programmed limits when enabled. Details are contained in the

sections to follow.

The LM63's two-wire interface is compatible with the SMBus Specification 2.0. For more information the reader is

directed to www.smbus.org.

In the LM63 digital comparators are used to compare the measured Local Temperature (LT) to the Local High

Setpoint user-programmable temperature limit register. The measured Remote Temperature (RT) is digitally

compared to the Remote High Setpoint (RHS), the Remote Low Setpoint (RLS), and the Remote T_CRIT

Setpoint (RCS) user-programmable temperature limits. An ALERT output will occur when the measured

temperature is: (1) higher than either the High Setpoint or the T_CRIT Setpoint, or (2) lower than the Low

Setpoint. The ALERT Mask register allows the user to prevent the generation of these ALERT outputs.

The temperature hysteresis is set by the value placed in the Hysteresis Register (TH).

The LM63 may be placed in a low-power Standby mode by setting the Standby bit found in the Configuration

Register. In the Standby mode continuous conversions are stopped. In Standby mode the user may choose to

allow the PWM output signal to continue, or not, by programming the PWM Disable in Standby bit in the

Configuration Register.

The Local Temperature reading and setpoint data registers are 8-bits wide. The format of the 11-bit remote

temperature data is a 16-bit left justified word. Two 8-bit registers, high and low bytes, are provided for each

setpoint as well as the temperature reading. Two Remote Temperature Offset (RTO) Registers: High Byte and

Low Byte (RTOHB and RTOLB) may be used to correct the temperature readings by adding or subtracting a

fixed value based on a different non-ideality factor of the thermal diode if different from the 0.13 micron Intel

Pentium 4 or Mobile Pentium 4 Processor-M processor’s thermal diode. See the DIODE NON-IDEALITY section.

CONVERSION SEQUENCE

The LM63 takes approximately 31.25 ms to convert the Local Temperature (LT), Remote Temperature (RT), and

to update all of its registers. The Conversion Rate may be modified using the Conversion Rate Register. When

the conversion rate is modified a delay is inserted between conversions, the actual conversion time remains at

31.25 ms. Different Conversion Rates will cause the LM63 to draw different amounts of supply current as shown

in Figure 6.

2600

2300

2000

1700

1400

1100

800

500

200

0.01

0.1

1.0

10

100

CONVERSION RATE (Hz)

Figure 6. Supply Current vs Conversion Rate

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THE ALERT/TACH PIN AS ALERT OUTPUT

The ALERT/Tach pin is a multi-use pin. In this section, we will address the ALERT active-low open-drain output

function. When the ALERT/Tach Select bit is written as a zero in the Configuration Register the ALERT output is

selected. Also, when the ALERT Mask bit in the Configuration register is written as zero the ALERT interrupts

are enabled.

The LM63's ALERT pin is versatile and can produce three different methods of use to best serve the system

designer: (1) as a temperature comparator (2) as a temperature-based interrupt flag, and (3) as part of an

SMBus ALERT System. The three methods of use are further described in the following sections: ALERT

OUTPUT AS A TEMPERATURE COMPARATOR, ALERT OUTPUT AS AN INTERRUPT, and ALERT OUTPUT

AS AN SMBus ALERT. The ALERT and interrupt methods are different only in how the user interacts with the

LM63.

The remote temperature (RT) reading is associated with a T_CRIT Setpoint Register, and both local and remote

temperature (LT and RT) readings are associated with a HIGH setpoint register (LHS and RHS). The RT is also

associated with a LOW setpoint register (RLS). At the end of every temperature reading a digital comparison

determines whether that reading is above its HIGH or T_CRIT setpoint or below its LOW setpoint. If so, the

corresponding bit in the ALERT Status Register is set. If the ALERT mask bit is low, any bit set in the ALERT

Status Register, with the exception of Busy or Open, will cause the ALERT output to be pulled low. Any

temperature conversion that is out of the limits defined in the temperature setpoint registers will trigger an

ALERT. Additionally, the ALERT Mask Bit must be cleared to trigger an ALERT in all modes.

The three different ALERT modes will be discussed in the following sections: ALERT OUTPUT AS A

TEMPERATURE COMPARATOR, ALERT OUTPUT AS AN INTERRUPT, and ALERT OUTPUT AS AN SMBus

ALERT.

ALERT OUTPUT AS A TEMPERATURE COMPARATOR

When the LM63 is used in a system in which does not require temperature-based interrupts, the ALERT output

could be used as a temperature comparator. In this mode, once the condition that triggered the ALERT to go low

is no longer present, the ALERT is negated (Figure 7). For example, if the ALERT output was activated by the

comparison of LT > LHS, when this condition is no longer true, the ALERT will return HIGH. This mode allows

operation without software intervention, once all registers are configured during set-up. In order for the ALERT to

be used as a temperature comparator, the Comparator Mode bit in the Remote Diode Temperature Filter and

Comparator Mode Register must be asserted. This is not the power-on default state.

Remote High Limit

RDTS Measurement

LM63 ALERT Pin

Status Register: RTDS High

Time

Figure 7. ALERT Output as Temperature Comparator Response Diagram

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ALERT OUTPUT AS AN INTERRUPT

The LM63's ALERT output can be implemented as a simple interrupt signal when it is used to trigger an interrupt

service routine. In such systems it is desirable for the interrupt flag to repeatedly trigger during or before the

interrupt service routine has been completed. Under this method of operation, during the read of the ALERT

Status Register the LM63 will set the ALERT Mask bit in the Configuration Register if any bit in the ALERT

Status Register is set, with the exception of Busy and Open. This prevents further ALERT triggering until the

master has reset the ALERT Mask bit, at the end of the interrupt service routine. The ALERT Status Register bits

are cleared only upon a read command from the master (see Figure 8 ) and will be re-asserted at the end of the

next conversion if the triggering condition(s) persist(s). In order for the ALERT to be used as a dedicated

interrupt signal, the Comparator Mode bit in the Remote Diode Temperature Filter and Comparator Mode

Register must be set low. This is the power-on default state. The following sequence describes the response of a

system that uses the ALERT output pin as an interrupt flag:

1. Master senses ALERT low.

2. Master reads the LM63 ALERT Status Register to determine what caused the ALERT.

3. LM63 clears ALERT Status Register, resets the ALERT HIGH and sets the ALERT Mask bit in the

Configuration Register.

4. Master attends to conditions that caused the ALERT to be triggered. The fan is started, setpoint limits are

adjusted, etc.

5. Master resets the ALERT Mask bit in the Configuration Register.

RDTS Measurement

Remote High Limit

ALERT mask set in

LM63

response to reading of

ALERT pin

status register by master

End of Temperature

conversion

Status Register: RTDS High

Time

Figure 8. ALERT Output as an Interrupt Temperature Response Diagram

ALERT OUTPUT AS AN SMBus ALERT

An SMBus alert line is created when the ALERT output is connected to: (1) one or more ALERT outputs of other

SMBus compatible devices, and (2) to a master. Under this implementation, the LM63's ALERT should be

operated using the ARA (Alert Response Address) protocol. The SMBus 2.0 ARA protocol, defined in the SMBus

specification 2.0, is a procedure designed to assist the master in determining which part generated an interrupt

and to service that interrupt.

The SMBus alert line is connected to the open-drain ports of all devices on the bus, thereby AND'ing them

together. The ARA method allows the SMBus master, with one command, to identify which part is pulling the

SMBus alert line LOW. It also prevents the part from pulling the line LOW again for the same triggering condition.

When an ARA command is received by all devices on the bus, the devices pulling the SMBus alert line LOW:

(1) send their address to the master and (2) release the SMBus alert line after acknowledgement of their

address.

The SMBus Specifications 1.1 and 2.0 state that in response to and ARA (Alert Response Address) “after

acknowledging the slave address the device must disengage its ALERT pulldown”. Furthermore, “if the host still

sees ALERT low when the message transfer is complete, it knows to read the ARA again.” This SMBus

“disengaging ALERT requirement prevents locking up the SMBus alert line. Competitive parts may address the

“disengaging of ALERT” differently than the LM63 or not at all. SMBus systems that implement the ARA protocol

as suggested for the LM63 will be fully compatible with all competitive parts.

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The LM63 fulfills “disengaging of ALERT” by setting the ALERT Mask Bit in the Configuration Register after

sending out its address in response to an ARA and releasing the ALERT output pin. Once the ALERT Mask bit is

activated, the ALERT output pin will be disabled until enabled by software. In order to enable the ALERT the

master must read the ALERT Status Register, during the interrupt service routine and then reset the ALERT

Mask bit in the Configuration Register to 0 at the end of the interrupt service routine.

The following sequence describes the ARA response protocol.

1. Master senses SMBus alert line low

2. Master sends a START followed by the Alert Response Address (ARA) with a Read Command.

3. Alerting Device(s) send ACK.

4. Alerting Device(s) send their address. While transmitting their address, alerting devices sense whether their

address has been transmitted correctly. (The LM63 will reset its ALERT output and set the ALERT Mask bit

once its complete address has been transmitted successfully.)

5. Master/slave NoACK

6. Master sends STOP

7. Master attends to conditions that caused the ALERT to be triggered. The ALERT Status Register is read and

fan started, setpoints adjusted, etc.

8. Master resets the ALERT Mask bit in the Configuration Register.

The ARA, 000 1100, is a general call address. No device should ever be assigned to this address.

The ALERT Configuration bit in the Remote Diode Temperature Filter and Comparator Mode Register must be

set low in order for the LM63 to respond to the ARA command.

The ALERT output can be disabled by setting the ALERT Mask bit in the Configuration Register. The power-on

default is to have the ALERT Mask bit and the ALERT Configuration bit low.

Remote High Limit

RDTS Measurement

LM63

ALERT Pin

ALERT mask set in

response to ARA

from master

Status Register: Remote High

Time

Figure 9. ALERT Output as an SMBus ALERT Temperature Response Diagram

SMBus INTERFACE

Since the LM63 operates as a slave on the SMBus the SMBCLK line is an input and the SMBDAT line is bi-

directional. The LM63 never drives the SMBCLK line and it does not support clock stretching. According to

SMBus specifications, the LM63 has a 7-bit slave address. All bits, A6 through A0, are internally programmed

and cannot be changed by software or hardware.

The complete slave address is:

A6

1

A5

0

A4

0

A3

1

A2

1

A1

0

A0

0

12

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POWER-ON RESET (POR) DEFAULT STATES

For information on the POR default states, see REGISTER MAP IN FUNCTIONAL ORDER.

TEMPERATURE DATA FORMAT

Temperature data can only be read from the Local and Remote Temperature registers. The High, Low and

T_CRIT setpoint registers are Read/Write.

Remote temperature data is represented by an 11-bit, two's complement word with a Least Significant Bit (LSB)

equal to 0.125°C. The data format is a left justified 16-bit word available in two 8-bit registers:

DIGITAL OUTPUT

TEMPERATURE

BINARY

HEX

7D00

1900

0100

0020

0000

FFE0

FF00

E700

C900

+125°C

+25°C

+1°C

0111 1101 0000 0000

0001 1001 0000 0000

0000 0001 0000 0000

0000 0000 0010 0000

0000 0000 0000 0000

1111 1111 1110 0000

1111 1111 0000 0000

1110 0111 0000 0000

1100 1001 0000 0000

+0.125°C

0°C

−0.125°C

−1°C

−25°C

−55°C

Local Temperature data is represented by an 8-bit, two's complement byte with an LSB equal to 1°C:

DIGITAL OUTPUT

TEMPERATURE

BINARY

0111 1101

0001 1001

0000 0001

0000 0000

1111 1111

1110 0111

1100 1001

HEX

7D

19

+125°C

+25°C

+1°C

01

0°C

00

−1°C

FF

E7

C9

−25°C

−55°C

OPEN-DRAIN OUTPUTS

The SMBDAT, ALERT, and PWM outputs are open-drain outputs and do not have internal pullups. A “High” level

will not be observed on these pins until pullup current is provided by an internal source, typically through a pullup

resistor. Choice of resistor value depends on several factors but, in general, the value should be as high as

possible consistent with reliable operation. This will lower the power dissipation of the LM63 and avoid

temperature errors caused by self-heating of the device. The maximum value of the pullup resistor to provide the

2.1 V high level is 88.7 kΩ.

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DIODE FAULT DETECTION

The LM63 can detect fault conditions caused by the remote diode. If the D+ pin is detected to be shorted to V_DD

,

or open: (1) the Remote Temperature High Byte (RTHB) register is loaded with 127°C, (2) the Remote

Temperature Low Byte (RTLB) register is loaded with 0, and (3) the OPEN bit (D2) in the status register is set.

Therefore, if the Remote T_CRIT setpoint register (RCS): (1) is set to a value less than +127°C and (2) the

ALERT Mask is disabled, then the ALERT output pin will be pulled low. If the Remote High Setpoint High Byte

(RHSHB) is set to a value less than +127°C and (2) the ALERT Mask is disabled, then the ALERT will be pulled

low. The OPEN bit by itself will not trigger an ALERT.

If the D+ pin is shorted to either ground or D−, then the Remote Temperature High Byte (RTHB) register is

loaded with −128°C (1000 0000) and the OPEN bit in the ALERT Status Register will not be set. A temperature

reading of −128°C indicates that D+ is shorted to either ground or D-. If the value in the Remote Low Setpoint

High Byte (RLSHB) Register is more than −128°C and the ALERT Mask is Disabled, ALERT will be pulled low.

COMMUNICATING WITH THE LM63

Each data register in the LM63 falls into one of four types of user accessibility:

1. Read Only

2. Write Only

3. Read/Write same address

4. Read/Write different address

A Write to the LM63 is comprised of an address byte and a command byte. A write to any register requires one

data byte.

Reading the LM63 Registers can take place after the requisite register setup sequence takes place. See

REQUIRED INITIAL FAN CONTROL REGISTER SEQUENCE.

The data byte has the Most Significant Bit (MSB) first. At the end of a read, the LM63 can accept either

Acknowledge or No-Acknowledge from the Master. Note that the No-Acknowledge is typically used as a signal

for the slave indicating that the Master has read its last byte.

DIGITAL FILTER

The LM63 incorporates a user-configured digital filter to suppress erroneous Remote Temperature readings due

to noise. The filter is accessed in the Remote Diode Temperature Filter and Comparator Mode Register. The

filter can be set according to Table 2.

Level 2 is maximum filtering.

Table 2. Digital Filter Selection Table

D2

0

D1

0

FILTER

No Filter

Level 1

Level 2

0

1

0

1

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50

45

40

35

30

25

No Filter

Filter Level 1

Filter Level 2

0

5

10

15

20

25

NUMBER OF SAMPLES

Figure 10. Step Response of the Digital Filter

50

45

No Filter

40

Filter Level 1

35

Filter Level 2

30

25

0

5

10

15

20

25

NUMBER OF SAMPLES

Figure 11. Impulse Response of the Digital Filter

45

LM63

43

41

39

37

35

33

31

29

27

25

with

Filter Off

LM63

with

Filter On

0

50

100

150

200

SAMPLE NUMBER

Figure 12. Digital Filter Response in an Intel Pentium 4 processor System. The Filter on and off curves

were purposely offset to better show noise performance.

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FAULT QUEUE

The LM63 incorporates a Fault Queue to suppress erroneous ALERT triggering. The Fault Queue prevents false

triggering by requiring three consecutive out-of-limit HIGH, LOW, or T_CRIT temperature readings. See

Figure 13. The Fault Queue defaults to OFF upon power-up and may be activated by setting the RDTS Fault

Queue bit in the Configuration Register to a 1.

RDTS Measurement

Status Register: RTDS High

n

n+1 n+2 n+3 n+4 n+5

SAMPLE NUMBER

Figure 13. Fault Queue Temperature Response Diagram

ONE-SHOT REGISTER

The One-Shot Register is used to initiate a single conversion and comparison cycle when the device is in

standby mode, after which the data returns to standby. This is not a data register. A write operation causes the

one-shot conversion. The data written to this address is irrelevant and is not stored. A zero will always be read

from this register.

SERIAL INTERFACE RESET

In the event that the SMBus Master is reset while the LM63 is transmitting on the SMBDAT line, the LM63 must

be returned to a known state in the communication protocol. This may be done in one of two ways:

1. When SMBDAT is Low, the LM63 SMBus state machine resets to the SMBus idle state if either SMBData or

SMBCLK are held Low for more than 35 ms (t_TIMEOUT). All devices are to timeout when either the SMBCLK or

SMBDAT lines are held Low for 25 ms – 35 ms. Therefore, to insure a timeout of all devices on the bus,

either the SMBCLK or the SMBData line must be held Low for at least 35 ms.

2. With both SMBDAT and SMBCLK High, the master can initiate an SMBus start condition with a High to Low

transition on the SMBDAT line. The LM63 will respond properly to an SMBus start condition at any point

during the communication. After the start the LM63 will expect an SMBus Address address byte.

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LM63 REGISTERS

This section includes the following subsections: REGISTER MAP IN HEXADECIMAL ORDER, which shows a

summary of all registers and their bit assignments; REGISTER MAP IN FUNCTIONAL ORDER; and REGISTER

DESCRIPTIONS IN FUNCTIONAL ORDER, which provides a detailed explanation of each register. Do not

address the unused or manufacturer’s test registers.

REGISTER MAP IN HEXADECIMAL ORDER

Table 3 is a Register Map grouped in hexadecimal address order. Some address locations have been left blank

to maintain compatibility with LM86. Addresses in parenthesis are mirrors of “Same As” address for backwards

compatibility with some older software. Reading or writing either address will access the same 8-bit register.

Table 3. Register Map Grouped in Hexadecimal Address Order

DATA BITS

REGISTER

0x[HEX]

REGISTER

NAME

D7

D6

D5

D4

D3

D2

D1

D0

00

Local

LT7

LT6

LT5

LT4

LT3

LT2

LT1

LT0

Temperature

01

02

03

04

Rmt Temp MSB

ALERT Status

Configuration

RTHB±

BUSY

ALTMSK

0

RTHB14

LHIGH

STBY

0

RTHB13

RTHB12

RTHB11

RLOW

0

RTHB10

RDFA

RTHB9

RCRIT

RTHB8

TACH

0

PWMDIS

0

RHIGH

0

ALT/TCH

CONV2

TCRITOV

CONV1

FLTQUE

CONV0

Conversion

Rate

CONV3

05

Local High

Setpoint

LHS7

LHS6

LHS5

LHS4

LHS3

LHS2

LHS1

LHS0

06

07

[Reserved]

Not Used

Rmt High

Setpoint MSB

RHSHB15

RLSHB15

RHSHB14

RLSHB14

RHHBS13

RLSHB13

RHSHB12

RHSHB11

RHSHB10

RLSHB10

RHSHB9

RLSHB9

RHSHB8

RLSHB8

08

Rmt Low

RLSHB12

RLHBS11

Setpoint MSB

(09)

(0A)

(0B)

0C

Same as 03

Same as 04

Same as 05

[Reserved]

Not Used

(0D)

(0E)

0F

Same as 07

Same as 08

One Shot

Write Only. Write command triggers one temperature conversion cycle.

10

Rmt Temp LSB

RTLB7

RTLB6

RTLB5

0

11

Rmt Temp

Offset MSB

RTOHB15

RTOHB14

RTOHB13

RTOHB12

RTOHB11

RTOHB10

RTOHB9

RTOHB8

12

13

14

Rmt Temp

Offset LSB

RTOLB7

RHSLB7

RLSLB7

RTOLB6

RHSLB6

RLSLB6

RTOLB5

RHSLB5

RLSLB5

0

Rmt High

Setpoint LSB

Rmt Low

Setpoint LSB

15

16

17

18

19

[Reserved]

ALERT Mask

[Reserved]

Not Used

1

ALTMSK6

RCS6

1

ALTMSK4

ALTMSK3

1

ALTMSK1

RCS1

ALTMSK0

RCS0

Not Used

Rmt TCRIT

Setpoint

RCS7

RCS5

RCS4

RTH4

RCS3

RTH3

RCS2

1A–1F

20

[Reserved]

Not Used

21

Rmt TCRIT

Hysteresis

RTH7

RTH6

RTH5

RTH2

RTH1

RTH0

22–2F

30–3F

40–45

46

[Reserved]

Not Used

[Reserved]

Tach Count LSB

TCLB5

TCLB4

TCLB3

TCLB2

TCLB1

TCHB9

TCLB0

TCHB8

TEDGE1

TCHB7

TEDGE0

TCHB6

47

Tach Count

MSB

TCHB13

TCHB12

TCHB11

TCHB10

48

Tach Limit LSB

TLLB7

TLLB6

TLLB5

TLLB4

TLLB3

TLLB2

Not Used

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Table 3. Register Map Grouped in Hexadecimal Address Order (continued)

DATA BITS

REGISTER

0x[HEX]

REGISTER

NAME

D7

D6

D5

D4

D3

D2

TLHB10

0

D1

D0

49

4A

4B

Tach Limit MSB

PWM and RPM

TLHB15

TLHB14

TLHB13

PWPGM

SPINUP

TLHB12

PWOUT±

SPNDTY1

TLHB11

PWCKSL

SPNDTY0

TLHB9

TLHB8

0

TACH1

SPNUPT1

TACH0

SPNUPT0

Fan Spin-Up

Config

SPNUPT2

4C

4D

PWM Value

0

PWVAL5

0

PWVAL4

PWMF4

PWVAL3

PWMF3

PWVAL2

PWMF2

PWVAL1

PWMF1

PWVAL0

PWMF0

PWM

Frequency

4E

4F

[Reserved]

Not Used

LOOKH3

Lookup Table

Hystersis

0

LOOKH4

LOOKH2

LOOKH1

RDTF0

LOOKH0

50–5F

60–BE

BF

Lookup Table

[Reserved]

Lookup Table of up to 8 PWM and Temp Pairs in 8-bit Registers

Not Used

Rmt Diode

Temp Filter

0

RDTF1

ALTCOMP

C0–FD

FE

[Reserved]

Not Used

Manufacturer’s

ID

0

1

0

1

FF

Stepping/Die

Rev. ID

18

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REGISTER MAP IN FUNCTIONAL ORDER

Table 4 is a Register Map grouped in Functional Order. Some address locations have been left blank to maintain

compatibility with LM86. Addresses in parenthesis are mirrors of named address. Reading or writing either

address will access the same 8-bit register. The Fan Control and Configuration Registers are listed first, as there

is a required order to setup these registers first and then setup the others (see REQUIRED INITIAL FAN

CONTROL REGISTER SEQUENCE). The detailed explanations of each register will follow the order shown in

Table 4.

Note: POR = Power-On-Reset.

Table 4. Register Map Grouped in Functional Order

REGISTER

[HEX]

POR DEFAULT

[HEX]

REGISTER NAME

READ/WRITE

FAN CONTROL REGISTERS

4A

4B

4D

PWM and RPM

R/W

20

3F

17

Fan Spin-Up Configuration

PWM Frequency

Read Only

(R/W if Override Bit is Set)

4C

PWM Value

00

50–5F

4F

Lookup Table

R/W

See Table

04

Lookup Table Hysteresis

CONFIGURATION REGISTER

03 (09) Configuration

TACHOMETER COUNT AND LIMIT REGISTERS

R/W

00

46

47

48

49

Tach Count LSB

Tach Count MSB

Tach Limit LSB

Tach Limit MSB

Read Only

R/W

N/A

FF

R/W

FF

LOCAL TEMPERATURE AND LOCAL SETPOINT REGISTERS

00

Local Temperature

Local High Setpoint

Read Only

R/W

N/A

05 (0B)

46 (70°)

REMOTE DIODE TEMPERATURE AND SETPOINT REGISTERS

01

10

Remote Temperature MSB

Remote Temperature LSB

Remote Temperature Offset MSB

Remote Temperature Offset LSB

Remote High Setpoint MSB

Remote High Setpoint LSB

Remote Low Setpoint MSB

Remote Low Setpoint LSB

Remote TCRIT Setpoint

Read Only

R/W

N/A

11

00

12

R/W

00

07 (0D)

13

R/W

46 (70°C)

00

R/W

08 (0E)

14

R/W

00 (0°C)

00

R/W

19

R/W

55 (85°C)

0A (10°C)

00

21

Remote TCRIT Hys

R/W

BF

Remote Diode Temperature Filter

R/W

CONVERSION AND ONE-SHOT REGISTERS

04 (0A)

0F

Conversion Rate

One-Shot

R/W

08

Write Only

N/A

ALERT STATUS AND MASK REGISTERS

02

16

ALERT Status

ALERT Mask

Read Only

R/W

N/A

A4

ID AND TEST REGISTERS

FF

Stepping/Die Rev. ID

Read Only

41

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Table 4. Register Map Grouped in Functional Order (continued)

REGISTER

[HEX]

POR DEFAULT

[HEX]

REGISTER NAME

READ/WRITE

[RESERVED] REGISTERS—NOT USED

06

0C

Not Used

N/A

15

17

18

1A–1F

20

22–2F

30–3F

40–45

4E

60–BE

C0–FD

20

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REGISTER DESCRIPTIONS IN FUNCTIONAL ORDER

The REGISTER DESCRIPTIONS IN FUNCTIONAL ORDER section shows a Register Map grouped in functional

order. Some address locations have been left blank to maintain compatibility with LM86. Addresses in

parenthesis are mirrors of named address for backwards compatibility with some older software. Reading or

writing either address will access the same 8-bit register.

Table 5. Fan Control Registers

ADDRESS

HEX

READ/

WRITE

POR

VALUE

BITS

NAME

DESCRIPTION

4A_HEXFAN PWM AND TACHOMETER CONFIGURATION REGISTER

7:6

00

These bits are unused and always set to 0.

0: the PWM Value (register 4C) and the Lookup Table (50–5F) are read-

only. The PWM value (0 to 100%) is determined by the current remote

diode temperature and the Lookup Table, and can be read from the

PWM value register.

1: the PWM value (register 4C) and the Lookup Table (Register 50–5F)

are read/write enabled. Writing the PWM Value register will set the PWM

output. This is also the state during which the Lookup Table can be

written.

PWM

Program

5

1

PWM

Output

Polarity

0: the PWM output pin will be 0 V for fan OFF and open for fan ON.

1: the PWM output pin will be open for fan OFF and 0 V for fan ON.

4

0

PWM Clock

Select

if 0, the master PWM clock is 360 kHz

if 1, the master PWM clock is 1.4 kHz.

3

2

0

4A

R/W

[Reserved]

Always write 0 to this bit.

00: Traditional tach input monitor, false readings when under minimum

detectable RPM.

01: Traditional tach input monitor, FFFF reading when under minimum

detectable RPM.

10: Most accurate readings, FFFF reading when under minimum

detectable RPM. Smart-tach mode enabled. Use with direct PWM drive

of fan power.

Tachometer

Mode

1:0

00

11: Least effort on programmed PWM of fan, FFFF reading when under

minimum detectable RPM. Smart-tach mode enabled. Use with direct

PWM drive of fan power.

Note: If the PWM Clock is 360 kHz, mode 00 is used regardless of the

setting of these two bits.

4B_HEXFAN PWM AND TACHOMETER CONFIGURATION REGISTER

7:6

0

These bits are unused and always set to 0

If 0, the fan spin-up uses the duty cycle and spin-up time, bits 0–4.

If 1, the LM63 sets the PWM output to 100% until the spin-up times out

(per bits 0–2) or the minimum desired RPM has been reached (per the

Tachometer Setpoint setting) using the tachometer input, whichever

happens first. This bit overrides the PWM Spin-Up Duty Cycle register

(bits 4:3)—PWM output is always 100%. Register x03, bit 2 = 1 for

Tachometer mode.

Fast

Tachometer

Spin-Up

5

1

If PWM Spin-Up Time (bits 2:0) = 000, the Spin-Up cycle is bypassed,

regardless of the state of this bit.

00: Spin-Up cycle bypassed (no Spin-Up), unless Fast Tachometer

Terminated Spin-Up (bit 5) is set.

01: 50%

10: 75%–81% Depends on PWM Frequency. See the APPLICATION

NOTES section at the end of this datasheet.

11: 100%

4B

R/W

PWM

Spin-Up

Duty Cycle

4:3

2:0

11

000: Spin-Up cycle bypassed (No Spin-Up)

001: 0.05 seconds

010: 0.1 s

011: 0.2 s

100: 0.4 s

PWM

Spin-Up

Time

111

101: 0.8 s

110: 1.6 s

111: 3.2 s

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Table 5. Fan Control Registers (continued)

ADDRESS

HEX

READ/

WRITE

POR

VALUE

BITS

NAME

DESCRIPTION

4D_HEXFAN PWM FREQUENCY REGISTER

7:5

4:0

000

These bits are unused and always set to 0

The PWM Frequency = PWM_Clock / 2n, where PWM_Clock = 360 kHz

or 1.4 kHz (per the PWM Clock Select bit in Register 4A), and n = value

of the register.

PWM

Frequency

4D

R/W

10111

Note: n = 0 is mapped to n = 1. See the APPLICATION NOTES section

at the end of this datasheet.

4C_HEXPWM VALUE REGISTER

7:6

00

These bits are unused and always set to 0

If PWM Program (register 4A, bit 5) = 0 this register is read only and

reflects the LM63’s current PWM value from the Lookup Table.

If PWM Program (register 4A, bit 5) = 1, this register is read/write and the

desired PWM value is written directly to this register, instead of from the

Lookup Table, for direct fan speed control.

Read

(Write only

if reg 4A

bit 5 = 1.)

PWM

Value

4C

5:0

000000

This register will read 0 during the Spin-Up cycle.

See the APPLICATION NOTES section at the end of this datasheet for

more information regarding the PWM Value and Duty Cycle in %.

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Table 5. Fan Control Registers (continued)

ADDRESS

HEX

READ/

WRITE

POR

VALUE

BITS

NAME

DESCRIPTION

50_HEXto 5F_HEXLOOKUP TABLE (7 Bits for Temperature and 6 Bits for PWM for each Temperature/PWM Pair)

7

0

This bit is unused and always set to 0.

Lookup Table

Temperature

Entry 1

50

51

52

53

54

55

56

57

58

59

5A

5B

5C

5D

5E

5F

If the remote diode temperature exceeds this value, the PWM output will

be the value in Register 51.

6:0

0x7F

7:6

5:0

7

00

0x3F

0

These bits are unused and always set to 0.

Lookup Table

PWM Entry 1

The PWM value corresponding to the temperature limit in register 50.

This bit is unused and always set to 0.

Lookup Table

Temperature

Entry 2

If the remote diode temperature exceeds this value, the PWM output will

be the value in Register 53.

6:0

0x7F

7:6

5:0

7

00

0x3F

0

These bits are unused and always set to 0.

Lookup Table

PWM Entry 2

The PWM value corresponding to the temperature limit in register 52.

This bit is unused and always set to 0.

Lookup Table

Temperature

Entry 3

If the remote diode temperature exceeds this value, the PWM output will

be the value in Register 55.

6:0

0x7F

7:6

5:0

7

00

0x3F

0

These bits are unused and always set to 0.

Lookup Table

PWM Entry 3

The PWM value corresponding to the temperature limit in register 54.

This bit is unused and always set to 0.

Lookup Table

Temperature

Entry 4

If the remote diode temperature exceeds this value, the PWM output will

be the value in Register 57.

6:0

0x7F

7:6

5:0

7

00

0x3F

0

These bits are unused and always set to 0.

Lookup Table

PWM Entry 4

Read.

The PWM value corresponding to the temperature limit in register 56.

This bit is unused and always set to 0.

(Write only

if reg 4A

bit 5 = 1.)

Lookup Table

Temperature

Entry 5

If the remote diode temperature exceeds this value, the PWM output will

be the value in Register 59.

6:0

0x7F

7:6

5:0

7

00

0x3F

0

These bits are unused and always set to 0.

Lookup Table

PWM Entry 5

The PWM value corresponding to the temperature limit in register 58.

This bit is unused and always set to 0.

Lookup Table

Temperature

Entry 6

If the remote diode temperature exceeds this value, the PWM output will

be the value in Register 5B.

6:0

0x7F

7:6

5:0

7

00

0x3F

0

These bits are unused and always set to 0.

Lookup Table

PWM Entry 6

The PWM value corresponding to the temperature limit in register 5A.

This bit is unused and always set to 0.

Lookup Table

Temperature

Entry 7

If the remote diode temperature exceeds this value, the PWM output will

be the value in Register 5D.

6:0

0x7F

7:6

5:0

7

00

0x3F

0

These bits are unused and always set to 0.

Lookup Table

PWM Entry 7

The PWM value corresponding to the temperature limit in register 5C.

This bit is unused and always set to 0.

Lookup Table

Temperature

Entry 8

If the remote diode temperature exceeds this value, the PWM output will

be the value in Register 5F.

6:0

0x7F

7:6

5:0

00

These bits are unused and always set to 0.

Lookup Table

PWM Entry 8

0x3F

The PWM value corresponding to the temperature limit in register 5E.

4F_HEXLOOKUP TABLE HYSTERESIS

7:5

000

Lookup

Table

Hysteresis

These bits are unused and always set to 0

4F

R/W

4:0

00100

The amount of hysteresis applied to the Lookup Table. (1 LSB = 1°C).

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Table 6. Configuration Register

ADDRESS

HEX

READ/

WRITE

POR

VALUE

BITS

NAME

DESCRIPTION

03 (09)_HEXCONFIGURATION REGISTER

When this bit is a 0, ALERT interrupts are enabled.

When this bit is set to a 1, ALERT interrupts are masked, and the

ALERT pin is always in a high-impedance (open) state.

ALERT

Mask

7

6

0

When this bit is a 0, the LM63 is in operational mode, converting,

comparing, and updating the PWM output continuously.

When this bit is a 1, the LM63 enters a low-power standby mode.

In STANDBY, continuous conversions are stopped, but a

conversion/comparison cycle may be initiated by writing any value to

register 0x0F. Operation of the PWM output in STANDBY depends

on the setting of bit 5 in this register.

STANDBY

When this bit is a 0, the LM63’s PWM output continues to output the

current fan control signal while in STANDBY.

When this bit is a 1, the PWM output is disabled (as defined by the

PWM polarity bit) while in STANDBY.

PWM Disable

in STANDBY

5

0

4:3

00

These bits are unused and always set to 0.

When this bit is a 0, the ALERT/Tach pin is an open drain ALERT

output.

03 (09)

R/W

ALERT/Tach

Select

When this bit is a 1, the ALERT/Tach pin is a high-impedance

Tachometer input.

Note that if this bit is set, the function of the ALERT/Tach pin must be

Tach input, so an external ALERT condition will not occur.

2

1

0

The T_CRIT limit for the remote diode is nominally 85°C. This value

can be changed once after power-up by first setting this bit to a 1,

then programming a new T_CRIT value into the Remote Diode

T_CRIT Limit (register 0x19). The T_CRIT value can not be changed

again except by cycling power to the LM63.

T_CRIT Limit

Override

0: an ALERT will be generated if any Remote Diode conversion result

is above the Remote High Set Point or below the Remote Low

Setpoint.

1: an ALERT will be generated only if three consecutive Remote

Diode conversions are above the Remote High Set Point or below

the Remote Low Setpoint.

RDTS Fault

Queue

24

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Table 7. Tachometer Count And Limit Registers

ADDRESS

HEX

READ/

WRITE

POR

VALUE

BITS

NAME

DESCRIPTION

47_HEXTACHOMETER COUNT (MSB) and 46_HEXTACHOMETER COUNT (LSB) REGISTERS (16 bits: Read LSB first to lock MSB and

ensure MSB and LSB are from the same reading)

Tachometer

Count (MSB)

These registers contain the current 16-bit Tachometer

Count, representing the period of time between tach pulses.

Note that the 16-bit tachometer MSB and LSB are reversed

from the 16-bit temperature readings.

47

Read Only

7:0

7:2

N/A

Tachometer

Count (LSB)

Bits

00:

01:

10:

11:

Edges Used

Tach_Count_Multiple

Reserved - do not use

2

3

5

4

2

1

Tachometer

Edge Count

46

Read Only

1:0

00

Note: If PWM_Clock_Select = 360 kHz, then

Tach_Count_Multiple = 1 regardless of the setting of these

bits.

49_HEXTACHOMETER LIMIT (MSB) and 48_HEXTACHOMETER LIMIT (LSB) REGISTERS

Tachometer

Limit MSB)

These registers contain the current 16-bit Tachometer

49

R/W

7:0

0xFF

Count, representing the period of time between tach pulses.

Fan RPM = (f * 5,400,000) / (Tachometer Count), where f =

1 for 2 pulses/rev fan; f = 2 for 1 pulse/rev fan; and f = 2/3

for 3 pulses/rev fan. See the APPLICATION NOTES section

at the end of this datasheet for more tachometer

Tachometer

Limit (LSB)

R/W

7:2

1:0

0xFF

48

information. Note that the 16-bit tachometer MSB and LSB

are reversed from the 16 bit temperature readings.

[Reserved]

Not Used.

Table 8. Local Temperature And Local High Setpoint Registers

ADDRESS

HEX

READ/

WRITE

POR

VALUE

BITS

NAME

DESCRIPTION

00_HEXLOCAL TEMPERATURE REGISTER (8-bits)

Local Temperature

Reading (8-bit)

00

Read Only 7:0

N/A

8-bit integer representing the temperature of the LM63 die.

05 (0B)_HEXLOCAL HIGH SETPOINT REGISTER (8-bits)

05 R/W 7:0 0x46 (70°) Local HIGH Setpoint High Setpoint for the internal diode.

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Table 9. Remote Diode Temperature, Offset And Setpoint Registers

ADDRESS

HEX

READ/

WRITE

POR

VALUE

BITS

NAME

DESCRIPTION

This is the MSB of the 2’s complement value, representing the

temperature of the remote diode connected to the LM63. Bit 7 is the

sign bit, bit 6 has a weight of 0x40 (64°), and bit 0 has a weight of 1°C.

This byte to be read first. The LM63C and LM63D will report the actual

thermal diode temperature.

Remote Diode

Temperature

Reading (MSB)

01

10

Read Only 7:0

N/A

This is the LSB of the 2’s complement value, representing the

temperature of the remote diode connected to the LM63. Bit 7 has a

weight 0.5°C, bit 6 has a weight of 0.25°C, and bit 5 has a weight of

0.125°C.

Remote Diode

Temperature

Reading (MSB)

7:5

N/A

Read Only

4:0

00

Always 00.

Remote

Temperature

OFFSET (MSB)

These registers contain the value added to or subtracted from the

remote diode’s reading to compensate for the different non-ideality

factors of different processors, diodes, etc. The 2’s complement value,

in these registers is added to the output of the LM63’s ADC to form the

temperature reading contained in registers 01 and 10.

11

12

R/W

7:5

Remote

Temperature

OFFSET (LSB)

7:5

4:0

00

Always 00.

0x46

(70°C)

Remote HIGH

Setpoint (MSB)

07 (0D)

13

R/W

7:0

High setpoint temperature for remote diode. Same format as Remote

Temperature Reading (registers 01 and 10).

7:5

4:0

00

Remote HIGH

Setpoint (LSB)

Always 00.

00

(0°C)

Remote LOW

Setpoint (MSB)

08 (0E)

14

7:0

Low setpoint temperature for remote diode. Same format as Remote

Temperature Reading (registers 01 and 10).

7:5

4:0

00

Remote LOW

Setpoint (LSB)

Always 00.

This 8-bit integer storing the T_CRIT limit is nominally 85°C. This value

can be changed once after power-up by setting T_CRIT Limit Override

(bit 1) in the Configuration register to a 1, then programming a new

T_CRIT value into this register. The T_CRIT Limit can not be changed

again except by cycling power to the LM63.

0x55

(85°C)

Remote Diode

T_CRIT Limit

19

21

R/W

7:0

Remote Diode

T_CRIT

Hysteresis

8-bit integer storing T_CRIT hysteresis. T_CRIT stays activated until

the remote diode temperature goes below [(T_CRIT Limit)—(T_CRIT

Hysteresis)].

0x0A

(10°C)

7:0

7:3

00000

00

These bits are unused and should always set to 0.

00: Filter Disabled

Remote Diode

Temperature

Filter

01: Filter Level 1 (minimal filtering, same as 10)

10: Filter Level 1 (minimal filtering, same as 01)

11: Filter Level 2 (maximum filtering)

2:1

0

BF

R/W

0: the ALERT/Tach pin functions normally.

Comparator

Mode

1: the ALERTTach pin behaves as a comparator, asserting itself when

an ALERT condition exists, de-asserting itself when the ALERT

condition goes away.

0

26

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Table 10. ALERT Status and Mask Registers

ADDRESS

HEX

READ/

WRITE

POR

VALUE

BITS

NAME

DESCRIPTION

02_HEXALERT STATUS REGISTER (8-bits) (All Alarms are latched until read, then cleared if alarm condition was removed at the

time of the read.)

When this bit is a 0, the ADC is not converting.

7

0

Busy

When this bit is set to a 1, the ADC is performing a conversion. This bit

does not affect ALERT status.

When this bit is a 0, the internal temperature of the LM63 is at or below

the Local High Setpoint.

When this bit is a 1, the internal temperature of the LM63 is above the

Local High Setpoint, and an ALERT is triggered.

Local

High Alarm

6

5

4

0

This bit is unused and always read as 0.

When this bit is a 0, the temperature of the Remote Diode is at or

below the Remote High Setpoint.

When this bit is a 1, the temperature of the Remote Diode is above the

Remote High Setpoint, and an ALERT is triggered.

Remote

High Alarm

When this bit is a 0, the temperature of the Remote Diode is at or

above the Remote Low Setpoint.

When this bit is a 1, the temperature of the Remote Diode is below the

Remote Low Setpoint, and an ALERT is triggered.

Remote

Low Alarm

3

2

1

0

0x02

Read Only

When this bit is a 0, the Remote Diode appears to be correctly

connected.

When this bit is a 1, the Remote Diode may be disconnected or

shorted. This Alarm does not trigger an ALERT.

Remote Diode

Fault Alarm

When this bit is a 0, the temperature of the Remote Diode is at or

below the T_CRIT Limit.

When this bit is a 1, the temperature of the Remote Diode is above the

T_CRIT Limit, and an ALERT is triggered..

Remote

T_CRIT Alarm

When this bit is a 0, the Tachometer count is lower than or equal to the

Tachometer Limit (the RPM of the fan is greater than or equal to the

minimum desired RPM).

When this bit is a 1, the Tachometer count is higher than the

Tachometer Limit (the RPM of the fan is less than the minimum

desired RPM), and an ALERT is triggered. Note that if this bit is set,

the function of the ALERT/Tach pin must be Tach input, so an external

ALERT condition will not be generated. The user may read the status

register periodically to find out if and ALERT condition has occurred.

0

Tach Alarm

16_HEXALERT MASK REGISTER (8-bits)

7

6

5

1

0

1

This bit is unused and always read as 1.

Local High

Alarm Mask

When this bit is a 0, a Local High Alarm event will generate an ALERT.

When this bit is a 1, a Local High Alarm will not generate an ALERT

This bit is unused and always read as 1.

When this bit is a 0, Remote High Alarm event will generate an

Remote

High Alarm Mask

ALERT.

4

3

0

When this bit is a 1, a Remote High Alarm event will not generate an

ALERT.

When this bit is a 0, a Remote Low Alarm event will generate an

ALERT.

When this bit is a 1, a Remote Low Alarm event will not generate an

ALERT.

16

R/W

Remote

Low Alarm

Mask

2

1

0

This bit is unused and always read as 1.

Remote

T_CRIT

Alarm Mask

When this bit is a 0, a Remote T_CRIT event will generate an ALERT.

When this bit is a 1, a Remote T_CRIT event will not generate an

ALERT.

Tach

Alarm Mask

When this bit is a 0, a Tach Alarm event will generate an ALERT.

When this bit is a 1, a Tach Alarm event will not generate an ALERT.

0

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Table 11. Conversion Rate And One-Shot Registers

ADDRESS

HEX

READ/

WRITE

POR

VALUE

BITS

NAME

DESCRIPTION

04 (0A)_HEXCONVERSION RATE REGISTER (8-bits)

Sets the conversion rate of the LM63.

00000000 = 0.0625 Hz

00000001 = 0.125 Hz

00000010 = 0.25 Hz

00000011 = 0.5 Hz

00000100 = 1 Hz

Conversion

Rate

04 (0A)

R/W

7:0

0x08

00000101 = 2 Hz

00000110 = 4 Hz

00000111 = 8 Hz

00001000 = 16 Hz

00001001 = 32 Hz

All other values = 32 Hz

04 (0A)_HEXONE-SHOT REGISTER (8-bits)

Write

Only

One Shot

Trigger

With the LM63 in the STANDBY mode a single write to this register will

initiate one complete temperature conversion cycle.

0F

7:0

N/A

Table 12. ID Registers

ADDRESS

HEX

READ/

WRITE

POR

VALUE

BITS

NAME

DESCRIPTION

FF_HEXSTEPPING / DIE REVISION ID REGISTER (8-bits)

Read

Only

Stepping/Die

Revision ID

FF

7:0

0x41

Version of LM63

FE_HEXMANUFACTURER’S ID REGISTER (8-bits)

Read

Only

FE

7:0

0x01

Manufacturer’s ID 0x01 = Texas Instruments

28

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APPLICATION NOTES

FAN CONTROL DUTY CYCLE VS. REGISTER SETTINGS AND FREQUENCY

ACTUAL

DUTY

CYCLE, %

WHEN

75% IS

SELECTED

PWM

FREQ AT

360 kHz

INTERNAL

CLOCK, kHz

PWM

FREQ AT

1.4 kHz

INTERNAL

CLOCK, Hz

PWM

VALUE

4D [5:0]

FOR 100%

PWM

VALUE

4C [5:0] FOR

ABOUT 75%

PWM

VALUE

4C [5:0]

FOR 50%

PWM

FREQ

4D [4:0]

STEP

RESOLUTION,

%

0

Address 0 is mapped to Address 1

1

50

2

1

180.0

703.1

351.6

234.4

175.8

140.6

117.2

100.4

87.9

78.1

70.3

63.9

58.6

54.1

50.2

46.9

43.9

41.4

39.1

37.0

35.2

33.5

32.0

30.6

29.3

28.1

27.0

26.0

25.1

24.2

23.4

22.7

50.0

75.0

2

25

4

3

2

90.00

60.00

45.00

36.00

30.00

25.71

22.50

20.00

18.00

16.36

15.00

13.85

12.86

12.00

11.25

10.59

10.00

9.47

3

16.7

12.5

10.0

8.33

7.14

6.25

5.56

5.00

4.54

4.16

3.85

3.57

3.33

3.13

2.94

2.78

2.63

2.50

2.38

2.27

2.17

2.08

2.00

1.92

1.85

1.79

1.72

1.67

1.61

6

5

3

83.3

4

8

6

4

75.0

5

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

8

5

80.0

6

9

6

75.0

7

11

12

14

15

17

18

20

21

23

24

26

27

29

30

32

33

35

36

38

39

41

42

44

45

47

7

78.6

8

75.0

9

77.8

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

75.0

77.27

75.00

76.92

75.00

76.67

75.00

76.47

75.00

76.32

75.00

76.19

75.00

76.09

75.00

76.00

75.00

75.93

75.00

75.86

75.00

75.81

9.00

8.57

8.18

7.82

7.50

7.20

6.92

6.67

6.42

6.21

6.00

5.81

COMPUTING DUTY CYCLES FOR A GIVEN FREQUENCY

Select a PWM Frequency from the first column corresponding to the desired actual frequency in columns 6 or 7.

Note the PWM Value for 100% Duty Cycle.

Find the Duty Cycle by taking the PWM Value of Register 4C and computing:

PWM _Value

DutyCycle _(%) =

ì100%

PWM _Value _ for _ 100%

(1)

Example: For a PWM Frequency of 24, a PWM Value at 100% = 48 and PWM Value actual = 28, then the Duty

Cycle is (28/48) × 100% = 58.3%.

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REQUIRED INITIAL FAN CONTROL REGISTER SEQUENCE

Important! The BIOS must follow the sequence listed in Table 13 to configure the following Fan Registers for the

LM63 before using any of the Fan or Tachometer or PWM registers.

Table 13. [Register]_HEXand Setup Instructions

STEP

[Register]_HEXAND SETUP INSTRUCTIONS⁽¹⁾

[4A] Write bits 0 and 1; 3 and 4. This includes tach settings if used, PWM internal clock select (1.4 kHz or 360 kHz) and PWM

Output Polarity.

1

2

3

[4B] Write bits 0 through 5 to program the spin-up settings.

[4D] Write bits 0 through 4 to set the frequency settings. This works with the PWM internal clock select.

Choose, then write, only one of the following:

A. [4F–5F] the Lookup Table, or

B. [4C] the PWM value bits 0 through 5.

4

5

If Step 4A, Lookup Table, was chosen and written then write [4A] bit 5 = 0.

(1) All other registers can be written at any time after the above sequence.

COMPUTING RPM OF THE FAN FROM THE TACH COUNT

The Tach Count Registers 46_HEXand 47_HEXcount the number of periods of the 90 kHz tachometer clock in the

LM63 for the tachometer input from the fan assuming a 2 pulse per revolution fan tachometer, such as the fans

supplied with the Pentium 4 boxed processors. The RPM of the fan can be computed from the Tach Count

Registers 46_HEXand 47_HEX. This can best be shown through an example.

EXAMPLE:

Given: the fan used has a tachometer output with 2 per revolution.

Let:

•

Register 46 (LSB) is BF_HEX= Decimal (11 x 16) + 15 = 191 and

Register 47 (MSB) is 7_HEX= Decimal (7 x 256) = 1792.

The total Tach Count, in decimal, is 191 + 1792 = 1983.

The RPM is computed using the formula

f ì 5,400,000

Fan _ RPM =

,

Total _ Tach _ Count _( Decimal )

where

•

f = 1 for 2 pulses/rev fan tachometer output;

f = 2 for 1 pulse/rev fan tachometer output, and

f = 2 / 3 for 3 pulses/rev fan tachometer output

(2)

(3)

For our example

1ì 5,400,000

Fan _ RPM =

= 2723 _ RPM

1983

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USE OF THE LOOKUP TABLE FOR NON-LINEAR PWM VALUES VS TEMPERATURE

The Lookup Table, Registers 50 through 5F, can be used to create a non-linear PWM vs Temperature curve that

could be used to reduce the acoustic noise from processor fan due to linear or step transfer functions. An

example is given below.

EXAMPLE:

In a particular system it was found that the best acoustic fan noise performance was found to occur when the

PWM vs Temperature transfer function curve was parabolic in shape.

From 25°C to 105°C the fan is to go from 20% to 100%. Since there are 8 steps to the Lookup Table we will

break up the Temperature range into 8 separate temperatures. For the 80°C over 8-steps = 10°C per step. This

takes care of the x-axis.

For the PWM Value, we first select the PWM Frequency. In this example, we will make the PWM Frequency

(Register 4C) 20.

For 100% Duty Cycle then, the PWM value is 40. For 20%, the minimum is 40 x (0.2) = 8.

We can then arrange the PWM, Temperature pairs in a parabolic fashion in the form of y = 0.005 • (x −25)²+ 8

PWM VALUE

CALCULATED

CLOSEST PWM

VALUE

TEMPERATURE

25

35

45

55

65

75

85

95

105

8.0

8

8.5

9

10.0

12.5

16.0

20.5

26.0

32.5

40.0

10

13

16

21

26

33

40

We can then program the Lookup Table with the temperature and Closest PWM Values required for the curve

required in our example.

NON-IDEALITY FACTOR AND TEMPERATURE ACCURACY

The LM63 can be applied to remote diode sensing in the same way as other integrated-circuit temperature

sensors. It can be soldered to a printed-circuit board, and because the path of best thermal conductivity is

between the die and the pins, its temperature will effectively be that of the printed-circuit board lands and traces

soldered to its pins. This presumes that the ambient air temperature is nearly the same as the surface

temperature of the printed-circuit board. If the air temperature is much higher or lower than the surface

temperature, the actual temperature of the LM63 die will be an intermediate temperature between the surface

and air temperatures. Again, the primary thermal conduction path is through the leads, so the circuit board

surface temperature will contribute to the die temperature much more than the air temperature.

To measure the temperature external to the die use a remote diode. This diode can be located on the die of the

target IC, such as a CPU processor chip as shown in Figure 14, allowing measurement of the IC’s temperature,

independent of the LM63’s temperature. The LM63 has been optimized for use with the thermal diode on the die

of an Intel Pentium 4 or a Mobile Pentium 4 Processor-M processor.

2

D+

I

E

= I

F

2.2 nF

3

PROCESSOR

D-

I

R

LM63

I

C

Figure 14. Processor Connection to LM63

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SNAS190E –SEPTEMBER 2002–REVISED MAY 2013

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A discrete diode can also be used to sense the temperature of external objects or ambient air. Remember that a

discrete diode’s temperature will be affected, and often dominated by, the temperature of its leads.

Most silicon diodes do not lend themselves well to this application. It is recommended that a diode-connected

2N3904 transistor be used, as shown in Figure 15. The base of the transistor is connected to the collector and

becomes the anode. The emitter is the cathode.

I

F

2

3

D+

D-

MMBT3904

2.2 nF

I

R

LM63

Figure 15. Processor Connection to LM63

A LM63 with a diode-connected 2N3904 transistor approximates the temperature reading of the LM63 with the

Pentium 4 processor by 1°C.

T_2N3904= T_{PENTIUM 4}− 1°C

(4)

DIODE NON-IDEALITY

When a transistor is connected to a diode the following relationship holds for V_be, T, and I_F:

≈

’

V_be

»

…

ÿ

Ÿ

⁄

∆

÷

h∂V_{T ◊}

«

I_F= I_S

- 1

e

∂

…

Ÿ

where

(5)

kT

q

V =

T

•

q = 1.6x10⁻¹⁹Coulombs (the electron charge)

T = Absolute Temperature in Kelvin

k = 1.38x10⁻²³joules/K (Boltzmann’s constant)

η is the non-ideality factor of the manufacturing process used to make the thermal diode

I_s= Saturation Current and is process dependent

I_f= Forward Current through the base emitter junction

V_be= Base Emitter Voltage Drop

(6)

(7)

In the active region, the −1 term is negligible and may be eliminated, yielding the following equation

≈

’

V_be

»

…

_÷ÿ

∆

h∂V_{T ◊}

«

Ÿ

I_F= I_S

e

∂

…

Ÿ

⁄

In Equation 7, η and I_sare dependent upon the process that was used in the fabrication of the particular diode.

By forcing two currents with a very controlled ratio (N) and measuring the resulting voltage difference, it is

possible to eliminate the I_sterm. Solving for the forward voltage difference yields the relationship:

≈

’

kT

q

( )

∂ ln N

DV_be= h

∆

÷

«

◊

(8)

32

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SNAS190E –SEPTEMBER 2002–REVISED MAY 2013

The voltage seen by the LM63 also includes the I_F×R_Svoltage drop across the internal series resistance of the

Pentium 4 processor’s thermal diode. The non-ideality factor, η, is the only other parameter not accounted for

and depends on the diode that is used for measurement. Since ΔV_beis proportional to both η and T, the

variations in η cannot be distinguished from variations in temperature. Since the temperature sensor does not

control the non-ideality factor, it will directly add to the inaccuracy of the sensor.

For the Intel Pentium 4 and Mobile Pentium 4 Processor-M processors Intel specifies a ±0.1% variation in η from

part to part. As an example, assume that a temperature sensor has an accuracy specification of ±1%°C at room

temperature of 25°C and process used to manufacture the diode has a non-ideality variation of ±0.1%. The

resulting accuracy will be:

T_ACC= ±1°C + (±0.1% of 298°K) = ±1.3°C

(9)

The additional inaccuracy in the temperature measurement caused by η, can be eliminated if each temperature

sensor is calibrated with the remote diode that it will be paired with. Refer to the processor datasheet for the non-

ideality factor.

COMPENSATING FOR DIODE NON-IDEALITY

In order to compensate for the errors introduced by non-ideality, the temperature sensor is calibrated for a

particular processor. Texas Instruments temperature sensors are always calibrated to the typical non-ideality of a

particular processor type.

The LM63 is calibrated for the non-ideality of the 0.13 micron Intel Pentium 4 and Mobile Pentium 4 Processor-M

processors.

When a temperature sensor, calibrated for a specific type of processor is used with a different processor type or

a given processor type has a non-ideality that strays form the typical value, errors are introduced.

Temperature errors associated with non-ideality may be introduced in a specific temperature range of concern

through the use of the Temperature Offset Registers 11_HEXand 12_HEX

.

The user is encouraged to send an e-mail to hardware.monitor.team@ti.com to further request information on

our recommended setting of the offset register for different processor types.

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PCB LAYOUT FOR MINIMIZING NOISE

Figure 16. Ideal Diode Trace Layout

In a noisy environment, such as a processor mother board, layout considerations are very critical. Noise induced

on traces running between the remote temperature diode sensor and the LM63 can cause temperature

conversion errors. Keep in mind that the signal level the LM63 is trying to measure is in microvolts. The following

guidelines should be followed:

1. Use a low-noise +3.3VDC power supply, and bypass to GND with a 0.1 µF ceramic capacitor in parallel with

a 100 pF ceramic capacitor. A bulk capacitance of 10 µF needs to be in the vicinity of the LM63's V_DDpin.

2. Place the100 pF power supply bypass capacitor as close as possible to the V_DDpin and the recommended

2.2 nF diode capacitor as close as possible to the LM63's D+ and D− pins. Make sure the traces to the

2.2 nF capacitor are matched.

3. Ideally, the LM63 should be placed within 10 cm of the Processor diode pins with the traces being as

straight, short and identical as possible. Trace resistance of 1 Ω can cause as much as 1°C of error. This

error can be compensated by using the Remote Temperature Offset Registers, since the value placed in

these registers will automatically be subtracted from or added to the remote temperature reading.

4. Diode traces should be surrounded by a GND guard ring to either side, above and below if possible. This

GND guard should not be between the D+ and D− lines. In the event that noise does couple to the diode

lines it would be ideal if it is coupled common mode. That is equally to the D+ and D− lines.

5. Avoid routing diode traces in close proximity to power supply switching or filtering inductors.

6. Avoid running diode traces close to or parallel to high-speed digital and bus lines. Diode traces should be

kept at least 2 cm apart from the high-speed digital traces.

7. If it is necessary to cross high-speed digital traces, the diode traces and the high-speed digital traces should

cross at a 90 degree angle.

8. The ideal place to connect the LM63's GND pin is as close as possible to the Processor's GND associated

with the sense diode.

9. Leakage current between D+ and GND should be kept to a minimum. One nano-ampere of leakage can

cause as much as 1°C of error in the diode temperature reading. Keeping the printed circuit board as clean

as possible will minimize leakage current.

Noise coupling into the digital lines greater than 400 mVp-p (typical hysteresis) and undershoot less than 500 mV

below GND, may prevent successful SMBus communication with the LM63. SMBus no acknowledge is the most

common symptom, causing unnecessary traffic on the bus. Although the SMBus maximum frequency of

communication is rather low (100 kHz max), care still needs to be taken to ensure proper termination within a

system with multiple parts on the bus and long printed circuit board traces. An RC lowpass filter with a 3 dB

corner frequency of about 40 MHz is included on the LM63's SMBCLK input. Additional resistance can be added

in series with the SMBData and SMBCLK lines to further help filter noise and ringing. Minimize noise coupling by

keeping digital traces out of switching power supply areas as well as ensuring that digital lines containing high-

speed data communications cross at right angles to the SMBData and SMBCLK lines.

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SNAS190E –SEPTEMBER 2002–REVISED MAY 2013

REVISION HISTORY

Changes from Revision D (May 2013) to Revision E

Page

•

Changed layout of National Data Sheet to TI format .......................................................................................................... 34

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PACKAGE MATERIALS INFORMATION

www.ti.com

8-May-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0

B0

K0

P1

W

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

LM63CIMAX

LM63CIMAX/NOPB

LM63DIMAX

SOIC

D

8

2500

330.0

12.4

6.5

5.4

2.0

8.0

12.0

Q1

LM63DIMAX/NOPB

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

8-May-2013

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

LM63CIMAX

LM63CIMAX/NOPB

LM63DIMAX

SOIC

D

8

2500

367.0

35.0

LM63DIMAX/NOPB

Pack Materials-Page 2

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型号：	LM63
厂家：	TEXAS INSTRUMENTS
描述：	The LM63 is a remote diode temperature sensor with integrated fan control. 该LM63是一个远程二极管温度传感器，集成风扇控制。风扇二极管传感器温度传感器
文件：	总41页 (文件大小：1043K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LM63 [TI]

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