LM9036QMM-5.0/NOPB [TI]

Ultra-Low Quiescent Current Voltage Regulator;
LM9036QMM-5.0/NOPB
型号: LM9036QMM-5.0/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

Ultra-Low Quiescent Current Voltage Regulator

光电二极管 输出元件 调节器
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LM9036Q  
www.ti.com  
SNVS685B NOVEMBER 2010REVISED MARCH 2013  
LM9036Q Ultra-Low Quiescent Current Voltage Regulator  
Check for Samples: LM9036Q  
1
FEATURES  
DESCRIPTION  
The LM9036Q ultra-low quiescent current regulator  
features low dropout voltage and low current in the  
standby mode. With less than 25µA Ground Pin  
current at a 0.1mA load, the LM9036Q is ideally  
suited for automotive and other battery operated  
systems. The LM9036Q retains all of the features that  
are common to low dropout regulators including a low  
dropout PNP pass device, short circuit protection,  
reverse battery protection, and thermal shutdown.  
The LM9036Q has a 40V maximum operating voltage  
limit, a 40°C to +125°C operating temperature  
range, and ±5% output voltage tolerance over the  
entire output current, input voltage, and temperature  
range.  
2
AEC-Q100 Grade 1 Qualified (-40°C to 125°C)  
Ultra Low Ground Pin Current (IGND 25µA for  
IOUT = 0.1mA)  
Fixed 5V, 3.3V, 50mA Output  
Output Tolerance ±5% Over Line, Load, and  
Temperature  
Dropout Voltage Typically 200mV @ IOUT  
50mA  
=
45V Reverse Transient Protection  
Internal Short Circuit Current Limit  
Internal Thermal Shutdown Protection  
40V Operating Voltage Limit  
Typical Application  
* Required if regulator is located more than 2from power supply filter capacitor.  
** Required for stability. Must be rated over intended operating temperature range. Effective series resistance (ESR)  
is critical, see Electrical Characteristics. Locate capacitor as close as possible to the regulator output and ground  
pins. Capacitance may be increased without bound.  
Connection Diagram  
Figure 1. See Package Number D0008A  
Top View  
Figure 2. See Package Number DGK0008A  
Top View  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2010–2013, Texas Instruments Incorporated  
LM9036Q  
SNVS685B NOVEMBER 2010REVISED MARCH 2013  
www.ti.com  
(1)(2)  
Absolute Maximum Ratings  
Input Voltage (Survival)  
+55V, 45V  
±1.9kV  
(3)  
ESD Susceptibility  
(4)  
Power Dissipation  
Internally limited  
150°C  
Junction Temperature (TJmax  
)
Storage Temperature Range  
65°C to +150°C  
260°C  
Lead Temperature (Soldering, 10 sec.)  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not  
apply when operating the device beyond its specified operating ratings.  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and  
specifications.  
(3) Human body model, 100pF discharge through a 1.5kΩ resistor.  
(4) The maximum power dissipation is a function of TJmax, θJA, and TA. The maximum allowable power dissipation at any ambient  
temperature is PD = (TJmax TA)/θJA. If this dissipation is exceeded, the die temperature will rise above 150°C and the LM9036Q will go  
into thermal shutdown.  
Operating Ratings  
Operating Temperature Range  
40°C to +125°C  
40V  
Maximum Input Voltage (Operational)  
(1)(2)  
SOIC-8 (D0008A) θJA  
140°C/W  
45°C/W  
SOIC-8 (D0008A) θJC  
(1)  
VSSOP-8 (DGK0008A) θJA  
200°C/W  
(1) Typical θJA with 1 square inch of 2 oz. copper pad area directly under the ground tab.  
(2) Worst case (Free Air) per EIA / JESD51-3.  
Electrical Characteristics - LM9036Q-5.0  
VIN = 14V, IOUT = 10 mA, TJ = 25°C, unless otherwise specified. Boldface limits apply over entire operating temperature  
range  
Min  
Typical  
Max  
Parameter  
Conditions  
Units  
(1)  
(2)  
(1)  
4.80  
5.00  
5.20  
Output Voltage (VOUT  
)
V
5.5V VIN 26V,  
0.1mA IOUT 50mA  
4.75  
5.00  
5.25  
(3)  
IOUT = 0.1mA, 8V VIN 24V  
IOUT = 1mA, 8V VIN 24V  
IOUT = 10mA, 8V VIN 24V  
IOUT = 50mA, 8V VIN 24V  
6V VIN 40V, IOUT = 1mA  
0.1mA IOUT 5mA  
20  
50  
25  
100  
0.5  
2.5  
30  
µA  
Quiescent Current (IGND  
)
0.3  
2.0  
10  
mA  
Line Regulation (Δ VOUT  
)
mV  
mV  
mV  
V
Load Regulation (Δ VOUT  
)
10  
30  
5mA IOUT 50mA  
10  
30  
Dropout Voltage (Δ VOUT  
)
IOUT = 0.1mA  
0.05  
0.20  
120  
60  
22  
0.10  
0.40  
250  
IOUT = 50mA  
V
Short Circuit Current (ISC  
)
VOUT = 0V  
65  
40  
10  
mA  
dB  
µF  
Ripple Rejection (PSRR)  
Vripple = 1Vrms, Fripple = 120Hz  
Output Bypass Capacitance  
(COUT  
0.3Ω ≤ ESR 8Ω  
0.1mA IOUT 50mA  
)
(1) Tested limits are specified to AOQL (Average Outgoing Quality Level) and 100% tested.  
(2) Typicals are at 25°C (unless otherwise specified) and represent the most likely parametric norm.  
(3) To ensure constant junction temperature, pulse testing is used.  
2
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Copyright © 2010–2013, Texas Instruments Incorporated  
Product Folder Links: LM9036Q  
LM9036Q  
www.ti.com  
SNVS685B NOVEMBER 2010REVISED MARCH 2013  
Electrical Characteristics - LM9036Q-3.3  
VIN = 14V, IOUT = 10 mA, TJ = 25°C, unless otherwise specified. Boldface limits apply over entire operating temperature  
range  
Min  
Typical  
Max  
Parameter  
Conditions  
Units  
(1)  
(2)  
(1)  
3.168  
3.30  
3.432  
Output Voltage (VOUT  
)
V
5.5V VIN 26V,  
0.1mA IOUT 50mA  
3.135  
3.30  
3.465  
(3)  
IOUT = 0.1mA, 8V VIN 24V  
IOUT = 1mA, 8V VIN 24V  
IOUT = 10mA, 8V VIN 24V  
IOUT = 50mA, 8V VIN 24V  
6V VIN 40V, IOUT = 1mA  
0.1mA IOUT 5mA  
20  
50  
25  
100  
0.5  
2.5  
30  
µA  
Quiescent Current (IGND  
)
0.3  
2.0  
10  
mA  
Line Regulation (Δ VOUT  
)
mV  
mV  
mV  
V
Load Regulation (Δ VOUT  
)
10  
30  
5mA IOUT 50mA  
10  
30  
Dropout Voltage (Δ VOUT  
)
IOUT = 0.1mA  
0.05  
0.20  
120  
60  
33  
0.10  
0.40  
250  
IOUT = 50mA  
V
Short Circuit Current (ISC  
)
VOUT = 0V  
65  
40  
22  
mA  
dB  
µF  
Ripple Rejection (PSRR)  
Vripple = 1Vrms, Fripple = 120Hz  
Output Bypass Capacitance  
(COUT  
0.3Ω ≤ ESR 8Ω  
0.1mA IOUT 50mA  
)
(1) Tested limits are specified to AOQL (Average Outgoing Quality Level) and 100% tested.  
(2) Typicals are at 25°C (unless otherwise specified) and represent the most likely parametric norm.  
(3) To ensure constant junction temperature, pulse testing is used.  
Copyright © 2010–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
3
Product Folder Links: LM9036Q  
LM9036Q  
SNVS685B NOVEMBER 2010REVISED MARCH 2013  
www.ti.com  
Typical Performance Characteristics  
Dropout Voltage  
Quiescent Current  
Figure 3.  
Figure 4.  
Quiescent Current  
Quiescent Current  
Figure 5.  
Figure 6.  
Peak Output Current  
Figure 7.  
4
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Copyright © 2010–2013, Texas Instruments Incorporated  
Product Folder Links: LM9036Q  
LM9036Q  
www.ti.com  
SNVS685B NOVEMBER 2010REVISED MARCH 2013  
APPLICATIONS INFORMATION  
Unlike other PNP low dropout regulators, the LM9036Q remains fully operational to 40V. Owing to power  
dissipation characteristics of the package, full output current cannot be ensured for all combinations of ambient  
temperature and input voltage.  
The junction to ambient thermal resistance θJA rating has two distinct components: the junction to case thermal  
resistance rating θJC; and the case to ambient thermal resistance rating θCA. The relationship is defined as: θJA  
θJC + θCA  
=
.
While the LM9036Q has an internally set thermal shutdown point of typically 150°C, this is intended as a safety  
feature only. Continuous operation near the thermal shutdown temperature should be avoided as it may have a  
negative affect on the life of the device.  
The LM9036Q maintains regulation to 55V, it will not withstand a short circuit above 40V because of safe  
operating area limitations in the internal PNP pass device. Above 55V the LM9036Q will break down with  
catastrophic effects on the regulator and possibly the load as well. Do not use this device in a design where the  
input operating voltage may exceed 40V, or where transients are likely to exceed 55V.  
Copyright © 2010–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
Product Folder Links: LM9036Q  
 
LM9036Q  
SNVS685B NOVEMBER 2010REVISED MARCH 2013  
www.ti.com  
REVISION HISTORY  
Changes from Revision A (March 2013) to Revision B  
Page  
Changed layout of National Data Sheet to TI format ............................................................................................................ 5  
6
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Copyright © 2010–2013, Texas Instruments Incorporated  
Product Folder Links: LM9036Q  
PACKAGE OPTION ADDENDUM  
www.ti.com  
13-Sep-2014  
PACKAGING INFORMATION  
Orderable Device  
LM9036QM-3.3/NOPB  
LM9036QM-5.0/NOPB  
LM9036QMM-3.3/NOPB  
LM9036QMM-5.0/NOPB  
LM9036QMMX-3.3/NOPB  
LM9036QMMX-5.0/NOPB  
LM9036QMX-3.3/NOPB  
LM9036QMX-5.0/NOPB  
Status Package Type Package Pins Package  
Eco Plan  
Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(6)  
(3)  
(4/5)  
ACTIVE  
SOIC  
SOIC  
D
8
8
8
8
8
8
8
8
95  
Green (RoHS  
& no Sb/Br)  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
LM903  
6QM-3  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
D
95  
Green (RoHS  
& no Sb/Br)  
LM903  
6QM-5  
VSSOP  
VSSOP  
VSSOP  
VSSOP  
SOIC  
DGK  
DGK  
DGK  
DGK  
D
1000  
1000  
3500  
3500  
2500  
2500  
Green (RoHS  
& no Sb/Br)  
KDBQ  
KDAQ  
KDBQ  
KDAQ  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
LM903  
6QM-3  
SOIC  
D
Green (RoHS  
& no Sb/Br)  
LM903  
6QM-5  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
13-Sep-2014  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish  
value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
26-Mar-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LM9036QMM-3.3/NOPB VSSOP  
LM9036QMM-5.0/NOPB VSSOP  
LM9036QMMX-3.3/NOPB VSSOP  
LM9036QMMX-5.0/NOPB VSSOP  
DGK  
DGK  
DGK  
DGK  
D
8
8
8
8
8
8
1000  
1000  
3500  
3500  
2500  
2500  
178.0  
178.0  
330.0  
330.0  
330.0  
330.0  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
5.3  
5.3  
5.3  
5.3  
6.5  
6.5  
3.4  
3.4  
3.4  
3.4  
5.4  
5.4  
1.4  
1.4  
1.4  
1.4  
2.0  
2.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
LM9036QMX-3.3/NOPB  
LM9036QMX-5.0/NOPB  
SOIC  
SOIC  
D
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
26-Mar-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LM9036QMM-3.3/NOPB  
LM9036QMM-5.0/NOPB  
LM9036QMMX-3.3/NOPB  
LM9036QMMX-5.0/NOPB  
LM9036QMX-3.3/NOPB  
LM9036QMX-5.0/NOPB  
VSSOP  
VSSOP  
VSSOP  
VSSOP  
SOIC  
DGK  
DGK  
DGK  
DGK  
D
8
8
8
8
8
8
1000  
1000  
3500  
3500  
2500  
2500  
210.0  
210.0  
367.0  
367.0  
367.0  
367.0  
185.0  
185.0  
367.0  
367.0  
367.0  
367.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
SOIC  
D
Pack Materials-Page 2  
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