LMC6484IN/NOPB [TI]
CMOS Quad Rail-to-Rail Input and Output Operational Amplifier;
| 型号： | LMC6484IN/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | CMOS Quad Rail-to-Rail Input and Output Operational Amplifier 放大器 光电二极管 |
| 文件： | 总24页 (文件大小：969K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LMC6484
LMC6484 CMOS Quad Rail-to-Rail Input and Output Operational Amplifier
Literature Number: SNOS675B
August 2000
LMC6484
CMOS Quad Rail-to-Rail Input and Output Operational
Amplifier
General Description
Features
The LMC6484 provides a common-mode range that extends
to both supply rails. This rail-to-rail performance combined
with excellent accuracy, due to a high CMRR, makes it
unique among rail-to-rail input amplifiers.
(Typical unless otherwise noted)
n Rail-to-Rail Input Common-Mode Voltage Range
(Guaranteed Over Temperature)
n Rail-to-Rail Output Swing (within 20 mV of supply rail,
100 kΩ load)
n Guaranteed 3V, 5V and 15V Performance
n Excellent CMRR and PSRR: 82 dB
n Ultra Low Input Current: 20 fA
It is ideal for systems, such as data acquisition, that require
a large input signal range. The LMC6484 is also an excellent
upgrade for circuits using limited common-mode range am-
plifiers such as the TLC274 and TLC279.
Maximum dynamic signal range is assured in low voltage
and single supply systems by the LMC6484’s rail-to-rail out-
put swing. The LMC6484’s rail-to-rail output swing is guar-
anteed for loads down to 600Ω.
n High Voltage Gain (RL = 500 kΩ): 130 dB
n Specified for 2 kΩ and 600Ω loads
Applications
n Data Acquisition Systems
n Transducer Amplifiers
Guaranteed low voltage characteristics and low power dis-
sipation make the LMC6484 especially well-suited for
battery-operated systems.
n Hand-held Analytic Instruments
n Medical Instrumentation
See the LMC6482 data sheet for a Dual CMOS operational
amplifier with these same features.
n Active Filter, Peak Detector, Sample and Hold, pH
Meter, Current Source
n Improved Replacement for TLC274, TLC279
3V Single Supply Buffer Circuit
Rail-to-Rail Input
Rail-to-Rail Output
DS011714-2
DS011714-3
DS011714-1
© 2001 National Semiconductor Corporation
DS011714
www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature Range
Junction Temperature (Note 4)
−65˚C to +150˚C
150˚C
Operating Ratings (Note 1)
Supply Voltage
3.0V ≤ V+ ≤ 15.5V
ESD Tolerance (Note 2)
Differential Input Voltage
Voltage at Input/Output Pin
Supply Voltage (V+ − V−)
Current at Input Pin (Note 12)
Current at Output Pin
2.0 kV
±
Supply Voltage
(V+) + 0.3V, (V−) − 0.3V
Junction Temperature Range
LMC6484AM
−55˚C ≤ TJ ≤ +125˚C
−40˚C ≤ TJ ≤ +85˚C
16V
LMC6484AI, LMC6484I
±
5 mA
Thermal Resistance (θJA
)
N Package, 14-Pin Molded DIP
M Package, 14-Pin
70˚C/W
±
(Notes 3, 8)
30 mA
40 mA
260˚C
Current at Power Supply Pin
Lead Temp. (Soldering, 10 sec.)
Surface Mount
110˚C/W
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2 and RL 1M. Boldface
>
limits apply at the temperature extremes.
Typ
LMC6484AI LMC6484I LMC6484M
Symbol
Parameter
Conditions
(Note 5)
Limit
(Note 6)
0.750
Limit
(Note 6)
3.0
Limit
(Note 6)
3.0
Units
VOS
Input Offset Voltage
0.110
1.0
mV
max
1.35
3.7
3.8
TCVOS Input Offset Voltage
Average Drift
µV/˚C
IB
Input Current
(Note 13)
0.02
0.01
3
4.0
2.0
4.0
2.0
100
50
pA max
pA max
pF
IOS
CIN
Input Offset Current
Common-Mode
Input Capacitance
Input Resistance
(Note 13)
>
RIN
10
Tera Ω
CMRR Common Mode
Rejection Ratio
0V ≤ VCM ≤ 15.0V,
V+ = 15V
82
70
67
65
62
65
60
dB
min
0V ≤ VCM ≤ 5.0V
V+ = 5V
82
82
70
65
65
67
62
60
+PSRR Positive Power Supply
Rejection Ratio
5V ≤ V+ ≤ 15V,
V− = 0V, VO = 2.5V
−5V ≤ V− ≤ −15V,
V+ = 0V, VO = −2.5V
V+ = 5V and 15V
For CMRR ≥ 50 dB
70
65
65
dB
min
dB
67
62
60
−PSRR Negative Power Supply
Rejection Ratio
82
70
65
65
67
62
60
min
V
VCM
Input Common-Mode
Voltage Range
V− − 0.3
V+ + 0.3
666
−0.25
0
V+ + 0.25
V+
−0.25
0
V+ + 0.25
V+
−0.25
0
V+ + 0.25
V+
max
V
min
V/mV
min
V/mV
min
V/mV
min
V/mV
min
AV
Large Signal
Voltage Gain
RL = 2kΩ
Sourcing
140
84
120
72
120
60
(Notes 7, 13)
Sinking
Sourcing
Sinking
75
35
35
35
20
20
18
RL = 600Ω
300
80
50
50
(Notes 7, 13)
48
30
25
35
20
15
15
13
10
8
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2
DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2 and RL 1M. Boldface
limits apply at the temperature extremes.
>
Typ
LMC6484AI LMC6484I LMC6484M
Symbol
Parameter
Output Swing
Conditions
V+ = 5V
(Note 5)
Limit
(Note 6)
4.8
Limit
(Note 6)
4.8
Limit
(Note 6)
4.8
Units
VO
4.9
0.1
4.7
0.3
14.7
0.16
14.1
0.5
20
V
min
V
RL = 2 kΩ to V+/2
4.7
4.7
4.7
0.18
0.24
4.5
0.18
0.24
4.5
0.18
0.24
4.5
max
V
V+ = 5V
RL = 600Ω to V+/2
4.24
0.5
4.24
0.5
4.24
0.5
min
V
0.65
14.4
14.2
0.32
0.45
13.4
13.0
1.0
0.65
14.4
14.2
0.32
0.45
13.4
13.0
1.0
0.65
14.4
14.2
0.32
0.45
13.4
13.0
1.0
max
V
V+ = 15V
RL = 2 kΩ to V+/2
min
V
max
V
V+ = 15V
RL = 600Ω to V+/2
min
V
1.3
1.3
1.3
max
mA
min
mA
min
mA
min
mA
min
mA
max
mA
max
ISC
ISC
IS
Output Short Circuit
Current
Sourcing, VO = 0V
Sinking, VO = 5V
Sourcing, VO = 0V
16
16
16
12
12
10
V+ = 5V
15
11
11
11
9.5
9.5
8.0
Output Short Circuit
Current
V+ = 15V
30
28
28
28
22
22
20
Sinking, VO = 12V
(Note 8)
30
30
30
30
24
24
22
Supply Current
All Four Amplifiers
V+ = +5V, VO = V+/2
All Four Amplifiers
V+ = +15V, VO = V+/2
2.0
2.6
2.8
2.8
2.8
3.6
3.6
3.8
3.0
3.0
3.0
3.8
3.8
4.0
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2 and RL 1M. Boldface
>
limits apply at the temperature extremes.
Typ
LMC6484A LMC6484I LMC6484M
Symbol
Parameter
Slew Rate
Conditions
(Note 9)
(Note 5)
Limit
(Note 6)
1.0
Limit
(Note 6)
0.9
Limit
(Note 6)
0.9
Units
SR
1.3
V/µs
min
MHz
Deg
dB
0.7
0.63
0.54
GBW
φm
Gain-Bandwidth Product
Phase Margin
V+ = 15V
1.5
50
Gm
Gain Margin
15
Amp-to-Amp Isolation
Input-Referred
(Note 10)
f = 1 kHz
VCM = 1V
f = 1 kHz
150
37
dB
en
in
Voltage Noise
Input-Referred
0.03
Current Noise
3
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AC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2 and RL 1M. Boldface
limits apply at the temperature extremes.
>
Typ
LMC6484A LMC6484I LMC6484M
Symbol
Parameter
Conditions
(Note 5)
Limit
Limit
Limit
Units
(Note 6)
(Note 6)
(Note 6)
T.H.D.
Total Harmonic Distortion
f = 1 kHz, AV = −2
RL = 10 kΩ, VO = 4.1 VPP
f = 10 kHz, AV = −2
RL = 10 kΩ, VO = 8.5 VPP
V+ = 10V
0.01
0.01
%
%
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 3V, V− = 0V, VCM = VO = V+/2 and RL 1M
>
Typ
LMC6484AI
Limit
LMC6484I
Limit
LMC6484M
Limit
Symbol
VOS
Parameter
Conditions
(Note 5)
Units
(Note 6)
2.0
(Note 6)
3.0
(Note 6)
3.0
Input Offset Voltage
0.9
2.0
mV
max
2.7
3.7
3.8
TCVOS
Input Offset Voltage
Average Drift
µV/˚C
IB
Input Bias Current
Input Offset Current
Common Mode
Rejection Ratio
Power Supply
0.02
0.01
74
pA
pA
dB
min
dB
min
V
IOS
CMRR
0V ≤ VCM ≤ 3V
64
68
0
60
60
0
60
60
0
PSRR
VCM
3V ≤ V+ ≤ 15V, V− = 0V
For CMRR ≥ 50 dB
80
Rejection Ratio
Input Common-Mode
Voltage Range
V− − 0.25
V+ + 0.25
max
V
V+
V+
V+
min
V
VO
Output Swing
RL = 2 kΩ to V+/2
RL = 600Ω to V+/2
2.8
0.2
2.7
V
2.5
0.6
2.5
0.6
2.5
0.6
V
min
V
0.37
1.65
max
mA
max
IS
Supply Current
All Four Amplifiers
2.5
2.5
2.5
3.0
3.0
3.2
AC Electrical Characteristics
Unless otherwise specified, V+ = 3V, V− = 0V, VCM = VO = V+/2 and RL 1M
>
Typ
LMC6484AI LMC6484I LMC6484M
Symbol
Parameter
Slew Rate
Conditions
(Note 11)
(Note 5)
Limit
Limit
Limit
Units
(Note 6)
(Note 6)
(Note 6)
SR
0.9
1.0
V/µs
MHz
%
GBW
T.H.D.
Gain-Bandwidth Product
Total Harmonic Distortion
f = 10 kHz, AV = −2
0.01
RL = 10 kΩ, VO = 2 VPP
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
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4
AC Electrical Characteristics (Continued)
Note 2: Human body model, 1.5 kΩ in series with 100 pF. All pins rated per method 3015.6 of MIL-STD-883. This is a class 2 device rating.
Note 3: Applies to both single supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
±
maximum allowed junction temperature of 150˚C. Output currents in excess of 30 mA over long term may adversely affect reliability.
Note 4: The maximum power dissipation is a function of T , θ , and T . The maximum allowable power dissipation at any ambient temperature is
J(max)
JA
A
P
D
= (T
− T )/θ . All numbers apply for packages soldered directly into a PC board.
J(max) A JA
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
+
Note 7: V = 15V, V
= 7.5V and R connected to 7.5V. For Sourcing tests, 7.5V ≤ V ≤ 11.5V. For Sinking tests, 3.5V ≤ V ≤ 7.5V.
L O O
CM
+
+
Note 8: Do not short circuit output to V , when V is greater than 13V or reliability will be adversely affected.
+
Note 9: V = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of either the positive or negative slew rates.
+
Note 10: Input referred, V = 15V and R = 100 kΩ connected to 7.5V. Each amp excited in turn with 1 kHz to produce V = 12 V
.
L
O
PP
Note 11: Connected as Voltage Follower with 2V step input. Number specified is the slower of either the positive or negative slew rates.
Note 12: Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
Note 13: Guaranteed limits are dictated by tester limitations and not device performance. Actual performance is reflected in the typical value.
Note 14: For guaranteed Military Temperature Range parameters see RETSMC6484X.
Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified
Supply Current vs
Supply Voltage
Input Current vs
Temperature
Sourcing Current vs
Output Voltage
DS011714-39
DS011714-40
DS011714-41
Sourcing Current vs
Output Voltage
Sourcing Current vs
Output Voltage
Sinking Current vs
Output Voltage
DS011714-42
DS011714-43
DS011714-44
5
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Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Sinking Current vs
Output Voltage
Sinking Current vs
Output Voltage
Output Voltage Swing
vs Supply Voltage
DS011714-45
DS011714-46
DS011714-47
Input Voltage Noise
vs Frequency
Input Voltage Noise
vs Input Voltage
DS011714-48
DS011714-49
Input Voltage Noise
vs Input Voltage
Input Voltage Noise
vs Input Voltage
Crosstalk Rejection
vs Frequency
DS011714-50
DS011714-51
DS011714-52
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6
Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Crosstalk Rejection
vs Frequency
Positive PSRR
vs Frequency
Negative PSRR
vs Frequency
DS011714-53
DS011714-54
DS011714-55
CMRR vs Frequency
CMRR vs Input Voltage
CMRR vs Input Voltage
DS011714-57
DS011714-58
DS011714-56
CMRR vs Input Voltage
∆VOS vs CMR
∆ VOS vs CMR
DS011714-59
DS011714-60
DS011714-61
7
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Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Input Voltage
vs Output Voltage
Input Voltage
vs Output Voltage
Open Loop
Frequency Response
DS011714-62
DS011714-63
DS011714-64
Open Loop Frequency
Response
Open Loop Frequency
Response vs Temperature
Maximum Output Swing
vs Frequency
DS011714-65
DS011714-67
DS011714-66
Gain and Phase
vs Capacitive Load
Gain and Phase
vs Capacitive Load
Open Loop Output
Impedance vs Frequency
DS011714-68
DS011714-69
DS011714-70
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8
Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Open Loop Output
Impedance vs Frequency
Slew Rate vs
Supply Voltage
Non-Inverting Large Signal
Pulse Response
DS011714-73
DS011714-72
DS011714-71
Non-Inverting Large Signal
Pulse Response
Non-Inverting Large Signal
Pulse Response
Non-Inverting Small Signal
Pulse Response
DS011714-74
DS011714-75
DS011714-76
Non-Inverting Small Signal
Pulse Response
Non-Inverting Small Signal
Pulse Response
Inverting Large Signal
Pulse Response
DS011714-77
DS011714-78
DS011714-79
9
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Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Inverting Large Signal
Pulse Response
Inverting Large Signal
Pulse Response
Inverting Small Signal
Pulse Response
DS011714-80
DS011714-81
DS011714-82
DS011714-85
DS011714-88
Inverting Small Signal
Pulse Response
Inverting Small Signal
Pulse Response
Stability vs
Capacitive Load
DS011714-83
DS011714-84
Stability vs
Capacitive Load
Stability vs
Capacitive Load
Stability vs
Capacitive Load
DS011714-86
DS011714-87
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10
Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Stability vs
Capacitive Load
Stability vs
Capacitive Load
DS011714-89
DS011714-90
ceeding this absolute maximum rating, as in Figure 2, can
cause excessive current to flow in or out of the input pins
possibly affecting reliability.
Application Information
1.0 Amplifier Topology
The
LMC6484
incorporates
specially
designed
wide-compliance range current mirrors and the body effect to
extend input common mode range to each supply rail.
Complementary paralleled differential input stages, like the
type used in other CMOS and bipolar rail-to-rail input ampli-
fiers, were not used because of their inherent accuracy
problems due to CMRR, cross-over distortion, and
open-loop gain variation.
The LMC6484’s input stage design is complemented by an
output stage capable of rail-to-rail output swing even when
driving a large load. Rail-to-rail output swing is obtained by
taking the output directly from the internal integrator instead
of an output buffer stage.
DS011714-12
2.0 Input Common-Mode Voltage Range
±
FIGURE 2. A 7.5V Input Signal Greatly
Unlike Bi-FET amplifier designs, the LMC6484 does not
exhibit phase inversion when an input voltage exceeds the
negative supply voltage. Figure 1 shows an input voltage
exceeding both supplies with no resulting phase inversion on
the output.
Exceeds the 3V Supply in Figure 3 Causing
No Phase Inversion Due to RI
Applications that exceed this rating must externally limit the
±
maximum input current to 5 mA with an input resistor as
shown in Figure 3.
DS011714-11
FIGURE 3. RI Input Current Protection for
Voltages Exceeding the Supply Voltage
3.0 Rail-To-Rail Output
The approximated output resistance of the LMC6484 is
180Ω sourcing and 130Ω sinking at VS = 3V and 110Ω
sourcing and 83Ω sinking at VS = 5V. Using the calculated
output resistance, maximum output voltage swing can be
estimated as a function of load.
DS011714-10
FIGURE 1. An Input Voltage Signal Exceeds the
LMC6484 Power Supply Voltages with
No Output Phase Inversion
The absolute maximum input voltage is 300 mV beyond
either supply rail at room temperature. Voltages greatly ex-
4.0 Capacitive Load Tolerance
The LMC6484 can typically directly drive a 100 pF load with
VS = 15V at unity gain without oscillating. The unity gain
follower is the most sensitive configuration. Direct capacitive
11
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Application Information (Continued)
loading reduces the phase margin of op-amps. The combi-
nation of the op-amp’s output impedance and the capacitive
load induces phase lag. This results in either an under-
damped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 4. This simple tech-
nique is useful for isolating the capacitive input of multiplex-
ers and A/D converters.
DS011714-17
DS011714-16
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load
FIGURE 7. Pulse Response of
LMC6484 Circuit in Figure 6
5.0 Compensating for Input Capacitance
It is quite common to use large values of feedback resis-
tance with amplifiers that have ultra-low input current, like
the LMC6484. Large feedback resistors can react with small
values of input capacitance due to transducers, photo-
diodes, and circuit board parasitics to reduce phase
margins.
DS011714-18
FIGURE 5. Pulse Response of
the LMC6484 Circuit in Figure 4
DS011714-19
FIGURE 8. Canceling the Effect of Input Capacitance
Improved frequency response is achieved by indirectly driv-
ing capacitive loads as shown in Figure 6.
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 8 ), Cf, is first estimated by:
or
R1 CIN ≤ R2 Cf
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a breadboard, so the actual optimum
value for Cf may be different. The values of Cf should be
checked on the actual circuit. (Refer to the LMC660 quad
CMOS amplifier data sheet for a more detailed discussion.)
DS011714-15
FIGURE 6. LMC6484 Non-Inverting Amplifier,
Compensated to Handle a 330 pF Capacitive Load
R1 and C1 serve to counteract the loss of phase margin by
feeding forward the high frequency component of the output
signal back to the amplifier’s inverting input, thereby preserv-
ing phase margin in the overall feedback loop. The values of
R1 and C1 are experimentally determined for the desired
pulse response. The resulting pulse response can be seen in
Figure 7.
6.0 Printed-Circuit-Board Layout for High-Impedance
Work
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. when one wishes to take advantage
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12
Application Information (Continued)
of the ultra-low input current of the LMC6484, typically less
than 20 fA, it is essential to have an excellent layout. Fortu-
nately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6484’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs, as in Fig-
ure 9. To have a significant effect, guard rings should be
placed in both the top and bottom of the PC board. This PC
foil must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 1012Ω, which is nor-
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 250 times degradation from the LMC6484’s
actual performance. However, if a guard ring is held within 5
mV of the inputs, then even a resistance of 1011Ω would
cause only 0.05 pA of leakage current. See Figure 10 for
typical connections of guard rings for standard op-amp
configurations.
DS011714-21
Inverting Amplifier
DS011714-22
Non-Inverting Amplifier
DS011714-23
Follower
FIGURE 10. Typical Connections of Guard Rings
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an
insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board con-
struction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring.
See Figure 11.
DS011714-20
FIGURE 9. Example of Guard Ring in P.C. Board
Layout
DS011714-24
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board.)
FIGURE 11. Air Wiring
13
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Application Information (Continued)
7.0 Offset Voltage Adjustment
Offset voltage adjustment circuits are illustrated in Figures
13, 14. Large value resistances and potentiometers are used
±
to reduce power consumption while providing typically 2.5
mV of adjustment range, referred to the input, for both
±
5V.
configurations with VS
=
DS011714-26
FIGURE 13. Non-Inverting Configuration
Offset Voltage Adjustment
8.0 Upgrading Applications
The LMC6484 quads and LMC6482 duals have industry
standard pin outs to retrofit existing applications. System
performance can be greatly increased by the LMC6484’s
features. The key benefit of designing in the LMC6484 is
increased linear signal range. Most op-amps have limited
input common mode ranges. Signals that exceed this range
generate a non-linear output response that persists long
after the input signal returns to the common mode range.
DS011714-25
FIGURE 12. Inverting Configuration
Offset Voltage Adjustment
Linear signal range is vital in applications such as filters
where signal peaking can exceed input common mode
ranges resulting in output phase inversion or severe distor-
tion.
9.0 Data Acquisition Systems
Low power, single supply data acquisition system solutions
are provided by buffering the ADC12038 with the LMC6484
(Figure 14). Capable of using the full supply range, the
LMC6484 does not require input signals to be scaled down
to meet limited common mode voltage ranges. The
LMC6484 CMRR of 82 dB maintains integral linearity of a
±
12-bit data acquisition system to
0.325 LSB. Other
rail-to-rail input amplifiers with only 50 dB of CMRR will
degrade the accuracy of the data acquisition system to only
8 bits.
www.national.com
14
Application Information (Continued)
DS011714-28
FIGURE 14. Operating from the same
Supply Voltage, the LMC6484 buffers the
ADC12038 maintaining excellent accuracy
10.0 Instrumentation Circuits
cations that benefit from these features include analytic
medical instruments, magnetic field detectors, gas detectors,
and silicon-based transducers.
The LMC6484 has the high input impedance, large
common-mode range and high CMRR needed for designing
instrumentation circuits. Instrumentation circuits designed
A small valued potentiometer is used in series with Rg to set
the differential gain of the 3 op-amp instrumentation circuit in
Figure 15. This combination is used instead of one large
valued potentiometer to increase gain trim accuracy and
reduce error due to vibration.
with the LMC6484 can reject
a
larger range of
common-mode signals than most in-amps. This makes in-
strumentation circuits designed with the LMC6484 an excel-
lent choice for noisy or industrial environments. Other appli-
DS011714-29
FIGURE 15. Low Power 3 Op-Amp Instrumentation Amplifier
15
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Higher frequency and larger common-mode range applica-
tions are best facilitated by a three op-amp instrumentation
amplifier.
Application Information (Continued)
A 2 op-amp instrumentation amplifier designed for a gain of
100 is shown in Figure 16. Low sensitivity trimming is made
for offset voltage, CMRR and gain. Low cost and low power
consumption are the main advantages of this two op-amp
circuit.
DS011714-30
FIGURE 16. Low-Power Two-Op-Amp Instrumentation Amplifier
11.0 Spice Macromodel
A spice macromodel is available for the LMC6484. This
model includes accurate simulation of:
•
•
•
•
•
input common-mode voltage range
frequency and transient response
GBW dependence on loading conditions
quiescent and dynamic supply current
output swing dependence on loading conditions
and many more characteristics as listed on the macromodel
disk.
Contact your local National Semiconductor sales office to
obtain an operational amplifier spice model library disk.
Typical Single-Supply Applications
DS011714-32
FIGURE 18. Half-Wave Rectifier Waveform
The circuit in Figure 17 use a single supply to half wave
rectify a sinusoid centered about ground. RI limits current
into the amplifier caused by the input voltage exceeding the
supply voltage. Full wave rectification is provided by the
circuit in Figure 19.
DS011714-31
FIGURE 17. Half-Wave Rectifier with
Input Current Protection (RI)
DS011714-33
FIGURE 19. Full Wave Rectifier
with Input Current Protection (RI)
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16
Typical Single-Supply Applications (Continued)
DS011714-34
FIGURE 20. Full Wave Rectifier Waveform
DS011714-35
FIGURE 21. Large Compliance Range Current Source
DS011714-36
FIGURE 22. Positive Supply Current Sense
17
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Typical Single-Supply Applications (Continued)
DS011714-37
FIGURE 23. Low Voltage Peak Detector with Rail-to-Rail Peak Capture Range
In Figure 23 dielectric absorption and leakage is minimized by using a polystyrene or polyethylene hold capacitor. The droop rate
is primarily determined by the value of CH and diode leakage current. The ultra-low input current of the LMC6484 has a negligible
effect on droop.
DS011714-38
FIGURE 24. Rail-to-Rail Sample and Hold
The LMC6484’s high CMRR (85 dB) allows excellent accuracy throughout the circuit’s rail-to-rail dynamic capture range.
DS011714-27
FIGURE 25. Rail-to-Rail Single Supply Low Pass Filter
The low pass filter circuit in Figure 25 can be used as an anti-aliasing filter with the same voltage supply as the A/D converter.
Filter designs can also take advantage of the LMC6484 ultra-low input current. The ultra-low input current yields negligible offset
error even when large value resistors are used. This in turn allows the use of smaller valued capacitors which take less board
space and cost less.
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18
Connection Diagram
DS011714-4
Ordering Information
Package
Temperature Range
Military Industrial
NSC
Transport
Media
Drawing
−55˚C to +125˚C
−40˚C to +85˚C
LMC6484AIN
14-pin
N14A
M14A
Rail
Rail
Molded DIP
14-pin
LMC6484IN
LMC6484AIM, AIMX
LMC6484IM, IMX
Small Outline
Tape and
Reel
14-pin Ceramic
DIP
LMC6484AMJ/883
J14A
Rail
19
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Pin Ceramic Dual-In-Line Package
Order Number LMC6484AMJ/883
NS Package Number J14A
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20
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Pin Small Outline
Order Package Number LMC6484AIM, LMC6484AIMX, LMC6484IM or LMC6484IMX
NS Package Number M14A
21
www.national.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Pin Molded DIP
Order Package Number LMC6484AIN, LMC6484IN or LMC6484MN
NS Package Number N14A
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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