LMH6642MAEP [TI]

1 CHANNEL, VIDEO AMPLIFIER, PDSO5, PLASTIC, SOT-23, 5 PIN;
LMH6642MAEP
型号: LMH6642MAEP
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

1 CHANNEL, VIDEO AMPLIFIER, PDSO5, PLASTIC, SOT-23, 5 PIN

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LMH6642, LMH6643, LMH6644  
www.ti.com  
SNOS966P MAY 2001REVISED MARCH 2013  
LMH6642/LMH6643/LMH6644 Low Power, 130MHz, 75mA Rail-to-Rail Output Amplifiers  
Check for Samples: LMH6642, LMH6643, LMH6644  
1
FEATURES  
DESCRIPTION  
The LMH664X family true single supply voltage  
feedback amplifiers offer high speed (130MHz), low  
distortion (62dBc), and exceptionally high output  
current (approximately 75mA) at low cost and with  
reduced power consumption when compared against  
existing devices with similar performance.  
2
(VS = ±5V, TA = 25°C, RL = 2k, AV = +1. Typical  
Values Unless Specified).  
3dB BW (AV = +1) 130MHz  
Supply Voltage Range 2.7V to 12.8V  
Slew Rate (1), (AV = 1) 130V/µs  
Input common mode voltage range extends to 0.5V  
below Vand 1V from V+. Output voltage range  
extends to within 40mV of either supply rail, allowing  
wide dynamic range especially desirable in low  
voltage applications. The output stage is capable of  
approximately 75mA in order to drive heavy loads.  
Fast output Slew Rate (130V/µs) ensures large peak-  
to-peak output swings can be maintained even at  
higher speeds, resulting in exceptional full power  
bandwidth of 40MHz with a 3V supply. These  
characteristics, along with low cost, are ideal features  
Supply Current (no load) 2.7mA/amp  
Output Short Circuit Current +115mA/145mA  
Linear Output Current ±75mA  
Input Common Mode Volt. 0.5V Beyond V, 1V  
from V+  
Output Voltage Swing 40mV from Rails  
Input Voltage Noise (100kHz) 17nV/Hz  
Input Current Noise (100kHz) 0.9pA/Hz  
THD (5MHz, RL = 2k, VO = 2VPP, AV = +2)  
62dBc  
for  
a
multitude of industrial and commercial  
applications.  
Settling Time 68ns  
Careful attention has been paid to ensure device  
stability under all operating voltages and modes. The  
result is a very well behaved frequency response  
characteristic (0.1dB gain flatness up the 12MHz  
under 150load and AV = +2) with minimal peaking  
(typically 2dB maximum) for any gain setting and  
under both heavy and light loads. This along with fast  
settling time (68ns) and low distortion allows the  
device to operate well in ADC buffer, and high  
frequency filter applications as well as other  
applications.  
Fully Characterized for 3V, 5V, and ±5V  
Overdrive Recovery 100ns  
(2)  
Output Short Circuit Protected  
No Output Phase Reversal with CMVR  
Exceeded  
APPLICATIONS  
Active Filters  
CD/DVD ROM  
This device family offers professional quality video  
performance with low DG (0.01%) and DP (0.01°)  
characteristics. Differential Gain and Differential  
Phase characteristics are also well maintained under  
heavy loads (150) and throughout the output  
voltage range. The LMH664X family is offered in  
single (LMH6642), dual (LMH6643), and quad  
(LMH6644) options.  
ADC Buffer Amp  
Portable Video  
Current Sense Buffer  
(1) Slew rate is the average of the rising and falling slew rates.  
(2) Output short circuit duration is infinite for VS < 6V at room  
temperature and below. For VS > 6V, allowable short circuit  
duration is 1.5ms.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2001–2013, Texas Instruments Incorporated  
LMH6642, LMH6643, LMH6644  
SNOS966P MAY 2001REVISED MARCH 2013  
www.ti.com  
Closed Loop Gain vs. Frequency for Various Gain  
Large Signal Frequency Response  
8.0  
6.0  
4.0  
2.0  
0.0  
+3  
+2  
+1  
0
±2.5V  
V
= ±1.5V  
= 2k  
S
A
V
= +1  
2V  
PP  
R
L
±5V  
V
= 0.2V  
PP  
OUT  
4V  
PP  
-1  
-2  
-3  
A
V
= +10  
A
= +5  
V
A
= +2  
V
R
= R = 2k  
L
F
A
= +2  
V
100k  
1M  
10M  
200M  
10k  
100k  
1M  
10M  
100M 500M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 1.  
Figure 2.  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
(1)(2)  
Absolute Maximum Ratings  
(3)  
ESD Tolerance  
2KV  
200V  
(4)  
(5)  
1000V  
VIN Differential  
±2.5V  
(6) (7)  
Output Short Circuit Duration  
Supply Voltage (V+ - V)  
Voltage at Input/Output pins  
Input Current  
See  
,
13.5V  
V+ +0.8V, V0.8V  
±10mA  
Storage Temperature Range  
65°C to +150°C  
+150°C  
(8)  
Junction Temperature  
Soldering Information  
Infrared or Convection Reflow (20 sec)  
Wave Soldering Lead Temp.(10 sec)  
235°C  
260°C  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test  
conditions, see the Electrical Characteristics.  
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.  
(3) Human body model, 1.5kin series with 100pF.  
(4) Machine Model, 0in series with 200pF.  
(5) CDM: Charge Device Model  
(6) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in  
exceeding the maximum allowed junction temperature of 150°C.  
(7) Output short circuit duration is infinite for VS < 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms.  
(8) The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient  
temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.  
2
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Copyright © 2001–2013, Texas Instruments Incorporated  
Product Folder Links: LMH6642 LMH6643 LMH6644  
LMH6642, LMH6643, LMH6644  
www.ti.com  
SNOS966P MAY 2001REVISED MARCH 2013  
(1)  
Operating Ratings  
Supply Voltage (V+ – V)  
2.7V to 12.8V  
40°C to +85°C  
265°C/W  
(2)  
Junction Temperature Range  
Package Thermal Resistance (2) (θJA  
)
5-Pin SOT-23  
8-Pin SOIC  
190°C/W  
8-Pin VSSOP  
14-Pin SOIC  
14- Pin TSSOP  
235°C/W  
145°C/W  
155°C/W  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test  
conditions, see the Electrical Characteristics.  
(2) The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient  
temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.  
3V Electrical Characteristics  
Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 3V, V= 0V, VCM = VO = V+/2, VID (input differential  
voltage) as noted (where applicable) and RL = 2kto V+/2. Boldface limits apply at the temperature extremes.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
(1)  
(2)  
(1)  
BW  
3dB BW  
AV = +1, VOUT = 200mVPP  
80  
115  
46  
MHz  
MHz  
AV = +2, 1, VOUT = 200mVPP  
BW0.1dB  
0.1dB Gain Flatness  
AV = +2, RL = 150to V+/2,  
RL = 402, VOUT = 200mVPP  
19  
PBW  
en  
Full Power Bandwidth  
AV = +1, 1dB, VOUT = 1VPP  
f = 100kHz  
40  
17  
MHz  
Input-Referred Voltage Noise  
nV/Hz  
f = 1kHz  
48  
in  
Input-Referred Current Noise  
f = 100kHz  
0.90  
3.3  
48  
pA/Hz  
f = 1kHz  
THD  
DG  
Total Harmonic Distortion  
Differential Gain  
f = 5MHz, VO = 2VPP, AV = 1,  
RL = 100to V+/2  
dBc  
VCM = 1V, NTSC, AV = +2  
0.17  
RL =150to V+/2  
%
RL =1kto V+/2  
0.03  
0.05  
DP  
Differential Phase  
VCM = 1V, NTSC, AV = +2  
RL =150to V+/2  
deg  
RL =1kto V+/2  
0.03  
47  
CT Rej.  
TS  
Cross-Talk Rejection  
Settling Time  
f = 5MHz, Receiver:  
Rf = Rg = 510, AV = +2  
dB  
ns  
VO = 2VPP, ±0.1%, 8pF Load,  
VS = 5V  
68  
(3)  
SR  
Slew Rate  
AV = 1, VI = 2VPP  
90  
120  
±1  
V/µs  
VOS  
Input Offset Voltage  
For LMH6642 and LMH6644  
±5  
±7  
mV  
For LMH6643  
±1  
±3.4  
±7  
(4)  
TC VOS  
IB  
Input Offset Average Drift  
Input Bias Current  
See  
±5  
µV/°C  
µA  
(5)  
See  
1.50  
2.60  
3.25  
IOS  
RIN  
Input Offset Current  
20  
3
800  
1000  
nA  
Common Mode Input Resistance  
MΩ  
(1) All limits are guaranteed by testing or statistical analysis.  
(2) Typical values represent the most likely parametric norm.  
(3) Slew rate is the average of the rising and falling slew rates.  
(4) Offset voltage average drift determined by dividing the change in VOS at temperature extremes by the total temperature change.  
(5) Positive current corresponds to current flowing into the device.  
Copyright © 2001–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
3
Product Folder Links: LMH6642 LMH6643 LMH6644  
LMH6642, LMH6643, LMH6644  
SNOS966P MAY 2001REVISED MARCH 2013  
www.ti.com  
3V Electrical Characteristics (continued)  
Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 3V, V= 0V, VCM = VO = V+/2, VID (input differential  
voltage) as noted (where applicable) and RL = 2kto V+/2. Boldface limits apply at the temperature extremes.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
(1)  
(2)  
(1)  
CIN  
Common Mode Input  
Capacitance  
2
pF  
CMVR  
Input Common-Mode Voltage  
Range  
CMRR 50dB  
0.5  
2.0  
0.2  
0.1  
V
1.8  
1.6  
CMRR  
AVOL  
Common Mode Rejection Ratio  
Large Signal Voltage Gain  
VCM Stepped from 0V to 1.5V  
72  
95  
96  
dB  
dB  
VO = 0.5V to 2.5V  
80  
75  
RL = 2kto V+/2  
VO = 0.5V to 2.5V  
74  
70  
82  
RL = 150to V+/2  
VO  
Output Swing  
High  
RL = 2kto V+/2, VID = 200mV  
RL = 150to V+/2, VID = 200mV  
RL = 2kto V+/2, VID = 200mV  
RL = 150to V+/2, VID = 200mV  
Sourcing to V+/2  
2.90  
2.80  
2.98  
2.93  
25  
V
Output Swing  
Low  
75  
mV  
75  
150  
ISC  
Output Short Circuit Current  
50  
35  
95  
(6)  
VID = 200mV  
mA  
Sinking to V+/2  
VID = 200mV  
55  
40  
110  
(6)  
IOUT  
Output Current  
VOUT = 0.5V from either supply  
±65  
85  
mA  
dB  
+PSRR  
Positive Power Supply Rejection V+ = 3.0V to 3.5V, VCM = 1.5V  
Ratio  
75  
IS  
Supply Current (per channel)  
No Load  
2.70  
4.00  
4.50  
mA  
(6) Short circuit test is a momentary test. See Note 7 under 5V Electrical Characteristics.  
5V Electrical Characteristics  
Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 5V, V= 0V, VCM = VO = V+/2, VID (input differential  
voltage) as noted (where applicable) and RL = 2kto V+/2. Boldface limits apply at the temperature extremes.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
(1)  
(2)  
(1)  
BW  
3dB BW  
AV = +1, VOUT = 200mVPP  
90  
120  
46  
MHz  
MHz  
AV = +2, 1, VOUT = 200mVPP  
BW0.1dB  
0.1dB Gain Flatness  
AV = +2, RL = 150to V+/2,  
Rf = 402, VOUT = 200mVPP  
15  
PBW  
en  
Full Power Bandwidth  
AV = +1, 1dB, VOUT = 2VPP  
f = 100kHz  
22  
17  
MHz  
Input-Referred Voltage Noise  
nV/Hz  
f = 1kHz  
48  
in  
Input-Referred Current Noise  
f = 100kHz  
0.90  
3.3  
pA/Hz  
f = 1kHz  
THD  
DG  
Total Harmonic Distortion  
Differential Gain  
f = 5MHz, VO = 2VPP, AV = +2  
60  
0.16  
dBc  
NTSC, AV = +2  
RL =150to V+/2  
%
RL = 1kto V+/2  
0.05  
0.05  
DP  
Differential Phase  
NTSC, AV = +2  
RL = 150to V+/2  
deg  
RL = 1kto V+/2  
0.01  
(1) All limits are guaranteed by testing or statistical analysis.  
(2) Typical values represent the most likely parametric norm.  
4
Submit Documentation Feedback  
Copyright © 2001–2013, Texas Instruments Incorporated  
Product Folder Links: LMH6642 LMH6643 LMH6644  
LMH6642, LMH6643, LMH6644  
www.ti.com  
SNOS966P MAY 2001REVISED MARCH 2013  
5V Electrical Characteristics (continued)  
Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 5V, V= 0V, VCM = VO = V+/2, VID (input differential  
voltage) as noted (where applicable) and RL = 2kto V+/2. Boldface limits apply at the temperature extremes.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
(1)  
(2)  
(1)  
CT Rej.  
Cross-Talk Rejection  
Settling Time  
f = 5MHz, Receiver:  
Rf = Rg = 510, AV = +2  
47  
dB  
TS  
VO = 2VPP, ±0.1%, 8pF Load  
AV = 1, VI = 2VPP  
68  
125  
±1  
ns  
(3)  
SR  
VOS  
Slew Rate  
95  
V/µs  
Input Offset Voltage  
For LMH6642 and LMH6644  
±5  
±7  
mV  
For LMH6643  
±1  
±3.4  
±7  
(4)  
TC VOS  
IB  
Input Offset Average Drift  
Input Bias Current  
See  
±5  
µV/°C  
µA  
(5)  
See  
1.70  
2.60  
3.25  
IOS  
Input Offset Current  
20  
800  
1000  
nA  
RIN  
CIN  
Common Mode Input Resistance  
3
2
MΩ  
Common Mode Input  
Capacitance  
pF  
CMVR  
Input Common-Mode Voltage  
Range  
CMRR 50dB  
0.5  
0.2  
0.1  
V
3.8  
4.0  
3.6  
CMRR  
AVOL  
Common Mode Rejection Ratio  
Large Signal Voltage Gain  
VCM Stepped from 0V to 3.5V  
72  
95  
98  
dB  
dB  
VO = 0.5V to 4.50V  
86  
82  
RL = 2kto V+/2  
VO = 0.5V to 4.25V  
76  
72  
82  
RL = 150to V+/2  
VO  
Output Swing  
High  
RL = 2kto V+/2, VID = 200mV  
RL = 150to V+/2, VID = 200mV  
RL = 2kto V+/2, VID = 200mV  
RL = 150to V+/2, VID = 200mV  
Sourcing to V+/2  
4.90  
4.65  
4.98  
4.90  
25  
V
Output Swing  
Low  
100  
150  
mV  
100  
115  
ISC  
Output Short Circuit Current  
55  
40  
(6)(7)  
VID = 200mV  
mA  
Sinking to V+/2  
VID = 200mV  
70  
55  
140  
(6)(7)  
IOUT  
Output Current  
Positive Power Supply Rejection V+ = 4.0V to 6V  
Ratio  
VO = 0.5V from either supply  
±70  
90  
mA  
dB  
+PSRR  
79  
IS  
Supply Current (per channel)  
No Load  
2.70  
4.25  
5.00  
mA  
(3) Slew rate is the average of the rising and falling slew rates.  
(4) Offset voltage average drift determined by dividing the change in VOS at temperature extremes by the total temperature change.  
(5) Positive current corresponds to current flowing into the device.  
(6) Short circuit test is a momentary test. See Note 7.  
(7) Output short circuit duration is infinite for VS < 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms.  
Copyright © 2001–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
Product Folder Links: LMH6642 LMH6643 LMH6644  
 
LMH6642, LMH6643, LMH6644  
SNOS966P MAY 2001REVISED MARCH 2013  
www.ti.com  
±5V Electrical Characteristics  
Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 5V, V= 5V, VCM = VO = 0V, VID (input differential  
voltage) as noted (where applicable) and RL = 2kto ground. Boldface limits apply at the temperature extremes.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
(1)  
(2)  
(1)  
BW  
3dB BW  
AV = +1, VOUT = 200mVPP  
95  
130  
46  
MHz  
MHz  
AV = +2, 1, VOUT = 200mVPP  
BW0.1dB  
0.1dB Gain Flatness  
AV = +2, RL = 150to V+/2,  
Rf = 806, VOUT = 200mVPP  
12  
PBW  
en  
Full Power Bandwidth  
AV = +1, 1dB, VOUT = 2VPP  
f = 100kHz  
24  
17  
MHz  
Input-Referred Voltage Noise  
nV/Hz  
f = 1kHz  
48  
in  
Input-Referred Current Noise  
f = 100kHz  
0.90  
3.3  
pA/Hz  
f = 1kHz  
THD  
DG  
Total Harmonic Distortion  
Differential Gain  
f = 5MHz, VO = 2VPP, AV = +2  
62  
0.15  
dBc  
NTSC, AV = +2  
RL = 150to V+/2  
%
RL = 1kto V+/2  
0.01  
0.04  
DP  
Differential Phase  
NTSC, AV = +2  
RL = 150to V+/2  
deg  
RL = 1kto V+/2  
0.01  
47  
CT Rej.  
TS  
Cross-Talk Rejection  
Settling Time  
f = 5MHz, Receiver:  
Rf = Rg = 510, AV = +2  
dB  
ns  
VO = 2VPP, ±0.1%, 8pF Load,  
VS = 5V  
68  
(3)  
SR  
Slew Rate  
AV = 1, VI = 2VPP  
100  
135  
±1  
V/µs  
mV  
VOS  
Input Offset Voltage  
For LMH6642 and LMH6644  
±5  
±7  
For LMH6643  
±1  
±3.4  
±7  
(4)  
TC VOS  
IB  
Input Offset Average Drift  
Input Bias Current  
See  
±5  
µV/°C  
µA  
(5)  
See  
1.60  
2.60  
3.25  
IOS  
Input Offset Current  
20  
800  
1000  
nA  
RIN  
CIN  
Common Mode Input Resistance  
3
2
MΩ  
Common Mode Input  
Capacitance  
pF  
CMVR  
Input Common-Mode Voltage  
Range  
CMRR 50dB  
5.5  
5.2  
5.1  
V
3.8  
4.0  
3.6  
CMRR  
AVOL  
Common Mode Rejection Ratio  
Large Signal Voltage Gain  
VCM Stepped from 5V to 3.5V  
74  
95  
96  
dB  
dB  
VO = 4.5V to 4.5V,  
RL = 2kΩ  
88  
84  
VO = 4.0V to 4.0V,  
RL = 150Ω  
78  
74  
82  
VO  
Output Swing  
High  
RL = 2k, VID = 200mV  
RL = 150, VID = 200mV  
RL = 2k, VID = 200mV  
RL = 150, VID = 200mV  
4.90  
4.65  
4.96  
4.80  
V
V
Output Swing  
Low  
4.96  
4.80  
4.90  
4.65  
(1) All limits are guaranteed by testing or statistical analysis.  
(2) Typical values represent the most likely parametric norm.  
(3) Slew rate is the average of the rising and falling slew rates.  
(4) Offset voltage average drift determined by dividing the change in VOS at temperature extremes by the total temperature change.  
(5) Positive current corresponds to current flowing into the device.  
6
Submit Documentation Feedback  
Copyright © 2001–2013, Texas Instruments Incorporated  
Product Folder Links: LMH6642 LMH6643 LMH6644  
LMH6642, LMH6643, LMH6644  
www.ti.com  
SNOS966P MAY 2001REVISED MARCH 2013  
±5V Electrical Characteristics (continued)  
Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 5V, V= 5V, VCM = VO = 0V, VID (input differential  
voltage) as noted (where applicable) and RL = 2kto ground. Boldface limits apply at the temperature extremes.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
(1)  
(2)  
(1)  
ISC  
Output Short Circuit Current  
Sourcing to Ground  
VID = 200mV  
60  
35  
115  
145  
(6)(7)  
mA  
Sinking to Ground  
85  
65  
(6)(7)  
VID = 200mV  
IOUT  
Output Current  
VO = 0.5V from either supply  
(V+, V) = (4.5V, 4.5V) to (5.5V,  
5.5V)  
±75  
78  
mA  
dB  
PSRR  
Power Supply Rejection Ratio  
90  
IS  
Supply Current (per channel)  
No Load  
2.70  
4.50  
5.50  
mA  
(6) Short circuit test is a momentary test. See Note 7.  
(7) Output short circuit duration is infinite for VS < 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms.  
Connection Diagram  
1
2
8
+
5
1
V
N/C  
N/C  
OUTPUT  
+
7
V
-
-IN  
-
2
V
6
5
3
4
OUTPUT  
N/C  
+
+IN  
-
+
4
3
-IN  
+IN  
-
V
Figure 3. 5-Pin SOT-23 (LMH6642)  
Top View  
Figure 4. 8-Pin SOIC (LMH6642)  
Top View  
Package Number DBV0005A  
Package Number D0008A  
1
8
+
OUT A  
V
A
-
+
2
3
4
7
6
5
-IN A  
+IN A  
OUT B  
-IN B  
B
+
-
-
+IN B  
V
Figure 5. SOIC and VSSOP 8-Pin  
(LMH6643)  
Figure 6. 14-Pin SOIC and 14-Pin TSSOP  
(LMH6644)  
Top View  
Top View  
Package Number DGK0008A  
Package Numbers D0014A, PW0014A  
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Typical Performance Characteristics  
At TJ = 25°C, V+ = +5, V= 5V, RF = RL = 2k. Unless otherwise specified.  
Closed Loop Frequency Response for Various Supplies  
Closed Loop Gain vs. Frequency for Various Gain  
+3  
+2  
+1  
0
V
S
= ±1.5V  
V
= ±5V  
= 2k  
S
R
L
0
-1  
-2  
-3  
V
= ±2.5V  
V
= 0.2V  
OUT PP  
S
V
S
= ±5V  
-1  
-2  
-3  
A
= +10  
V
V
= ±1.5V  
S
A
= +5  
V
V
= ±2.5V  
S
A
= +2  
V
V
S
= ±5V  
A
= +1  
= 2k  
V
R
L
A
= +1  
V
V
= 0.2V  
OUT  
PP  
500  
M
100k  
1M  
10M  
200M  
100k  
1M  
10M  
100M  
10k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 7.  
Figure 8.  
Closed Loop Gain vs. Frequency for Various Gain  
Closed Loop Frequency Response for Various Temperature  
+3  
85°C  
V
= ±1.5V  
= 2k  
S
A
V
= +1  
0
+2  
+1  
0
-40°C  
R
L
-2  
V
= 0.2V  
PP  
OUT  
25°C  
-4  
-6  
-1  
-2  
-3  
A
V
= +10  
V
= ±1.5V  
= 2k  
S
A
= +5  
V
R
L
A
V
= +1  
V
O
= 0.2V  
PP  
A
= +2  
V
10k  
100k  
1M  
10M  
100M 500M  
10k  
100k  
1M  
10M  
100M 500M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 9.  
Figure 10.  
Closed Loop Gain  
vs.  
Frequency for Various Supplies  
Closed Loop Frequency Response for Various Temperature  
±1.5V  
±2.5V  
85°C  
7.0  
6.5  
6.0  
5.5  
5.0  
0
-2  
25°C  
-4  
±5V  
A
= +2  
V
V
= ±5V  
= 2k  
S
R
R
= 2k  
-40°C  
F
L
R
L
= 150  
= 0.2V  
A
V
= +1  
V
V
O
PP  
= 0.2V  
PP  
OUT  
100k  
1M  
10M  
200M  
10k  
100k  
10M  
100M 500M  
1M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 11.  
Figure 12.  
8
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SNOS966P MAY 2001REVISED MARCH 2013  
Typical Performance Characteristics (continued)  
At TJ = 25°C, V+ = +5, V= 5V, RF = RL = 2k. Unless otherwise specified.  
Closed Loop Small Signal Frequency Response for Various  
Large Signal Frequency Response  
Supplies  
8.0  
8.0  
6.0  
4.0  
2.0  
0.0  
±1.5V  
±2.5V  
6.0  
2V  
PP  
±5V  
4V  
4.0  
2.0  
0.0  
±5  
V
PP  
±2.5V  
V
A
= 0.2V  
= +2  
O
V
PP  
A
= +2  
V
R
F
= R = 2k  
L
R
= R = 2k  
L
F
1M  
10M  
200M  
100k  
100k  
1M  
10M  
200M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 13.  
Figure 14.  
Closed Loop Frequency Response for Various Supplies  
±0.1dB Gain Flatness for Various Supplies  
±5V  
6
±1.5V  
±2.5V  
4
2
0
±1.5V  
±2.5V  
+0.3  
+0.2  
+0.1  
0
±5V  
GAIN  
+25  
-20  
-0.1  
±5V  
PHASE  
V
A
= 0.4V  
= +2  
O
PP  
-65  
V
A
= 0.4V  
= +2  
O
V
PP  
V
-110  
-155  
R
R
= 806W  
= 150W  
F
L
±2.5V  
±1.5V  
R
= 806W  
F
R = 150W  
L
100K  
1M  
10M  
200M  
100K  
1M  
10M  
200M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 15.  
Figure 16.  
VOUT (VPP) for THD < 0.5%  
VOUT (VPP) for THD < 0.5%  
3
5
4
R
= 2k  
L
R
L
= 100W  
2
1
3
2
V
A
= 5V  
S
V
= -1  
1
Rf = 2k  
V
A
= 3V  
= -1  
S
R
= 2K to V /2  
S
L
V
0
0
100k  
1M  
10M  
100M  
100K  
1M  
10M  
100M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 17.  
Figure 18.  
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Typical Performance Characteristics (continued)  
At TJ = 25°C, V+ = +5, V= 5V, RF = RL = 2k. Unless otherwise specified.  
VOUT (VPP) for THD < 0.5%  
Open Loop Gain/Phase for Various Temperature  
80  
60  
40  
20  
0
10  
9
8
7
6
5
4
3
2
1
0
85°C  
R
2K  
=
L
PHASE  
GAIN  
60  
40  
20  
0
-40°C  
R
L
= 100W  
V
= ±1.5V  
S
V
A
= ±5V  
= -1  
S
V
25°C  
R = 2k  
L
-20  
10k  
100k  
1M  
10M  
150M  
100k  
1M  
10M  
100M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 19.  
Figure 20.  
Open Loop Gain/Phase for Various Temperature  
HD2 (dBc) vs. Output Swing  
80  
-80  
-75  
-70  
-65  
-60  
-55  
-50  
-45  
-40  
-35  
-30  
85°C  
GAIN  
60  
PHASE  
5MHz  
40  
60  
40  
20  
25°C  
20  
0
10MHz  
V
A
= 5V  
S
V
0
V
= ±5V  
= 2k  
S
= -1  
-40°C  
10M  
R
L
R
= 2k to V /2  
S
L
-20  
10k  
100k  
1M  
150M  
0
1
2
3
4
5
FREQUENCY (Hz)  
V
(VPP)  
OUT  
Figure 21.  
Figure 22.  
HD3 (dBc) vs. Output Swing  
HD2 vs. Output Swing  
-90  
-80  
-70  
-80  
-75  
-70  
-65  
-60  
-55  
-50  
-45  
-40  
-35  
-30  
100W,1MHz  
100W, 5MHz  
2kW, 5MHz  
5MHz  
-60  
-50  
-40  
2kW, 10MHz  
100W, 10MHz  
V
A
= 5V  
S
10MHz  
= -1  
V
= 5V, A = +2  
S V  
V
-30  
-20  
R
= 2k to V /2  
S
R
L
= 2kW & 100W to V /2  
L
S
0.0  
1.0  
2.0  
3.0  
(V  
4.0  
5.0  
0
1
2
3
4
5
V
)
OUT PP  
V
(V )  
OUT PP  
Figure 23.  
Figure 24.  
10  
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SNOS966P MAY 2001REVISED MARCH 2013  
Typical Performance Characteristics (continued)  
At TJ = 25°C, V+ = +5, V= 5V, RF = RL = 2k. Unless otherwise specified.  
HD3 vs. Output Swing  
THD (dBc) vs. Output Swing  
-90  
-80  
-75  
-70  
-65  
-60  
-55  
-50  
-45  
-40  
-35  
-30  
R
= 2k TO V /2  
S
L
S
V
-80  
V
A
= 5V  
= -1  
100W,1MHz  
-70  
2kW,5MHz  
-60  
5MHz  
2kW,10MHz  
-50  
100W,  
5MHz  
-40  
10MHz  
V
= 5V, A = +2  
V
-30  
-20  
S
R
= 2kW &100W to V /2  
100W, 10MHz  
L
S
0.0  
1.0  
2.0  
3.0  
(V  
4.0  
5.0  
0
1
2
3
4
5
V
)
V
(V )  
OUT  
PP  
OUT PP  
Figure 25.  
Figure 26.  
Settling Time vs. Input Step Amplitude (Output Slew and  
Settle Time)  
Input Noise vs. Frequency  
1k  
100  
10  
100  
10  
1
80  
70  
60  
50  
40  
30  
VOLTAGE  
CURRENT  
V
A
= 5V  
= -1  
S
V
20  
10  
0
R = R = 2k  
f
L
C
= 8pF  
L
0.1  
1
10  
100  
1K  
10K  
100K  
1M  
2
0.5  
1
1.5  
FREQUENCY (Hz)  
INPUT STEP AMPLITUDE (V  
)
PP  
Figure 27.  
Figure 28.  
VOUT from V+ vs. ISOURCE  
VOUT from Vvs. ISINK  
10  
10  
1
VS=±1.5V  
V
= ±1.5V  
S
1
0.1  
85°C  
85°C  
25°C  
0.1  
0.01  
-40°C  
(mA)  
-40°C  
25°C  
0.01  
1
10  
I
100  
(mA)  
1k  
1
10  
100  
1K  
I
SOURCE  
SINK  
Figure 29.  
Figure 30.  
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Typical Performance Characteristics (continued)  
At TJ = 25°C, V+ = +5, V= 5V, RF = RL = 2k. Unless otherwise specified.  
VOUT from V+ vs. ISOURCE  
VOUT from Vvs. ISINK  
= ±5V  
10  
10  
1
V
V
S
= ±5V  
S
85°C  
-40°C  
25°C  
1
0.1  
85°  
C
85°C  
0.1  
0.01  
-40°C  
100  
-40°C  
100  
25°C  
0.01  
1
10  
1k  
1
10  
1k  
I
(mA)  
I
(mA)  
SINK  
SOURCE  
Figure 31.  
Swing vs. VS  
Figure 32.  
Short Circuit Current (to VS/2) vs. VS  
180  
160  
160  
140  
120  
100  
80  
85°C, Sink  
-40°C, Sink  
R
= 150W  
L
85°C, Sourcing  
25°C, Sink  
25°C, Sourcing  
140  
120  
-40°C, Sourcing  
100  
80  
60  
40  
20  
0
25°C, Source  
85°C, Source  
60  
40  
20  
85°C, Sinking  
-40°C, Source  
25°C, Sinking  
-40°C, Sinking  
2
3
4
5
6
7
8
9
10  
2
3
4
5
6
7
8
9
10  
V
(V)  
S
V (V)  
S
Figure 33.  
Figure 34.  
Output Sinking Saturation Voltage vs. IOUT  
Output Sourcing Saturation Voltage vs. IOUT  
1
1
V
= ±2.5  
S
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
V = ±2.5V  
S
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
85°C  
25°C  
85°C  
25°C  
-40°C  
-40°C  
0
20  
40  
60  
(mA)  
80  
100  
120  
0
20  
40  
60  
80  
(mA)  
100 120  
I
SINK  
I
SOURCING  
Figure 35.  
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Figure 36.  
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SNOS966P MAY 2001REVISED MARCH 2013  
Typical Performance Characteristics (continued)  
At TJ = 25°C, V+ = +5, V= 5V, RF = RL = 2k. Unless otherwise specified.  
Closed Loop Output Impedance vs. Frequency AV = +1  
PSRR vs. Frequency  
1000  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
V
A
= 5V  
A
= +1  
S
V
= +10  
V
100  
+ PSRR  
10  
1
- PSRR  
0.1  
0.01  
1k  
100k  
1M  
10M  
100M  
10k  
10k  
100k  
1M  
10M  
100M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 37.  
Figure 38.  
CMRR vs. Frequency  
Crosstalk Rejection vs. Frequency (Output to Output)  
100  
90  
100  
90  
80  
80  
70  
60  
50  
70  
60  
50  
40  
V
A
= 5V  
= +6  
S
V
40  
30  
Receive CH.: A = +2, Rf = Rg = 510  
V
30  
100  
1k  
10k  
100k  
1M  
10M  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 39.  
Figure 40.  
VOS vs. VOUT (Typical Unit)  
= 5V  
VOS vs. VCM (Typical Unit)  
2
1
0.8  
0.6  
0.4  
0.2  
0
V
S
= 10V  
V
S
1.5  
1.0  
0.5  
0
R
L
= 150W to V+/2  
85°C  
85°C  
25°C  
-0.2  
-0.4  
-0.6  
-0.8  
-1  
-0.5  
-1  
25°C  
-40°C  
-1.5  
-40°C  
-2  
-2  
0
2
4
6
8
10  
0
1
2
3
4
5
V
CM  
(V)  
V
(V)  
OUT  
Figure 41.  
Figure 42.  
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Typical Performance Characteristics (continued)  
At TJ = 25°C, V+ = +5, V= 5V, RF = RL = 2k. Unless otherwise specified.  
VOS vs. VS (for 3 Representative Units)  
VOS vs. VS (for 3 Representative Units)  
1
1
-40°C  
0.8  
0.8  
0.6  
0.4  
0.2  
0
Unit #1  
Unit #1  
0.6  
25°C  
0.4  
0.2  
0
Unit #2  
Unit #3  
-0.2  
-0.2  
-0.4  
-0.6  
-0.8  
-1  
Unit #2  
-0.4  
-0.6  
Unit #3  
-0.8  
-1  
3
5
9
2
4
6
8
10  
12  
2
4
6
7
8
10 11  
V
S
(V)  
V
S
(V)  
Figure 43.  
Figure 44.  
IB vs. VS  
VOS vs. VS (for 3 Representative Units)  
-1000  
-1100  
-1200  
-1300  
-1400  
-1500  
-1600  
1
0.8  
0.6  
0.4  
0.2  
0
85°C  
Unit #1  
-40°C  
25°C  
Unit #2  
Unit #3  
-0.2  
-0.4  
-0.6  
-0.8  
-1  
85°C  
-1700  
-1800  
-1900  
2
4
6
8
10  
12  
2
3
4
5
6
7
8
9
10 12  
V
(V)  
S
V
(V)  
S
Figure 45.  
IOS vs. VS  
Figure 46.  
IS vs. VCM  
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
4
3.5  
3
V
S
= 10V  
85°C  
2.5  
2
25°C  
-40°C  
-40°C  
1.5  
1
0.5  
0
25°C  
85°C  
0
-0.5  
2
4
6
8
10  
12  
-2  
0
2
4
6
8
10  
V
(V)  
CM  
V
(V)  
S
Figure 47.  
Figure 48.  
14  
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SNOS966P MAY 2001REVISED MARCH 2013  
Typical Performance Characteristics (continued)  
At TJ = 25°C, V+ = +5, V= 5V, RF = RL = 2k. Unless otherwise specified.  
IS vs. VS  
Small Signal Step Response  
4
V
V
= 3V  
S
= 100mV  
O
PP  
85°C  
R
L
= 2k to V /2  
S
A
V
= -1  
3
25°C  
2
1
-40°C  
40 mV/DIV  
20 ns/DIV  
2
4
6
8
10  
12  
V
(V)  
S
Figure 49.  
Figure 50.  
Large Signal Step Response  
Large Signal Step Response  
= +2  
A
V
V
V
= ±5V  
S
= 8V  
O
PP  
R = 2k  
L
A
= +1  
V
V =±1.5V  
S
V
=2V  
O PP  
A = -1  
V
R =2k  
L
400 mV/DIV  
40.0 nS/DIV  
4 /DIV  
200.0 ns/DIV  
Figure 51.  
Figure 52.  
Small Signal Step Response  
= 3V  
Small Signal Step Response  
V
S
V
S
V
O
A
V
= ±5V  
V
= 100mV  
PP  
O
= 100mV  
PP  
R = 2k to V /2  
L
S
= +1, R = 2k  
L
A
= +1  
V
40 mV/DIV  
10 ns/DIV  
40 mV/DIV  
10.0 ns/DIV  
Figure 53.  
Figure 54.  
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Typical Performance Characteristics (continued)  
At TJ = 25°C, V+ = +5, V= 5V, RF = RL = 2k. Unless otherwise specified.  
Small Signal Step Response  
Small Signal Step Response  
V
V
= ±5V  
= 100mV  
= 2k  
S
VS = ±5V  
VO = 200mVPP  
AV = +2,  
O
PP  
R
L
RL = 2k  
A
= -1  
V
40 mV/DIV  
20 ns/DIV  
20.0 ns/DIV  
40 mV/DIV  
Figure 55.  
Figure 56.  
Large Signal Step Response  
Large Signal Step Response  
V
V
= ±5V  
S
V
V
A
= ±5V  
S
O
V
= 2V  
= 2k  
= -1  
O
PP  
= 8V  
= +2  
= 2k  
PP  
R
L
A
V
R
L
2 V/DIV  
40.0 ns/DIV  
400 mV/DIV  
20 ns/DIV  
Figure 57.  
Figure 58.  
Large Signal Step Response  
A
V
= -1  
V
R
= ±5V  
V
S
= 8V  
PP  
= 2KW  
OUT  
L
2 V/DIV  
100 ns/DIV  
Figure 59.  
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SNOS966P MAY 2001REVISED MARCH 2013  
APPLICATION INFORMATION  
CIRCUIT DESCRIPTION  
The LMH664X family is based on proprietary VIP10 dielectrically isolated bipolar process.  
This device family architecture features the following:  
Complimentary bipolar devices with exceptionally high ft (8GHz) even under low supply voltage (2.7V) and  
low bias current.  
A class A-B “turn-around” stage with improved noise, offset, and reduced power dissipation compared to  
similar speed devices (patent pending).  
Common Emitter push-push output stage capable of 75mA output current (at 0.5V from the supply rails) while  
consuming only 2.7mA of total supply current per channel. This architecture allows output to reach within  
milli-volts of either supply rail.  
Consistent performance over the entire operating supply voltage range with little variation for the most  
important specifications (e.g. BW, SR, IOUT, etc.)  
Significant power saving (40%) compared to competitive devices on the market with similar performance.  
Application Hints  
This Op Amp family is a drop-in replacement for the AD805X family of high speed Op Amps in most applications.  
In addition, the LMH664X will typically save about 40% on power dissipation, due to lower supply current, when  
compared to competition. All AD805X family’s guaranteed parameters are included in the list of LMH664X  
guaranteed specifications in order to ensure equal or better level of performance. However, as in most high  
performance parts, due to subtleties of applications, it is strongly recommended that the performance of the part  
to be evaluated is tested under actual operating conditions to ensure full compliance to all specifications.  
With 3V supplies and a common mode input voltage range that extends 0.5V below V, the LMH664X find  
applications in low voltage/low power applications. Even with 3V supplies, the 3dB BW (@ AV = +1) is typically  
115MHz with a tested limit of 80MHz. Production testing guarantees that process variations with not compromise  
speed. High frequency response is exceptionally stable confining the typical 3dB BW over the industrial  
temperature range to ±2.5%.  
As can be seen from the typical performance plots, the LMH664X output current capability (75mA) is enhanced  
compared to AD805X. This enhancement, increases the output load range, adding to the LMH664X’s versatility.  
Because of the LMH664X’s high output current capability attention should be given to device junction  
temperature in order not to exceed the Absolute Maximum Rating.  
This device family was designed to avoid output phase reversal. With input overdrive, the output is kept near  
supply rail (or as closed to it as mandated by the closed loop gain setting and the input voltage). See Figure 60:  
Input  
Output  
+
V
-
V
V
A
= ±2.5V  
= +1  
S
V
1V/DIV  
200 ns/DIV  
Figure 60. Input and Output Shown with CMVR Exceeded  
However, if the input voltage range of 0.5V to 1V from V+ is exceeded by more than a diode drop, the internal  
ESD protection diodes will start to conduct. The current in the diodes should be kept at or below 10mA.  
Output overdrive recovery time is less than 100ns as can be seen from Figure 61 plot:  
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V
IN  
(1 V/DIV)  
V
A
=±5V, V =5V  
IN  
S
PP  
V
OUT  
(2 V/DIV)  
100 ns/DIV  
=+5, R =R =2k  
V
F
L
2 V/DIV  
Figure 61. Overload Recovery Waveform  
INPUT AND OUTPUT TOPOLOGY  
All input / output pins are protected against excessive voltages by ESD diodes connected to V+ and V-rails (see  
Figure 62). These diodes start conducting when the input / output pin voltage approaches 1Vbe beyond V+ or V-  
to protect against over voltage. These diodes are normally reverse biased. Further protection of the inputs is  
provided by the two resistors (R in Figure 62), in conjunction with the string of anti-parallel diodes connected  
between both bases of the input stage. The combination of these resistors and diodes reduces excessive  
differential input voltages approaching 2Vbe. The most common situation when this occurs is when the device is  
used as a comparator (or with little or no feedback) and the device inputs no longer follow each other. In such a  
case, the diodes may conduct. As a consequence, input current increases and the differential input voltage is  
clamped. It is important to make sure that the subsequent current flow through the device input pins does not  
violate the Absolute Maximum Ratings of the device. To limit the current through this protection circuit, extra  
series resistors can be placed. Together with the built-in series resistors of several hundred ohms, these external  
resistors can limit the input current to a safe number (i.e. < 10mA). Be aware that these input series resistors  
may impact the switching speed of the device and could slow down the device.  
V+  
V+  
V+  
R
R
IN-  
IN+  
V-  
V-  
Figure 62. Input Equivalent Circuit  
SINGLE SUPPLY, LOW POWER PHOTODIODE AMPLIFIER  
The circuit shown in Figure 63 is used to amplify the current from a photodiode into a voltage output. In this  
circuit, the emphasis is on achieving high bandwidth and the transimpedance gain setting is kept relatively low.  
Because of its high slew rate limit and high speed, the LMH664X family lends itself well to such an application.  
This circuit achieves approximately 1V/mA of transimpedance gain and capable of handling up to 1mApp from the  
photodiode. Q1, in a common base configuration, isolates the high capacitance of the photodiode (Cd) from the  
Op Amp input in order to maximize speed. Input is AC coupled through C1 to ease biasing and allow single  
supply operation. With 5V single supply, the device input/output is shifted to near half supply using a voltage  
divider from VCC. Note that Q1 collector does not have any voltage swing and the Miller effect is minimized. D1,  
tied to Q1 base, is for temperature compensation of Q1’s bias point. Q1 collector current was set to be large  
enough to handle the peak-to-peak photodiode excitation and not too large to shift the U1 output too far from  
mid-supply.  
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SNOS966P MAY 2001REVISED MARCH 2013  
No matter how low an Rf is selected, there is a need for Cf in order to stabilize the circuit. The reason for this is  
that the Op Amp input capacitance and Q1 equivalent collector capacitance together (CIN) will cause additional  
phase shift to the signal fed back to the inverting node. Cf will function as a zero in the feedback path counter-  
acting the effect of the CIN and acting to stabilized the circuit. By proper selection of Cf such that the Op Amp  
open loop gain is equal to the inverse of the feedback factor at that frequency, the response is optimized with a  
theoretical 45° phase margin.  
CF =  
SQRT (CIN)/(2p ∂ GBWP RF)  
(1)  
where GBWP is the Gain Bandwidth Product of the Op Amp  
Optimized as such, the I-V converter will have a theoretical pole, fp, at:  
fP =  
SQRT GBWP/(2pRF CIN)  
(2)  
With Op Amp input capacitance of 3pF and an estimate for Q1 output capacitance of about 3pF as well, CIN  
=
6pF. From the typical performance plots, LMH6642/6643 family GBWP is approximately 57MHz. Therefore, with  
Rf = 1k, from Equation 1 and Equation 2 above.  
Cf = 4.1pF and fp = 39MHz  
C
f
5pF  
Photodiode  
Equivalent  
Circuit  
V
bias  
R
f
1kW  
V
+5V  
=
R
CC  
bias  
C
C1  
100nF  
Q1  
2N3904  
-1mA  
PP  
-
V
out  
d
R2  
R
d
Photodiode  
1.8kW  
10  
-
200pF  
x
R5  
510W  
+
ı100kW  
I
d
R11  
D1  
1N4148  
910  
W
R10  
1kW  
R3  
1kW  
+5V  
Figure 63. Single Supply Photodiode I-V Converter  
For this example, optimum Cf was empirically determined to be around 5pF. This time domain response is shown  
in Figure 64 below showing about 9ns rise/fall times, corresponding to about 39MHz for fp. The overall supply  
current from the +5V supply is around 5mA with no load.  
200 mV/DIV  
20 ns/DIV  
Figure 64. Converter Step Response (1VPP, 20 ns/DIV)  
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PRINTED CIRCUIT BOARD LAYOUT AND COMPONENT VALUES SECTION  
Generally, a good high frequency layout will keep power supply and ground traces away from the inverting input  
and output pins. Parasitic capacitances on these nodes to ground will cause frequency response peaking and  
possible circuit oscillations (see Application Note OA-15 for more information). Texas Instruments suggests the  
following evaluation boards as a guide for high frequency layout and as an aid in device testing and  
characterization:  
Device  
Package  
Evaluation Board PN  
LMH730216  
LMH6642MF  
LMH6642MA  
LMH6643MA  
LMH6643MM  
LMH6644MA  
LMH6644MT  
5-Pin SOT-23  
8-Pin SOIC  
8-Pin SOIC  
8-Pin VSSOP  
14-Pin SOIC  
14-Pin TSSOP  
LMH730227  
LMH730036  
LMH730123  
LMH730231  
LMH730131  
Another important parameter in working with high speed/high performance amplifiers, is the component values  
selection. Choosing external resistors that are large in value will effect the closed loop behavior of the stage  
because of the interaction of these resistors with parasitic capacitances. These capacitors could be inherent to  
the device or a by-product of the board layout and component placement. Either way, keeping the resistor values  
lower, will diminish this interaction to a large extent. On the other hand, choosing very low value resistors could  
load down nodes and will contribute to higher overall power dissipation.  
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SNOS966P MAY 2001REVISED MARCH 2013  
REVISION HISTORY  
Changes from Revision O (March 2013) to Revision P  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 20  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
9-Nov-2013  
PACKAGING INFORMATION  
Orderable Device  
LMH6642MA/NOPB  
LMH6642MAX/NOPB  
Status Package Type Package Pins Package  
Eco Plan  
Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 85  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(6)  
(3)  
(4/5)  
ACTIVE  
SOIC  
SOIC  
D
8
8
95  
Green (RoHS  
& no Sb/Br)  
CU SN  
Level-1-260C-UNLIM  
LMH66  
42MA  
ACTIVE  
D
2500  
Green (RoHS  
& no Sb/Br)  
CU SN  
Level-1-260C-UNLIM  
-40 to 85  
LMH66  
42MA  
LMH6642MF  
NRND  
SOT-23  
SOT-23  
DBV  
DBV  
5
5
1000  
1000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 85  
-40 to 85  
A64A  
A64A  
LMH6642MF/NOPB  
ACTIVE  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMH6642MFX/NOPB  
LMH6643MA  
ACTIVE  
NRND  
SOT-23  
SOIC  
SOIC  
SOIC  
SOIC  
DBV  
D
5
8
8
8
8
3000  
95  
Green (RoHS  
& no Sb/Br)  
CU SN  
Call TI  
CU SN  
Call TI  
CU SN  
Level-1-260C-UNLIM  
Call TI  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
A64A  
TBD  
LMH66  
43MA  
LMH6643MA/NOPB  
LMH6643MAX  
ACTIVE  
NRND  
D
95  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
Call TI  
LMH66  
43MA  
D
2500  
2500  
TBD  
LMH66  
43MA  
LMH6643MAX/NOPB  
ACTIVE  
D
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMH66  
43MA  
LMH6643MM  
NRND  
VSSOP  
VSSOP  
DGK  
DGK  
8
8
1000  
1000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 85  
-40 to 85  
A65A  
A65A  
LMH6643MM/NOPB  
ACTIVE  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMH6643MMX/NOPB  
LMH6644MA/NOPB  
LMH6644MAX/NOPB  
LMH6644MT/NOPB  
LMH6644MTX/NOPB  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
VSSOP  
SOIC  
DGK  
D
8
3500  
55  
Green (RoHS  
& no Sb/Br)  
CU SN  
SN | CU SN  
SN | CU SN  
CU SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
A65A  
14  
14  
14  
14  
Green (RoHS  
& no Sb/Br)  
LMH6644MA  
LMH6644MA  
SOIC  
D
2500  
94  
Green (RoHS  
& no Sb/Br)  
TSSOP  
TSSOP  
PW  
PW  
Green (RoHS  
& no Sb/Br)  
LMH66  
44MT  
2500  
Green (RoHS  
& no Sb/Br)  
CU SN  
LMH66  
44MT  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
9-Nov-2013  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish  
value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
23-Sep-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LMH6642MAX/NOPB  
LMH6642MF  
SOIC  
SOT-23  
SOT-23  
SOT-23  
SOIC  
D
DBV  
DBV  
DBV  
D
8
5
2500  
1000  
1000  
3000  
2500  
2500  
2500  
2500  
330.0  
178.0  
178.0  
178.0  
330.0  
330.0  
330.0  
330.0  
12.4  
8.4  
6.5  
3.2  
3.2  
3.2  
6.5  
6.5  
6.5  
6.95  
5.4  
3.2  
3.2  
3.2  
5.4  
5.4  
9.35  
8.3  
2.0  
1.4  
1.4  
1.4  
2.0  
2.0  
2.3  
1.6  
8.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
8.0  
12.0  
8.0  
Q1  
Q3  
Q3  
Q3  
Q1  
Q1  
Q1  
Q1  
LMH6642MF/NOPB  
LMH6642MFX/NOPB  
LMH6643MAX  
5
8.4  
8.0  
5
8.4  
8.0  
8
12.4  
12.4  
16.4  
12.4  
12.0  
12.0  
16.0  
12.0  
LMH6643MAX/NOPB  
LMH6644MAX/NOPB  
LMH6644MTX/NOPB  
SOIC  
D
8
SOIC  
D
14  
14  
TSSOP  
PW  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
23-Sep-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LMH6642MAX/NOPB  
LMH6642MF  
SOIC  
SOT-23  
SOT-23  
SOT-23  
SOIC  
D
DBV  
DBV  
DBV  
D
8
5
2500  
1000  
1000  
3000  
2500  
2500  
2500  
2500  
367.0  
210.0  
210.0  
210.0  
367.0  
367.0  
367.0  
367.0  
367.0  
185.0  
185.0  
185.0  
367.0  
367.0  
367.0  
367.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
LMH6642MF/NOPB  
LMH6642MFX/NOPB  
LMH6643MAX  
5
5
8
LMH6643MAX/NOPB  
LMH6644MAX/NOPB  
LMH6644MTX/NOPB  
SOIC  
D
8
SOIC  
D
14  
14  
TSSOP  
PW  
Pack Materials-Page 2  
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